AU661864B2 - Multiport multidrop digital system - Google Patents

Multiport multidrop digital system Download PDF

Info

Publication number
AU661864B2
AU661864B2 AU24907/92A AU2490792A AU661864B2 AU 661864 B2 AU661864 B2 AU 661864B2 AU 24907/92 A AU24907/92 A AU 24907/92A AU 2490792 A AU2490792 A AU 2490792A AU 661864 B2 AU661864 B2 AU 661864B2
Authority
AU
Australia
Prior art keywords
data
remote terminals
frame
terminals
remote
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
AU24907/92A
Other languages
English (en)
Other versions
AU2490792A (en
Inventor
Robert J Duggan
Tat N Ho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Datacomm Inc
Original Assignee
General Datacomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Datacomm Inc filed Critical General Datacomm Inc
Publication of AU2490792A publication Critical patent/AU2490792A/en
Application granted granted Critical
Publication of AU661864B2 publication Critical patent/AU661864B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/14—Monitoring arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0682—Clock or time synchronisation in a network by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/12—Arrangements providing for calling or supervisory signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/40—Network security protocols

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Security & Cryptography (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Medicines Containing Antibodies Or Antigens For Use As Internal Diagnostic Agents (AREA)
AU24907/92A 1991-08-26 1992-08-21 Multiport multidrop digital system Ceased AU661864B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US74989791A 1991-08-26 1991-08-26
US749897 1991-08-26
PCT/US1992/007030 WO1993004541A1 (en) 1991-08-26 1992-08-21 Multiport multidrop digital system

Publications (2)

Publication Number Publication Date
AU2490792A AU2490792A (en) 1993-03-16
AU661864B2 true AU661864B2 (en) 1995-08-10

Family

ID=25015672

Family Applications (1)

Application Number Title Priority Date Filing Date
AU24907/92A Ceased AU661864B2 (en) 1991-08-26 1992-08-21 Multiport multidrop digital system

Country Status (4)

Country Link
EP (1) EP0601013A1 (enrdf_load_stackoverflow)
AU (1) AU661864B2 (enrdf_load_stackoverflow)
CA (1) CA2116228A1 (enrdf_load_stackoverflow)
WO (1) WO1993004541A1 (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9806268D0 (en) * 1998-03-25 1998-05-20 Gec Alsthom Ltd Method for determining propagation delays and method for detecting processor-clock drift in a communications system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4660195A (en) * 1984-03-23 1987-04-21 Nitsuko Limited Channel detecting circuit in a receiver in a time-division multiplex transmission system
US4726017A (en) * 1985-05-21 1988-02-16 Fla. Multidrop data concentrator communication network

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5698955A (en) * 1980-01-11 1981-08-08 Mitsubishi Electric Corp Constituting method of meeting line for multi-direction multiplex communication
JPS6124338A (ja) * 1984-07-12 1986-02-03 Nec Corp 多方向多重通信方式
US4858230A (en) * 1987-05-18 1989-08-15 Duggan Robert J Multiport/multidrop computer communications
US5043982A (en) * 1989-05-24 1991-08-27 At&T Bell Laboratories Multichannel multipoint network using time-division multiplexing incorporating a time offset for propagation delay

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4660195A (en) * 1984-03-23 1987-04-21 Nitsuko Limited Channel detecting circuit in a receiver in a time-division multiplex transmission system
US4726017A (en) * 1985-05-21 1988-02-16 Fla. Multidrop data concentrator communication network

Also Published As

Publication number Publication date
WO1993004541A1 (en) 1993-03-04
AU2490792A (en) 1993-03-16
CA2116228A1 (en) 1993-03-04
EP0601013A4 (enrdf_load_stackoverflow) 1994-08-03
EP0601013A1 (en) 1994-06-15

Similar Documents

Publication Publication Date Title
US5875217A (en) Delay adjustment circuit in a performance monitoring and test system
US5359602A (en) Multiport-multipoint digital data service
US5557616A (en) Frame synchronization in a performance monitoring and test system
US5251210A (en) Method and apparatus for transforming low bandwidth telecommunications channels into a high bandwidth telecommunication channel
EP0974212B1 (en) Closed-loop synchronisation arrangement for data transmission system
WO2003100991A2 (en) Phase and frequency drift and jitter compensation in a distributed telecommunications switch
US5305320A (en) Peripheral communications network
CA2357944A1 (en) Multi-subshelf control system and method for a network element
US5524107A (en) Multiport multidrop digital system
CA2245184A1 (en) Virtual time loop
AU661864B2 (en) Multiport multidrop digital system
CA2249078C (en) Apparatus and method for communicating both delay-sensitive data sporadic data
US7408959B2 (en) Method and apparatus for ensuring cell ordering in large capacity switching systems and for synchronizing the arrival time of cells to a switch fabric
EP0912005B1 (en) Performance monitoring and test system for a telephone network
JP3246423B2 (ja) 網同期装置
JP2669844B2 (ja) 多重アクセス制御方式
JP3009901B2 (ja) Ｉｓｄｎインターフェース方式
KR100311309B1 (ko) 고정 타임슬롯 할당방식으로 운영되는 데이타 채널장치
WO1994015419A9 (en) Performance monitoring and test system for a telephone network
JP3947095B2 (ja) 複数ユニット間のマルチフレーム同期のタイミング制御方法及びタイミング制御装置
JP2833938B2 (ja) ディジタル回線終端装置
JP2000092146A (ja) マルチモデム伝送装置
JPH05130086A (ja) 多重化装置
JPH03165643A (ja) ディジタルデータ伝送方式
JPH07123255B2 (ja) 端末クロック生成回路を有するループ通信システム