AU643532B2 - Data transfer interface module - Google Patents
Data transfer interface module Download PDFInfo
- Publication number
- AU643532B2 AU643532B2 AU79363/91A AU7936391A AU643532B2 AU 643532 B2 AU643532 B2 AU 643532B2 AU 79363/91 A AU79363/91 A AU 79363/91A AU 7936391 A AU7936391 A AU 7936391A AU 643532 B2 AU643532 B2 AU 643532B2
- Authority
- AU
- Australia
- Prior art keywords
- data
- transfer
- address
- interface module
- locations
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
- 230000002441 reversible effect Effects 0.000 claims description 10
- 238000012544 monitoring process Methods 0.000 claims description 8
- 238000000819 phase cycle Methods 0.000 claims description 2
- 230000005540 biological transmission Effects 0.000 abstract 3
- 238000012795 verification Methods 0.000 abstract 1
- 230000000630 rising effect Effects 0.000 description 4
- 238000007726 management method Methods 0.000 description 3
- 230000001174 ascending effect Effects 0.000 description 2
- 241001387976 Pera Species 0.000 description 1
- 239000008186 active pharmaceutical agent Substances 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000033764 rhythmic process Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L13/00—Details of the apparatus or circuits covered by groups H04L15/00 or H04L17/00
- H04L13/02—Details not particular to receiver or transmitter
- H04L13/08—Intermediate storage means
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Communication Control (AREA)
- Information Transfer Systems (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
- Computer And Data Communications (AREA)
- Exchange Systems With Centralized Control (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR9008338 | 1990-07-02 | ||
| FR9008338A FR2664114A1 (fr) | 1990-07-02 | 1990-07-02 | Module interface de transfert de donnees. |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| AU7936391A AU7936391A (en) | 1992-01-02 |
| AU643532B2 true AU643532B2 (en) | 1993-11-18 |
Family
ID=9398236
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU79363/91A Ceased AU643532B2 (en) | 1990-07-02 | 1991-06-26 | Data transfer interface module |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US5307472A (enExample) |
| EP (1) | EP0464768B1 (enExample) |
| JP (1) | JPH04233646A (enExample) |
| AT (1) | ATE127302T1 (enExample) |
| AU (1) | AU643532B2 (enExample) |
| DE (1) | DE69112516T2 (enExample) |
| DK (1) | DK0464768T3 (enExample) |
| ES (1) | ES2076418T3 (enExample) |
| FR (1) | FR2664114A1 (enExample) |
| GR (1) | GR3017995T3 (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2845115B2 (ja) * | 1993-12-29 | 1999-01-13 | ヤマハ株式会社 | デジタル信号処理回路 |
| US20070192516A1 (en) * | 2006-02-16 | 2007-08-16 | Standard Microsystems Corporation | Virtual FIFO automatic data transfer mechanism |
| US7631110B2 (en) * | 2006-05-03 | 2009-12-08 | Standard Microsystems Corporation | Address assignment through device ID broadcast |
| US8239603B2 (en) * | 2006-05-03 | 2012-08-07 | Standard Microsystems Corporation | Serialized secondary bus architecture |
| US8762589B2 (en) * | 2010-01-22 | 2014-06-24 | National Instruments Corporation | Data transfer between devices maintaining state data |
| US8780168B2 (en) | 2011-12-16 | 2014-07-15 | Logitech Europe S.A. | Performing DMA transfer of audio and video data received over a serial bus |
| DE102013108973B3 (de) | 2013-08-20 | 2014-09-11 | Simonswerk, Gesellschaft mit beschränkter Haftung | Scharnier sowie Türanordnung |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1982001429A1 (en) * | 1980-10-16 | 1982-04-29 | Ncr Co | Stack for a data processor |
| US4704679A (en) * | 1985-06-11 | 1987-11-03 | Burroughs Corporation | Addressing environment storage for accessing a stack-oriented memory |
| US4933932A (en) * | 1987-12-24 | 1990-06-12 | Etat Francais represente par le Ministre des Postes et Telecommunications et de l'Espace (Centre National d'Etudes des Telecommunications) | Buffer queue write pointer control circuit notably for self-channelling packet time-division switching system |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4458314A (en) * | 1982-01-07 | 1984-07-03 | Bell Telephone Laboratories, Incorporated | Circuitry for allocating access to a demand shared bus |
| JPS5995660A (ja) * | 1982-11-22 | 1984-06-01 | Nec Corp | デ−タ処理装置 |
| JPH02159624A (ja) * | 1988-12-13 | 1990-06-19 | Nec Corp | 先入れ先出しレジスタ装置 |
| JPH0483439A (ja) * | 1990-07-25 | 1992-03-17 | Fujitsu Ltd | データ転送量異常検出方式 |
-
1990
- 1990-07-02 FR FR9008338A patent/FR2664114A1/fr active Granted
-
1991
- 1991-06-26 AU AU79363/91A patent/AU643532B2/en not_active Ceased
- 1991-07-02 DE DE69112516T patent/DE69112516T2/de not_active Expired - Fee Related
- 1991-07-02 DK DK91110942.9T patent/DK0464768T3/da active
- 1991-07-02 AT AT91110942T patent/ATE127302T1/de not_active IP Right Cessation
- 1991-07-02 JP JP3188210A patent/JPH04233646A/ja active Pending
- 1991-07-02 EP EP91110942A patent/EP0464768B1/fr not_active Expired - Lifetime
- 1991-07-02 ES ES91110942T patent/ES2076418T3/es not_active Expired - Lifetime
- 1991-07-02 US US07/724,629 patent/US5307472A/en not_active Expired - Fee Related
-
1995
- 1995-11-08 GR GR950403104T patent/GR3017995T3/el unknown
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1982001429A1 (en) * | 1980-10-16 | 1982-04-29 | Ncr Co | Stack for a data processor |
| US4704679A (en) * | 1985-06-11 | 1987-11-03 | Burroughs Corporation | Addressing environment storage for accessing a stack-oriented memory |
| US4933932A (en) * | 1987-12-24 | 1990-06-12 | Etat Francais represente par le Ministre des Postes et Telecommunications et de l'Espace (Centre National d'Etudes des Telecommunications) | Buffer queue write pointer control circuit notably for self-channelling packet time-division switching system |
Also Published As
| Publication number | Publication date |
|---|---|
| ES2076418T3 (es) | 1995-11-01 |
| DE69112516D1 (de) | 1995-10-05 |
| JPH04233646A (ja) | 1992-08-21 |
| GR3017995T3 (en) | 1996-02-29 |
| AU7936391A (en) | 1992-01-02 |
| DK0464768T3 (da) | 1995-11-27 |
| ATE127302T1 (de) | 1995-09-15 |
| US5307472A (en) | 1994-04-26 |
| FR2664114B1 (enExample) | 1994-08-19 |
| EP0464768B1 (fr) | 1995-08-30 |
| FR2664114A1 (fr) | 1992-01-03 |
| DE69112516T2 (de) | 1996-02-08 |
| EP0464768A1 (fr) | 1992-01-08 |
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