AU5014600A - Output buffer with independently controllable current mirror legs - Google Patents

Output buffer with independently controllable current mirror legs

Info

Publication number
AU5014600A
AU5014600A AU50146/00A AU5014600A AU5014600A AU 5014600 A AU5014600 A AU 5014600A AU 50146/00 A AU50146/00 A AU 50146/00A AU 5014600 A AU5014600 A AU 5014600A AU 5014600 A AU5014600 A AU 5014600A
Authority
AU
Australia
Prior art keywords
current mirror
output buffer
mirror legs
current
independently controllable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU50146/00A
Other languages
English (en)
Inventor
Todd M. Tanji
Jim R. Welch
Robert S. Wentink
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honeywell Inc
Original Assignee
Honeywell Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inc filed Critical Honeywell Inc
Publication of AU5014600A publication Critical patent/AU5014600A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0088—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using discontinuously variable devices, e.g. switch-operated
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018585—Coupling arrangements; Interface arrangements using field effect transistors only programmable

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Amplifiers (AREA)
  • Control Of Electrical Variables (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Rear-View Mirror Devices That Are Mounted On The Exterior Of The Vehicle (AREA)
AU50146/00A 1999-05-13 2000-05-15 Output buffer with independently controllable current mirror legs Abandoned AU5014600A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/311,242 US6236238B1 (en) 1999-05-13 1999-05-13 Output buffer with independently controllable current mirror legs
US09311242 1999-05-13
PCT/US2000/013251 WO2000069245A2 (en) 1999-05-13 2000-05-15 Output buffer with independently controllable current mirror legs

Publications (1)

Publication Number Publication Date
AU5014600A true AU5014600A (en) 2000-12-05

Family

ID=23206046

Family Applications (1)

Application Number Title Priority Date Filing Date
AU50146/00A Abandoned AU5014600A (en) 1999-05-13 2000-05-15 Output buffer with independently controllable current mirror legs

Country Status (8)

Country Link
US (1) US6236238B1 (https=)
EP (2) EP1513256B1 (https=)
JP (1) JP4544752B2 (https=)
AT (2) ATE419675T1 (https=)
AU (1) AU5014600A (https=)
CA (1) CA2372183A1 (https=)
DE (2) DE60041288D1 (https=)
WO (1) WO2000069245A2 (https=)

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US6700365B2 (en) * 2001-12-10 2004-03-02 Intersil Americas Inc. Programmable current-sensing circuit providing discrete step temperature compensation for DC-DC converter
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US7889752B2 (en) * 2003-06-05 2011-02-15 Marvell International Ltd. Dual ported network physical layer
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US7535258B1 (en) 2004-12-15 2009-05-19 Lattice Semiconductor Corporation Programmable current output and common-mode voltage buffer
US7215148B1 (en) 2004-12-15 2007-05-08 Lattice Semiconductor Corporation Programmable current output buffer
JP5406470B2 (ja) * 2008-06-20 2014-02-05 キヤノン株式会社 バッファ駆動装置
FR2945375B1 (fr) * 2009-05-07 2012-02-10 Continental Automotive France Port d'entree configurable de calculateur electronique de vehicule automobile
US8330547B2 (en) * 2009-06-30 2012-12-11 Qualcomm, Incorporated Gain control linearity in an RF driver amplifier transmitter
US8786368B2 (en) 2011-03-09 2014-07-22 Hittite Microwave Corporation Distributed amplifier with improved stabilization
US10236885B1 (en) 2018-04-02 2019-03-19 Honeywell International Inc. Digital output buffer with field status feedback
US10601614B1 (en) * 2018-09-24 2020-03-24 Texas Instruments Incorporated Methods, apparatus, and systems to increase common-mode transient immunity in isolation devices
CN116192082B (zh) * 2023-02-03 2025-02-11 钜泉光电科技(上海)股份有限公司 一种应用于计量芯片的缓冲电路

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Also Published As

Publication number Publication date
WO2000069245A3 (en) 2001-02-08
DE60015323T2 (de) 2005-10-27
EP1513256A1 (en) 2005-03-09
WO2000069245A2 (en) 2000-11-23
DE60041288D1 (de) 2009-02-12
EP1513256B1 (en) 2008-12-31
US6236238B1 (en) 2001-05-22
ATE281025T1 (de) 2004-11-15
DE60015323D1 (de) 2004-12-02
JP4544752B2 (ja) 2010-09-15
JP2002544737A (ja) 2002-12-24
CA2372183A1 (en) 2000-11-23
ATE419675T1 (de) 2009-01-15
EP1177629A2 (en) 2002-02-06
EP1177629B1 (en) 2004-10-27

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase