AU2003232707A1 - An arrangement for low power clock generation - Google Patents

An arrangement for low power clock generation

Info

Publication number
AU2003232707A1
AU2003232707A1 AU2003232707A AU2003232707A AU2003232707A1 AU 2003232707 A1 AU2003232707 A1 AU 2003232707A1 AU 2003232707 A AU2003232707 A AU 2003232707A AU 2003232707 A AU2003232707 A AU 2003232707A AU 2003232707 A1 AU2003232707 A1 AU 2003232707A1
Authority
AU
Australia
Prior art keywords
arrangement
low power
clock generation
power clock
generation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003232707A
Other languages
English (en)
Inventor
Jan Dahlin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Publication of AU2003232707A1 publication Critical patent/AU2003232707A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/03—Astable circuits
    • H03K3/0307—Stabilisation of output, e.g. using crystal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption

Landscapes

  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
AU2003232707A 2002-06-07 2003-05-21 An arrangement for low power clock generation Abandoned AU2003232707A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
SE0201774A SE0201774L (sv) 2002-06-07 2002-06-07 Anordning för effektsnål klockgenerering
SE0201774-7 2002-06-07
PCT/SE2003/000821 WO2003105333A1 (en) 2002-06-07 2003-05-21 An arrangement for low power clock generation

Publications (1)

Publication Number Publication Date
AU2003232707A1 true AU2003232707A1 (en) 2003-12-22

Family

ID=20288145

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003232707A Abandoned AU2003232707A1 (en) 2002-06-07 2003-05-21 An arrangement for low power clock generation

Country Status (7)

Country Link
EP (1) EP1514343B1 ( )
JP (1) JP2005529534A ( )
CN (1) CN100477485C ( )
AU (1) AU2003232707A1 ( )
DE (1) DE60329842D1 ( )
SE (1) SE0201774L ( )
WO (1) WO2003105333A1 ( )

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2874777B1 (fr) * 2004-09-02 2007-01-05 Sagem Telephone mobile et procede d'utilisation de ce telephone mobile
US20090088194A1 (en) * 2007-09-27 2009-04-02 Telefonaktiebolaget Lm Ericsson (Publ) Single Multi-Mode Clock Source for Wireless Devices
CN101615886B (zh) * 2009-07-22 2011-08-24 成都国腾电子技术股份有限公司 一种石英晶振主电路
WO2011077705A1 (ja) * 2009-12-22 2011-06-30 旭化成エレクトロニクス株式会社 発振器
JP2011135316A (ja) * 2009-12-24 2011-07-07 Seiko Epson Corp 発振回路、集積回路装置及び電子機器
JP6141383B2 (ja) * 2010-12-24 2017-06-07 ルネサスエレクトロニクス株式会社 水晶発振装置
JP6013070B2 (ja) * 2012-07-31 2016-10-25 ルネサスエレクトロニクス株式会社 半導体装置及びその制御方法
JP5725091B2 (ja) * 2013-07-01 2015-05-27 セイコーエプソン株式会社 集積回路装置及び電子機器

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4782309A (en) * 1987-06-26 1988-11-01 The United States Of America As Represented By The Secretary Of The Army Bilateral frequency adjustment of crystal oscillators
JPH0273704A (ja) 1988-09-09 1990-03-13 Nec Ic Microcomput Syst Ltd 発振回路
US5155453A (en) 1991-05-23 1992-10-13 Samsung Semiconductor, Inc. Low-power crystal oscillator
JP3222366B2 (ja) * 1995-10-05 2001-10-29 旭化成マイクロシステム株式会社 電圧制御発振器
JP2000010651A (ja) * 1998-06-22 2000-01-14 Matsushita Electric Ind Co Ltd 電子機器
JP3551907B2 (ja) * 2000-09-11 2004-08-11 セイコーエプソン株式会社 クロック信号供給装置およびその制御方法

Also Published As

Publication number Publication date
CN100477485C (zh) 2009-04-08
JP2005529534A (ja) 2005-09-29
EP1514343B1 (en) 2009-10-28
WO2003105333A1 (en) 2003-12-18
SE0201774L (sv) 2003-12-08
EP1514343A1 (en) 2005-03-16
DE60329842D1 (de) 2009-12-10
CN1666406A (zh) 2005-09-07
SE0201774D0 (sv) 2002-06-07

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase