AU2002335310A1 - Formation of high-mobility silicon-germanium structures by low-energy plasma enhanced chemical vapor deposition - Google Patents
Formation of high-mobility silicon-germanium structures by low-energy plasma enhanced chemical vapor depositionInfo
- Publication number
- AU2002335310A1 AU2002335310A1 AU2002335310A AU2002335310A AU2002335310A1 AU 2002335310 A1 AU2002335310 A1 AU 2002335310A1 AU 2002335310 A AU2002335310 A AU 2002335310A AU 2002335310 A AU2002335310 A AU 2002335310A AU 2002335310 A1 AU2002335310 A1 AU 2002335310A1
- Authority
- AU
- Australia
- Prior art keywords
- formation
- low
- vapor deposition
- chemical vapor
- plasma enhanced
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical group [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 title 1
- 230000015572 biosynthetic process Effects 0.000 title 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
- H10D30/473—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/0245—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02502—Layer structure consisting of two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/0251—Graded layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Chemical Vapour Deposition (AREA)
- Recrystallisation Techniques (AREA)
- Junction Field-Effect Transistors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP01127834A EP1315199A1 (en) | 2001-11-22 | 2001-11-22 | Formation of high-mobility silicon-germanium structures by low-energy plasma enhanced chemical vapor deposition |
| EP01127834.8 | 2001-11-22 | ||
| PCT/EP2002/009922 WO2003044839A2 (en) | 2001-11-22 | 2002-09-05 | Formation of high-mobility silicon-germanium structures by low-energy plasma enhanced chemical vapor deposition |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| AU2002335310A1 true AU2002335310A1 (en) | 2003-06-10 |
| AU2002335310A8 AU2002335310A8 (en) | 2003-06-10 |
Family
ID=8179316
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2002335310A Abandoned AU2002335310A1 (en) | 2001-11-22 | 2002-09-05 | Formation of high-mobility silicon-germanium structures by low-energy plasma enhanced chemical vapor deposition |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7115895B2 (enExample) |
| EP (1) | EP1315199A1 (enExample) |
| JP (1) | JP2005510081A (enExample) |
| CN (1) | CN100345254C (enExample) |
| AU (1) | AU2002335310A1 (enExample) |
| WO (1) | WO2003044839A2 (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6855436B2 (en) * | 2003-05-30 | 2005-02-15 | International Business Machines Corporation | Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal |
| US7678645B2 (en) | 2003-03-26 | 2010-03-16 | Eidgenoessische Technische Hochschule Zuerich | Formation of thin semiconductor layers by low-energy plasma enhanced chemical vapor deposition and semiconductor heterostructure devices |
| ES2316680T3 (es) | 2003-09-05 | 2009-04-16 | Epispeed S.A. | Laseres de ingaas/gaas sobre silicio producidos mediante lepecvd y mocvd. |
| US8882909B2 (en) | 2004-04-30 | 2014-11-11 | Dichroic Cell S.R.L. | Method for producing virtual Ge substrates for III/V-integration on Si(001) |
| JP2007250903A (ja) * | 2006-03-16 | 2007-09-27 | Matsushita Electric Ind Co Ltd | ヘテロ接合バイポーラトランジスタおよびその製造方法 |
| WO2008017457A1 (en) * | 2006-08-11 | 2008-02-14 | Paul Scherrer Institut | Light modulators comprising si-ge quantum well layers |
| WO2008023260A2 (en) | 2006-08-25 | 2008-02-28 | Hôpitaux Universitaires De Geneve | System and method for detecting a specific cognitive-emotional state in a subject |
| FR2914783A1 (fr) * | 2007-04-03 | 2008-10-10 | St Microelectronics Sa | Procede de fabrication d'un dispositif a gradient de concentration et dispositif correspondant. |
| US20110017127A1 (en) * | 2007-08-17 | 2011-01-27 | Epispeed Sa | Apparatus and method for producing epitaxial layers |
| US8237126B2 (en) | 2007-08-17 | 2012-08-07 | Csem Centre Suisse D'electronique Et De Mictrotechnique Sa | X-ray imaging device and method for the manufacturing thereof |
| EP2251897B1 (en) * | 2009-05-13 | 2016-01-06 | Siltronic AG | A method for producing a wafer comprising a silicon single crystal substrate having a front and a back side and a layer of SiGe deposited on the front side |
| TWI562195B (en) | 2010-04-27 | 2016-12-11 | Pilegrowth Tech S R L | Dislocation and stress management by mask-less processes using substrate patterning and methods for device fabrication |
| CN103165420B (zh) * | 2011-12-14 | 2015-11-18 | 中国科学院上海微系统与信息技术研究所 | 一种SiGe中嵌入超晶格制备应变Si的方法 |
| KR102142707B1 (ko) * | 2013-06-19 | 2020-08-07 | 엘지이노텍 주식회사 | 반도체 기판, 발광 소자 및 전자 소자 |
| CN105632927B (zh) * | 2014-10-30 | 2018-09-07 | 中芯国际集成电路制造(上海)有限公司 | Pmos晶体管的形成方法 |
| KR102465536B1 (ko) * | 2016-06-08 | 2022-11-14 | 삼성전자주식회사 | 반도체 장치의 제조 방법 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5241197A (en) * | 1989-01-25 | 1993-08-31 | Hitachi, Ltd. | Transistor provided with strained germanium layer |
| EP0380077A3 (en) * | 1989-01-25 | 1990-09-12 | Hitachi, Ltd. | Transistor provided with strained germanium layer |
| US5442205A (en) * | 1991-04-24 | 1995-08-15 | At&T Corp. | Semiconductor heterostructure devices with strained semiconductor layers |
| KR100441469B1 (ko) * | 1999-03-12 | 2004-07-23 | 인터내셔널 비지네스 머신즈 코포레이션 | 전계 효과 장치용 고속 게르마늄 채널 이종구조물 |
-
2001
- 2001-11-22 EP EP01127834A patent/EP1315199A1/en not_active Withdrawn
-
2002
- 2002-09-05 JP JP2003546385A patent/JP2005510081A/ja active Pending
- 2002-09-05 US US10/496,245 patent/US7115895B2/en not_active Expired - Fee Related
- 2002-09-05 AU AU2002335310A patent/AU2002335310A1/en not_active Abandoned
- 2002-09-05 CN CNB028273095A patent/CN100345254C/zh not_active Expired - Fee Related
- 2002-09-05 WO PCT/EP2002/009922 patent/WO2003044839A2/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| US20050116226A1 (en) | 2005-06-02 |
| AU2002335310A8 (en) | 2003-06-10 |
| EP1315199A1 (en) | 2003-05-28 |
| CN1615540A (zh) | 2005-05-11 |
| US7115895B2 (en) | 2006-10-03 |
| WO2003044839A3 (en) | 2003-10-30 |
| CN100345254C (zh) | 2007-10-24 |
| WO2003044839A2 (en) | 2003-05-30 |
| JP2005510081A (ja) | 2005-04-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |