AU2002211190A1 - Integration of high voltage self-aligned mos components - Google Patents
Integration of high voltage self-aligned mos componentsInfo
- Publication number
- AU2002211190A1 AU2002211190A1 AU2002211190A AU1119002A AU2002211190A1 AU 2002211190 A1 AU2002211190 A1 AU 2002211190A1 AU 2002211190 A AU2002211190 A AU 2002211190A AU 1119002 A AU1119002 A AU 1119002A AU 2002211190 A1 AU2002211190 A1 AU 2002211190A1
- Authority
- AU
- Australia
- Prior art keywords
- integration
- high voltage
- voltage self
- mos components
- aligned mos
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 230000010354 integration Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66681—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823857—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE0004027 | 2000-11-03 | ||
SE0004027A SE519382C2 (en) | 2000-11-03 | 2000-11-03 | Integration of self-oriented MOS high voltage components and semiconductor structure including such |
PCT/SE2001/002405 WO2002037547A1 (en) | 2000-11-03 | 2001-11-01 | Integration of high voltage self-aligned mos components |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2002211190A1 true AU2002211190A1 (en) | 2002-05-15 |
Family
ID=20281691
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2002211190A Abandoned AU2002211190A1 (en) | 2000-11-03 | 2001-11-01 | Integration of high voltage self-aligned mos components |
Country Status (7)
Country | Link |
---|---|
US (1) | US6686233B2 (en) |
EP (1) | EP1330837A1 (en) |
CN (1) | CN1228816C (en) |
AU (1) | AU2002211190A1 (en) |
SE (1) | SE519382C2 (en) |
TW (1) | TW486751B (en) |
WO (1) | WO2002037547A1 (en) |
Families Citing this family (43)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4139105B2 (en) * | 2001-12-20 | 2008-08-27 | 株式会社ルネサステクノロジ | Manufacturing method of semiconductor device |
US6861341B2 (en) * | 2002-02-22 | 2005-03-01 | Xerox Corporation | Systems and methods for integration of heterogeneous circuit devices |
US6855985B2 (en) * | 2002-09-29 | 2005-02-15 | Advanced Analogic Technologies, Inc. | Modular bipolar-CMOS-DMOS analog integrated circuit & power transistor technology |
SE527082C2 (en) * | 2003-08-27 | 2005-12-20 | Infineon Technologies Ag | Monolithic integrated power amplifier device |
SE0302594D0 (en) * | 2003-09-30 | 2003-09-30 | Infineon Technologies Ag | Vertical DMOS transistor device, integrated circuit, and fabrication method thereof |
SE0303106D0 (en) * | 2003-11-21 | 2003-11-21 | Infineon Technologies Ag | Ldmos transistor device, integrated circuit, and fabrication method thereof |
SE0303099D0 (en) * | 2003-11-21 | 2003-11-21 | Infineon Technologies Ag | Method in the fabrication of a monolithically integrated high frequency circuit |
KR100670401B1 (en) * | 2003-12-27 | 2007-01-16 | 동부일렉트로닉스 주식회사 | Method for fabricating the gate oxide layer in semiconductor device |
DE102004009521B4 (en) * | 2004-02-27 | 2020-06-10 | Austriamicrosystems Ag | High-voltage PMOS transistor, mask for manufacturing a tub and method for manufacturing a high-voltage PMOS transistor |
KR100624912B1 (en) * | 2005-03-22 | 2006-09-19 | 주식회사 하이닉스반도체 | Method for fabricating flash memory device |
US7329618B2 (en) * | 2005-06-28 | 2008-02-12 | Micron Technology, Inc. | Ion implanting methods |
EP1804285B1 (en) * | 2005-12-27 | 2018-10-24 | Semiconductor Components Industries, LLC | Method for manufacturing a transistor with self-aligned channel |
KR100741882B1 (en) * | 2005-12-29 | 2007-07-23 | 동부일렉트로닉스 주식회사 | Highvoltage device and Method for fabricating of the same |
US7465623B2 (en) * | 2006-08-28 | 2008-12-16 | Advanced Micro Devices, Inc. | Methods for fabricating a semiconductor device on an SOI substrate |
KR100865548B1 (en) * | 2006-12-28 | 2008-10-28 | 주식회사 하이닉스반도체 | Method for fabricating semiconductor device |
US7781843B1 (en) * | 2007-01-11 | 2010-08-24 | Hewlett-Packard Development Company, L.P. | Integrating high-voltage CMOS devices with low-voltage CMOS |
KR100836766B1 (en) * | 2007-01-22 | 2008-06-10 | 삼성전자주식회사 | Method of manufacturing high voltage semiconductor device and the high voltage semiconductor device using the same |
KR100917813B1 (en) | 2007-10-05 | 2009-09-18 | 주식회사 동부하이텍 | Semiconductor device and manufacturing method thereof |
KR100903483B1 (en) | 2007-11-26 | 2009-06-18 | 주식회사 동부하이텍 | Method for manufacturing semiconductor device |
JP5283916B2 (en) * | 2008-02-01 | 2013-09-04 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | Manufacturing method of semiconductor device |
US20100117153A1 (en) * | 2008-11-07 | 2010-05-13 | Honeywell International Inc. | High voltage soi cmos device and method of manufacture |
CN101752254B (en) * | 2008-12-22 | 2012-12-19 | 中芯国际集成电路制造(上海)有限公司 | Ion implantation zone forming method, MOS transistor and manufacture method thereof |
SG164319A1 (en) * | 2009-07-10 | 2010-09-29 | Chartered Semiconductor Mfg | High voltage device |
CN101789432B (en) * | 2010-01-27 | 2011-11-16 | 崇贸科技股份有限公司 | High-voltage side semiconductor structure |
US9209098B2 (en) | 2011-05-19 | 2015-12-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | HVMOS reliability evaluation using bulk resistances as indices |
CN102683186A (en) * | 2012-05-09 | 2012-09-19 | 上海宏力半导体制造有限公司 | Method for inhibiting hot carrier injection and manufacture method of BiCMOS (Bipolar Complementary Metal Oxide Semiconductor) device |
US20140167142A1 (en) | 2012-12-14 | 2014-06-19 | Spansion Llc | Use Disposable Gate Cap to Form Transistors, and Split Gate Charge Trapping Memory Cells |
DE102015004235B4 (en) | 2014-04-14 | 2019-01-03 | Elmos Semiconductor Ag | Method of protecting a CMOS circuit on an N-substrate from reverse polarity |
DE102014017146A1 (en) | 2014-04-14 | 2015-10-15 | Elmos Semiconductor Aktiengesellschaft | Rail-to-rail reverse polarity protection for the combined input / output of an integrated CMOS circuit on a P-substrate |
US9412736B2 (en) | 2014-06-05 | 2016-08-09 | Globalfoundries Inc. | Embedding semiconductor devices in silicon-on-insulator wafers connected using through silicon vias |
US10038063B2 (en) | 2014-06-10 | 2018-07-31 | International Business Machines Corporation | Tunable breakdown voltage RF FET devices |
CN105789267B (en) * | 2014-12-22 | 2019-04-26 | 旺宏电子股份有限公司 | Semiconductor element |
CN105810583B (en) * | 2014-12-30 | 2019-03-15 | 无锡华润上华科技有限公司 | The manufacturing method of landscape insulation bar double-pole-type transistor |
US9780250B2 (en) * | 2016-01-14 | 2017-10-03 | Varian Semiconductor Equipment Associates, Inc. | Self-aligned mask for ion implantation |
KR101822016B1 (en) * | 2016-09-13 | 2018-01-26 | 매그나칩반도체 유한회사 | Method of Fabricating a DMOS Transistor and a CMOS Transistor |
CN107785324A (en) * | 2017-09-19 | 2018-03-09 | 上海华虹宏力半导体制造有限公司 | High-pressure process integrated circuit method |
CN109786328A (en) * | 2017-11-10 | 2019-05-21 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor devices and its manufacturing method |
CN109950151B (en) * | 2017-12-20 | 2022-02-15 | 中芯国际集成电路制造(上海)有限公司 | PMOS transistor and forming method thereof |
US11228174B1 (en) | 2019-05-30 | 2022-01-18 | Silicet, LLC | Source and drain enabled conduction triggers and immunity tolerance for integrated circuits |
US10892362B1 (en) | 2019-11-06 | 2021-01-12 | Silicet, LLC | Devices for LDMOS and other MOS transistors with hybrid contact |
US11522053B2 (en) | 2020-12-04 | 2022-12-06 | Amplexia, Llc | LDMOS with self-aligned body and hybrid source |
TWI768654B (en) * | 2021-01-14 | 2022-06-21 | 世界先進積體電路股份有限公司 | Semiconductor structure and method for forming the same |
US11742389B2 (en) | 2021-05-18 | 2023-08-29 | Vanguard International Semiconductor Corporation | Semiconductor structure and method for forming the same |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5061975A (en) * | 1988-02-19 | 1991-10-29 | Mitsubishi Denki Kabushiki Kaisha | MOS type field effect transistor having LDD structure |
US5047358A (en) * | 1989-03-17 | 1991-09-10 | Delco Electronics Corporation | Process for forming high and low voltage CMOS transistors on a single integrated circuit chip |
US5532176A (en) * | 1992-04-17 | 1996-07-02 | Nippondenso Co., Ltd. | Process for fabricating a complementary MIS transistor |
SE506433C2 (en) | 1994-03-24 | 1997-12-15 | Anders Soederbaerg | Method of manufacturing integrated components |
US5498554A (en) * | 1994-04-08 | 1996-03-12 | Texas Instruments Incorporated | Method of making extended drain resurf lateral DMOS devices |
FR2735904B1 (en) * | 1995-06-21 | 1997-07-18 | Commissariat Energie Atomique | PROCESS FOR PRODUCING A SEMICONDUCTOR WITH A HIGHLY DOPED ZONE LOCATED BETWEEN LOW DOPED AREAS FOR THE MANUFACTURE OF TRANSISTORS |
EP0789401A3 (en) * | 1995-08-25 | 1998-09-16 | Matsushita Electric Industrial Co., Ltd. | LD MOSFET or MOSFET with an integrated circuit containing thereof and manufacturing method |
JPH10189762A (en) * | 1996-12-20 | 1998-07-21 | Nec Corp | Semiconductor device and its manufacturing method |
US5891782A (en) * | 1997-08-21 | 1999-04-06 | Sharp Microelectronics Technology, Inc. | Method for fabricating an asymmetric channel doped MOS structure |
JP2000077532A (en) * | 1998-09-03 | 2000-03-14 | Mitsubishi Electric Corp | Semiconductor device and manufacture thereof |
-
2000
- 2000-11-03 SE SE0004027A patent/SE519382C2/en not_active IP Right Cessation
- 2000-11-18 TW TW089124467A patent/TW486751B/en not_active IP Right Cessation
-
2001
- 2001-11-01 EP EP01979204A patent/EP1330837A1/en not_active Withdrawn
- 2001-11-01 AU AU2002211190A patent/AU2002211190A1/en not_active Abandoned
- 2001-11-01 WO PCT/SE2001/002405 patent/WO2002037547A1/en not_active Application Discontinuation
- 2001-11-01 CN CN01818221.6A patent/CN1228816C/en not_active Expired - Fee Related
- 2001-11-02 US US09/985,447 patent/US6686233B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6686233B2 (en) | 2004-02-03 |
SE519382C2 (en) | 2003-02-25 |
EP1330837A1 (en) | 2003-07-30 |
SE0004027D0 (en) | 2000-11-03 |
WO2002037547A1 (en) | 2002-05-10 |
CN1228816C (en) | 2005-11-23 |
SE0004027L (en) | 2002-05-04 |
CN1471724A (en) | 2004-01-28 |
US20020055220A1 (en) | 2002-05-09 |
TW486751B (en) | 2002-05-11 |
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