AU2001297641A1 - Interpolator for timing recovery circuit - Google Patents
Interpolator for timing recovery circuitInfo
- Publication number
- AU2001297641A1 AU2001297641A1 AU2001297641A AU2001297641A AU2001297641A1 AU 2001297641 A1 AU2001297641 A1 AU 2001297641A1 AU 2001297641 A AU2001297641 A AU 2001297641A AU 2001297641 A AU2001297641 A AU 2001297641A AU 2001297641 A1 AU2001297641 A1 AU 2001297641A1
- Authority
- AU
- Australia
- Prior art keywords
- interpolator
- recovery circuit
- timing recovery
- timing
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
- H04L27/3809—Amplitude regulation arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/22—Demodulator circuits; Receiver circuits
- H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
- H04L27/2271—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
- H04L27/2273—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals associated with quadrature demodulation, e.g. Costas loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
- H04L27/3818—Demodulator circuits; Receiver circuits using coherent demodulation, i.e. using one or more nominally phase synchronous carriers
- H04L27/3827—Demodulator circuits; Receiver circuits using coherent demodulation, i.e. using one or more nominally phase synchronous carriers in which the carrier is recovered using only the demodulated baseband signals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
- H04L27/3845—Demodulator circuits; Receiver circuits using non - coherent demodulation, i.e. not using a phase synchronous carrier
- H04L27/3854—Demodulator circuits; Receiver circuits using non - coherent demodulation, i.e. not using a phase synchronous carrier using a non - coherent carrier, including systems with baseband correction for phase or frequency offset
- H04L27/3872—Compensation for phase rotation in the demodulated signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
- H04L2027/0024—Carrier regulation at the receiver end
- H04L2027/0026—Correction of carrier offset
- H04L2027/0032—Correction of carrier offset at baseband and passband
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
- H04L2027/0024—Carrier regulation at the receiver end
- H04L2027/0026—Correction of carrier offset
- H04L2027/0036—Correction of carrier offset using a recovered symbol clock
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
- H04L2027/0024—Carrier regulation at the receiver end
- H04L2027/0026—Correction of carrier offset
- H04L2027/0038—Correction of carrier offset using an equaliser
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
- H04L2027/0044—Control loops for carrier regulation
- H04L2027/0053—Closed loops
- H04L2027/0055—Closed loops single phase
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
- H04L2027/0044—Control loops for carrier regulation
- H04L2027/0053—Closed loops
- H04L2027/0057—Closed loops quadrature phase
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
- H04L2027/0044—Control loops for carrier regulation
- H04L2027/0071—Control of loops
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
- H04L2027/0044—Control loops for carrier regulation
- H04L2027/0071—Control of loops
- H04L2027/0079—Switching between loops
- H04L2027/0081—Switching between loops between loops of different bandwidths
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
- H04L7/002—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation
- H04L7/0029—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation interpolation of received data signal
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/550,883 US6545532B1 (en) | 1999-09-08 | 2000-04-17 | Timing recovery circuit in a QAM demodulator |
US09/550,883 | 2000-04-17 | ||
PCT/US2001/040080 WO2002063842A2 (en) | 2000-04-17 | 2001-02-12 | Interpolator for timing recovery circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2001297641A1 true AU2001297641A1 (en) | 2002-08-19 |
Family
ID=24198958
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2001297641A Abandoned AU2001297641A1 (en) | 2000-04-17 | 2001-02-12 | Interpolator for timing recovery circuit |
Country Status (9)
Families Citing this family (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100452308B1 (ko) * | 2000-06-13 | 2004-10-12 | 마쯔시다덴기산교 가부시키가이샤 | 디지털 방송수신장치 |
EP1330086B1 (en) | 2000-10-05 | 2007-11-21 | Matsushita Electric Industrial Co., Ltd. | Ring network and data transmitter |
JP3535868B2 (ja) * | 2000-10-05 | 2004-06-07 | 松下電器産業株式会社 | 判定レベル設定方法、およびデータ受信装置 |
EP1330083B1 (en) * | 2000-10-05 | 2009-03-25 | Panasonic Corporation | Digital data transmitter |
WO2002030075A1 (fr) * | 2000-10-05 | 2002-04-11 | Matsushita Electric Industrial Co., Ltd. | Emetteur de donnees numeriques, procede de codage d'une ligne de transmission et procede de decodage |
JP4484355B2 (ja) * | 2000-11-22 | 2010-06-16 | 富士通マイクロエレクトロニクス株式会社 | 復調装置、放送システム及び放送受信装置 |
US7010073B2 (en) * | 2001-01-19 | 2006-03-07 | Qualcomm, Incorporated | Delay lock loops for wireless communication systems |
JP2002247119A (ja) * | 2001-02-20 | 2002-08-30 | Advantest Corp | シンボル点推定装置、方法、プログラム、および該プログラムを記録した記録媒体ならびに変調解析装置 |
US20020157058A1 (en) * | 2001-02-20 | 2002-10-24 | Cute Ltd. | System and method for feedback-based unequal error protection coding |
FR2822322A1 (fr) * | 2001-03-13 | 2002-09-20 | Koninkl Philips Electronics Nv | Modulateur numerique |
US6745017B2 (en) * | 2001-05-02 | 2004-06-01 | Koninklijke Philips Electronics N.V. | Timing recovery switching for an adaptive digital broadband beamforming (antenna diversity) for ATSC terrestrial DTV based on a differentiator |
JP3586267B2 (ja) * | 2002-06-18 | 2004-11-10 | 沖電気工業株式会社 | 自動利得制御回路 |
ES2261966T3 (es) * | 2002-10-16 | 2006-11-16 | Casio Computer Co., Ltd. | Dispositivo de recepcion de ondas de radio, reloj de ondas de radio y repetidor. |
US7738545B2 (en) * | 2003-09-30 | 2010-06-15 | Regents Of The University Of Minnesota | Pulse shaper design for ultra-wideband communications |
CN101147393B (zh) * | 2005-03-24 | 2011-08-17 | 汤姆森特许公司 | 调谐射频信号的装置和方法 |
US7609795B2 (en) * | 2005-10-04 | 2009-10-27 | Via Technologies, Inc. | Interpolation module, interpolator and methods capable of recovering timing in a timing recovery apparatus |
US8381047B2 (en) * | 2005-11-30 | 2013-02-19 | Microsoft Corporation | Predicting degradation of a communication channel below a threshold based on data transmission errors |
US7912694B2 (en) * | 2007-01-30 | 2011-03-22 | International Business Machines Corporation | Print events in the simulation of a digital system |
US8036332B2 (en) | 2007-03-30 | 2011-10-11 | 4472314 Canada Inc. | Communication signal symbol timing error detection and recovery |
US8279988B2 (en) * | 2007-09-11 | 2012-10-02 | Advanced Receiver Technologies, Llc | Efficient channel estimate based timing recovery |
US7675443B1 (en) * | 2008-06-25 | 2010-03-09 | Atheros Communications, Inc. | Saturation detector for an ADC |
US8451947B2 (en) * | 2008-09-02 | 2013-05-28 | Comtech Ef Data Corp. | Burst demodulator |
KR20100109107A (ko) * | 2009-03-31 | 2010-10-08 | 삼성전자주식회사 | 방송신호수신장치 및 그 제어방법 |
CN101867539B (zh) * | 2010-05-14 | 2013-05-08 | 深圳国微技术有限公司 | 用于有线数字电视的大频偏载波恢复系统及方法 |
JP2012182594A (ja) * | 2011-02-28 | 2012-09-20 | Nec Corp | 光送受信システム及び光受信装置 |
KR20160037656A (ko) * | 2014-09-29 | 2016-04-06 | 삼성전자주식회사 | 에러 검출기 및 발진기의 에러 검출 방법 |
US9137006B1 (en) * | 2014-10-22 | 2015-09-15 | The United States Of America As Represented By The Secretary Of The Air Force | Non-integer oversampled timing recovery for higher order quadrature modulation communication systems using quadrature and in-phase samples |
US9350526B2 (en) * | 2014-10-27 | 2016-05-24 | The United States Of America As Represented By The Secretary Of The Air Force | Non-integer oversampled timing recovery for higher order quadrature modulation communication systems using in-phase samples |
US9319217B1 (en) * | 2014-10-28 | 2016-04-19 | The United States Of America As Represented By The Secretary Of The Air Force | Non-integer oversampled timing recovery for higher order quadrature modulation communication systems using quadrature-phase samples |
US9729119B1 (en) * | 2016-03-04 | 2017-08-08 | Atmel Corporation | Automatic gain control for received signal strength indication |
CN109005428B (zh) * | 2018-08-01 | 2021-10-08 | 深圳市朗强科技有限公司 | 图像数据发送、接收方法、电子设备和数据传输系统 |
US10887077B1 (en) * | 2019-07-15 | 2021-01-05 | Mellanox Technologies, Ltd. | Method and apparatus for a one bit per symbol timing recovery phase detector |
US10862505B1 (en) | 2020-02-27 | 2020-12-08 | Nxp Usa, Inc. | Arbitrary rate decimator and timing error corrector for an FSK receiver |
CN112505434B (zh) * | 2020-11-24 | 2022-08-12 | 中国电子科技集团公司第三十八研究所 | 一种无源阵列天线波束扫描特性的测试方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5278865A (en) * | 1992-05-08 | 1994-01-11 | At&T Bell Laboratories | Timing recovery scheme for a transceiver using a single sample clock source for transmitting and receiving signals |
US5309484A (en) | 1992-09-01 | 1994-05-03 | Motorola, Inc. | Method and apparatus for asynchronous timing recovery using interpolation filter |
US5572558A (en) | 1994-11-17 | 1996-11-05 | Cirrus Logic, Inc. | PID loop filter for timing recovery in a sampled amplitude read channel |
US5943369A (en) * | 1996-02-27 | 1999-08-24 | Thomson Consumer Electronics, Inc. | Timing recovery system for a digital signal processor |
US5694079A (en) | 1996-04-04 | 1997-12-02 | Lucent Technologies Inc. | Digital FM demodulator using a lagrangian interpolation function |
US6295325B1 (en) * | 1997-11-14 | 2001-09-25 | Agere Systems Guardian Corp. | Fixed clock based arbitrary symbol rate timing recovery loop |
US6128357A (en) * | 1997-12-24 | 2000-10-03 | Mitsubishi Electric Information Technology Center America, Inc (Ita) | Data receiver having variable rate symbol timing recovery with non-synchronized sampling |
US6160443A (en) * | 1999-09-08 | 2000-12-12 | Atmel Corporation | Dual automatic gain control in a QAM demodulator |
-
2000
- 2000-04-17 US US09/550,883 patent/US6545532B1/en not_active Expired - Lifetime
-
2001
- 2001-02-12 CA CA002403324A patent/CA2403324A1/en not_active Abandoned
- 2001-02-12 AU AU2001297641A patent/AU2001297641A1/en not_active Abandoned
- 2001-02-12 WO PCT/US2001/040080 patent/WO2002063842A2/en active Application Filing
- 2001-02-12 JP JP2002563670A patent/JP2004519154A/ja not_active Withdrawn
- 2001-02-12 EP EP01273692A patent/EP1338113A2/en not_active Withdrawn
- 2001-02-12 CN CN01811304.4A patent/CN1460341A/zh active Pending
- 2001-04-12 TW TW090108752A patent/TW578401B/zh not_active IP Right Cessation
-
2002
- 2002-10-15 NO NO20024951A patent/NO20024951D0/no not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
NO20024951D0 (no) | 2002-10-15 |
EP1338113A2 (en) | 2003-08-27 |
TW578401B (en) | 2004-03-01 |
CN1460341A (zh) | 2003-12-03 |
US6545532B1 (en) | 2003-04-08 |
CA2403324A1 (en) | 2002-08-15 |
WO2002063842A3 (en) | 2003-06-05 |
WO2002063842A2 (en) | 2002-08-15 |
JP2004519154A (ja) | 2004-06-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
AU2001297641A1 (en) | Interpolator for timing recovery circuit | |
EP1184988A3 (en) | PLL circuit | |
AU2002347349A1 (en) | Timing circuit cad | |
AU2001278740A1 (en) | Novel phenylalanine derivatives | |
AU2002213377A1 (en) | Synchronized computing | |
AU2001240031A1 (en) | Standard block architecture for integrated circuit design | |
GB2397733B (en) | Clock recovery circuitry | |
AU2002354608A1 (en) | Synchronization among plural browsers | |
AU2001236895A1 (en) | Integrated circuit | |
AU3440201A (en) | Adaptive clock recovery for circuit emulation service | |
AU2002225897A1 (en) | Intellectual property commercialization method | |
AU2001262287A1 (en) | Oscillator circuit | |
AU2001238394A1 (en) | Uniform clock timing circuit | |
AU2002359527A1 (en) | Circuit synthesis method using technology parameters extracting circuit | |
AU2001280848A1 (en) | Cmi signal timing recovery | |
AU2001290093A1 (en) | Clock | |
AU2001280117A1 (en) | Case for electronic parts | |
AU2002222176A1 (en) | Time synchronisation | |
AU3860900A (en) | System for clock recovery | |
AU2001285388A1 (en) | Open loop timing control for synchronous cdma systems | |
GB2366414B (en) | Circuit synthesis method | |
AU2002367071A1 (en) | Phase synchronization circuit | |
AU2001286160A1 (en) | Synchronizer | |
GB2366415B (en) | Circuit synthesis method | |
AU2001293186A1 (en) | Cascade circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |