AU2001287141A1 - Semiconductor device and process for forming the same - Google Patents

Semiconductor device and process for forming the same

Info

Publication number
AU2001287141A1
AU2001287141A1 AU2001287141A AU8714101A AU2001287141A1 AU 2001287141 A1 AU2001287141 A1 AU 2001287141A1 AU 2001287141 A AU2001287141 A AU 2001287141A AU 8714101 A AU8714101 A AU 8714101A AU 2001287141 A1 AU2001287141 A1 AU 2001287141A1
Authority
AU
Australia
Prior art keywords
forming
same
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001287141A
Inventor
Chi Nan Brian Li
Rana P. Singh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of AU2001287141A1 publication Critical patent/AU2001287141A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
AU2001287141A 2000-09-18 2001-09-07 Semiconductor device and process for forming the same Abandoned AU2001287141A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09664510 2000-09-18
US09/664,510 US6406976B1 (en) 2000-09-18 2000-09-18 Semiconductor device and process for forming the same
PCT/US2001/028093 WO2002025725A2 (en) 2000-09-18 2001-09-07 Semiconductor device and process for forming the same

Publications (1)

Publication Number Publication Date
AU2001287141A1 true AU2001287141A1 (en) 2002-04-02

Family

ID=24666261

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001287141A Abandoned AU2001287141A1 (en) 2000-09-18 2001-09-07 Semiconductor device and process for forming the same

Country Status (7)

Country Link
US (1) US6406976B1 (en)
JP (1) JP5208346B2 (en)
KR (1) KR100822232B1 (en)
CN (1) CN1267983C (en)
AU (1) AU2001287141A1 (en)
TW (1) TW522511B (en)
WO (1) WO2002025725A2 (en)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100389031B1 (en) * 2001-06-19 2003-06-25 삼성전자주식회사 Method of fabricating semiconductor device having trench isolation structure
JP2003007864A (en) * 2001-06-22 2003-01-10 Nec Corp Method for manufacturing non-volatile semiconductor memory device
KR100434333B1 (en) * 2002-06-28 2004-06-04 주식회사 하이닉스반도체 method for manufacturing semiconductor device and the same
US6822301B2 (en) * 2002-07-31 2004-11-23 Infineon Technologies Ag Maskless middle-of-line liner deposition
EP1403917A1 (en) * 2002-09-26 2004-03-31 STMicroelectronics S.r.l. Process for manufacturing semiconductor wafers incorporating differentiated isolating structures
DE10311059A1 (en) * 2003-03-13 2004-10-07 Infineon Technologies Ag Process for preparation of a semiconductor structure with troughs arranged in regions of different electrical conductivity useful in semiconductor technology, especially in miniaturizing processes
US7078314B1 (en) * 2003-04-03 2006-07-18 Advanced Micro Devices, Inc. Memory device having improved periphery and core isolation
JP2005191331A (en) * 2003-12-26 2005-07-14 Nec Electronics Corp Method for manufacturing semiconductor device
KR100602085B1 (en) * 2003-12-31 2006-07-14 동부일렉트로닉스 주식회사 Semiconductor device and manufacturing method thereof
KR100575339B1 (en) * 2004-10-25 2006-05-02 에스티마이크로일렉트로닉스 엔.브이. Method of manufacturing a flash memory device
JP2006164998A (en) * 2004-12-02 2006-06-22 Renesas Technology Corp Semiconductor device and manufacturing method of the same
JP4074292B2 (en) 2005-01-17 2008-04-09 株式会社東芝 Semiconductor device and manufacturing method thereof
US7323379B2 (en) * 2005-02-03 2008-01-29 Mosys, Inc. Fabrication process for increased capacitance in an embedded DRAM memory
US7151302B1 (en) 2005-06-24 2006-12-19 Freescale Semiconductor, Inc. Method and apparatus for maintaining topographical uniformity of a semiconductor memory array
US20070132056A1 (en) * 2005-12-09 2007-06-14 Advanced Analogic Technologies, Inc. Isolation structures for semiconductor integrated circuit substrates and methods of forming the same
US7811935B2 (en) * 2006-03-07 2010-10-12 Micron Technology, Inc. Isolation regions and their formation
EP1868239B1 (en) * 2006-06-12 2020-04-22 ams AG Method of manufacturing trenches in a semiconductor body
US7550361B2 (en) * 2007-01-02 2009-06-23 International Business Machines Corporation Trench structure and method for co-alignment of mixed optical and electron beam lithographic fabrication levels
US8610240B2 (en) * 2009-10-16 2013-12-17 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit with multi recessed shallow trench isolation
US9006080B2 (en) * 2013-03-12 2015-04-14 Taiwan Semiconductor Manufacturing Company, Ltd. Varied STI liners for isolation structures in image sensing devices
CN104103571B (en) * 2013-04-15 2017-06-09 中芯国际集成电路制造(上海)有限公司 The forming method of fleet plough groove isolation structure

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4238278A (en) 1979-06-14 1980-12-09 International Business Machines Corporation Polycrystalline silicon oxidation method for making shallow and deep isolation trenches
JP2723598B2 (en) * 1989-03-20 1998-03-09 日本電気株式会社 Method for manufacturing semiconductor device
US4994406A (en) 1989-11-03 1991-02-19 Motorola Inc. Method of fabricating semiconductor devices having deep and shallow isolation structures
US5065217A (en) 1990-06-27 1991-11-12 Texas Instruments Incorporated Process for simultaneously fabricating isolation structures for bipolar and CMOS circuits
JP3157357B2 (en) * 1993-06-14 2001-04-16 株式会社東芝 Semiconductor device
KR0157875B1 (en) * 1994-11-03 1999-02-01 문정환 Manufacture of semiconductor device
KR0179554B1 (en) * 1995-11-30 1999-04-15 김주용 Method for forming isolation film semiconductor device
US5646063A (en) * 1996-03-28 1997-07-08 Advanced Micro Devices, Inc. Hybrid of local oxidation of silicon isolation and trench isolation for a semiconductor device
JPH10303289A (en) * 1997-04-30 1998-11-13 Hitachi Ltd Manufacture of semiconductor integrated circuit device
JP3519571B2 (en) * 1997-04-11 2004-04-19 株式会社ルネサステクノロジ Method for manufacturing semiconductor device
US5858830A (en) 1997-06-12 1999-01-12 Taiwan Semiconductor Manufacturing Company, Ltd. Method of making dual isolation regions for logic and embedded memory devices
US5854114A (en) * 1997-10-09 1998-12-29 Advanced Micro Devices, Inc. Data retention of EEPROM cell with shallow trench isolation using thicker liner oxide
US5883006A (en) 1997-12-12 1999-03-16 Kabushiki Kaisha Toshiba Method for making a semiconductor device using a flowable oxide film
US6228746B1 (en) * 1997-12-18 2001-05-08 Advanced Micro Devices, Inc. Methodology for achieving dual field oxide thicknesses
US6040597A (en) * 1998-02-13 2000-03-21 Advanced Micro Devices, Inc. Isolation boundaries in flash memory cores
US6146970A (en) * 1998-05-26 2000-11-14 Motorola Inc. Capped shallow trench isolation and method of formation
JP4592837B2 (en) * 1998-07-31 2010-12-08 ルネサスエレクトロニクス株式会社 Manufacturing method of semiconductor device
JP2000138372A (en) * 1998-11-02 2000-05-16 Hitachi Ltd Semiconductor device and its manufacture
JP3833854B2 (en) * 1999-06-30 2006-10-18 株式会社東芝 Method for manufacturing nonvolatile semiconductor memory device

Also Published As

Publication number Publication date
KR20030028845A (en) 2003-04-10
CN1502127A (en) 2004-06-02
WO2002025725A3 (en) 2002-06-20
TW522511B (en) 2003-03-01
KR100822232B1 (en) 2008-04-17
JP5208346B2 (en) 2013-06-12
WO2002025725A2 (en) 2002-03-28
JP2004510330A (en) 2004-04-02
US6406976B1 (en) 2002-06-18
CN1267983C (en) 2006-08-02

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