ATE93118T1 - Elektronische module hoher dichte, verfahren und erzeugnis. - Google Patents
Elektronische module hoher dichte, verfahren und erzeugnis.Info
- Publication number
- ATE93118T1 ATE93118T1 AT88900618T AT88900618T ATE93118T1 AT E93118 T1 ATE93118 T1 AT E93118T1 AT 88900618 T AT88900618 T AT 88900618T AT 88900618 T AT88900618 T AT 88900618T AT E93118 T1 ATE93118 T1 AT E93118T1
- Authority
- AT
- Austria
- Prior art keywords
- substrate
- stack
- bonding bumps
- access plane
- insulation
- Prior art date
Links
- 239000000758 substrate Substances 0.000 abstract 5
- 238000009413 insulation Methods 0.000 abstract 2
- 239000000853 adhesive Substances 0.000 abstract 1
- 230000001070 adhesive effect Effects 0.000 abstract 1
- 230000003416 augmentation Effects 0.000 abstract 1
- 239000004020 conductor Substances 0.000 abstract 1
- 238000000605 extraction Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- 239000000615 nonconductor Substances 0.000 abstract 1
- 230000001681 protective effect Effects 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 239000012780 transparent material Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/02—Arrangements of circuit components or wiring on supporting structure
- H05K7/023—Stackable modules
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Wire Bonding (AREA)
- Semiconductor Memories (AREA)
- Filters And Equalizers (AREA)
- Networks Using Active Elements (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/US1987/002746 WO1989004113A1 (en) | 1987-10-20 | 1987-10-20 | High-density electronic modules, process and product |
| EP88900618A EP0385979B1 (de) | 1987-10-20 | 1987-10-20 | Elektronische module hoher dichte, verfahren und erzeugnis |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE93118T1 true ATE93118T1 (de) | 1993-08-15 |
Family
ID=22202625
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT88900618T ATE93118T1 (de) | 1987-10-20 | 1987-10-20 | Elektronische module hoher dichte, verfahren und erzeugnis. |
Country Status (5)
| Country | Link |
|---|---|
| EP (1) | EP0385979B1 (de) |
| JP (1) | JPH088332B2 (de) |
| AT (1) | ATE93118T1 (de) |
| DE (1) | DE3787032T2 (de) |
| WO (1) | WO1989004113A1 (de) |
Families Citing this family (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0715969B2 (ja) * | 1991-09-30 | 1995-02-22 | インターナショナル・ビジネス・マシーンズ・コーポレイション | マルチチツプ集積回路パツケージ及びそのシステム |
| JP3338527B2 (ja) * | 1992-10-07 | 2002-10-28 | 富士通株式会社 | 高密度積層形のコネクタ、及び、コネクタの設計方法 |
| US5502667A (en) * | 1993-09-13 | 1996-03-26 | International Business Machines Corporation | Integrated multichip memory module structure |
| US5561622A (en) * | 1993-09-13 | 1996-10-01 | International Business Machines Corporation | Integrated memory cube structure |
| US5648684A (en) * | 1995-07-26 | 1997-07-15 | International Business Machines Corporation | Endcap chip with conductive, monolithic L-connect for multichip stack |
| FR2745973B1 (fr) * | 1996-03-08 | 1998-04-03 | Thomson Csf | Memoire de masse et procede de fabrication de memoire de masse |
| US5915167A (en) * | 1997-04-04 | 1999-06-22 | Elm Technology Corporation | Three dimensional structure memory |
| US6624505B2 (en) | 1998-02-06 | 2003-09-23 | Shellcase, Ltd. | Packaged integrated circuits and methods of producing thereof |
| WO2002051217A2 (en) | 2000-12-21 | 2002-06-27 | Shellcase Ltd. | Packaged integrated circuits and methods of producing thereof |
| IL123207A0 (en) | 1998-02-06 | 1998-09-24 | Shellcase Ltd | Integrated circuit device |
| US6856007B2 (en) | 2001-08-28 | 2005-02-15 | Tessera, Inc. | High-frequency chip packages |
| US7242082B2 (en) | 2002-02-07 | 2007-07-10 | Irvine Sensors Corp. | Stackable layer containing ball grid array package |
| US7033664B2 (en) | 2002-10-22 | 2006-04-25 | Tessera Technologies Hungary Kft | Methods for producing packaged integrated circuit devices and packaged integrated circuit devices produced thereby |
| US6972480B2 (en) | 2003-06-16 | 2005-12-06 | Shellcase Ltd. | Methods and apparatus for packaging integrated circuit devices |
| JP2007528120A (ja) | 2003-07-03 | 2007-10-04 | テッセラ テクノロジーズ ハンガリー コルラートルト フェレロェセーギュー タールシャシャーグ | 集積回路装置をパッケージングする方法及び装置 |
| US7129576B2 (en) | 2003-09-26 | 2006-10-31 | Tessera, Inc. | Structure and method of making capped chips including vertical interconnects having stud bumps engaged to surfaces of said caps |
| US7566853B2 (en) | 2005-08-12 | 2009-07-28 | Tessera, Inc. | Image sensor employing a plurality of photodetector arrays and/or rear-illuminated architecture |
| US8604605B2 (en) | 2007-01-05 | 2013-12-10 | Invensas Corp. | Microelectronic assembly with multi-layer support structure |
| US7714426B1 (en) | 2007-07-07 | 2010-05-11 | Keith Gann | Ball grid array package format layers and structure |
| US11183484B2 (en) | 2019-11-11 | 2021-11-23 | Ultramemory Inc. | Semiconductor module, DIMM module, manufacturing method of semiconductor module, and manufacturing method of DIMM module |
| CN117677206A (zh) | 2022-08-10 | 2024-03-08 | 长鑫存储技术有限公司 | 半导体结构、半导体结构的制造方法和半导体器件 |
| CN117677207A (zh) * | 2022-08-10 | 2024-03-08 | 长鑫存储技术有限公司 | 半导体结构、半导体结构的制造方法和半导体器件 |
| JPWO2024135670A1 (de) * | 2022-12-20 | 2024-06-27 | ||
| WO2024262220A1 (ja) * | 2023-06-20 | 2024-12-26 | 先端システム技術研究組合 | 半導体モジュール |
| WO2024262221A1 (ja) * | 2023-06-20 | 2024-12-26 | 先端システム技術研究組合 | 半導体モジュール |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4630096A (en) * | 1984-05-30 | 1986-12-16 | Motorola, Inc. | High density IC module assembly |
| US4617160A (en) * | 1984-11-23 | 1986-10-14 | Irvine Sensors Corporation | Method for fabricating modules comprising uniformly stacked, aligned circuit-carrying layers |
| US4706166A (en) * | 1986-04-25 | 1987-11-10 | Irvine Sensors Corporation | High-density electronic modules--process and product |
-
1987
- 1987-10-20 DE DE88900618T patent/DE3787032T2/de not_active Expired - Fee Related
- 1987-10-20 EP EP88900618A patent/EP0385979B1/de not_active Expired - Lifetime
- 1987-10-20 AT AT88900618T patent/ATE93118T1/de not_active IP Right Cessation
- 1987-10-20 WO PCT/US1987/002746 patent/WO1989004113A1/en not_active Ceased
- 1987-10-20 JP JP63501172A patent/JPH088332B2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| EP0385979A4 (en) | 1991-06-12 |
| DE3787032T2 (de) | 1994-03-03 |
| JPH03501428A (ja) | 1991-03-28 |
| DE3787032D1 (de) | 1993-09-16 |
| WO1989004113A1 (en) | 1989-05-05 |
| EP0385979B1 (de) | 1993-08-11 |
| EP0385979A1 (de) | 1990-09-12 |
| JPH088332B2 (ja) | 1996-01-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| ATE93118T1 (de) | Elektronische module hoher dichte, verfahren und erzeugnis. | |
| US6299463B1 (en) | Device and method for electrically or thermally coupling to the backsides of integrated circuit dice in chip-on-board applications | |
| US4996587A (en) | Integrated semiconductor chip package | |
| US4266282A (en) | Vertical semiconductor integrated circuit chip packaging | |
| US4426689A (en) | Vertical semiconductor integrated circuit chip packaging | |
| JPS5731166A (en) | Semiconductor device | |
| JPS5737818A (en) | Carrier for chip | |
| US4598308A (en) | Easily repairable, low cost, high speed electromechanical assembly of integrated circuit die | |
| DE3678023D1 (de) | Integrierte schaltungsanordnung mit gestapelten leiterschichten zum verbinden von schaltungselementen. | |
| DE69420201D1 (de) | Kubikpackung mit Polyimidisolierung von gestapelten Halbleiterchips | |
| TW353193B (en) | Semiconductor integrated circuit device capable of surely electrically insulating two semiconductor chips from each other and fabricating method thereof | |
| MY119341A (en) | Chip scale ball grid array for integrated circuit package | |
| CA2121712A1 (en) | Multi-Layer Wiring Board and a Manufacturing Method Thereof | |
| MY120988A (en) | Hybrid wiring board, semiconductor apparatus, flexible substrate, and fabrication method of hybrid wiring board | |
| JPH07509104A (ja) | 半導体チップを封止する方法,この方法によって得られる装置,及び3次元のチップの相互接続への適用 | |
| SG80675A1 (en) | Semiconductor device and its manufacturing method | |
| KR920001689A (ko) | 반도체장치 및 그 제조방법 | |
| KR940010301A (ko) | 전자부품 패키지용 3차원 접속방법 및 3차원 부품 | |
| WO2000002246A1 (en) | Double-sided electronic device | |
| JPS56161696A (en) | Board | |
| GB2083285A (en) | Over/under dual in-line chip package | |
| SG66397A1 (en) | Plastic pin grid array package | |
| JPS57126154A (en) | Lsi package | |
| JPS55165657A (en) | Multi-chip package | |
| JPH041738Y2 (de) |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |