ATE85852T1 - Addierzelle fuer carry-ripple-addierer in cmostechnik. - Google Patents

Addierzelle fuer carry-ripple-addierer in cmostechnik.

Info

Publication number
ATE85852T1
ATE85852T1 AT86111745T AT86111745T ATE85852T1 AT E85852 T1 ATE85852 T1 AT E85852T1 AT 86111745 T AT86111745 T AT 86111745T AT 86111745 T AT86111745 T AT 86111745T AT E85852 T1 ATE85852 T1 AT E85852T1
Authority
AT
Austria
Prior art keywords
carry
adder
gate
ripple
cmos technology
Prior art date
Application number
AT86111745T
Other languages
English (en)
Inventor
Karl Knauer
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of ATE85852T1 publication Critical patent/ATE85852T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/501Half or full adders, i.e. basic adder cells for one denomination

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Networks Using Active Elements (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Manipulation Of Pulses (AREA)
AT86111745T 1985-09-30 1986-08-25 Addierzelle fuer carry-ripple-addierer in cmostechnik. ATE85852T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3534892 1985-09-30
EP86111745A EP0218071B1 (de) 1985-09-30 1986-08-25 Addierzelle für Carry-Ripple-Addierer in CMOS-Technik

Publications (1)

Publication Number Publication Date
ATE85852T1 true ATE85852T1 (de) 1993-03-15

Family

ID=6282396

Family Applications (1)

Application Number Title Priority Date Filing Date
AT86111745T ATE85852T1 (de) 1985-09-30 1986-08-25 Addierzelle fuer carry-ripple-addierer in cmostechnik.

Country Status (5)

Country Link
US (1) US4839849A (de)
EP (1) EP0218071B1 (de)
JP (1) JPH0833813B2 (de)
AT (1) ATE85852T1 (de)
DE (1) DE3687778D1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4893269A (en) * 1988-04-29 1990-01-09 Siemens Aktiengesellschaft Adder cell for carry-save arithmetic
DE58909280D1 (de) * 1988-07-29 1995-07-13 Siemens Ag Carry-select-Addierer.
US5633820A (en) * 1995-06-05 1997-05-27 International Business Machines Corporation Self-resetting CMOS parallel adder with a bubble pipelined architecture, tri-rail merging logic, and enhanced testability
KR100423903B1 (ko) * 2000-12-29 2004-03-24 삼성전자주식회사 고속 저전력 4-2 압축기

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3843876A (en) * 1973-09-20 1974-10-22 Motorola Inc Electronic digital adder having a high speed carry propagation line
US4052604A (en) * 1976-01-19 1977-10-04 Hewlett-Packard Company Binary adder
US4425623A (en) * 1981-07-14 1984-01-10 Rockwell International Corporation Lookahead carry circuit apparatus
US4417314A (en) * 1981-07-14 1983-11-22 Rockwell International Corporation Parallel operating mode arithmetic logic unit apparatus
US4439835A (en) * 1981-07-14 1984-03-27 Rockwell International Corporation Apparatus for and method of generation of ripple carry signals in conjunction with logical adding circuitry
JPS5896347A (ja) * 1981-12-03 1983-06-08 Toshiba Corp 全加算器
JPS58211252A (ja) * 1982-06-03 1983-12-08 Toshiba Corp 全加算器
EP0098692A3 (de) * 1982-07-01 1986-04-16 Hewlett-Packard Company Einrichtung zur Addition von ersten und zweiten binären Operanden
JPS59139447A (ja) * 1983-01-28 1984-08-10 Matsushita Electric Ind Co Ltd 全加算器
NL8400408A (nl) * 1984-02-09 1985-09-02 Philips Nv Logische optelschakeling.
US4689763A (en) * 1985-01-04 1987-08-25 Advanced Micro Devices, Inc. CMOS full adder circuit
JPS61229471A (ja) * 1985-04-04 1986-10-13 Matsushita Electric Ind Co Ltd ア−ク溶接機

Also Published As

Publication number Publication date
JPS6275839A (ja) 1987-04-07
US4839849A (en) 1989-06-13
EP0218071B1 (de) 1993-02-17
DE3687778D1 (en) 1993-03-25
JPH0833813B2 (ja) 1996-03-29
EP0218071A3 (en) 1989-05-17
EP0218071A2 (de) 1987-04-15

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Legal Events

Date Code Title Description
REN Ceased due to non-payment of the annual fee