ATE534076T1 - Speichersystem - Google Patents

Speichersystem

Info

Publication number
ATE534076T1
ATE534076T1 AT09000724T AT09000724T ATE534076T1 AT E534076 T1 ATE534076 T1 AT E534076T1 AT 09000724 T AT09000724 T AT 09000724T AT 09000724 T AT09000724 T AT 09000724T AT E534076 T1 ATE534076 T1 AT E534076T1
Authority
AT
Austria
Prior art keywords
storage
flash memory
area
storage area
unwritable
Prior art date
Application number
AT09000724T
Other languages
English (en)
Inventor
Sadahiro Sugimoto
Akira Yamamoto
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of ATE534076T1 publication Critical patent/ATE534076T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793—Remedial or corrective actions
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/816—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout for an application-specific layout
    • G11C29/82—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout for an application-specific layout for EEPROMs

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
AT09000724T 2008-04-25 2009-01-20 Speichersystem ATE534076T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008114773 2008-04-25

Publications (1)

Publication Number Publication Date
ATE534076T1 true ATE534076T1 (de) 2011-12-15

Family

ID=40934171

Family Applications (1)

Application Number Title Priority Date Filing Date
AT09000724T ATE534076T1 (de) 2008-04-25 2009-01-20 Speichersystem

Country Status (5)

Country Link
US (2) US20090271564A1 (de)
EP (1) EP2112598B1 (de)
JP (1) JPWO2009130848A1 (de)
AT (1) ATE534076T1 (de)
WO (1) WO2009130848A1 (de)

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Also Published As

Publication number Publication date
JPWO2009130848A1 (ja) 2011-08-11
US20090271564A1 (en) 2009-10-29
US20100241793A1 (en) 2010-09-23
EP2112598A1 (de) 2009-10-28
EP2112598B1 (de) 2011-11-16
WO2009130848A1 (ja) 2009-10-29

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