ATE520079T1 - Datenverarbeitungssystem, datenverarbeitungsverfahren und vorrichtung - Google Patents

Datenverarbeitungssystem, datenverarbeitungsverfahren und vorrichtung

Info

Publication number
ATE520079T1
ATE520079T1 AT07736020T AT07736020T ATE520079T1 AT E520079 T1 ATE520079 T1 AT E520079T1 AT 07736020 T AT07736020 T AT 07736020T AT 07736020 T AT07736020 T AT 07736020T AT E520079 T1 ATE520079 T1 AT E520079T1
Authority
AT
Austria
Prior art keywords
data path
data
path
component
data processing
Prior art date
Application number
AT07736020T
Other languages
English (en)
Inventor
Florian Bogenberger
Joaquim Kruecken
Christopher Temple
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Application granted granted Critical
Publication of ATE520079T1 publication Critical patent/ATE520079T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1629Error detection by comparing the output of redundant processing systems
    • G06F11/1641Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1479Generic software techniques for error detection or fault masking
    • G06F11/1487Generic software techniques for error detection or fault masking using N-version programming
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1675Temporal synchronisation or re-synchronisation of redundant processing components
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/845Systems in which the redundancy can be transformed in increased performance

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Hardware Redundancy (AREA)
AT07736020T 2007-05-25 2007-05-25 Datenverarbeitungssystem, datenverarbeitungsverfahren und vorrichtung ATE520079T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/IB2007/051984 WO2008146091A1 (en) 2007-05-25 2007-05-25 Data processing system, data processing method, and apparatus

Publications (1)

Publication Number Publication Date
ATE520079T1 true ATE520079T1 (de) 2011-08-15

Family

ID=39273560

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07736020T ATE520079T1 (de) 2007-05-25 2007-05-25 Datenverarbeitungssystem, datenverarbeitungsverfahren und vorrichtung

Country Status (4)

Country Link
US (1) US8527681B2 (de)
EP (1) EP2153328B1 (de)
AT (1) ATE520079T1 (de)
WO (1) WO2008146091A1 (de)

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EP2537091A4 (de) * 2010-02-16 2014-08-06 Freescale Semiconductor Inc Datenverarbeitungsverfahren, datenprozessor und vorrichtung mit einem datenprozessor
US8683264B2 (en) * 2010-04-13 2014-03-25 International Business Machines Corporation Processing execution requests within different computing environments
JP5684514B2 (ja) * 2010-08-19 2015-03-11 株式会社東芝 冗長化制御システム、及びその演算データの伝送方法
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US10142124B2 (en) 2012-05-24 2018-11-27 Infineon Technologies Ag System and method to transmit data over a bus system
US9842014B2 (en) 2012-11-22 2017-12-12 Nxp Usa, Inc. Data processing device, method of execution error detection and integrated circuit
DE102014217321A1 (de) * 2014-08-29 2016-03-03 Continental Teves Ag & Co. Ohg Mikrocontrollersystem und Verfahren für sicherheitskritische Kraftfahrzeugsysteme sowie deren Verwendung
US9823983B2 (en) 2014-09-25 2017-11-21 Nxp Usa, Inc. Electronic fault detection unit
DE102016215345A1 (de) 2016-08-17 2018-02-22 Siemens Aktiengesellschaft Verfahren und Vorrichtung zur redundanten Datenverarbeitung
JP6848340B2 (ja) * 2016-10-25 2021-03-24 株式会社リコー 情報処理システム、更新方法、情報処理装置及びプログラム
WO2018128204A1 (ko) * 2017-01-06 2018-07-12 주식회사 알티스트 파티셔닝 기술을 이용하여 lsm 및 dpm을 동시에 사용할 수 있는 멀티코어 시스템
US10831578B2 (en) 2018-09-28 2020-11-10 Nxp Usa, Inc. Fault detection circuit with progress register and status register
US11132268B2 (en) * 2019-10-21 2021-09-28 The Boeing Company System and method for synchronizing communications between a plurality of processors

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US7245552B2 (en) * 2005-06-22 2007-07-17 Infineon Technologies Ag Parallel data path architecture
DE102005037247A1 (de) * 2005-08-08 2007-02-15 Robert Bosch Gmbh Verfahren und Vorrichtung zur Steuerung eines Speicherzugriffs bei einem Rechnersystem mit wenigstens zwei Ausführungseinheiten
WO2007017445A1 (de) * 2005-08-11 2007-02-15 Continental Teves Ag & Co. Ohg Mikroprozessorsystem zur steuerung bzw. regelung von zumindest zum teil sicherheitskritischen prozessen
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Also Published As

Publication number Publication date
US8527681B2 (en) 2013-09-03
US20110066779A1 (en) 2011-03-17
EP2153328B1 (de) 2011-08-10
EP2153328A1 (de) 2010-02-17
WO2008146091A1 (en) 2008-12-04

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