ATE490505T1 - Datenschreibverfahren - Google Patents

Datenschreibverfahren

Info

Publication number
ATE490505T1
ATE490505T1 AT08008767T AT08008767T ATE490505T1 AT E490505 T1 ATE490505 T1 AT E490505T1 AT 08008767 T AT08008767 T AT 08008767T AT 08008767 T AT08008767 T AT 08008767T AT E490505 T1 ATE490505 T1 AT E490505T1
Authority
AT
Austria
Prior art keywords
data writing
writing procedure
data
host
flash memory
Prior art date
Application number
AT08008767T
Other languages
English (en)
Inventor
Hiromichi Oribe
Masaki Takikawa
Yoshihiro Kitou
Original Assignee
Hagiwara Sys Com Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hagiwara Sys Com Co Ltd filed Critical Hagiwara Sys Com Co Ltd
Application granted granted Critical
Publication of ATE490505T1 publication Critical patent/ATE490505T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Read Only Memory (AREA)
  • Memory System (AREA)
  • Debugging And Monitoring (AREA)
  • Communication Control (AREA)
  • Sewing Machines And Sewing (AREA)
AT08008767T 2007-10-30 2008-05-09 Datenschreibverfahren ATE490505T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007281471 2007-10-30

Publications (1)

Publication Number Publication Date
ATE490505T1 true ATE490505T1 (de) 2010-12-15

Family

ID=39847030

Family Applications (1)

Application Number Title Priority Date Filing Date
AT08008767T ATE490505T1 (de) 2007-10-30 2008-05-09 Datenschreibverfahren

Country Status (4)

Country Link
EP (1) EP2056203B1 (de)
JP (1) JP4315461B2 (de)
AT (1) ATE490505T1 (de)
DE (1) DE602008003733D1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5330428B2 (ja) 2011-02-21 2013-10-30 株式会社東芝 データ記憶装置及び誤り検出訂正方法
WO2014047159A1 (en) * 2012-09-21 2014-03-27 Violin Memory Inc. Write cache sorting
JP6089844B2 (ja) 2013-03-22 2017-03-08 富士通株式会社 制御装置，ストレージ装置，及び制御プログラム
JP6467636B2 (ja) 2014-08-28 2019-02-13 パナソニックＩｐマネジメント株式会社 メモリカード
JP7153435B2 (ja) 2017-10-12 2022-10-14 ラピスセミコンダクタ株式会社 不揮発性メモリのデータ書換方法及び半導体装置
FR3103620B1 (fr) * 2019-11-21 2021-11-26 St Microelectronics Rousset Procédé d’écriture dans une mémoire volatile et circuit intégré correspondant

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3495337B2 (ja) 1991-12-19 2004-02-09 株式会社東芝 メモリベリファイ回路
JP2000349853A (ja) 1999-06-01 2000-12-15 Victor Co Of Japan Ltd データ伝送方法
AU2002353406A1 (en) * 2002-12-27 2004-07-22 Solid State System Co., Ltd. Nonvolatile memory unit with specific cache
US8041878B2 (en) * 2003-03-19 2011-10-18 Samsung Electronics Co., Ltd. Flash file system
JP2006323739A (ja) 2005-05-20 2006-11-30 Renesas Technology Corp メモリモジュール、メモリシステム、及び情報機器
JP4418439B2 (ja) * 2006-03-07 2010-02-17 パナソニック株式会社 不揮発性記憶装置およびそのデータ書込み方法

Also Published As

Publication number Publication date
DE602008003733D1 (de) 2011-01-13
EP2056203A1 (de) 2009-05-06
JP4315461B2 (ja) 2009-08-19
JP2009134682A (ja) 2009-06-18
EP2056203B1 (de) 2010-12-01

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties