ATE484026T1 - Datenverarbeitungsschaltung mit cachespeicher und vorrichtung mit solcher schaltung - Google Patents

Datenverarbeitungsschaltung mit cachespeicher und vorrichtung mit solcher schaltung

Info

Publication number
ATE484026T1
ATE484026T1 AT01919421T AT01919421T ATE484026T1 AT E484026 T1 ATE484026 T1 AT E484026T1 AT 01919421 T AT01919421 T AT 01919421T AT 01919421 T AT01919421 T AT 01919421T AT E484026 T1 ATE484026 T1 AT E484026T1
Authority
AT
Austria
Prior art keywords
cache
memory
processor
access requests
main memory
Prior art date
Application number
AT01919421T
Other languages
English (en)
Inventor
Martijn Emons
Original Assignee
Dsp Group Switzerland Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dsp Group Switzerland Ag filed Critical Dsp Group Switzerland Ag
Application granted granted Critical
Publication of ATE484026T1 publication Critical patent/ATE484026T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/325Power saving in peripheral device
    • G06F1/3275Power saving in memory, e.g. RAM, cache
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215Monitoring of peripheral devices
    • G06F1/3225Monitoring of peripheral devices of memory devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/3287Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0888Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using selective caching, e.g. bypass
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
AT01919421T 2000-04-12 2001-04-03 Datenverarbeitungsschaltung mit cachespeicher und vorrichtung mit solcher schaltung ATE484026T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP00201310 2000-04-12
PCT/EP2001/003751 WO2001077836A1 (en) 2000-04-12 2001-04-03 Data processing circuit with a cache memory and apparatus containing such a circuit

Publications (1)

Publication Number Publication Date
ATE484026T1 true ATE484026T1 (de) 2010-10-15

Family

ID=8171332

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01919421T ATE484026T1 (de) 2000-04-12 2001-04-03 Datenverarbeitungsschaltung mit cachespeicher und vorrichtung mit solcher schaltung

Country Status (7)

Country Link
US (1) US7076612B2 (de)
EP (1) EP1275046B1 (de)
JP (1) JP2003530640A (de)
KR (1) KR100798020B1 (de)
AT (1) ATE484026T1 (de)
DE (1) DE60143194D1 (de)
WO (1) WO2001077836A1 (de)

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US7284092B2 (en) * 2004-06-24 2007-10-16 International Business Machines Corporation Digital data processing apparatus having multi-level register file
US7257678B2 (en) * 2004-10-01 2007-08-14 Advanced Micro Devices, Inc. Dynamic reconfiguration of cache memory
US7472224B1 (en) * 2004-10-01 2008-12-30 Advanced Micro Devices, Inc. Reconfigurable processing node including first and second processor cores
US7237065B2 (en) * 2005-05-24 2007-06-26 Texas Instruments Incorporated Configurable cache system depending on instruction type
US8683139B2 (en) 2006-10-31 2014-03-25 Hewlett-Packard Development Company, L.P. Cache and method for cache bypass functionality
US7783830B2 (en) * 2006-11-29 2010-08-24 Seagate Technology Llc Solid state device pattern for non-solid state storage media
JP2009093559A (ja) * 2007-10-11 2009-04-30 Nec Corp プロセッサ、情報処理装置、プロセッサのキャッシュ制御方法
US8166326B2 (en) * 2007-11-08 2012-04-24 International Business Machines Corporation Managing power consumption in a computer
US20090132842A1 (en) * 2007-11-15 2009-05-21 International Business Machines Corporation Managing Computer Power Consumption In A Computer Equipment Rack
US8041521B2 (en) * 2007-11-28 2011-10-18 International Business Machines Corporation Estimating power consumption of computing components configured in a computing system
US8103884B2 (en) 2008-06-25 2012-01-24 International Business Machines Corporation Managing power consumption of a computer
TWI361372B (en) * 2008-07-11 2012-04-01 Htc Corp Touch-sensitive control systems and methods
TW201017421A (en) * 2008-09-24 2010-05-01 Panasonic Corp Cache memory, memory system and control method therefor
US8041976B2 (en) * 2008-10-01 2011-10-18 International Business Machines Corporation Power management for clusters of computers
US8514215B2 (en) * 2008-11-12 2013-08-20 International Business Machines Corporation Dynamically managing power consumption of a computer with graphics adapter configurations
WO2011112523A2 (en) * 2010-03-08 2011-09-15 Hewlett-Packard Development Company, L.P. Data storage apparatus and methods
JP5484281B2 (ja) * 2010-09-21 2014-05-07 三菱電機株式会社 情報処理システム
WO2012049760A1 (ja) 2010-10-14 2012-04-19 富士通株式会社 ストレージ制御装置における基準時間設定方法
WO2013027261A1 (ja) * 2011-08-23 2013-02-28 富士通株式会社 情報処理装置及びスケジューリング方法
KR102049265B1 (ko) * 2012-11-30 2019-11-28 삼성전자주식회사 최대절전 모드를 가지는 시스템 및 그 동작방법
US9568986B2 (en) * 2013-09-25 2017-02-14 International Business Machines Corporation System-wide power conservation using memory cache
KR102589298B1 (ko) 2016-05-11 2023-10-13 삼성전자주식회사 그래픽스 프로세싱 장치 및, 그래픽스 프로세싱 장치에서 캐시 바이패스를 제어하는 방법
US10592142B2 (en) * 2016-09-30 2020-03-17 International Business Machines Corporation Toggling modal transient memory access state

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US4429363A (en) * 1981-10-15 1984-01-31 International Business Machines Corporation Method and apparatus for managing data movements from a backing store to a caching buffer store
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Also Published As

Publication number Publication date
DE60143194D1 (de) 2010-11-18
EP1275046B1 (de) 2010-10-06
JP2003530640A (ja) 2003-10-14
WO2001077836A1 (en) 2001-10-18
EP1275046A1 (de) 2003-01-15
KR100798020B1 (ko) 2008-01-24
KR20020023231A (ko) 2002-03-28
US20010032298A1 (en) 2001-10-18
US7076612B2 (en) 2006-07-11

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