ATE413667T1 - Prozessor, schaltung und verfahren zur verarbeitung von bildern in einem parallelen prozessornetwerk - Google Patents

Prozessor, schaltung und verfahren zur verarbeitung von bildern in einem parallelen prozessornetwerk

Info

Publication number
ATE413667T1
ATE413667T1 AT01994868T AT01994868T ATE413667T1 AT E413667 T1 ATE413667 T1 AT E413667T1 AT 01994868 T AT01994868 T AT 01994868T AT 01994868 T AT01994868 T AT 01994868T AT E413667 T1 ATE413667 T1 AT E413667T1
Authority
AT
Austria
Prior art keywords
transistor
circuit
processor
output
processing images
Prior art date
Application number
AT01994868T
Other languages
English (en)
Inventor
Ari Paasio
Original Assignee
Ari Paasio
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ari Paasio filed Critical Ari Paasio
Application granted granted Critical
Publication of ATE413667T1 publication Critical patent/ATE413667T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T5/00—Image enhancement or restoration
    • G06T5/70—Denoising; Smoothing

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Image Processing (AREA)
  • Electronic Switches (AREA)
  • Processing Or Creating Images (AREA)
  • Multi Processors (AREA)
  • Communication Control (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Power Sources (AREA)
AT01994868T 2000-12-28 2001-12-28 Prozessor, schaltung und verfahren zur verarbeitung von bildern in einem parallelen prozessornetwerk ATE413667T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI20002864A FI113714B (fi) 2000-12-28 2000-12-28 Prosessori, piiri ja menetelmä kuvien käsittelemiseksi rinnakkaisprosessoriverkossa

Publications (1)

Publication Number Publication Date
ATE413667T1 true ATE413667T1 (de) 2008-11-15

Family

ID=8559822

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01994868T ATE413667T1 (de) 2000-12-28 2001-12-28 Prozessor, schaltung und verfahren zur verarbeitung von bildern in einem parallelen prozessornetwerk

Country Status (8)

Country Link
US (1) US7349939B2 (de)
EP (1) EP1346320B1 (de)
CN (1) CN1273905C (de)
AT (1) ATE413667T1 (de)
DE (1) DE60136486D1 (de)
ES (1) ES2315317T3 (de)
FI (1) FI113714B (de)
WO (1) WO2002054348A1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8150902B2 (en) 2009-06-19 2012-04-03 Singular Computing Llc Processing with compact arithmetic processing element
US9184744B2 (en) * 2014-03-14 2015-11-10 Infineon Technologies Ag Gate signal generation with adaptive signal profiles

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2572822B1 (fr) * 1984-11-07 1986-12-26 Anizan Paul Dispositif analogique parallele de traitement local d'un signal bidimensionnel
JP3260357B2 (ja) * 1990-01-24 2002-02-25 株式会社日立製作所 情報処理装置
US5517134A (en) * 1994-09-16 1996-05-14 Texas Instruments Incorporated Offset comparator with common mode voltage stability
JPH08298663A (ja) * 1995-04-26 1996-11-12 Canon Inc 画像処理方法及びその装置
US6011295A (en) * 1997-07-22 2000-01-04 Foveonics, Inc. Neural network active pixel cell
DE19741209C1 (de) 1997-09-18 1999-01-21 Siemens Ag Zellularer Automat als neuronales Netzwerk und dessen Verwendung
JP3016381B2 (ja) * 1997-10-28 2000-03-06 日本電気株式会社 バイト入替え演算器
JP3521181B2 (ja) * 1998-04-23 2004-04-19 東亜道路工業株式会社 表面状態測定装置
US6281730B1 (en) * 1999-05-13 2001-08-28 National Semiconductor Corporation Controlled slew rate driver
US6448851B1 (en) * 2001-08-21 2002-09-10 Texas Instruments Incorporated Amplifier with offset compensation for a high voltage output transistor stage
US7034583B1 (en) * 2004-10-06 2006-04-25 Texas Instruments Incorporated Versatile system for output energy limiting circuitry

Also Published As

Publication number Publication date
EP1346320A1 (de) 2003-09-24
DE60136486D1 (de) 2008-12-18
HK1065621A1 (en) 2005-02-25
FI113714B (fi) 2004-05-31
WO2002054348A1 (en) 2002-07-11
FI20002864A0 (fi) 2000-12-28
EP1346320B1 (de) 2008-11-05
US7349939B2 (en) 2008-03-25
CN1273905C (zh) 2006-09-06
US20040073594A1 (en) 2004-04-15
CN1493060A (zh) 2004-04-28
ES2315317T3 (es) 2009-04-01
FI20002864L (fi) 2002-06-29

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Legal Events

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