ATE412978T1 - Herstellungsverfahren für eine led mit einer phosphor enthaltenden isolierschicht - Google Patents

Herstellungsverfahren für eine led mit einer phosphor enthaltenden isolierschicht

Info

Publication number
ATE412978T1
ATE412978T1 AT00120580T AT00120580T ATE412978T1 AT E412978 T1 ATE412978 T1 AT E412978T1 AT 00120580 T AT00120580 T AT 00120580T AT 00120580 T AT00120580 T AT 00120580T AT E412978 T1 ATE412978 T1 AT E412978T1
Authority
AT
Austria
Prior art keywords
led
isolation layer
insulating layer
production method
layer containing
Prior art date
Application number
AT00120580T
Other languages
English (en)
Inventor
Ching-Huei Wu
Chun-Chi Chou
Original Assignee
Unity Opto Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unity Opto Technology Co Ltd filed Critical Unity Opto Technology Co Ltd
Application granted granted Critical
Publication of ATE412978T1 publication Critical patent/ATE412978T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/851—Wavelength conversion means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/036—Manufacture or treatment of packages
    • H10H20/0361—Manufacture or treatment of packages of wavelength conversion means

Landscapes

  • Electroluminescent Light Sources (AREA)
  • Led Device Packages (AREA)
  • Luminescent Compositions (AREA)
AT00120580T 2000-09-20 2000-09-20 Herstellungsverfahren für eine led mit einer phosphor enthaltenden isolierschicht ATE412978T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP00120580A EP1191607B1 (de) 2000-09-20 2000-09-20 Herstellungsverfahren für eine LED mit einer Phosphor enthaltenden Isolierschicht

Publications (1)

Publication Number Publication Date
ATE412978T1 true ATE412978T1 (de) 2008-11-15

Family

ID=8169888

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00120580T ATE412978T1 (de) 2000-09-20 2000-09-20 Herstellungsverfahren für eine led mit einer phosphor enthaltenden isolierschicht

Country Status (3)

Country Link
EP (1) EP1191607B1 (de)
AT (1) ATE412978T1 (de)
DE (1) DE60040666D1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004022648A1 (de) * 2004-05-07 2005-12-15 Zumtobel Ag Lichtemittierende Anordnung und Verfahren zum Beschichten eines lichtemittierenden Halbleiterelements
CN101345273B (zh) * 2007-07-09 2011-03-23 上海威廉照明电气有限公司 发光二极管及其制作方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05152609A (ja) * 1991-11-25 1993-06-18 Nichia Chem Ind Ltd 発光ダイオード
WO1998039805A1 (de) * 1997-03-03 1998-09-11 Koninklijke Philips Electronics N.V. Weisse lumineszenzdiode
JP3327170B2 (ja) * 1997-05-17 2002-09-24 日亜化学工業株式会社 発光ダイオードの製造方法
US5959316A (en) * 1998-09-01 1999-09-28 Hewlett-Packard Company Multiple encapsulation of phosphor-LED devices
US6351069B1 (en) * 1999-02-18 2002-02-26 Lumileds Lighting, U.S., Llc Red-deficiency-compensating phosphor LED

Also Published As

Publication number Publication date
DE60040666D1 (de) 2008-12-11
EP1191607B1 (de) 2008-10-29
EP1191607A1 (de) 2002-03-27

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Legal Events

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