ATE377794T1 - Speicherschaltung mit nichtflüchtigem ram und ram - Google Patents

Speicherschaltung mit nichtflüchtigem ram und ram

Info

Publication number
ATE377794T1
ATE377794T1 AT03750744T AT03750744T ATE377794T1 AT E377794 T1 ATE377794 T1 AT E377794T1 AT 03750744 T AT03750744 T AT 03750744T AT 03750744 T AT03750744 T AT 03750744T AT E377794 T1 ATE377794 T1 AT E377794T1
Authority
AT
Austria
Prior art keywords
memory
random access
ram
memory circuit
access memory
Prior art date
Application number
AT03750744T
Other languages
English (en)
Inventor
Jani Klint
Original Assignee
Nokia Siemens Networks Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Siemens Networks Oy filed Critical Nokia Siemens Networks Oy
Application granted granted Critical
Publication of ATE377794T1 publication Critical patent/ATE377794T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1684Details of memory controller using multiple buses
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1694Configuration of memory controller to different memory types

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Fire Alarms (AREA)
  • Static Random-Access Memory (AREA)
AT03750744T 2002-09-10 2003-09-08 Speicherschaltung mit nichtflüchtigem ram und ram ATE377794T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI20021620A FI20021620A (fi) 2002-09-10 2002-09-10 Muistirakenne, järjestelmä ja elektroniikkalaite sekä menetelmä muistipiirin yhteydessä

Publications (1)

Publication Number Publication Date
ATE377794T1 true ATE377794T1 (de) 2007-11-15

Family

ID=8564563

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03750744T ATE377794T1 (de) 2002-09-10 2003-09-08 Speicherschaltung mit nichtflüchtigem ram und ram

Country Status (9)

Country Link
US (1) US7057911B2 (de)
EP (1) EP1537483B1 (de)
KR (1) KR100756309B1 (de)
CN (1) CN1682199A (de)
AT (1) ATE377794T1 (de)
AU (1) AU2003268967A1 (de)
DE (1) DE60317347T2 (de)
FI (1) FI20021620A (de)
WO (1) WO2004025474A1 (de)

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US20070147115A1 (en) * 2005-12-28 2007-06-28 Fong-Long Lin Unified memory and controller
US7519754B2 (en) 2005-12-28 2009-04-14 Silicon Storage Technology, Inc. Hard disk drive cache memory and playback device
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KR100844406B1 (ko) * 2007-03-12 2008-07-08 한국과학기술원 Nor 플래시 메모리와 nand 플래시 메모리를 이용한하이브리드 파일 시스템 및 데이터 연산 방법
US8767450B2 (en) 2007-08-21 2014-07-01 Samsung Electronics Co., Ltd. Memory controllers to refresh memory sectors in response to writing signals and memory systems including the same
KR20100123136A (ko) 2009-05-14 2010-11-24 삼성전자주식회사 비휘발성 메모리 장치
US8631203B2 (en) 2007-12-10 2014-01-14 Microsoft Corporation Management of external memory functioning as virtual cache
US8139390B2 (en) * 2008-07-08 2012-03-20 Mosaid Technologies Incorporated Mixed data rates in memory devices and systems
US8032707B2 (en) 2008-09-15 2011-10-04 Microsoft Corporation Managing cache data and metadata
US9032151B2 (en) 2008-09-15 2015-05-12 Microsoft Technology Licensing, Llc Method and system for ensuring reliability of cache data and metadata subsequent to a reboot
US7953774B2 (en) 2008-09-19 2011-05-31 Microsoft Corporation Aggregation of write traffic to a data store
US8250319B2 (en) * 2009-09-29 2012-08-21 Freescale Semiconductor, Inc. Operating an emulated electrically erasable (EEE) memory
KR20120028484A (ko) 2010-09-15 2012-03-23 삼성전자주식회사 모바일 기기에 채용하기 적합한 복합형 반도체 장치
EP3467832B1 (de) * 2010-12-17 2020-05-20 Everspin Technologies, Inc. Speichersteuerung und verfahren zur verschachtelung von dram- und mram-zugriffen
EP2761476B1 (de) 2011-09-30 2017-10-25 Intel Corporation Vorrichtung, verfahren und system zur bios-speicherung in einer nichtflüchtige ram-speicherzelle
CN103946816B (zh) * 2011-09-30 2018-06-26 英特尔公司 作为传统大容量存储设备的替代的非易失性随机存取存储器(nvram)
EP2761464B1 (de) 2011-09-30 2018-10-24 Intel Corporation Vorrichtung und verfahren zur implementierung einer mehrstufigen speicherhierarchie mit verschiedenen betriebsarten
WO2013048485A1 (en) 2011-09-30 2013-04-04 Intel Corporation Autonomous initialization of non-volatile random access memory in a computer system
US10096350B2 (en) * 2012-03-07 2018-10-09 Medtronic, Inc. Memory array with flash and random access memory and method therefor, reading data from the flash memory without storing the data in the random access memory
US9280497B2 (en) * 2012-12-21 2016-03-08 Dell Products Lp Systems and methods for support of non-volatile memory on a DDR memory channel
CN104575595B (zh) * 2014-12-12 2017-07-07 杭州华澜微电子股份有限公司 非易失性随机存取的存储装置
KR102367512B1 (ko) 2015-09-08 2022-02-24 삼성전자주식회사 시스템 온 패키지
CN112566724A (zh) * 2018-08-14 2021-03-26 L·布伦 饮料容器的处理机器和处理饮料容器的方法
CN110731012B (zh) * 2019-04-15 2021-01-29 长江存储科技有限责任公司 具有处理器和异构存储器的一体化半导体器件及其形成方法

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JP4049297B2 (ja) * 2001-06-11 2008-02-20 株式会社ルネサステクノロジ 半導体記憶装置
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Also Published As

Publication number Publication date
WO2004025474A1 (en) 2004-03-25
KR100756309B1 (ko) 2007-09-06
KR20050042183A (ko) 2005-05-04
US20040136259A1 (en) 2004-07-15
FI20021620A0 (fi) 2002-09-10
EP1537483B1 (de) 2007-11-07
US7057911B2 (en) 2006-06-06
DE60317347D1 (de) 2007-12-20
AU2003268967A1 (en) 2004-04-30
EP1537483A1 (de) 2005-06-08
DE60317347T2 (de) 2008-03-06
CN1682199A (zh) 2005-10-12
FI20021620A (fi) 2004-03-11

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