ATE347203T1 - Techniken zur regelung eines signalabtastpunktes - Google Patents

Techniken zur regelung eines signalabtastpunktes

Info

Publication number
ATE347203T1
ATE347203T1 AT03794584T AT03794584T ATE347203T1 AT E347203 T1 ATE347203 T1 AT E347203T1 AT 03794584 T AT03794584 T AT 03794584T AT 03794584 T AT03794584 T AT 03794584T AT E347203 T1 ATE347203 T1 AT E347203T1
Authority
AT
Austria
Prior art keywords
techniques
controlling
sampling point
signal sampling
sampling clock
Prior art date
Application number
AT03794584T
Other languages
English (en)
Inventor
Benny Christensen
Casper Dietrich
Bjarke Goth
Thorkild Franck
Eivind Johansen
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE347203T1 publication Critical patent/ATE347203T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Gyroscopes (AREA)
  • Dc Digital Transmission (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
AT03794584T 2002-09-04 2003-09-03 Techniken zur regelung eines signalabtastpunktes ATE347203T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/235,291 US6973147B2 (en) 2002-09-04 2002-09-04 Techniques to adjust a signal sampling point

Publications (1)

Publication Number Publication Date
ATE347203T1 true ATE347203T1 (de) 2006-12-15

Family

ID=31977542

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03794584T ATE347203T1 (de) 2002-09-04 2003-09-03 Techniken zur regelung eines signalabtastpunktes

Country Status (8)

Country Link
US (1) US6973147B2 (de)
EP (1) EP1537699B1 (de)
CN (1) CN100555931C (de)
AT (1) ATE347203T1 (de)
AU (1) AU2003265895A1 (de)
DE (1) DE60310089T2 (de)
TW (1) TWI241100B (de)
WO (1) WO2004023708A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7028205B2 (en) * 2002-07-25 2006-04-11 Intel Corporation Techniques to monitor transition density of an input signal
US7489757B2 (en) * 2003-05-01 2009-02-10 Mitsubishi Denki Kabushiki Kaisha Clock data recovery circuit
US7428284B2 (en) * 2005-03-14 2008-09-23 Micron Technology, Inc. Phase detector and method providing rapid locking of delay-lock loops
US8634510B2 (en) * 2011-01-12 2014-01-21 Qualcomm Incorporated Full digital bang bang frequency detector with no data pattern dependency
JP6476659B2 (ja) * 2014-08-28 2019-03-06 富士通株式会社 信号再生回路および信号再生方法
US9397822B1 (en) * 2015-06-11 2016-07-19 Applied Micro Circuits Corporation Split loop timing recovery

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1355495A (en) 1970-08-18 1974-06-05 Cossor Ltd A C Apparatus for clocking digital data
JPS6288902A (ja) * 1985-10-16 1987-04-23 Hitachi Ltd 変位の光学的測定方法および測定装置
EP0308678A1 (de) * 1987-09-25 1989-03-29 Siemens Aktiengesellschaft Verfahren und Vorrichtung zur Phasenmessung von Signalen an einem Messpunkt mit Hilfe eines unmodulierten Korpuskularstrahls
US4959617A (en) * 1989-05-30 1990-09-25 Motorola, Inc. Dual state phase detector having frequency steering capability
DE3917714A1 (de) * 1989-05-31 1990-12-06 Siemens Ag Multiplizierschaltung
JPH0443978A (ja) * 1990-06-11 1992-02-13 Seiko Instr Inc 高感度磁場検出装置
US5432480A (en) 1993-04-08 1995-07-11 Northern Telecom Limited Phase alignment methods and apparatus
US5734675A (en) 1996-01-16 1998-03-31 Lucent Technologies Inc. Receiver sharing for demand priority access method repeaters
DE19717642A1 (de) * 1997-04-25 1998-11-05 Siemens Ag Verfahren zur Datenregeneration
US6222895B1 (en) * 1998-01-28 2001-04-24 Agere Systems Guardian Corp. Phase-locked loop (PLL) circuit containing a sampled phase detector with reduced jitter
US6389090B2 (en) * 1998-02-06 2002-05-14 3Com Corporation Digital clock/data signal recovery method and apparatus
US6347128B1 (en) * 1998-07-20 2002-02-12 Lucent Technologies Inc. Self-aligned clock recovery circuit with proportional phase detector
US6127884A (en) * 1999-05-24 2000-10-03 Philips Electronics North America Corp. Differentiate and multiply based timing recovery in a quadrature demodulator
US6292485B1 (en) * 1999-06-03 2001-09-18 Fujitsu Network Communications, Inc. In-band management control unit software image download
US6304622B1 (en) * 1999-11-17 2001-10-16 Corning Incorporated Flexible bit rate clock recovery unit
US6392495B1 (en) * 2000-06-15 2002-05-21 Agere Systems Guardian Corp. Frequency detector circuits and systems
US7095758B2 (en) * 2000-06-16 2006-08-22 Nippon Telegraph And Telephone Corporation Multiplexing and transmission apparatus
US6392457B1 (en) * 2000-10-02 2002-05-21 Agere Systems Guardian Corp. Self-aligned clock recovery circuit using a proportional phase detector with an integral frequency detector
US6836486B2 (en) * 2000-12-21 2004-12-28 Nortel Networks Limited Switching of low order data structures using a high order switch
WO2002069583A1 (en) * 2001-02-26 2002-09-06 Maple Optical Systems, Inc. Data packet transmission scheduling using a partitioned heap

Also Published As

Publication number Publication date
TW200414732A (en) 2004-08-01
CN1695338A (zh) 2005-11-09
DE60310089D1 (de) 2007-01-11
AU2003265895A1 (en) 2004-03-29
US20040042578A1 (en) 2004-03-04
CN100555931C (zh) 2009-10-28
WO2004023708A1 (en) 2004-03-18
DE60310089T2 (de) 2007-07-05
EP1537699A1 (de) 2005-06-08
TWI241100B (en) 2005-10-01
EP1537699B1 (de) 2006-11-29
US6973147B2 (en) 2005-12-06

Similar Documents

Publication Publication Date Title
WO2007106766A3 (en) Signaling system with adaptive timing calibration
WO2007124177A3 (en) System for processing formatted data
ATE505846T1 (de) Musterabhängiger phasendetektor zur taktwiedergewinnung
DK2051556T3 (da) Fremgangsmåde til forøget positionstilgængelighed
ATE458225T1 (de) Informationssignalverarbeitung durch modifikation in der spektral- /modulationsspektralbereichsdarstellung
ATE539696T1 (de) Tragbares elektromagnetisches navigationssystem
DK1638010T3 (da) Fremgangsmåde og system til behandling af fysiologisk signal
WO2005101164A3 (en) Delay line synchronizer apparatus and method
ATE361488T1 (de) Verfahren und vorrichtung zur fahrtrichtungserkennung
WO2005101649A3 (en) Direct current offset correction systems and methods
TW200505165A (en) Delay locked loop with improved jitter and clock delay compenstating method thereof
WO2010032182A3 (en) Method of controlling a system and signal processing system
WO2006115718A3 (en) Associating information with an electronic document
TW200718024A (en) Delay-locked loop system and related method
DE10294159D2 (de) Bedienvorrichtung
TW200735011A (en) Display system capable of automatic de-skewing and method of driving the same
WO2008099545A1 (ja) 多チャンネル無線信号処理集積回路
WO2006128107A3 (en) Systems and methods for audio signal analysis and modification
WO2011113025A3 (en) Adjustable sampling rate converter
GB2431061A (en) Synchronous follow-up apparatus and synchronous follow-up method
ATE347203T1 (de) Techniken zur regelung eines signalabtastpunktes
TW200703014A (en) System and method of adjusting output voltage of a transmitter based on error rate
TW200633452A (en) Timing recovery methods and apparatuses
WO2007099579A8 (ja) Ｒａｍマクロ、そのタイミング生成回路
TWI256539B (en) Apparatus and method for generating a clock signal

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties