ATE300809T1 - Leistungsarmer phasen- und frequenzdetektor mit ladungspumpe und ohne totbereich - Google Patents

Leistungsarmer phasen- und frequenzdetektor mit ladungspumpe und ohne totbereich

Info

Publication number
ATE300809T1
ATE300809T1 AT01933660T AT01933660T ATE300809T1 AT E300809 T1 ATE300809 T1 AT E300809T1 AT 01933660 T AT01933660 T AT 01933660T AT 01933660 T AT01933660 T AT 01933660T AT E300809 T1 ATE300809 T1 AT E300809T1
Authority
AT
Austria
Prior art keywords
charge pump
frequency detector
dead band
idle path
phase
Prior art date
Application number
AT01933660T
Other languages
English (en)
Inventor
Matthias Locher
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE300809T1 publication Critical patent/ATE300809T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H03L7/0895—Details of the current generators
    • H03L7/0896—Details of the current generators the current generators being controlled by differential up-down pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/191—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using at least two different signals from the frequency divider or the counter for determining the time difference
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0802—Details of the phase-locked loop the loop being adapted for reducing power consumption

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
AT01933660T 2000-03-15 2001-03-05 Leistungsarmer phasen- und frequenzdetektor mit ladungspumpe und ohne totbereich ATE300809T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP00200945 2000-03-15
PCT/EP2001/002419 WO2001069787A1 (en) 2000-03-15 2001-03-05 Low power, no deadzone phase frequency detector with charge pump

Publications (1)

Publication Number Publication Date
ATE300809T1 true ATE300809T1 (de) 2005-08-15

Family

ID=8171210

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01933660T ATE300809T1 (de) 2000-03-15 2001-03-05 Leistungsarmer phasen- und frequenzdetektor mit ladungspumpe und ohne totbereich

Country Status (7)

Country Link
US (1) US6480070B2 (de)
EP (1) EP1188242B1 (de)
JP (1) JP4781595B2 (de)
KR (1) KR100735942B1 (de)
AT (1) ATE300809T1 (de)
DE (1) DE60112199T2 (de)
WO (1) WO2001069787A1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4015793B2 (ja) * 2000-02-16 2007-11-28 株式会社東芝 位相比較回路およびｐｌｌ回路
CN100342651C (zh) * 2001-08-29 2007-10-10 皇家飞利浦电子股份有限公司 改进后的具有减小的抖动的分频器和基于它的发射器
US6985025B1 (en) * 2002-01-19 2006-01-10 National Semiconductor Corporation System for adjusting a power supply level of a digital processing component and method of operating the same
US20030189463A1 (en) * 2002-04-09 2003-10-09 Walker Brett C. Current saving technique for charge pump based phase locked loops
JP2003338753A (ja) * 2002-05-20 2003-11-28 Fujitsu Ltd Ｐｌｌ回路
US7315197B1 (en) * 2002-07-12 2008-01-01 Marvell International Ltd. Limit swing charge pump and method thereof
DE10236328A1 (de) * 2002-08-08 2004-02-19 Koninklijke Philips Electronics N.V. Schieberegister-Schaltungsanordnung mit verbesserter elektromagnetischer Verträglichkeit und Verfahren zum Betreiben derselben
US6806742B1 (en) 2003-05-23 2004-10-19 Standard Microsystems Corporation Phase detector for low power applications
JP4607518B2 (ja) * 2004-08-10 2011-01-05 三菱電機株式会社 チャージポンプ回路及びｐｌｌ回路
US9679602B2 (en) 2006-06-14 2017-06-13 Seagate Technology Llc Disc drive circuitry swap
US9305590B2 (en) 2007-10-16 2016-04-05 Seagate Technology Llc Prevent data storage device circuitry swap
JP5618936B2 (ja) * 2011-07-27 2014-11-05 三菱電機株式会社 位相周波数比較回路

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5412349A (en) * 1992-03-31 1995-05-02 Intel Corporation PLL clock generator integrated with microprocessor
JPH06216767A (ja) * 1992-11-18 1994-08-05 Philips Electron Nv 安定化位相弁別器を備えるフェーズロックドループ用回路
US5359299A (en) * 1993-01-21 1994-10-25 Gennum Corporation High speed and low drift charge pump circuit
US5532636A (en) * 1995-03-10 1996-07-02 Intel Corporation Source-switched charge pump circuit
JP3388071B2 (ja) * 1995-09-20 2003-03-17 富士通株式会社 位相同期回路、および位相同期回路を含む半導体装置
US5945855A (en) * 1997-08-29 1999-08-31 Adaptec, Inc. High speed phase lock loop having high precision charge pump with error cancellation
US6124755A (en) * 1997-09-29 2000-09-26 Intel Corporation Method and apparatus for biasing a charge pump

Also Published As

Publication number Publication date
DE60112199D1 (de) 2005-09-01
DE60112199T2 (de) 2006-06-01
KR20010113942A (ko) 2001-12-28
EP1188242B1 (de) 2005-07-27
US20010022538A1 (en) 2001-09-20
KR100735942B1 (ko) 2007-07-06
WO2001069787A1 (en) 2001-09-20
US6480070B2 (en) 2002-11-12
JP2003527024A (ja) 2003-09-09
JP4781595B2 (ja) 2011-09-28
EP1188242A1 (de) 2002-03-20

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