ATE212467T1 - Matrixadressierbare anzeigetafel mit steuerschalung für eine verzögerungsriegelschleife - Google Patents

Matrixadressierbare anzeigetafel mit steuerschalung für eine verzögerungsriegelschleife

Info

Publication number
ATE212467T1
ATE212467T1 AT97911620T AT97911620T ATE212467T1 AT E212467 T1 ATE212467 T1 AT E212467T1 AT 97911620 T AT97911620 T AT 97911620T AT 97911620 T AT97911620 T AT 97911620T AT E212467 T1 ATE212467 T1 AT E212467T1
Authority
AT
Austria
Prior art keywords
delay
horizontal sync
error signal
undelayed
sync component
Prior art date
Application number
AT97911620T
Other languages
English (en)
Inventor
Glen E Hush
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of ATE212467T1 publication Critical patent/ATE212467T1/de

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0816—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/66—Transforming electric information into light information
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0275—Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Physics & Mathematics (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Transforming Electric Information Into Light Information (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of El Displays (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronizing For Television (AREA)
  • Details Of Television Scanning (AREA)
AT97911620T 1996-10-03 1997-10-03 Matrixadressierbare anzeigetafel mit steuerschalung für eine verzögerungsriegelschleife ATE212467T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/720,877 US5854615A (en) 1996-10-03 1996-10-03 Matrix addressable display with delay locked loop controller
PCT/US1997/017884 WO1998014931A1 (en) 1996-10-03 1997-10-03 Matrix addressable display with delay locked loop controller

Publications (1)

Publication Number Publication Date
ATE212467T1 true ATE212467T1 (de) 2002-02-15

Family

ID=24895621

Family Applications (1)

Application Number Title Priority Date Filing Date
AT97911620T ATE212467T1 (de) 1996-10-03 1997-10-03 Matrixadressierbare anzeigetafel mit steuerschalung für eine verzögerungsriegelschleife

Country Status (8)

Country Link
US (1) US5854615A (de)
EP (1) EP0929889B1 (de)
JP (1) JP3636726B2 (de)
AT (1) ATE212467T1 (de)
AU (1) AU4894497A (de)
DE (1) DE69710085T2 (de)
TW (1) TW426839B (de)
WO (1) WO1998014931A1 (de)

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EP1085426B1 (de) * 1999-09-13 2006-01-11 Nippon Telegraph and Telephone Corporation Parallelverarbeitungsvorrichtung und -verfahren
JP4099913B2 (ja) * 1999-12-09 2008-06-11 セイコーエプソン株式会社 電気光学装置、そのクロック信号調整方法および回路、その生産方法、ならびに電子機器
US6959062B1 (en) 2000-01-28 2005-10-25 Micron Technology, Inc. Variable delay line
US6570813B2 (en) 2001-05-25 2003-05-27 Micron Technology, Inc. Synchronous mirror delay with reduced delay line taps
US6947022B2 (en) * 2002-02-11 2005-09-20 National Semiconductor Corporation Display line drivers and method for signal propagation delay compensation
JP3989756B2 (ja) 2002-03-18 2007-10-10 シャープ株式会社 表示装置およびその走査回路検査方法
TWI292507B (en) * 2002-10-09 2008-01-11 Toppoly Optoelectronics Corp Switching signal generator
JP4501376B2 (ja) * 2003-08-08 2010-07-14 セイコーエプソン株式会社 電気光学パネル、電気光学装置及び電子機器
US7049873B2 (en) 2004-02-23 2006-05-23 International Business Machines Corporation System and method for implementing a micro-stepping delay chain for a delay locked loop
JP2006053442A (ja) * 2004-08-13 2006-02-23 Koninkl Philips Electronics Nv マトリクス駆動回路及びこれを用いた液晶表示装置
US7483085B2 (en) * 2005-07-11 2009-01-27 Sandbridge Technologies, Inc. Digital implementation of analog TV receiver
JP4819552B2 (ja) * 2006-03-31 2011-11-24 キヤノン株式会社 サンプリング装置、それを用いた表示装置
US8212393B2 (en) * 2006-07-07 2012-07-03 Koninklijke Philips Electronics N.V. Device and method for addressing power to a load selected from a plurality of loads
US7525865B2 (en) * 2007-06-29 2009-04-28 Intel Corporation Control circuit for refreshing voltages in a non-volatile memory during a standby mode and a method thereof
KR20100073495A (ko) * 2008-12-23 2010-07-01 삼성전자주식회사 영상처리장치 및 그 제어방법
TWI420480B (zh) * 2009-05-19 2013-12-21 Au Optronics Corp 光電裝置及其顯示器
KR102182092B1 (ko) 2013-10-04 2020-11-24 삼성디스플레이 주식회사 표시 장치 및 표시 장치의 구동 방법

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Also Published As

Publication number Publication date
WO1998014931A1 (en) 1998-04-09
US5854615A (en) 1998-12-29
DE69710085T2 (de) 2002-06-20
DE69710085D1 (de) 2002-03-14
EP0929889B1 (de) 2002-01-23
EP0929889A1 (de) 1999-07-21
JP2001501744A (ja) 2001-02-06
JP3636726B2 (ja) 2005-04-06
TW426839B (en) 2001-03-21
AU4894497A (en) 1998-04-24

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