ATE179533T1 - Verbessertes synchronisches taktsystem für mikroprozessor - Google Patents

Verbessertes synchronisches taktsystem für mikroprozessor

Info

Publication number
ATE179533T1
ATE179533T1 AT92300018T AT92300018T ATE179533T1 AT E179533 T1 ATE179533 T1 AT E179533T1 AT 92300018 T AT92300018 T AT 92300018T AT 92300018 T AT92300018 T AT 92300018T AT E179533 T1 ATE179533 T1 AT E179533T1
Authority
AT
Austria
Prior art keywords
timing
bus
microprocessor
clock
timing clock
Prior art date
Application number
AT92300018T
Other languages
English (en)
Inventor
David Bruce Witt
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE179533T1 publication Critical patent/ATE179533T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4217—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with synchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)
  • Information Transfer Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Hardware Redundancy (AREA)
AT92300018T 1991-01-28 1992-01-02 Verbessertes synchronisches taktsystem für mikroprozessor ATE179533T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/647,491 US5291070A (en) 1991-01-28 1991-01-28 Microprocessor synchronous timing system

Publications (1)

Publication Number Publication Date
ATE179533T1 true ATE179533T1 (de) 1999-05-15

Family

ID=24597194

Family Applications (1)

Application Number Title Priority Date Filing Date
AT92300018T ATE179533T1 (de) 1991-01-28 1992-01-02 Verbessertes synchronisches taktsystem für mikroprozessor

Country Status (6)

Country Link
US (1) US5291070A (de)
EP (1) EP0497441B1 (de)
JP (1) JP3272754B2 (de)
AT (1) ATE179533T1 (de)
DE (1) DE69229009T2 (de)
ES (1) ES2130153T3 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05268016A (ja) * 1992-02-19 1993-10-15 Nec Corp 半導体集積回路
US5657457A (en) * 1994-01-31 1997-08-12 Dell Usa, L.P. Method and apparatus for eliminating bus contention among multiple drivers without performance degradation
EP0721157A1 (de) * 1994-12-12 1996-07-10 Advanced Micro Devices, Inc. Mikroprozessor mit auswählbarer Taktfrequenz
EP0821486B1 (de) * 1996-07-24 2003-09-24 STMicroelectronics S.r.l. Taktschaltung mit Master-Slave-Synchronisierung
DE69737179T2 (de) * 1996-10-29 2007-04-19 Matsushita Electric Industrial Co., Ltd., Kadoma Datenprozessorsynchronisation mit externem Bus
US7636803B2 (en) * 2006-09-28 2009-12-22 Advanced Micro Devices, Inc. Device and method for transferring data between devices
US7681099B2 (en) * 2007-05-17 2010-03-16 Advanced Micro Devices, Inc. Techniques for integrated circuit clock signal manipulation to facilitate functional and speed test
US7737752B2 (en) * 2007-05-17 2010-06-15 Globalfoundries Inc Techniques for integrated circuit clock management
US7921318B2 (en) * 2007-05-17 2011-04-05 Globalfoundries Inc. Techniques for integrated circuit clock management using pulse skipping
US8014485B2 (en) * 2007-05-17 2011-09-06 Advanced Micro Devices, Inc. Techniques for integrated circuit clock management using multiple clock generators
US8575972B2 (en) * 2009-03-23 2013-11-05 Advanced Micro Devices, Inc. Digital frequency synthesizer device and method thereof
KR102077684B1 (ko) * 2013-01-09 2020-02-14 삼성전자주식회사 내부 스큐를 보상하는 반도체 장치 및 그것의 동작 방법
CN115702298A (zh) 2020-07-10 2023-02-14 瓜尔蒂耶罗·克罗佐利 带有在收敛椭圆轨道上的滚珠或滚子的差速器

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1561961A (en) * 1977-04-20 1980-03-05 Int Computers Ltd Data processing units
US4409671A (en) * 1978-09-05 1983-10-11 Motorola, Inc. Data processor having single clock pin
US4596937A (en) * 1982-04-28 1986-06-24 International Computers Limited Digital phase-locked loop
JPS6083166A (ja) * 1983-10-14 1985-05-11 Hitachi Ltd 半導体集積回路装置
JPS60204121A (ja) * 1984-03-29 1985-10-15 Fujitsu Ltd 位相同期回路
US4754164A (en) * 1984-06-30 1988-06-28 Unisys Corp. Method for providing automatic clock de-skewing on a circuit board
US4691122A (en) * 1985-03-29 1987-09-01 Advanced Micro Devices, Inc. CMOS D-type flip-flop circuits
US4675612A (en) * 1985-06-21 1987-06-23 Advanced Micro Devices, Inc. Apparatus for synchronization of a first signal with a second signal
US4700084A (en) * 1985-08-26 1987-10-13 Rockwell International Corporation Digital clock recovery circuit apparatus
US4929850A (en) * 1987-09-17 1990-05-29 Texas Instruments Incorporated Metastable resistant flip-flop
JPH0198313A (ja) * 1987-10-09 1989-04-17 Nec Corp 同期化回路
US5059818A (en) * 1990-06-01 1991-10-22 Advanced Micro Devices, Inc. Self-regulating clock generator
US5093581A (en) * 1990-12-03 1992-03-03 Thomson, S.A. Circuitry for generating pulses of variable widths from binary input data

Also Published As

Publication number Publication date
EP0497441B1 (de) 1999-04-28
DE69229009D1 (de) 1999-06-02
EP0497441A2 (de) 1992-08-05
JPH04304512A (ja) 1992-10-27
US5291070A (en) 1994-03-01
JP3272754B2 (ja) 2002-04-08
DE69229009T2 (de) 1999-12-23
ES2130153T3 (es) 1999-07-01
EP0497441A3 (en) 1993-04-21

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties