AT287790B - Mehrere elektrische funktionsstufen enthaltende integrierte schaltung - Google Patents
Mehrere elektrische funktionsstufen enthaltende integrierte schaltungInfo
- Publication number
- AT287790B AT287790B AT10745/68A AT1074568A AT287790B AT 287790 B AT287790 B AT 287790B AT 10745/68 A AT10745/68 A AT 10745/68A AT 1074568 A AT1074568 A AT 1074568A AT 287790 B AT287790 B AT 287790B
- Authority
- AT
- Austria
- Prior art keywords
- integrated circuit
- circuit containing
- containing several
- several electrical
- electrical functional
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D88/00—Three-dimensional [3D] integrated devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/118—Oxide films
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/15—Silicon on sapphire SOS
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/152—Single crystal on amorphous substrate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/164—Three dimensional processing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/967—Semiconductor on specified insulator
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
- Formation Of Insulating Films (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DED0054607 | 1967-11-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AT287790B true AT287790B (de) | 1971-02-10 |
Family
ID=7055889
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT10745/68A AT287790B (de) | 1967-11-15 | 1968-11-05 | Mehrere elektrische funktionsstufen enthaltende integrierte schaltung |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US3564358A (de) |
| AT (1) | AT287790B (de) |
| CH (1) | CH474864A (de) |
| DE (1) | DE1589705A1 (de) |
| FR (1) | FR1601332A (de) |
| GB (1) | GB1200534A (de) |
| NL (1) | NL6815878A (de) |
| SE (1) | SE338807B (de) |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4046954A (en) * | 1973-12-19 | 1977-09-06 | Rockwell International Corporation | Monocrystalline silicates |
| US4005452A (en) * | 1974-11-15 | 1977-01-25 | International Telephone And Telegraph Corporation | Method for providing electrical isolating material in selected regions of a semiconductive material and the product produced thereby |
| JPS5272399A (en) * | 1975-12-13 | 1977-06-16 | Fujitsu Ltd | Method and apparatus for growth of single crystals of al2o3 from gas p hase |
| US4180618A (en) * | 1977-07-27 | 1979-12-25 | Corning Glass Works | Thin silicon film electronic device |
| DE2832012A1 (de) * | 1978-07-20 | 1980-01-31 | Siemens Ag | Verfahren zum herstellen einer dreidimensionalen integrierten schaltung |
| JPS5534489A (en) * | 1978-09-01 | 1980-03-11 | Pioneer Electronic Corp | Manufacture of semiconductor device |
| DE2902002A1 (de) * | 1979-01-19 | 1980-07-31 | Gerhard Krause | Dreidimensional integrierte elektronische schaltungen |
| EP0020135A1 (de) * | 1979-05-29 | 1980-12-10 | Massachusetts Institute Of Technology | Dreidimensionale Integration durch graphische Epitaxie |
| US5298787A (en) * | 1979-08-10 | 1994-03-29 | Massachusetts Institute Of Technology | Semiconductor embedded layer technology including permeable base transistor |
| JPS57211267A (en) * | 1981-06-22 | 1982-12-25 | Toshiba Corp | Semiconductor device and manufacture thereof |
| JPS5837949A (ja) * | 1981-08-31 | 1983-03-05 | Toshiba Corp | 集積回路装置 |
| JPS5853822A (ja) * | 1981-09-25 | 1983-03-30 | Toshiba Corp | 積層半導体装置 |
| JPS5890769A (ja) * | 1981-11-25 | 1983-05-30 | Mitsubishi Electric Corp | 積層半導体装置 |
| JPH0636423B2 (ja) * | 1982-06-22 | 1994-05-11 | 株式会社日立製作所 | 三次元構造半導体装置 |
| US4554570A (en) * | 1982-06-24 | 1985-11-19 | Rca Corporation | Vertically integrated IGFET device |
| US4720738A (en) * | 1982-09-08 | 1988-01-19 | Texas Instruments Incorporated | Focal plane array structure including a signal processing system |
| US4612072A (en) * | 1983-06-24 | 1986-09-16 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Method for growing low defect, high purity crystalline layers utilizing lateral overgrowth of a patterned mask |
| US4522661A (en) * | 1983-06-24 | 1985-06-11 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Low defect, high purity crystalline layers grown by selective deposition |
| US4692994A (en) * | 1986-04-29 | 1987-09-15 | Hitachi, Ltd. | Process for manufacturing semiconductor devices containing microbridges |
| US4829018A (en) * | 1986-06-27 | 1989-05-09 | Wahlstrom Sven E | Multilevel integrated circuits employing fused oxide layers |
| US4766516A (en) * | 1987-09-24 | 1988-08-23 | Hughes Aircraft Company | Method and apparatus for securing integrated circuits from unauthorized copying and use |
| FR2629637B1 (fr) * | 1988-04-05 | 1990-11-16 | Thomson Csf | Procede de realisation d'une alternance de couches de materiau semiconducteur monocristallin et de couches de materiau isolant |
| DE3828812A1 (de) * | 1988-08-25 | 1990-03-08 | Fraunhofer Ges Forschung | Dreidimensionale integrierte schaltung und verfahren zu deren herstellung |
| US5163005A (en) * | 1990-12-19 | 1992-11-10 | The United States Of America As Represented By The Secretary Of The Air Force | Method of cloning printed wiring boards |
| US5202754A (en) * | 1991-09-13 | 1993-04-13 | International Business Machines Corporation | Three-dimensional multichip packages and methods of fabrication |
| US5670824A (en) * | 1994-12-22 | 1997-09-23 | Pacsetter, Inc. | Vertically integrated component assembly incorporating active and passive components |
| US7033891B2 (en) * | 2002-10-03 | 2006-04-25 | Fairchild Semiconductor Corporation | Trench gate laterally diffused MOSFET devices and methods for making such devices |
| US10388568B2 (en) * | 2011-06-28 | 2019-08-20 | Monolithic 3D Inc. | 3D semiconductor device and system |
-
1967
- 1967-11-15 DE DE19671589705 patent/DE1589705A1/de active Pending
-
1968
- 1968-10-30 CH CH1616868A patent/CH474864A/de not_active IP Right Cessation
- 1968-11-05 AT AT10745/68A patent/AT287790B/de not_active IP Right Cessation
- 1968-11-07 NL NL6815878A patent/NL6815878A/xx unknown
- 1968-11-13 US US775395A patent/US3564358A/en not_active Expired - Lifetime
- 1968-11-13 FR FR1601332D patent/FR1601332A/fr not_active Expired
- 1968-11-14 GB GB54060/68A patent/GB1200534A/en not_active Expired
- 1968-11-14 SE SE15495/68A patent/SE338807B/xx unknown
Also Published As
| Publication number | Publication date |
|---|---|
| FR1601332A (de) | 1970-08-17 |
| DE1589705A1 (de) | 1970-04-30 |
| SE338807B (de) | 1971-09-20 |
| GB1200534A (en) | 1970-07-29 |
| CH474864A (de) | 1969-06-30 |
| NL6815878A (de) | 1969-05-19 |
| US3564358A (en) | 1971-02-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ELJ | Ceased due to non-payment of the annual fee |