AR066815A1 - Codificacion de canal y comparacion de velocidades para los canales de control en el ambito del desarrollo a largo plazo (lte) - Google Patents

Codificacion de canal y comparacion de velocidades para los canales de control en el ambito del desarrollo a largo plazo (lte)

Info

Publication number
AR066815A1
AR066815A1 ARP080102319A ARP080102319A AR066815A1 AR 066815 A1 AR066815 A1 AR 066815A1 AR P080102319 A ARP080102319 A AR P080102319A AR P080102319 A ARP080102319 A AR P080102319A AR 066815 A1 AR066815 A1 AR 066815A1
Authority
AR
Argentina
Prior art keywords
speed comparison
speed
channel
control channels
lte
Prior art date
Application number
ARP080102319A
Other languages
English (en)
Inventor
Philip J Pietraski
Robert L Olesen
Sung-Hyuk Shin
Nirav B Shah
Donald M Grieco
Original Assignee
Interdigital Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Interdigital Tech Corp filed Critical Interdigital Tech Corp
Publication of AR066815A1 publication Critical patent/AR066815A1/es

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H04L1/0043—Realisations of complexity reduction techniques, e.g. use of look-up tables
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0059—Convolutional codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0067—Rate matching

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

Se revela un método y aparato para la codificacion de canal y comparacion de velocidades del canal físico de control de enlace ascendente (PUCCH) y del canal físico de control de enlace descendente (PDCCH) que utilizan la codificacion de convolucion para codificar los canales de control. La comparacion de velocidades se realiza utilizando un algoritmo de comparacion de velocidades por memoria de compensacion circular. El modulo de comparacion de velocidades puede contener un intercalador o alternativamente puede comprender una pluralidad de intercaladores de subbloques. Los bits codificados intercalados pueden guardarse en la memoria de compensacion circular en un formato entrelazado, o corrientes de salida de los intercaladores de subbloques separados pueden guardarse en forma consecutiva. Cuando se utilizan varios intercaladores de subbloques, pueden utilizarse diferentes patrones de intercalacion. La comparacion de velocidades puede utilizar el retiro de bits de paridad, puncturing, o repeticion de bits para comparar la velocidad del recurso de canal físico disponible. Los bits de salida comparada de velocidad pueden ser intercalados con un intercalador de canal.
ARP080102319A 2007-05-31 2008-06-02 Codificacion de canal y comparacion de velocidades para los canales de control en el ambito del desarrollo a largo plazo (lte) AR066815A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US94123907P 2007-05-31 2007-05-31

Publications (1)

Publication Number Publication Date
AR066815A1 true AR066815A1 (es) 2009-09-16

Family

ID=39791386

Family Applications (1)

Application Number Title Priority Date Filing Date
ARP080102319A AR066815A1 (es) 2007-05-31 2008-06-02 Codificacion de canal y comparacion de velocidades para los canales de control en el ambito del desarrollo a largo plazo (lte)

Country Status (5)

Country Link
US (1) US20080301536A1 (es)
CN (1) CN201230316Y (es)
AR (1) AR066815A1 (es)
TW (2) TW200913559A (es)
WO (1) WO2008151061A1 (es)

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Also Published As

Publication number Publication date
TW200913559A (en) 2009-03-16
US20080301536A1 (en) 2008-12-04
WO2008151061A1 (en) 2008-12-11
CN201230316Y (zh) 2009-04-29
TWM349141U (en) 2009-01-11

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