AR065503A1 - Metodo y aparato para codificar y decodificar datos - Google Patents

Metodo y aparato para codificar y decodificar datos

Info

Publication number
AR065503A1
AR065503A1 ARP080100815A ARP080100815A AR065503A1 AR 065503 A1 AR065503 A1 AR 065503A1 AR P080100815 A ARP080100815 A AR P080100815A AR P080100815 A ARP080100815 A AR P080100815A AR 065503 A1 AR065503 A1 AR 065503A1
Authority
AR
Argentina
Prior art keywords
interleaver
input block
size
symbol
appliance
Prior art date
Application number
ARP080100815A
Other languages
English (en)
Inventor
Yufei W Blankenship
Ajit Nimbalker
Brian K Classon
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of AR065503A1 publication Critical patent/AR065503A1/es

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2739—Permutation polynomial interleaver, e.g. quadratic permutation polynomial [QPP] interleaver and quadratic congruence interleaver
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/275—Interleaver wherein the permutation pattern is obtained using a congruential operation of the type y=ax+b modulo c
    • H03M13/2753—Almost regular permutation [ARP] interleaver
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2771—Internal interleaver for turbo codes
    • H03M13/2775—Contention or collision free turbo code internal interleaver
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2789—Interleaver providing variable interleaving, e.g. variable block sizes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2903—Methods and arrangements specifically for encoding, e.g. parallel encoding of a plurality of constituent codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6522—Intended application, e.g. transmission or communication standard
    • H03M13/6525—3GPP LTE including E-UTRA

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

Aquí se provee un método y aparato de turbo codificacion con un intercalador sin contencion. Durante la operacion, se recibe un bloque de entrada de tamano K. El bloque de entrada original y el bloque de entrada intercalado se codifican para obtenerun bloque de palabra codigo, donde el bloque de entrada original se intercala usando un intercalador de tamano K y una permutacion, donde 0 i K-1 es el índice secuencial de las posiciones de símbolo después del intercalado, (i) es el índice desímbolos antes del intercalado correspondiente a la posicion i, K es el tamano del intercalador de símbolos, y f1 y f2 son los factores que definen el intercalador. Los valores de K, f1, f2 se toman de por lo menos una fila de una tabla. El bloquede palabra codigo se transmite por el canal.
ARP080100815A 2007-02-28 2008-02-27 Metodo y aparato para codificar y decodificar datos AR065503A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/680,116 US7873893B2 (en) 2007-02-28 2007-02-28 Method and apparatus for encoding and decoding data

Publications (1)

Publication Number Publication Date
AR065503A1 true AR065503A1 (es) 2009-06-10

Family

ID=39469952

Family Applications (1)

Application Number Title Priority Date Filing Date
ARP080100815A AR065503A1 (es) 2007-02-28 2008-02-27 Metodo y aparato para codificar y decodificar datos

Country Status (10)

Country Link
US (1) US7873893B2 (es)
EP (1) EP2119017A1 (es)
JP (1) JP2008219892A (es)
KR (1) KR20090127878A (es)
CN (1) CN101636914A (es)
AR (1) AR065503A1 (es)
BR (1) BRPI0807977A2 (es)
MX (1) MX2009009143A (es)
TW (1) TW200845593A (es)
WO (1) WO2008106320A1 (es)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007132912A1 (ja) * 2006-05-17 2007-11-22 Nec Corporation ターボ符号器及びそれに用いるｈａｒｑ処理方法
PL2183867T3 (pl) * 2007-08-14 2014-10-31 Lg Electronics Inc Sposób transmisji danych
JP4874312B2 (ja) * 2007-09-20 2012-02-15 三菱電機株式会社 ターボ符号復号装置、ターボ符号復号方法及び通信システム
US8140932B2 (en) * 2007-11-26 2012-03-20 Motorola Mobility, Inc. Data interleaving circuit and method for vectorized turbo decoder
US8219782B2 (en) * 2008-09-18 2012-07-10 Xilinx, Inc. Address generation
CN101777925B (zh) * 2009-01-09 2014-07-16 电信科学技术研究院 一种数据处理装置及其方法
EP2264931B1 (en) * 2009-06-15 2015-11-25 Alcatel Lucent Improved forward error correction with bit-wise interleaving
CN101931419B (zh) * 2009-06-24 2013-04-03 中兴通讯股份有限公司 一种turbo码内交织器的计算方法及装置
JP5476902B2 (ja) 2009-09-30 2014-04-23 富士通株式会社 ターボ復号装置及び通信装置
US20110202819A1 (en) * 2010-02-12 2011-08-18 Yuan Lin Configurable Error Correction Encoding and Decoding
US8621160B2 (en) * 2010-12-17 2013-12-31 Futurewei Technologies, Inc. System and method for contention-free memory access
CN102624404B (zh) * 2011-01-31 2014-04-30 中兴通讯股份有限公司 一种咬尾卷积码译码校验方法及装置
CN102739358A (zh) * 2012-06-01 2012-10-17 武汉邮电科学研究院 一种用于LTE的并行Turbo码内交织器的实现方法
CN103780337B (zh) * 2012-10-26 2017-06-06 华为技术有限公司 Wlan系统中的交织处理方法和设备
US9281846B2 (en) 2013-07-31 2016-03-08 Globalfoundries Inc Turbo encoding on a parallel processor
JP6193051B2 (ja) * 2013-08-15 2017-09-06 Ｎｅｃプラットフォームズ株式会社 アドレス生成回路及びアドレス生成方法
CN104917587B (zh) * 2014-03-13 2018-08-14 钜泉光电科技(上海)股份有限公司 通信设备中的数据块交织和解交织方法及其装置
KR102370903B1 (ko) * 2014-03-14 2022-03-08 삼성전자주식회사 인터리빙 깊이를 조절하기 위한 장치 및 방법
CN110519004B (zh) 2018-05-21 2021-12-14 华为技术有限公司 一种编码方法及相关设备
CN110266320B (zh) * 2019-07-01 2021-03-12 京信通信系统（中国）有限公司 Ldpc编码及译码方法、装置和编译码系统
CN110611551B (zh) * 2019-09-27 2020-07-07 北京理工大学 一种基于嵌套极化码的控制信道编码与盲检方法

Also Published As

Publication number Publication date
BRPI0807977A2 (pt) 2014-06-10
EP2119017A1 (en) 2009-11-18
KR20090127878A (ko) 2009-12-14
WO2008106320A1 (en) 2008-09-04
US20080205636A1 (en) 2008-08-28
TW200845593A (en) 2008-11-16
US7873893B2 (en) 2011-01-18
MX2009009143A (es) 2009-09-03
JP2008219892A (ja) 2008-09-18
CN101636914A (zh) 2010-01-27

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