WO2025251971A1 - 形成沟槽结构的方法及半导体工艺设备 - Google Patents

形成沟槽结构的方法及半导体工艺设备

Info

Publication number
WO2025251971A1
WO2025251971A1 PCT/CN2025/097651 CN2025097651W WO2025251971A1 WO 2025251971 A1 WO2025251971 A1 WO 2025251971A1 CN 2025097651 W CN2025097651 W CN 2025097651W WO 2025251971 A1 WO2025251971 A1 WO 2025251971A1
Authority
WO
WIPO (PCT)
Prior art keywords
trench
etching
mask layer
etching step
slope
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/CN2025/097651
Other languages
English (en)
French (fr)
Inventor
朱梦娇
徐力田
曾丽
马俊胜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Naura Microelectronics Equipment Co Ltd
Original Assignee
Beijing Naura Microelectronics Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Naura Microelectronics Equipment Co Ltd filed Critical Beijing Naura Microelectronics Equipment Co Ltd
Publication of WO2025251971A1 publication Critical patent/WO2025251971A1/zh
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32798—Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
    • H01J37/32908—Utilities
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/693—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0402—Apparatus for fluid treatment
    • H10P72/0418—Apparatus for fluid treatment for etching
    • H10P72/0421—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
    • H10P72/0604—Process monitoring, e.g. flow or thickness monitoring
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
    • H10P72/0612—Production flow monitoring, e.g. for increasing throughput
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334—Etching

Definitions

  • This application relates to the field of semiconductor manufacturing technology, and in particular to a method for forming trench structures and semiconductor process equipment.
  • methods for forming trench structures include: as shown in Figures 1A and 1B, firstly, etching is performed on the area of the film layer 11 exposed from the mask opening 12A to form a trench 11A within the film layer 11; as shown in Figures 1B and 1C, the mask layer 12 is then pulled back to enlarge the opening width W1 of the mask opening 12A, thereby exposing the corner 11B at the top of the trench 11A; as shown in Figures 1C and 1D, the exposed corner 11B at the top of the trench 11A is then etched to form a slope 11C at the top of the trench 11A.
  • This application provides a method for forming a trench structure and a semiconductor process apparatus to solve the problem in related technologies that the opening width of the mask opening limits the size of the adjustment window for the slope tilt angle, which is not conducive to controlling the slope tilt angle.
  • the first aspect of this application provides a method for forming a trench structure, comprising:
  • a substrate is provided; the substrate includes a film layer to be etched and a mask layer stacked together, the mask layer having a mask opening that exposes a portion of the surface of the film layer to be etched;
  • the first etching step is performed to etch the surface exposed by the film layer to be etched, so as to form an arc-shaped first trench on the top of the film layer to be etched; the opening width of the first trench near the mask layer is greater than the opening width of the mask opening;
  • the second etching step is performed to etch the inner side of the first trench to etch the first trench into a second trench, the second trench including an arc-shaped profile at the upper part and a sloping profile at the lower part;
  • a third etching step is performed to etch the inside of the second trench to form a third trench below the second trench, and the third trench is connected to the second trench.
  • the size of the adjustment window for the tilt angle of the ramp-shaped profile of the second trench is defined by the opening width of the first trench near the mask layer.
  • the process conditions of the first etching step include the main etching gas being a sulfur-containing and fluorine-containing gas, and the process conditions of the second etching step include the main etching gas being a carbon-containing and fluorine-containing gas.
  • the tilt angle of the ramp-shaped profile of the second trench is adjusted by controlling the magnitude of the lower electrode power; and/or, the etching depth of the ramp-shaped profile of the second trench is adjusted by controlling the length of the etching time.
  • the arc-shaped profile and the sloping profile of the second trench form the slope at the top of the third trench.
  • the inclination angle of the slope is determined by the ratio between the etching depth of the second trench and the opening width of the first trench near the mask layer.
  • the etching depth of the second trench ranges from 20 nm to 60 nm, and the opening width of the first trench near the mask layer ranges from 4 ⁇ m to 10 ⁇ m.
  • the process conditions for the second etching step further include: the power range of the upper electrode is 500W to 2000W, and the pressure range of the process chamber is 100mTorr to 300mTorr.
  • the process conditions for the second etching step further include an oxygen flow rate in the range of 100 sccm to 200 sccm.
  • performing the first etching step includes at least one of the following:
  • the opening width of the first trench near the mask layer is adjusted by controlling the power of the upper electrode
  • the position of the first trench in the thickness direction of the film to be etched is adjusted by controlling the power of the lower electrode.
  • the upper electrode power ranges from 1000W to 5000W
  • the pressure of the process chamber ranges from 50mTorr to 200mTorr
  • the lower electrode power ranges from 0W to 50W.
  • a second aspect of this application provides a semiconductor process apparatus, including a process chamber, an inlet assembly, an upper electrode assembly, a lower electrode assembly, and a controller.
  • the controller includes at least one processor and at least one memory, in which a computer program is stored. When the computer program is executed by the processor, it implements the method for forming a trench structure according to any of the above embodiments.
  • the advantages or beneficial effects of the above technical solution include at least the following: by first forming an arc-shaped first trench on the top of the film layer to be etched, and making the opening width of the first trench near the mask layer larger than the opening width of the mask layer, and then etching the inner side of the first trench, the arc-shaped contour retained on the outer side of the first trench can form the arc-shaped contour of the upper part of the second trench, and the inner side of the first trench is etched to form the slope-shaped contour of the lower part of the second trench.
  • This etching method can ensure that the adjustment window size of the tilt angle of the slope-shaped contour of the lower part of the second trench is not limited by the opening width of the mask layer, and the overall tilt angle of the arc-shaped contour and the slope-shaped contour can be determined by adjusting the tilt angle of the slope-shaped contour.
  • the arc-shaped and sloping contours of the second trench can form the slope at the top of the third trench, and ensure that the slope can prevent tip discharge at the top of the third trench and prevent blockage during subsequent filling.
  • Figures 1A to 1D show a cross-sectional structure diagram of the process of forming a trench structure using related technologies.
  • Figure 2 is a flowchart illustrating a method for forming a trench structure according to an embodiment of this application.
  • Figures 3A to 3D show a cross-sectional structural diagram of the process of forming a trench structure in one embodiment of this application.
  • Figure 4 shows a schematic diagram of the structure of a semiconductor process apparatus according to an embodiment of this application.
  • the opening width W1 of the mask opening 12A is relatively small.
  • the opening width W1 of the mask opening 12A determines the size of the adjustment window for the tilt angle ⁇ of the ramp 11C, which in turn results in a small adjustment window for the tilt angle ⁇ of the ramp 11C. Therefore, it is not conducive to adjusting the size of the tilt angle ⁇ of the ramp 11C, and it cannot be ensured that the tilt angle ⁇ of the ramp 11C can meet the requirements of preventing tip discharge and preventing blockage.
  • Figure 2 is a flowchart illustrating a method for forming a trench structure according to an embodiment of this application.
  • Figures 3A to 3D are cross-sectional structural diagrams illustrating the process of forming a trench structure according to an embodiment of this application.
  • the method for forming the trench structure includes the following steps S110 to S140.
  • Step S110 Referring to Figure 3A, a substrate 10 is provided.
  • the substrate 10 includes a film layer 11 to be etched and a mask layer 12 stacked together.
  • the mask layer 12 has a mask opening 12A that exposes a portion of the surface of the film layer 11 to be etched.
  • the material of the film layer 11 to be etched can be silicon (Si), and the film layer 11 can be a single layer or a multilayer structure.
  • the material of the mask layer 12 can be silicon oxide ( SiO2 ) or silicon nitride (SiN).
  • Step S120 Referring to Figures 3A and 3B, perform the first etching step to etch the exposed surface of the film layer 11 to be etched, forming an arc-shaped first trench 111 on the top of the film layer 11.
  • the opening width W2 of the first trench 111 near the mask layer 12 is greater than the opening width W1 of the mask opening 12A.
  • the opening width W2 of the first trench 111 near the mask layer 12 can be the maximum lateral dimension of the first trench 111.
  • an arc-shaped first trench 111 can be formed below the mask opening 12A without lateral pushing of the mask layer 12, and the opening width W2 of the first trench 111 near the mask layer 12 is larger than the opening width W1 of the mask opening 12A, so that the opening width W2 of the first trench 111 near the mask layer 12 is not limited by the opening width W1 of the mask opening 12A.
  • Step S130 Please refer to Figures 3B to 3C together to perform the second etching step, and etch the inner side of the first trench 111 to etch the first trench 111 into a second trench 112.
  • the second trench 112 includes an arc-shaped profile 112A located at the upper part and a slope-shaped profile 112B located at the lower part.
  • the outer side of the first trench 111 is protected from etching by the mask layer 12, thus preserving its original arc-shaped contour.
  • the inner side of the first trench 111 is etched into a sloping contour.
  • the preserved arc-shaped contour constitutes the upper arc-shaped contour 112A of the second trench 112, and the etched sloping contour constitutes the lower sloping contour 112B of the second trench 112.
  • the inner side of the first trench 111 refers to the portion of the first trench 111 away from the mask layer 12, where the sidewalls are etched into a sloping shape.
  • the outer side of the first trench 111 refers to the portion of the first trench 111 close to the mask layer 12, where the sidewalls are protected from etching by the mask layer 12.
  • the adjustment window size for the tilt angle ⁇ of the ramp-shaped profile 112B at the lower part of the second trench 112 is determined by the opening width W2 of the first trench 111 near the mask layer 12. Since the opening width W2 of the first trench 111 near the mask layer 12 is greater than the opening width W1 of the mask opening 12A, the opening width W2 of the first trench 111 near the mask layer 12 is not limited by the opening width W1 of the mask opening 12A. Therefore, the adjustment window size for the tilt angle ⁇ of the ramp-shaped profile 112B is also not limited by the opening width W1 of the mask opening 12A.
  • the adjustment window size for the tilt angle ⁇ of the ramp-shaped profile 112B determines the ease of adjusting the tilt angle ⁇ of the ramp-shaped profile 112B.
  • the tilt angle ⁇ of the ramp-shaped profile 112B is the angle between the ramp-shaped profile 112B and the surface of the film layer 11 to be etched facing the mask layer 12.
  • Step S140 Referring to Figures 3C to 3D, perform the third etching step to etch the inner side of the second trench 112 to form a third trench 113 below the second trench 112.
  • the third trench 113 is connected to the second trench 112.
  • the opening width of the third trench 113 is close to the opening width of the mask opening 12A.
  • the arc-shaped contour 112A and the ramp-shaped contour 112B of the second trench 112 form the ramp 11C at the top of the third trench 113
  • the overall tilt angle ⁇ of the arc-shaped contour 112A and the ramp-shaped contour 112B of the second trench 112 forms the tilt angle ⁇ of the ramp 11C.
  • the overall tilt angle ⁇ is the angle between the line connecting the top end of the arc-shaped contour 112A and the bottom end of the ramp-shaped contour 112B and the surface of the film layer 11 to be etched facing the mask layer 12.
  • the above-described scheme involves first forming an arc-shaped first trench 111 on the top of the film layer 11 to be etched, with the opening width W2 of the first trench 111 near the mask layer 12 being larger than the opening width W1 of the mask layer 12. Then, etching is performed on the inner side of the first trench 111. This allows the arc-shaped contour retained on the outer side of the first trench 111 to form the upper arc-shaped contour 112A of the second trench 112, while the inner side of the first trench 111 is etched to form the lower slope contour 112B of the second trench 112. This etching method ensures that the lower slope contour 112A of the second trench 112 is formed.
  • the adjustment window size of the tilt angle ⁇ of 2B is not limited by the opening width W1 of the mask layer 12, while the overall tilt angle ⁇ of the arc-shaped contour 112A and the ramp-shaped contour 112B can be determined by adjusting the tilt angle ⁇ of the ramp-shaped contour 112B.
  • the arc-shaped contour 112A and the ramp-shaped contour 112B of the second trench 112 can form the ramp 11C at the top of the third trench 113, and ensure that the ramp 11C can effectively prevent tip discharge at the top of the third trench 113 and prevent blockage during subsequent filling.
  • the size of the adjustment window for the tilt angle ⁇ of the ramp-shaped profile 112B of the second trench 112 is defined by the opening width W2 of the first trench 111 near the mask layer 12.
  • the opening width W2 of the first trench 111 near the mask layer 12 is directly proportional to the size of the adjustment window for the inclination angle ⁇ of the ramp-shaped profile 112B of the second trench 112. That is, the larger the opening width W2 of the first trench 111 near the mask layer 12, the larger the adjustment window; conversely, the smaller the adjustment window.
  • the first etching step is substantially isotropic etching
  • the second etching step is substantially anisotropic etching
  • the first etching step is basically isotropic etching: isotropic etching dominates in the first etching step, with a small amount of anisotropic etching.
  • the lateral etching consumption of the film layer 11 to be etched is slightly less than the longitudinal etching consumption of the film layer 11 to be etched, which can form an arc-shaped first trench 111 on the top of the film layer 11 to be etched.
  • the second etching step is basically anisotropic etching: anisotropic etching dominates in the second etching step, with a small amount of isotropic etching.
  • the outer side of the first trench 111 can be protected by the mask layer 12 and retain its original arc shape, while the inner side of the first trench 111 is etched into a sloping contour to form the second trench 112.
  • the related technologies use a wet etching process to push the mask layer 12 laterally to enlarge the mask opening 12A. Because the wet etching process has poor process control capabilities, it cannot control the opening width W1 of the mask opening 12A, and therefore cannot control the size of the adjustment window for the tilt angle ⁇ of the ramp 11C.
  • the embodiments of this application use an isotropic dry etching process, which has stronger process control capabilities and can effectively control the opening width W2 of the first trench 111 near the mask layer 12. Since the opening width W2 of the first trench 111 near the mask layer 12 can determine the size of the adjustment window for the tilt angle ⁇ of the ramp 11C, it is easier to control the size of the adjustment window for the tilt angle ⁇ of the ramp 11C.
  • the isotropic etching and anisotropic etching used in the embodiments of this application can perform in-situ etching of the substrate 10 within the same process chamber, eliminating the need for displacement and transport of the substrate 10 and preventing defects or damage to the substrate 10.
  • the process conditions of the first etching step include the main etching gas being a sulfur-containing and fluorine-containing gas, and the process conditions of the second etching step include the main etching gas being a carbon-containing and fluorine-containing gas.
  • the material of the film layer 11 to be etched can be silicon. Since sulfur- and fluorine-containing gases exhibit good isotropic etching of silicon, using these gases as the main etching gas in the first etching step ensures that the first etching step is essentially isotropic.
  • sulfur hexafluoride ( SF6 ) can be used as the sulfur- and fluorine-containing gas.
  • SF6 has a lateral etching rate greater than 5 ⁇ m/min, and its lateral etching rate and uniformity are superior to traditional etching gases.
  • SF6 main etching gas
  • carbon- and fluorine-containing gases exhibit good directionality in etching silicon
  • using these gases as the main etching gas in the second etching step ensures that the second etching step is essentially anisotropic.
  • carbon tetrafluoride (CF4 ) can be used as the carbon- and fluorine-containing gas.
  • sulfur-containing and fluorine-containing gases and carbon-containing and fluorine-containing gases can be selected according to actual needs, and the embodiments of this application do not impose any restrictions on this.
  • the process conditions of the first etching step also include an auxiliary etching gas.
  • This auxiliary gas includes at least one of xenon-containing gas, nitrogen-containing gas, and carbon-containing gas. Specifically, at least one of these gases can be a single gas or a mixture of multiple gases.
  • the degree of lateral etching of the film layer 11 can be controlled by selecting at least one or more mixed gases of xenon-containing gas, nitrogen-containing gas, and carbon-containing gas as the auxiliary etching gas.
  • the tilt angle ⁇ of the ramp-shaped profile 112B of the second trench 112 is adjusted by controlling the power of the lower electrode; and/or, the etching depth of the ramp-shaped profile 112B of the second trench 112 is adjusted by controlling the etching time.
  • the etching depth of the ramp-shaped profile 112B of the second trench 112 can be the dimension of the ramp-shaped profile 112B in the thickness direction of the film layer 11 to be etched, where the thickness direction of the film layer 11 is the direction from the surface of the film layer 11 near the mask layer 12 to the surface of the film layer 11 away from the mask layer 12.
  • the lower electrode power is used to control the plasma bombardment energy, and the lower electrode power is directly proportional to the plasma bombardment energy. Specifically, the greater the lower electrode power, the stronger the plasma bombardment energy, the stronger the plasma's ability to counteract charge attraction, the straighter the plasma etching of the inner side of the first trench 111, and the smaller the inclination angle ⁇ of the slope-shaped profile 112B of the etched second trench 112, making the slope-shaped profile 112B steeper.
  • the weaker the plasma bombardment energy the weaker the plasma's ability to counteract charge attraction, the larger the inclination angle ⁇ of the slope-shaped profile 112B of the etched second trench 112, making the slope-shaped profile 112B gentler.
  • the inclination angle ⁇ of the slope-shaped profile 112B of the second trench 112 can be adjusted, thereby controlling the inclination angle ⁇ of the slope 11C.
  • the longer the etching time the deeper the etching depth of the slope-shaped contour 112B of the second trench 112; the shorter the etching time, the shallower the etching depth of the slope-shaped contour 112B of the second trench 112. Therefore, by controlling the etching time, the etching depth of the slope-shaped contour 112B of the second trench 112 can be adjusted.
  • the tilt angle ⁇ of the ramp-shaped profile 112B of the second trench 112 can be adjusted by controlling the power of the lower electrode, making the tilt angle ⁇ of the ramp-shaped profile 112B controllable.
  • the etching depth of the ramp-shaped profile 112B can be adjusted by controlling the etching time, making the etching depth of the ramp-shaped profile 112B controllable. Therefore, controlling the tilt angle ⁇ and/or etching depth of the ramp-shaped profile 112B is beneficial for controlling its morphology.
  • the arc-shaped contour 112A and the ramp-shaped contour 112B of the second trench 112 form the ramp 11C at the top of the third trench 113.
  • the inclination angle ⁇ of this ramp 11C is determined by the ratio between the etching depth H of the second trench 112 and the opening width W2 of the first trench 111 near the mask layer 12.
  • the etching depth H of the second trench 112 ranges from 20 nm to 60 nm (inclusive)
  • the opening width W2 of the first trench 111 near the mask layer 12 ranges from 4 ⁇ m to 10 ⁇ m (inclusive).
  • the relationship between the tilt angle ⁇ of the ramp 11C and the ratio of the etching depth H of the second trench 112 to the opening width W2 of the first trench 111 near the mask layer 12 can be expressed by the following formula (1):
  • the tilt angle ⁇ of the ramp 11C is approximately 178.8°, and the morphology of the ramp 11C is gentle, making it less prone to tip discharge.
  • the opening width W2 of the first trench 111 near the mask layer 12 is equal to the opening width W2 of the second trench 112 near the mask layer 12.
  • the tilt angle ⁇ of the slope 11C is determined by the ratio between the etching depth H of the second trench 112 and the opening width W2 of the first trench 111 near the mask layer 12, by controlling the opening width W2 of the first trench 111 near the mask layer 12 to be between 4 ⁇ m and 10 ⁇ m and controlling the etching depth H of the second trench 112 to be between 20nm and 60nm, the tilt angle ⁇ of the slope 11C can be larger, which is beneficial to ensure that the morphology of the slope 11C is gentle, thereby avoiding the occurrence of tip discharge phenomenon and preventing the blockage phenomenon during subsequent filling process.
  • the lower electrode power ranges from 10W to 60W (inclusive).
  • the lower electrode power can be any value among 10W, 20W, and 60W.
  • the above scheme by selecting any value between 10W and 60W for the lower electrode power, can ensure that the lower electrode power in the second etching step is within a suitable power range.
  • This is beneficial for controlling the slope profile 112B of the second trench 112 to form a suitable tilt angle ⁇ , making the morphology of the slope profile 112B gentle.
  • This morphology can prevent sharp corners and protrusions from appearing at the top of the third trench 113, effectively preventing tip discharge at the top of the second trench 112 and preventing blockage during subsequent filling.
  • the process conditions for the second etching step further include: the power range of the upper electrode is 500W to 2000W (including the endpoint value), and the pressure range of the process chamber is 100mTorr to 300mTorr (including the endpoint value).
  • the pressure in the process chamber can be any value among 100 mTorr, 150 mTorr, and 300 mTorr.
  • the upper electrode power can be any value among 500 W, 1000 W, and 2000 W.
  • the above scheme by controlling the upper electrode power between 500W and 2000W, can control the main etching gas to dissociate into high-density plasma and keep the plasma ion flux within a suitable range. This facilitates the plasma to perform longitudinal etching on the inner side of the first trench 111 while simultaneously performing lateral etching at a suitable etching rate. Furthermore, by controlling the pressure range of the process chamber between 100mTorr and 300mTorr, the high pressure can increase the frequency of collisions between high-density plasmas, which is more conducive to generating scattering effects and lateral etching.
  • the process conditions for the second etching step further include an oxygen flow rate ranging from 100 sccm to 200 sccm (inclusive).
  • the oxygen flow rate can be any value among 100 sccm, 180 sccm, and 200 sccm.
  • the oxygen ions dissociated from the oxygen can recombine with the carbon ions dissociated from the carbon-containing and fluorine-containing gas, reducing the proportion of carbon ions during the etching process, thereby reducing the formation of carbon-containing etching polymers.
  • the generated carbon-containing etching polymers are insufficient to protect the sidewalls of the inner side of the first trench 111, resulting in lateral etching of the inner side of the first trench 111. This results in a more inclined etching of the inner side of the first trench 111, which helps to form a slope-shaped profile 112B with a larger tilt angle ⁇ .
  • the first etching step includes at least one of the following:
  • the opening width W2 of the first trench 111 near the mask layer 12 is adjusted by controlling the power of the upper electrode;
  • the position of the first trench 111 in the thickness direction of the film layer 11 to be etched is adjusted by controlling the power of the lower electrode.
  • the upper electrode power is used to control the density of the plasma dissociated from the main etching gas in the first etching step.
  • a higher plasma density is more conducive to the lateral etching of the film layer 11 to be etched, and the upper electrode power is positively correlated with the density of the plasma dissociated from the main etching gas.
  • the upper electrode power can also be used to control the ion flux of the plasma, and the magnitude of the ion flux determines the etching rate of the film layer 11 to be etched.
  • the lower electrode power is used to accelerate the plasma, giving it bombardment energy so that it can pass through the mask opening 12A and move below the mask layer 12.
  • the above scheme can adjust the high-density plasma generated by the dissociation of the main etching gas in the first etching step by controlling the power of the upper electrode, and control the lateral etching rate of the high-density plasma on the film layer 11 to be etched.
  • This allows for the adjustment of the opening width W2 of the first trench 111 near the mask layer 12.
  • the opening width W2 of the first trench 111 near the mask layer 12 is equal to the lateral dimension of the ramp 11C and determines the adjustment window size of the tilt angle ⁇ of the ramp 11C. Therefore, by adjusting the opening width W2 of the first trench 111 near the mask layer 12, both the lateral dimension of the ramp 11C and the adjustment window size of the tilt angle ⁇ of the ramp 11C can be adjusted.
  • the bombardment energy of the plasma on the film layer 11 to be etched can be adjusted, which helps to control the plasma to pass through the mask opening 12A and move to the underside of the mask layer 12, so as to form the first trench 111 under the mask layer 12 without affecting the morphology of the mask layer 12.
  • the method may further include: controlling the pressure of the process chamber to facilitate lateral etching of the top of the film layer 11 by high-density plasma.
  • the pressure of the process chamber is used to control the plasma to generate a scattering effect and lateral etching, thereby facilitating lateral etching of the top of the film layer 11, and the pressure of the process chamber also affects the plasma density. Therefore, by controlling the pressure of the process chamber, high-density plasma can be made more readily laterally etched onto the top of the film layer 11.
  • the power of the upper electrode ranges from 1000W to 5000W (inclusive of the endpoint value)
  • the pressure of the process chamber ranges from 50mTorr to 200mTorr (inclusive of the endpoint value)
  • the power of the lower electrode ranges from 0W to 50W (inclusive of the endpoint value).
  • the pressure in the process chamber can be any value among 50 mTorr, 130 mTorr, and 200 mTorr.
  • the upper electrode power can be any value among 1000 W, 4000 W, and 5000 W.
  • the lower electrode power can be any value among 0 W, 20 W, and 50 W.
  • the above scheme by controlling the upper electrode power between 1000W and 5000W, can control the main etching gas to dissociate into high-density plasma and control the high-density plasma to have a suitable ion flux, thereby effectively controlling the lateral etching rate of the plasma on the film layer 11 to be etched.
  • the pressure of the process chamber between 50mTorr and 200mTorr, the high pressure can be used to increase the frequency of collisions between high-density plasmas in the first etching step, which is more conducive to generating scattering effect and lateral etching, thus facilitating lateral etching of the top of the film layer 11 to be etched.
  • the plasma can have a lower bombardment energy, so that the plasma can pass through the mask opening 12A and move to the bottom of the mask layer 12.
  • Applying the lower electrode power to the lower electrode of the process chamber can provide a lower bias voltage to the process chamber.
  • This high plasma density combined with a low bias voltage method allows for isotropic etching of the film layer 11 below the mask layer 12 using high-density plasma while ensuring that the morphology of the mask opening 12A remains unchanged. This results in the formation of a first trench 111 below the mask layer 12, with the opening width W2 of the first trench 111 near the mask layer 12 being greater than the opening width W1 of the mask opening 12A.
  • the sidewall morphology of the first trench 111 is a smooth arc-shaped surface that is concave towards the bottom of the film layer 11 to be etched. In other words, it ensures that the outline of the first trench 111 is arc-shaped.
  • the opening width W2 of the first trench 111 near the mask layer 12 ranges from 4 ⁇ m to 10 ⁇ m (inclusive); the vertical depth of the first trench 111 ranges from 50 nm to 100 nm (inclusive).
  • the opening width W2 of the first trench 111 near the mask layer 12 can be any value among 4 ⁇ m, 5 ⁇ m, and 10 ⁇ m.
  • the vertical depth of the first trench 111 can be any value among 50 nm, 52 nm, 60 nm, 70 nm, 80 nm, 90 nm, and 100 nm.
  • the process conditions for the third etching step include: a pressure range of 10 mTorr to 80 mTorr (inclusive), a power range of 500 W to 2000 W for the upper electrode (inclusive), a power range of 500 W to 1000 W for the lower electrode (inclusive), and a flow rate range of 10 sccm to 100 sccm for both sulfur- and fluorine-containing gases and oxygen (inclusive).
  • the pressure in the process chamber is controlled between 10 mTorr and 80 mTorr. This lowers the plasma density, making it more suitable for the process requirements.
  • the upper electrode power between 500 W and 2000 W
  • a suitable ion flux can be achieved.
  • the lower electrode power between 500 W and 1000 W
  • the plasma can have greater bombardment energy, resulting in deeper and straighter etching of the inner side of the second trench 112. This allows for the formation of a deeper third trench 113 with straighter sidewalls below the second trench 112.
  • the third etching step at least one of chlorine and hydrogen bromide can be added to increase the selectivity of the mask layer 12, making the etching rate of the film layer 11 to be etched much faster than the etching rate of the mask layer 12, so that the third trench 113 forms a deep trench below the second trench 112.
  • the material of the mask layer 12 can be silicon oxide or silicon nitride, and the material of the film layer 11 to be etched can be silicon.
  • the method for forming a trench structure includes a first etching step, a second etching step, and a third etching step performed sequentially.
  • Table 1 Main process parameters for each step in forming the trench structure.
  • the pressure in the process chamber is controlled to be between 50 mTorr and 200 mTorr, the power supply is between 1000 W and 5000 W, the power supply is between 0 W and 50 W, the flow rate of sulfur hexafluoride is between 500 sccm and 2000 sccm, the temperature of the wafer carrier is 40°C, and the etching time is between 10 s and 70 s.
  • a first trench 111 can be formed on the top of the film layer 11 to be etched, and the opening width W2 of the first trench 111 near the mask layer 12 is greater than the opening width W1 of the mask layer 12, and the opening width W2 of the first trench 111 near the mask layer 12 is between 4 ⁇ m and 10 ⁇ m.
  • the pressure in the process chamber is controlled to be between 100 mTorr and 300 mTorr
  • the power of the upper electrode is between 500 W and 2000 W
  • the power of the lower electrode is between 10 W and 60 W
  • the flow rates of carbon tetrafluoride ( CF4 ) and oxygen ( O2 ) are both between 100 sccm and 200 sccm
  • the temperature of the wafer carrier is 60°C
  • the etching time is between 10 s and 100 s.
  • the first trench 111 can be etched into the second trench 112, so that the second trench 112 includes an arc-shaped contour 112A at the upper part and a slope-shaped contour 112B at the lower part, and the arc-shaped contour 112A and the slope-shaped contour 112B are smoothly connected, and the etching depth H of the second trench 112 is between 20 nm and 60 nm.
  • the pressure in the control chamber is between 10 mTorr and 80 mTorr
  • the upper electrode power is between 500 W and 2000 W
  • the lower electrode power is between 500 W and 1000 W
  • the flow rate of sulfur hexafluoride ( SF6 ) is between 10 sccm and 1000 sccm
  • the flow rate of oxygen is between 10 sccm and 100 sccm
  • the flow rate of helium (He) is 135 sccm
  • the temperature of the wafer carrier is 60°C
  • the etching time is between 10 s and 300 s.
  • a third trench 113 can be formed below the second trench 112, so that the arc-shaped contour 112A and the slope-shaped contour 112B of the second trench 112 together constitute the slope 11C at the top of the third trench 113.
  • Figure 4 shows a schematic diagram of the structure of a semiconductor process apparatus according to an embodiment of this application.
  • the semiconductor process equipment includes at least one process chamber, a transfer chamber, and a controller.
  • the process chamber and the transfer chamber are selectively connected.
  • the controller includes at least one processor and at least one memory.
  • the memory stores a computer program, which is executed by the processor to implement the method of any of the above embodiments.
  • the semiconductor process equipment 200 may include a process chamber 20, an inlet assembly 20A, an upper electrode assembly 20B and a lower electrode assembly 20C, an exhaust assembly 20D, and a controller (not shown in Figure 4).
  • the controller includes at least one processor and at least one memory, in which a computer program is stored. When the computer program is executed by the processor, it implements the method for forming a trench structure according to any of the above embodiments.
  • the controller can be a host computer or a slave computer.
  • the controller can open the valve of the air inlet assembly 20A to introduce the corresponding process gas into the process chamber 20; the controller can also control the flow rate of the process gas by controlling the opening degree of the valve of the air inlet assembly 20A.
  • the controller can also control the air extraction assembly 20D to evacuate the process chamber 20, for example, by controlling the valve opening degree of the air extraction assembly 20D or the speed of the air extraction pump, to control the pressure inside the process chamber 20 and remove reaction byproducts.
  • the upper electrode assembly 20B may include an RF coil 21, an upper RF power supply 23, and an upper matching unit 25.
  • the controller is also used to control the upper RF power supply 23 to provide RF power to the RF coil 21 through the upper matching unit 25, so that the RF coil 21 excites the process gas inside the process chamber 20 to generate plasma.
  • the lower electrode assembly 20C may include a wafer carrier 22, a lower RF power supply 24, and a lower matching unit 26.
  • the controller is also used to control the lower RF power supply 24 to provide RF power to the wafer carrier 22 through the lower matching unit 26 to provide RF bias.
  • the wafer carrier 22 may be, for example, an electrostatic chuck, a mechanical chuck, or a vacuum suction chuck.
  • the wafer carrier 22 is used to carry a wafer 100, on which a substrate 10 is disposed.
  • the semiconductor process equipment 200 in this application embodiment can be an inductively coupled plasma (ICP) device or a capacitively coupled plasma (CCP) device. This application embodiment does not limit the type of semiconductor process equipment 200.
  • ICP inductively coupled plasma
  • CCP capacitively coupled plasma
  • connection should be interpreted broadly.
  • they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two elements or the interaction between two elements.

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

本公开提供一种形成沟槽结构的方法及半导体工艺设备，该方法包括执行第一刻蚀步骤，对待刻蚀膜层暴露出的表面进行刻蚀，以在待刻蚀膜层的顶部形成圆弧状的第一沟槽；第一沟槽的靠近掩膜层的开口宽度大于掩膜开口的开口宽度；执行第二刻蚀步骤，对第一沟槽的内侧进行刻蚀，以将第一沟槽刻蚀成第二沟槽，第二沟槽包括位于上部的圆弧状轮廓和位于下部的斜坡状轮廓；执行第三刻蚀步骤，对第二沟槽的内侧进行刻蚀，以在第二沟槽的下方形成第三沟槽，第三沟槽与第二沟槽相连通。采用本方案形成沟槽结构，有利于控制圆弧状轮廓和斜坡状轮廓构成的斜坡的倾斜角度，使斜坡满足防止尖端放电和防止后续填充出现堵口的需求。

Description

形成沟槽结构的方法及半导体工艺设备 技术领域
本申请涉及半导体制造技术领域，尤其涉及一种形成沟槽结构的方法及半导体工艺设备。
背景技术
为了避免沟槽顶部的边角处产生尖端放电和后续填充过程中产生堵口现象，在形成沟槽结构的过程中，通常需要在沟槽顶部形成圆角或斜坡。在相关技术中，形成沟槽结构的方法包括：如图1A至图1B所示，先对待刻蚀膜层11从掩膜开口12A暴露出的区域进行刻蚀，在待刻蚀膜层11内形成沟槽11A；如图1B至图1C所示，再对掩膜层12进行侧推(Pull Back)，扩大掩膜开口12A的开口宽度W1，以暴露出沟槽11A顶部的边角11B；如图1C至图1D所示，然后对沟槽11A顶部暴露出的边角11B进行刻蚀，以在沟槽11A顶部形成斜坡11C。
发明内容
本申请提供一种形成沟槽结构的方法及半导体工艺设备，以解决相关技术存在的因掩膜开口的开口宽度限制了斜坡的倾斜角度的调节窗口大小而不利于控制斜坡的倾斜角度的问题。
本申请第一方面提供了一种形成沟槽结构的方法，包括：
提供基板；基板包括层叠设置的待刻蚀膜层和掩膜层，掩膜层设置有掩膜开口，掩膜开口暴露待刻蚀膜层的部分表面；
执行第一刻蚀步骤，对待刻蚀膜层暴露出的表面进行刻蚀，以在待刻蚀膜层的顶部形成圆弧状的第一沟槽；第一沟槽的靠近掩膜层的开口宽度大于掩膜开口的开口宽度；
执行第二刻蚀步骤，对第一沟槽的内侧进行刻蚀，以将第一沟槽刻蚀成第二沟槽，第二沟槽包括位于上部的圆弧状轮廓和位于下部的斜坡状轮廓；
执行第三刻蚀步骤，对第二沟槽的内侧进行刻蚀，以在第二沟槽的下方形成第三沟槽，第三沟槽与第二沟槽相连通。
在一种实施方式中，第二沟槽的斜坡状轮廓的倾斜角度的调节窗口大小由第一沟槽靠近掩膜层的开口宽度限定。
在一种实施方式中，第一刻蚀步骤的工艺条件包括主刻蚀体为含硫含氟气体，第二刻蚀步骤的工艺条件包括主刻蚀气体为含碳含氟气体。
在一种实施方式中，在执行第二刻蚀步骤中，通过控制下电极功率的大小来调节第二沟槽的斜坡状轮廓的倾斜角度；和/或，通过控制刻蚀时间的长短来调节第二沟槽的斜坡状轮廓的刻蚀深度。
在一种实施方式中，第二沟槽的圆弧状轮廓和斜坡状轮廓构成第三沟槽顶部的斜坡，斜坡的倾斜角度由第二沟槽的刻蚀深度与第一沟槽靠近掩膜层的开口宽度之间的比例确定，第二沟槽的刻蚀深度范围为20nm～60nm，第一沟槽靠近掩膜层的开口宽度范围为4μm～10μm。
在一种实施方式中，第二刻蚀步骤的工艺条件还包括：上电极功率的功率范围为500W～2000W，工艺腔室的压力范围为100mTorr～300mTorr。
在一种实施方式中，第二刻蚀步骤的工艺条件还包括：氧气的流量范围为100sccm～200sccm。
在一种实施方式中，在执行第一刻蚀步骤中，包括如下至少之一：
通过控制上电极功率来调节第一沟槽靠近掩膜层的开口宽度；
通过控制下电极功率来调节第一沟槽在待刻蚀膜层的厚度方向上的位置。
在一种实施方式中，上电极功率的范围为1000W～5000W，工艺腔室的压力范围为50mTorr～200mTorr，下电极功率的范围为0W～50W。
本申请第二方面提供了一种半导体工艺设备，包括工艺腔室、进气组件、上电极组件、下电极组件和控制器，控制器包括至少一个处理器和至少一个存储器，存储器中存储有计算机程序，计算机程序被处理器执行时实现上述任一种实施方式形成沟槽结构的方法。
上述技术方案中的优点或有益效果至少包括：通过先在待刻蚀膜层顶部形成圆弧状的第一沟槽，并使第一沟槽靠近掩膜层的开口宽度比掩膜层的开口宽度更大，再对第一沟槽的内侧进行刻蚀，可使第一沟槽外侧保留的圆弧状轮廓构成第二沟槽上部的圆弧状轮廓，第一沟槽的内侧被刻蚀形成第二沟槽下部的斜坡状轮廓，这种刻蚀方式可以确保第二沟槽下部的斜坡状轮廓的倾斜角度的调节窗口大小不受掩膜层的开口宽度限制，而圆弧状轮廓和斜坡状轮廓的整体倾斜角度可以通过调节斜坡状轮廓的倾斜角度来确定，这使得该整体倾斜角度的调节窗口大小也不受掩膜开口的开口宽度限制，有利于对圆弧状轮廓和斜坡状轮廓的整体倾斜角度进行控制，使其能够满足防止出现尖端放电和防止后续填充过程中产生堵口的需求。如此，在执行第三刻蚀步骤后，可使第二沟槽的圆弧状轮廓和斜坡状轮廓构成第三沟槽的顶部的斜坡，并确保该斜坡能够起到防止第三沟槽的顶部出现尖端放电和防止后续填充过程中出现堵口的效果。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分，示出了符合本申请的实施例，并与说明书一起用于解释本申请的原理。此外，这些附图和文字描述并不是为了通过任何方式限制本申请构思的范围，而是通过参考特定实施例为本领域技术人员说明本申请的概念。
图1A至图1D所示为相关技术形成沟槽结构的过程中一种剖面结构示意图。
图2所示为本申请一实施例的形成沟槽结构的方法的流程示意图。
图3A至图3D所示为本申请一实施例中形成沟槽结构的过程中一种剖面结构示意图。
图4所示为本申请一实施例的半导体工艺设备的结构示意图。
具体实施方式
在下文中，仅简单地描述了某些示例性实施例。正如本领域技术人员可认识到的那样，在不脱离本申请的精神或范围的情况下，可通过各种不同方式修改所描述的实施例。因此，附图和描述被认为本质上是示例性的而非限制性的。
在相关技术中，如图1A至图1D所示，在形成沟槽结构的过程中，由于掩膜层12的侧推程度有限，使得掩膜开口12A的开口宽度W1较小，而掩膜开口12A的开口宽度W1决定了斜坡11C的倾斜角度α的调节窗口大小，进而导致斜坡11C的倾斜角度α的调节窗口较小，因此不利于调节斜坡11C的倾斜角度α大小，无法确保斜坡11C的倾斜角度α能够满足防止出现尖端放电和防止产生堵口现象的需求。
为了至少解决相关技术中存在的上述技术问题，本申请实施例提供了一种形成沟槽结构的方法及半导体工艺设备。下面结合附图对本申请实施例进行说明。
图2所示为本申请一实施例的形成沟槽结构的方法的流程示意图。图3A至图3D所示为本申请一实施例中形成沟槽结构的过程中一种剖面结构示意图。
如图2所示，该形成沟槽结构的方法包括如下步骤S110至步骤S140。
步骤S110、请一并参阅图3A，提供基板10；基板10包括层叠设置的待刻蚀膜层11和掩膜层12，掩膜层12设置有掩膜开口12A，掩膜开口12A暴露待刻蚀膜层11的部分表面。其中，待刻蚀膜层11的材料可以是硅(Si)，待刻蚀膜层11可以是单层或多层结构。掩膜层12的材料可以是氧化硅(SiO2)或氮化硅(SiN)。
步骤S120、请一并参阅图3A至图3B，执行第一刻蚀步骤，对待刻蚀膜层11暴露出的表面进行刻蚀，以在待刻蚀膜层11的顶部形成圆弧状的第一沟槽111；第一沟槽111靠近掩膜层12的开口宽度W2大于掩膜开口12A的开口宽度W1。其中，第一沟槽111的靠近掩膜层12的开口宽度W2可以为第一沟槽111的最大横向尺寸。通过对待刻蚀膜层11暴露出的表面进行刻蚀，可以在不对掩膜层12进行侧推的情况下，在掩膜开口12A的下方形成圆弧状的第一沟槽111，并使第一沟槽111靠近掩膜层12的开口宽度W2比掩膜开口12A的开口宽度W1更大，使得第一沟槽111靠近掩膜层12的开口宽度W2不受掩膜开口12A的开口宽度W1的限制。
步骤S130、请一并参阅图3B至图3C，执行第二刻蚀步骤，对第一沟槽111的内侧进行刻蚀，以将第一沟槽111刻蚀成第二沟槽112，第二沟槽112包括位于上部的圆弧状轮廓112A和位于下部的斜坡状轮廓112B。
在对第一沟槽111的内侧进行刻蚀的过程中，第一沟槽111的外侧被掩膜层12保护而不被刻蚀，可以保留原有的圆弧状轮廓，第一沟槽111的内侧被刻蚀成斜坡状轮廓，被保留的圆弧状轮廓构成第二沟槽112上部的圆弧状轮廓112A，刻蚀成的斜坡状轮廓构成第二沟槽112下部的斜坡状轮廓112B。容易理解的是，第一沟槽111的内侧是指第一沟槽111远离掩膜层12的部分，构成该部分的侧壁被刻蚀成斜坡状，第一沟槽111的外侧是指第一沟槽111靠近掩膜层12的部分，构成该部分的侧壁被掩膜层12保护而不被刻蚀。
其中，第二沟槽112下部的斜坡状轮廓112B的倾斜角度β的调节窗口大小由第一沟槽111靠近掩膜层12的开口宽度W2决定，由于第一沟槽111靠近掩膜层12的开口宽度W2大于掩膜开口12A的开口宽度W1，使得第一沟槽111靠近掩膜层12的开口宽度W2不受掩膜开口12A的开口宽度W1限制，因此可使斜坡状轮廓112B的倾斜角度β的调节窗口大小也不受掩膜开口12A的开口宽度W1限制。斜坡状轮廓112B的倾斜角度β的调节窗口大小决定了斜坡状轮廓112B的倾斜角度β调节的难易程度，调节窗口越大，则更易于调节斜坡状轮廓112B的倾斜角度β。斜坡状轮廓112B的倾斜角度β为斜坡状轮廓112B与待刻蚀膜层11朝向掩膜层12一侧表面之间的夹角。
步骤S140、请一并参阅图3C至图3D，执行第三刻蚀步骤，对第二沟槽112的内侧进行刻蚀，以在第二沟槽112的下方形成第三沟槽113，第三沟槽113与第二沟槽112相连通。其中，第三沟槽113的开口宽度接近掩膜开口12A的开口宽度。
示例性地，第二沟槽112的圆弧状轮廓112A和斜坡状轮廓112B构成第三沟槽113顶部的斜坡11C，第二沟槽112的圆弧状轮廓112A和斜坡状轮廓112B的整体倾斜角度α构成斜坡11C的倾斜角度α，该整体倾斜角度α为圆弧状轮廓112A的顶端与斜坡状轮廓112B的底端之间的连线与待刻蚀膜层11朝向掩膜层12一侧表面之间的夹角。
上述方案，通过先在待刻蚀膜层11顶部形成圆弧状的第一沟槽111，并使第一沟槽111靠近掩膜层12的开口宽度W2比掩膜层12的开口宽度W1更大，再对第一沟槽111的内侧进行刻蚀，可使第一沟槽111外侧保留的圆弧状轮廓构成第二沟槽112上部的圆弧状轮廓112A，第一沟槽111的内侧被刻蚀形成第二沟槽112下部的斜坡状轮廓112B，这种刻蚀方式可以确保第二沟槽112下部的斜坡状轮廓112B的倾斜角度β的调节窗口大小不受掩膜层12的开口宽度W1限制，而圆弧状轮廓112A和斜坡状轮廓112B的整体倾斜角度α可以通过调节斜坡状轮廓112B的倾斜角度β来确定，这使得该整体倾斜角度α的调节窗口大小也不受掩膜开口12A的开口宽度W1限制，有利于对圆弧状轮廓112A和斜坡状轮廓112B的整体倾斜角度α进行控制，使其能够满足防止出现尖端放电和防止后续填充过程中产生堵口的需求。如此，在执行第三刻蚀步骤后，可使第二沟槽112的圆弧状轮廓112A和斜坡状轮廓112B构成第三沟槽113的顶部的斜坡11C，并确保该斜坡11C能够起到防止第三沟槽113的顶部出现尖端放电和防止后续填充过程中出现堵口的效果。
在一种实施方式中，如图3B和图3C所示，第二沟槽112的斜坡状轮廓112B的倾斜角度β的调节窗口大小由第一沟槽111靠近掩膜层12的开口宽度W2限定。
示例性地，第一沟槽111靠近掩膜层12的开口宽度W2与第二沟槽112的斜坡状轮廓112B的倾斜角度β的调节窗口大小具有正比例关系，亦即第一沟槽111靠近掩膜层12的开口宽度W2越大，该调节窗口越大；反之，则该调节窗口越小。其中，斜坡状轮廓112B的倾斜角度β的调节窗口越大，则更易于通过调节斜坡状轮廓112B的倾斜角度β来调节第二沟槽112的圆弧状轮廓112A和斜坡状轮廓112B构成的斜坡11C的倾斜角度α，使得第一沟槽111靠近掩膜层12的开口宽度W2与斜坡11C的倾斜角度α的调节窗口大小之间也具有正比例关系。
在一种实施方式中，第一刻蚀步骤基本为各向同性刻蚀，第二刻蚀步骤基本为各向异性刻蚀。
示例性地，请一并参阅图3A至图3B，第一刻蚀步骤基本为各向同性刻蚀表示：第一刻蚀步骤中各向同性刻蚀占主导，存在少量各向异性刻蚀。对待刻蚀膜层11的横向刻蚀消耗略少于对待刻蚀膜层11的纵向刻蚀消耗，可以在待刻蚀膜层11的顶部形成圆弧状的第一沟槽111。请一并参阅图3B至图3C，第二刻蚀步骤基本为各向异性刻蚀表示：第二刻蚀步骤中各向异性刻蚀占主导，存在少量各向同性刻蚀。这样在将第一沟槽111刻蚀成第二沟槽112的过程中，可使第一沟槽111的外侧被掩膜层12保护而保留原有的圆弧状，第一沟槽111的内侧被刻蚀为斜坡状轮廓，以形成第二沟槽112。
此外，需要说明的是，请参阅图1B至图1C，相关技术采用湿法刻蚀工艺对掩膜层12进行侧推以扩大掩膜开口12A。由于湿法刻蚀工艺的工艺控制能力较差，因此无法控制掩膜开口12A的开口宽度W1，从而无法控制斜坡11C的倾斜角度α的调节窗口大小。相较于相关技术，请参阅图3A至图3D，本申请实施例采用各向同性刻蚀工艺为干法刻蚀工艺，其工艺控制能力较强，能够有效控制第一沟槽111靠近掩膜层12的开口宽度W2，又因为第一沟槽111靠近掩膜层12的开口宽度W2可以决定斜坡11C的倾斜角度α的调节窗口大小，因此更易于对斜坡11C的倾斜角度α的调节窗口大小的进行控制。
再者，请参阅图1B至图1D，相关技术在对掩膜层12进行侧推后，采用干法刻蚀工艺对掩膜开口12A暴露出的边角11B进行刻蚀，使得相关技术需要交替使用湿法刻蚀工艺和干法刻蚀工艺才能形成斜坡11C，导致相关技术的刻蚀过程复杂、成本高、效率低且执行困难。相较于相关技术，本申请实施例采用的各向同性刻蚀和各向异性刻蚀均为干法刻蚀工艺，无需不同刻蚀工艺进行交替，简化了刻蚀过程，有助于降低工艺成本、提高工艺效率且易于执行。
进一步地，相关技术由于需要交替执行湿法刻蚀工艺和干法刻蚀工艺，还需要将基板10在不同工艺腔室之间进行移位和传输，使得灰尘或杂质容易落在基板10上，这会导致基板10出现缺陷或被损坏；相较于相关技术，本申请实施例所采用的各向同性刻蚀和各向异性刻蚀可以在同一工艺腔室内对基板10进行原位刻蚀，可以省去对基板10的移位和传输，可以避免基板10出现缺陷或被损坏。
在一种实施方式中，第一刻蚀步骤的工艺条件包括主刻蚀体为含硫含氟气体，第二刻蚀步骤的工艺条件包括主刻蚀气体为含碳含氟气体。
示例性地，请参阅图3A至图3B，待刻蚀膜层11的材料可以是硅。由于含硫含氟气体对硅刻蚀的各向同性刻蚀较好，因此选用含硫含氟气体作为第一刻蚀步骤的主刻蚀气体，可确保第一刻蚀步骤基本为各向同性刻蚀。例如，含硫含氟气体可以选用六氟化硫(SF6)，六氟化硫对待刻蚀膜层11的横向刻蚀速率大于5μm/min，六氟化硫对待刻蚀膜层11的横向刻蚀速率和均匀度均优于传统刻蚀气体，因此选用六氟化硫作为第一刻蚀步骤的主刻蚀气体，更易于控制第一刻蚀步骤基本为各向同性刻蚀。由于含碳含氟气体对硅进行刻蚀的方向性较好，因此选用含碳含氟气体作为第二刻蚀步骤的主刻蚀气体，可确保第二刻蚀步骤基本为各向异性刻蚀。例如，含碳含氟气体可以选用四氟化碳(CF4)。需要说明的是，含硫含氟气体和含碳含氟气体可以根据实际需要进行选择，本申请实施例对此不作限制。
在一个示例中，第一刻蚀步骤的工艺条件还包括辅助刻蚀气体。该辅助气体包括含氙气体、含氮气体和含碳气体中的至少一种。其中，至少一种可以是含氙气体、含氮气体和含碳气体中的一种气体或多种气体的混合气体。在第一刻蚀步骤中，在选用含硫含氟气体作为主刻蚀气体对待刻蚀膜层11暴露的表面进行刻蚀时，通过选用含氙气体、含氮气体和含碳气体中的至少一种或多种的混合气体作为辅助刻蚀气体，可以利用辅助刻蚀气体对待刻蚀膜层11的横向刻蚀程度进行控制。
在一种实施方式中，请一并参阅图3B至图3C，在执行第二刻蚀步骤中，通过控制下电极功率的大小来调节第二沟槽112的斜坡状轮廓112B的倾斜角度β；和/或，通过控制刻蚀时间的长短来调节第二沟槽112的斜坡状轮廓112B的刻蚀深度。其中，第二沟槽112的斜坡状轮廓112B的刻蚀深度可以是斜坡状轮廓112B在待刻蚀膜层11厚度方向上的尺寸，待刻蚀膜层11的厚度方向为待刻蚀膜层11靠近掩膜层12一侧表面指向待刻蚀膜层11背离掩膜层12一侧表面的方向。
在执行第一刻蚀步骤后，第一沟槽111的侧壁上累积的电荷会对等离子体产生吸引。在第二刻蚀步骤中，下电极功率用于控制等离子体的轰击能量，下电极功率与等离子体的轰击能量具有正比例关系。具体地，下电极功率越大，等离子体的轰击能量越强，等离子体抵消电荷吸引的能力越强，等离子体对第一沟槽111内侧的刻蚀越直，刻蚀形成的第二沟槽112的斜坡状轮廓112B的倾斜角度β越小，斜坡状轮廓112B越陡峭；反之，等离子体的轰击能量越弱，等离子体抵消电荷吸引的能力越弱，刻蚀形成的第二沟槽112的斜坡状轮廓112B的倾斜角度β越大，斜坡状轮廓112B越平缓。如此，通过控制下电极功率的大小，可以调节第二沟槽112的斜坡状轮廓112B的倾斜角度β，进而控制斜坡11C的倾斜角度α。
在第二刻蚀步骤中，当其他工艺条件不变时，刻蚀时间越长，则第二沟槽112的斜坡状轮廓112B的刻蚀深度越深；刻蚀时间越短，则第二沟槽112的斜坡状轮廓112B的刻蚀深度越浅。因此通过控制刻蚀时间的长短，可以调节第二沟槽112的斜坡状轮廓112B的刻蚀深度。
上述方案，在第二刻蚀步骤中，通过控制下电极功率的大小，可以实现对第二沟槽112的斜坡状轮廓112B的倾斜角度β的调节，使得该斜坡状轮廓112B的倾斜角度β可控；通过控制刻蚀时间的长短，可以实现对该斜坡状轮廓112B的刻蚀深度的调节，使得该斜坡状轮廓112B的刻蚀深度可控。基于此，通过控制该斜坡状轮廓112B的倾斜角度β和/或刻蚀深度，有利于控制该斜坡状轮廓112B的形貌。
在一种实施方式中，请一并参阅图3B和图3C，第二沟槽112的圆弧状轮廓112A和斜坡状轮廓112B构成第三沟槽113顶部的斜坡11C。该斜坡11C的倾斜角度α由第二沟槽112的刻蚀深度H与第一沟槽111靠近掩膜层12的开口宽度W2之间的比例确定。第二沟槽112的刻蚀深度H范围为20nm～60nm(包括端点值)，第一沟槽111靠近掩膜层12的开口宽度W2范围为4μm～10μm(包括端点值)。
示例性地，斜坡11C的倾斜角度α与第二沟槽112的刻蚀深度H和第一沟槽111靠近掩膜层12的开口宽度W2的比例之间的关系可以采用如下公式(1)表示：
在一些实施例中，当第一沟槽111靠近掩膜层12的开口宽度W2为5μm，且第二沟槽112的刻蚀深度H为52nm时，则斜坡11C的倾斜角度α约为178.8°，斜坡11C的形貌平缓，不易产生尖端放电。其中，当第一沟槽111刻蚀成第二沟槽112后，则第一沟槽111靠近掩膜层12的开口宽度W2等于第二沟槽112靠近掩膜层12的开口宽度W2。
上述方案，由于斜坡11C的倾斜角度α由第二沟槽112的刻蚀深度H和第一沟槽111靠近掩膜层12的开口宽度W2之间的比例确定，因此通过控制第一沟槽111靠近掩膜层12的开口宽度W2介于4μm与10μm之间以及控制第二沟槽112的刻蚀深度H介于20nm与60nm之间，可使斜坡11C的倾斜角度α较大，有利于确保斜坡11C的形貌平缓，从而避免产生尖端放电现象和防止后续填充过程中出现堵口现象。
在一种实施方式中，下电极功率的范围为10W～60W(包括端点值)。例如，下电极功率可以是10W、20W和60W中的任一值。
经过大量实验发现：请参考图3D，如果下电极功率小于10W，则第二沟槽112的斜坡状轮廓112B的倾斜角度β过大，斜坡状轮廓112B的形貌过于平缓，斜坡状轮廓112B与第三沟槽113之间的夹角γ过小，会形成新的顶部边角，导致第三沟槽113的顶部依然存在容易产生尖端放电的问题；请参考图3C，如果下电极功率大于60W，则第二沟槽112的斜坡状轮廓112B的倾斜角度β过小，斜坡状轮廓112B的形貌过于陡峭，会导致斜坡11C的倾斜角度α过小，斜坡11C也过于陡峭，无法满足防止出现尖端放电的需求。
上述方案，通过选用下电极功率为特定的10W与60W之间的任一值，可使第二刻蚀步骤中的下电极功率处于合适的功率范围内，有利于控制第二沟槽112的斜坡状轮廓112B形成合适的倾斜角度β，使得斜坡状轮廓112B的形貌平缓，这种形貌可使第三沟槽113的顶部不易出现尖角和凸起，能有效防止第二沟槽112的顶部出现尖端放电和防止后续填充过程中出现堵口现象。
在一种实施方式中，第二刻蚀步骤的工艺条件还包括：上电极功率的功率范围为500W～2000W(包括端点值)，工艺腔室的压力范围为100mTorr～300mTorr(包括端点值)。
示例性地，在第二刻蚀步骤中，工艺腔室的压力可以是100mTorr、150mTorr和300mTorr中的任一值。上电极功率可以是500W、1000W和2000W中的任一值。
上述方案，通过控制上电极功率介于500W与2000W之间，可以控制主刻蚀气体解离出高密度的等离子体，并使等离子体的离子通量在合适范围内，以利于等离子体对第一沟槽111的内侧进行纵向刻蚀的同时，以合适的刻蚀速率进行横向刻蚀；并且，通过控制工艺腔室的压力范围介于100mTorr与300mTorr之间，可以利用高压增加高密度等离子体相互碰撞的频率，更有助于产生散射(Scattering)效应和横向刻蚀，以利于对第一沟槽111的内侧进行横向刻蚀，从而实现控制等离子体以合适的刻蚀速率对第一沟槽111的内侧同时进行纵向刻蚀和横向刻蚀，以形成斜坡状轮廓112B，实现将第一沟槽111刻蚀成第二沟槽112。
在一种实施方式中，请一并参阅图3B至图3D，第二刻蚀步骤的工艺条件还包括：氧气的流量范围为100sccm～200sccm(包括端点值)。例如，氧气的流量可以是100sccm、180sccm和200sccm中的任一值。
示例性地，在选用含碳含氟气体刻蚀第一沟槽111的内侧的过程中，如果加入少量的氧气，可以使氧气解离出的氧离子与含碳含氟气体解离出的碳离子复合，减少刻蚀过程中的碳离子比例，进而减少含碳刻蚀聚合物的生成，使得对第一沟槽111内侧的刻蚀较直，有助于形成倾斜角度β较小的斜坡状轮廓112B；如果加入大量的氧气，则生成的含碳刻蚀聚合物不足以保护第一沟槽111内侧的侧壁，会对第一沟槽111的内侧产生横向刻蚀，使得对第一沟槽111内侧的刻蚀较倾斜，有助于形成倾斜角度β较大的斜坡状轮廓112B。
上述方案，在选用含碳含氟气体刻蚀第一沟槽111内侧的过程中，通过控制氧气的流量介于100sccm与200sccm之间，可以实现通过加入大量的氧气来确保形成倾斜角度β较大的斜坡状轮廓112B。
在一种实施方式中，请一并参阅图3A至图3B，在执行第一刻蚀步骤中，包括如下至少之一：
通过控制上电极功率来调节第一沟槽111靠近掩膜层12的开口宽度W2；
通过控制下电极功率来调节第一沟槽111在待刻蚀膜层11的厚度方向上的位置。
其中，上电极功率用于控制第一刻蚀步骤中主刻蚀气体解离出的等离子体的密度，等离子体的密度越高更有利于对待刻蚀膜层11进行横向刻蚀，且上电极功率与主刻蚀气体解离出的等离子体的密度具有正相关关系。上电极功率还可以用于控制等离子体的离子通量，等离子体的离子通量大小决定等离子体的对待刻蚀膜层11的刻蚀速率。下电极功率用于对等离子体进行加速，使等离子体具有轰击能量，以穿过掩膜开口12A并运动至掩膜层12的下方。
需要说明的是，请一并参阅图1B至图1D，相关技术通常采用湿法刻蚀工艺对掩膜层12进行侧推，由于湿法刻蚀工艺的工艺控制能力较差，无法控制掩膜开口12A的开口宽度W1，而掩膜开口12A的开口宽度W1决定了斜坡11C的横向尺寸和斜坡11C的倾斜角度α的调节窗口大小，因此相关技术无法调节斜坡11C的横向尺寸和斜坡11C的倾斜角度α的调节窗口大小。相较于相关技术，请一并参阅图3A至图3D，上述方案通过控制上电极功率的大小可以调节第一刻蚀步骤的主刻蚀气体解离出高密度的等离子体，并控制高密度等离子体对待刻蚀膜层11的横向刻蚀速率，从而实现调节第一沟槽111靠近掩膜层12的开口宽度W2，而第一沟槽111靠近掩膜层12的开口宽度W2等于斜坡11C的横向尺寸，且决定了斜坡11C的倾斜角度α的调节窗口大小，因此通过调节第一沟槽111靠近掩膜层12的开口宽度W2，使得斜坡11C的横向尺寸和斜坡11C的倾斜角度α的调节窗口大小均可调。此外，通过控制下电极功率，可以调节等离子体对待刻蚀膜层11的轰击能量，有助于控制等离子体穿过掩膜开口12A并运动至掩膜层12的下方，以便在掩膜层12的下方形成第一沟槽111而不对掩膜层12的形貌产生影响。
进一步地，在执行第一刻蚀步骤中，该方法还可以包括：通过控制工艺腔室的压力，使高密度等离子体更易于对待刻蚀膜层11的顶部进行横向刻蚀。其中，工艺腔室的压力用于控制等离子体产生散射效应和横向刻蚀，以利于对待刻蚀膜层11的顶部产生横向刻蚀，并且工艺腔室的压力也会影响等离子体的密度。因此通过控制工艺腔室的压力，可使高密度等离子体更易于对待刻蚀膜层11的顶部进行横向刻蚀。
在一种实施方式中，上电极功率的范围为1000W～5000W(包括端点值)，工艺腔室的压力范围为50mTorr～200mTorr(包括端点值)，下电极功率的范围为0W～50W(包括端点值)。
示例性地，工艺腔室的压力可以是50mTorr、130mTorr和200mTorr中的任一值。上电极功率可以是1000W、4000W和5000W中的任一值。下电极功率可以是0W、20W和50W中的任一值。
上述方案，通过控制上电极功率介于1000W与5000W之间，可以实现控制主刻蚀气体解离出高密度的等离子体，并控制高密度等离子体具有合适的离子通量，以有效控制等离子体对待刻蚀膜层11的横向刻蚀速率。通过控制工艺腔室的压力介于50mTorr与200mTorr之间，可以实现在第一刻蚀步骤中利用高压增加高密度等离子体相互碰撞的频率，更有助于产生散射(Scattering)效应和横向刻蚀，以利于对待刻蚀膜层11的顶部进行横向刻蚀。通过控制下电极功率大小介于0W与50W之间，可使等离子体具有较低的轰击能量，以便等离子体穿过掩膜开口12A并运动至掩膜层12的下方，其中，将下电极功率加载于工艺腔室的下电极，可以实现向工艺腔室提供较低的偏置电压。这种高等离子体密度结合较低偏置电压的方式，可以在确保掩膜开口12A的形貌不变的情况下，采用高密度等离子体对掩膜层12下方的待刻蚀膜层11进行各向同性刻蚀，实现在掩膜层12的下方形成第一沟槽111，并使第一沟槽111靠近掩膜层12的开口宽度W2大于掩膜开口12A的开口宽度W1，并确保第一沟槽111的侧壁形貌为朝向待刻蚀膜层11的底部凹陷的光滑弧形曲面，换言之，确保第一沟槽111的轮廓为圆弧状。
在一种实施方式中，第一沟槽111靠近掩膜层12的开口宽度W2范围为4μm～10μm(包括端点值)；第一沟槽111的垂直深度范围为50nm～100nm(包括端点值)。例如，第一沟槽111靠近掩膜层12的开口宽度W2可以是4μm、5μm和10μm中的任一值。第一沟槽111的垂直深度可以是50nm、52nm、60nm、70nm、80nm、90nm和100nm中的任一值。
在一种实施方式中，第三刻蚀步骤的工艺条件包括：工艺腔室的压力范围为10mTorr～80mTorr(包括端点值)，上电极功率的功率范围为500W～2000W(包括端点值)，下电极功率的功率范围为500W～1000W(包括端点值)，含硫含氟气体的流量范围和氧气的流量范围均为10sccm～100sccm(包括端点值)。
在第三刻蚀步骤中，由于第三沟槽113的形成对等离子体的密度要求不高，因此控制工艺腔室的压力介于10mTorr与80mTorr之间，可使工艺腔室的压力较小，能减小等离子体的密度，使其与工艺需求适配。通过控制上电极功率介于500W与2000W之间，可控制等离子体具有合适的离子通量。通过控制下电极功率介于500W与1000W之间，可使等离子体具有较大的轰击能量，使得等离子体对第二沟槽112内侧的刻蚀较深且较直，以便在第二沟槽112下方形成深度较深且侧壁较直的第三沟槽113。此外，通过控制氧气的流量介于10sccm与100sccm之间，在刻蚀过程中加入少量的氧气来调节六氟化硫的比例，避免第三沟槽113的侧壁出现弯曲。
进一步地，在第三刻蚀步骤中，还可以加入氯气和溴化氢中的至少一种来增加对掩膜层12的选择比，使得待刻蚀膜层11的刻蚀速率远远快于掩膜层12的刻蚀速率，以便第三沟槽113在第二沟槽112的下方形成深沟槽。其中，掩膜层12的材料可以是氧化硅或氮化硅，待刻蚀膜层11的材料可以是硅。
下面以一个具体示例对本申请实施例形成沟槽结构的方法进行详细说明。该形成沟槽结构的方法包括依次执行的第一刻蚀步骤、第二刻蚀步骤和第三刻蚀步骤。
表1形成沟槽结构的各个步骤的主要工艺参数

请一并参阅图3A至图3B，在执行第一刻蚀步骤中，控制工艺腔室的压力介于50mTorr～200mTorr之间，上电功率介于1000W～5000W之间，下电极功率介于0W～50W之间，六氟化硫的流量为介于500sccm～2000sccm，晶圆承载装置的温度为40℃，刻蚀时间介于10s～70s之间，可以在待刻蚀膜层11的顶部形成第一沟槽111，并使第一沟槽111靠近掩膜层12的开口宽度W2大于掩膜层12的开口宽度W1，且第一沟槽111靠近掩膜层12的开口宽度W2介于4μm～10μm之间。
请一并参阅图3B至图3C，在执行第二刻蚀步骤中，控制工艺腔室的压力介于100mTorr～300mTorr之间，上电功率介于500W～2000W之间，下电极功率介于10W～60W之间，四氟化碳(CF4)和氧气(O2)的流量均介于100sccm～200sccm之间，晶圆承载装置的温度为60℃，刻蚀时间介于10s～100s之间，可以将第一沟槽111刻蚀成第二沟槽112，使第二沟槽112包括位于上部的圆弧状轮廓112A和位于下部的斜坡状轮廓112B，且圆弧状轮廓112A与斜坡状轮廓112B之间平滑连接，并使第二沟槽112的刻蚀深度H介于20nm～60nm之间。
请一并参阅图3C至图3D，在执行第三刻蚀步骤中，控制腔室的压力介于10mTorr～80mTorr之间，上电功率介于500W～2000W之间，下电极功率介于500W～1000W之间，六氟化硫(SF6)的流量介于10sccm～1000sccm之间，氧气的流量介于10sccm～100sccm之间，氦气(He)的流量为135sccm，晶圆承载装置的温度为60℃，刻蚀时间介于10s～300s之间，可以在第二沟槽112的下方形成第三沟槽113，以使第二沟槽112的圆弧状轮廓112A和斜坡状轮廓112B共同构成第三沟槽113顶部的斜坡11C。
图4所示为本申请一实施例的半导体工艺设备的结构示意图。
如图4所示，该半导体工艺设备包括至少一个工艺腔室、传输腔室和控制器，工艺腔室与传输腔室选择性地连通，控制器包括至少一个处理器和至少一个存储器，存储器中存储有计算机程序，计算机程序被处理器执行时实现上述任一种实施方式的方法。
如图4所示，该半导体工艺设备200可以包括工艺腔室20、进气组件20A、上电极组件20B和下电极组件20C、抽气组件20D和控制器(图4中未示出)。该控制器包括至少一个处理器和至少一个存储器，存储器中存储有计算机程序，计算机程序被处理器执行时实现上述任一种实施方式的形成沟槽结构的方法。
示例性地，控制器可以是上位机，也可以是下位机。其中，控制器可以通过控制进气组件20A的阀门开启，以向工艺腔室20的内部通入相应的工艺气体；控制器还可以控制进气组件20A的阀门的开合度来控制工艺气体的流量。控制器还可以通过控制抽气组件20D对工艺腔室20的内部进行抽气，例如控制抽气组件20D的阀门开度或抽气泵转速等，实现控制工艺腔室20内部的压强，排出反应副产物等。
上电极组件20B可以包括射频线圈21、上射频电源23和上匹配器25。控制器还用于控制上射频电源23通过上匹配器25向射频线圈21提供射频功率，以使射频线圈21激发工艺腔室20内部的工艺气体产生等离子体。
下电极组件20C可以包括晶圆承载装置22、下射频电源24和下匹配器26。控制器还用于控制下射频电源24通过下匹配器26向晶圆承载装置22提供射频功率，以提供射频偏压。该晶圆承载装置22例如可以是静电卡盘、机械卡盘或真空吸附卡盘。圆承载装置22用于承载晶圆100，晶圆100上设置有基板10。
本申请实施例的半导体工艺设备200可以是电感耦合等离子体(Inductive Coupled Plasma，简称ICP)设备，也可以是电容耦合等离子体(Capacitively CoupledPlasma，简称CCP)设备。本申请实施例对半导体工艺设备200的类型不作限制。
需要说明的是，由于该半导体工艺设备采用了上述所有实施例的全部技术方案，因此至少具有上述实施例的技术方案所带来的所有有益效果，在此不再一一赘述。
此外，在本申请中，除非另有明确的规定和限定，术语“相连”、“连接”、“层叠”等术语应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或成一体；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本申请中的具体含义。
以上所述仅为本申请的较佳实施例而已，并不用以限制本申请，凡在本申请的精神和原则之内，所作的任何修改、等同替换等，均应包含在本申请的保护范围之内。

Claims (10)

  1. 一种形成沟槽结构的方法，其特征在于，包括：
    提供基板；所述基板包括层叠设置的待刻蚀膜层和掩膜层，所述掩膜层设置有掩膜开口，所述掩膜开口暴露所述待刻蚀膜层的部分表面；
    执行第一刻蚀步骤，对所述待刻蚀膜层暴露出的表面进行刻蚀，以在所述待刻蚀膜层的顶部形成圆弧状的第一沟槽；所述第一沟槽的靠近所述掩膜层的开口宽度大于所述掩膜开口的开口宽度；
    执行第二刻蚀步骤，对所述第一沟槽的内侧进行刻蚀，以将所述第一沟槽刻蚀成第二沟槽，所述第二沟槽包括位于上部的圆弧状轮廓和位于下部的斜坡状轮廓；
    执行第三刻蚀步骤，对所述第二沟槽的内侧进行刻蚀，以在所述第二沟槽的下方形成第三沟槽，所述第三沟槽与所述第二沟槽相连通。
  2. 根据权利要求1所述的方法，其特征在于，所述第二沟槽的斜坡状轮廓的倾斜角度的调节窗口大小由所述第一沟槽靠近所述掩膜层的开口宽度限定。
  3. 根据权利要求1所述的方法，其特征在于，所述第一刻蚀步骤的工艺条件包括主刻蚀体为含硫含氟气体，所述第二刻蚀步骤的工艺条件包括主刻蚀气体为含碳含氟气体。
  4. 根据权利要求1所述的方法，其特征在于，在执行所述第二刻蚀步骤中，通过控制下电极功率的大小来调节所述第二沟槽的斜坡状轮廓的倾斜角度；和/或，通过控制刻蚀时间的长短来调节所述第二沟槽的斜坡状轮廓的刻蚀深度。
  5. 根据权利要求1所述的方法，其特征在于，所述第二沟槽的圆弧状轮廓和斜坡状轮廓构成所述第三沟槽顶部的斜坡，所述斜坡的倾斜角度由所述第二沟槽的刻蚀深度与所述第一沟槽靠近所述掩膜层的开口宽度之间的比例确定，所述第二沟槽的刻蚀深度范围为20nm～60nm，所述第一沟槽靠近所述掩膜层的开口宽度范围为4μm～10μm。
  6. 根据权利要求4所述的方法，其特征在于，所述第二刻蚀步骤的工艺条件还包括：上电极功率的功率范围为500W～2000W，工艺腔室的压力范围为100mTorr～300mTorr。
  7. 根据权利要求3所述的方法，其特征在于，所述第二刻蚀步骤的工艺条件还包括：氧气的流量范围为100sccm～200sccm。
  8. 根据权利要求1所述的方法，其特征在于，在执行所述第一刻蚀步骤中，包括如下至少之一：
    通过控制上电极功率来调节所述第一沟槽靠近所述掩膜层的开口宽度；
    通过控制下电极功率来调节所述第一沟槽在所述待刻蚀膜层的厚度方向上的位置。
  9. 根据权利要求8所述的方法，其特征在于，所述上电极功率的范围为1000W～5000W，工艺腔室的压力范围为50mTorr～200mTorr，所述下电极功率的范围为0W～50W。
  10. 一种半导体工艺设备，其特征在于，包括工艺腔室、进气组件、上电极组件、下电极组件和控制器，其特征在于，所述控制器包括至少一个处理器和至少一个存储器，所述存储器中存储有计算机程序，所述计算机程序被所述处理器执行时实现如权利要求1-9中任一项所述的形成沟槽结构的方法。
PCT/CN2025/097651 2024-06-06 2025-05-28 形成沟槽结构的方法及半导体工艺设备 Pending WO2025251971A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202410733347.0A CN118610085A (zh) 2024-06-06 2024-06-06 形成沟槽结构的方法及半导体工艺设备
CN202410733347.0 2024-06-06

Publications (1)

Publication Number Publication Date
WO2025251971A1 true WO2025251971A1 (zh) 2025-12-11

Family

ID=92549691

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2025/097651 Pending WO2025251971A1 (zh) 2024-06-06 2025-05-28 形成沟槽结构的方法及半导体工艺设备

Country Status (3)

Country Link
CN (1) CN118610085A (zh)
TW (1) TW202548907A (zh)
WO (1) WO2025251971A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118610085A (zh) * 2024-06-06 2024-09-06 北京北方华创微电子装备有限公司 形成沟槽结构的方法及半导体工艺设备
CN120676626A (zh) * 2025-06-26 2025-09-19 北京集成电路装备创新中心有限公司 半导体器件的刻蚀方法及半导体工艺设备

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5914280A (en) * 1996-12-23 1999-06-22 Harris Corporation Deep trench etch on bonded silicon wafer
KR20040020651A (ko) * 2002-08-31 2004-03-09 삼성전자주식회사 반도체소자의 콘택 및 이를 형성하는 방법
JP2008282911A (ja) * 2007-05-09 2008-11-20 Sharp Corp 半導体装置の製造方法
CN117995666A (zh) * 2023-12-22 2024-05-07 北京北方华创微电子装备有限公司 栅极结构和场效应晶体管的制备方法及半导体工艺设备
CN118610085A (zh) * 2024-06-06 2024-09-06 北京北方华创微电子装备有限公司 形成沟槽结构的方法及半导体工艺设备

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5914280A (en) * 1996-12-23 1999-06-22 Harris Corporation Deep trench etch on bonded silicon wafer
KR20040020651A (ko) * 2002-08-31 2004-03-09 삼성전자주식회사 반도체소자의 콘택 및 이를 형성하는 방법
JP2008282911A (ja) * 2007-05-09 2008-11-20 Sharp Corp 半導体装置の製造方法
CN117995666A (zh) * 2023-12-22 2024-05-07 北京北方华创微电子装备有限公司 栅极结构和场效应晶体管的制备方法及半导体工艺设备
CN118610085A (zh) * 2024-06-06 2024-09-06 北京北方华创微电子装备有限公司 形成沟槽结构的方法及半导体工艺设备

Also Published As

Publication number Publication date
TW202548907A (zh) 2025-12-16
CN118610085A (zh) 2024-09-06

Similar Documents

Publication Publication Date Title
WO2025251971A1 (zh) 形成沟槽结构的方法及半导体工艺设备
TWI627724B (zh) 在先進圖案化製程中用於間隔物沉積與選擇性移除的設備與方法
US20060043066A1 (en) Processes for pre-tapering silicon or silicon-germanium prior to etching shallow trenches
KR101772701B1 (ko) 플라즈마 에칭 방법, 플라즈마 에칭 장치 및 컴퓨터 기억 매체
TWI692809B (zh) 蝕刻方法
JP2004519102A (ja) 半導体構造においてタングステンまたは窒化タングステンの電極ゲートをエッチングする方法
CN116705602A (zh) 等离子体处理装置
US12494372B2 (en) Plasma etched silicon carbide
CN101090065A (zh) 尤其在闪存中用于刻蚀多晶硅上钨硅化物的方法
CN103915330A (zh) 基片刻蚀方法
US20210175082A1 (en) Method, Substrate and Apparatus
WO2025066932A1 (zh) 形成隔离槽的方法、半导体器件的制备方法及工艺设备
JP2023552977A (ja) 半導体パターニングアプリケーションのための酸化スズおよび炭化スズ材料
TW201701349A (zh) 蝕刻方法（一）
US20110171833A1 (en) Dry etching method of high-k film
CN120149165A (zh) 形成沟槽的方法及半导体工艺设备
CN112420508B (zh) 蚀刻方法及基板处理装置
CN101447426B (zh) 等离子体蚀刻方法
KR20230069818A (ko) 기판 처리 방법
TWI532095B (zh) Wafer etching method
JP3208596B2 (ja) ドライエッチング方法
CN114695107A (zh) 一种等离子体刻蚀方法
WO2025139234A1 (zh) 半导体结构的形成方法
CN104253017B (zh) 基片刻蚀方法
JP7498367B2 (ja) プラズマ処理方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 25819025

Country of ref document: EP

Kind code of ref document: A1