WO2025112987A1 - 显示面板及其制备方法 - Google Patents

显示面板及其制备方法 Download PDF

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Publication number
WO2025112987A1
WO2025112987A1 PCT/CN2024/126350 CN2024126350W WO2025112987A1 WO 2025112987 A1 WO2025112987 A1 WO 2025112987A1 CN 2024126350 W CN2024126350 W CN 2024126350W WO 2025112987 A1 WO2025112987 A1 WO 2025112987A1
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WIPO (PCT)
Prior art keywords
electrode
light
layer
emitting
auxiliary electrode
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PCT/CN2024/126350
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English (en)
French (fr)
Inventor
罗利辉
魏振业
王其云
马璐蔺
王潇
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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Publication of WO2025112987A1 publication Critical patent/WO2025112987A1/zh
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/82—Interconnections, e.g. terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60—Forming conductive regions or layers, e.g. electrodes

Definitions

  • the present invention relates to the field of display technology, and in particular to a display panel and a method for preparing the same.
  • OLED display panels have become the first choice for display devices such as mobile phones and computers due to their advantages such as fast response time, high brightness, and wide viewing angle.
  • the cathode In OLED display panels, the cathode generally uses a larger surface electrode.
  • the connection performance between the cathodes of different sub-pixels directly affects the continuity of the cathode and the display effect of the display panel.
  • the present application discloses a display panel, which includes:
  • a planarization layer located on the substrate
  • a light-emitting layer is located on the side of the planarization layer away from the substrate, and the light-emitting layer includes a plurality of light-emitting structures and a plurality of auxiliary electrodes arranged at intervals;
  • the light-emitting structure includes a first electrode located on the planarization layer, a light-emitting material layer located on the side of the first electrode away from the substrate, and a second electrode located on the side of the light-emitting material layer away from the substrate;
  • the plurality of auxiliary electrodes are located on the planarization layer and at least partially in direct contact with the planarization layer, and the auxiliary electrodes are used to connect the second electrodes of two adjacent light-emitting structures.
  • the auxiliary electrode is disposed in the same layer as the first electrode
  • the auxiliary electrode is made of the same material as the first electrode.
  • the planarization layer has two bottom cut grooves partially located below the auxiliary electrode and with openings located on opposite sides of the auxiliary electrode; the second electrodes of the two adjacent light-emitting structures connected to the auxiliary electrode have their ends respectively located in the two bottom cut grooves and are both connected to the auxiliary electrode.
  • the display panel includes a supporting top layer located on the side of the auxiliary electrode facing away from the substrate, the orthographic projection of the auxiliary electrode in the thickness direction of the display panel is located within the orthographic projection of the supporting top layer in the thickness direction of the display panel, and the auxiliary electrode, the supporting top layer and the planarization layer form two grooves located on opposite sides of the auxiliary electrode; the second electrodes of the two adjacent light-emitting structures connected to the auxiliary electrode have their ends respectively located in the two grooves and are both connected to the auxiliary electrode.
  • the display panel further comprises a pixel defining layer located on a side of the planarization layer away from the substrate; the pixel defining layer is provided with a plurality of pixel openings and a plurality of electrode connection openings, and the electrode connection openings are arranged between two adjacent pixel openings at intervals;
  • the plurality of pixel openings correspond to the plurality of light-emitting structures one by one; the first electrode is at least partially exposed from the pixel opening, and at least a portion of the light-emitting material layer is located in the pixel opening;
  • the plurality of electrode connection openings correspond one-to-one to the plurality of auxiliary electrodes; the auxiliary electrodes are located in the electrode connection openings.
  • the display panel further includes an encapsulation layer, which is located on a side of the light-emitting layer facing away from the substrate and includes an inorganic layer covering the light-emitting layer.
  • the light-emitting material layer is a single-layer light-emitting material layer, or a multi-layer light-emitting material layer composed of at least two stacked layers.
  • the present application also discloses a method for preparing a display panel, the method comprising:
  • a light-emitting layer is formed on the side of the planarization layer facing away from the substrate;
  • the light-emitting layer includes a plurality of light-emitting structures and a plurality of auxiliary electrodes arranged at intervals;
  • the light-emitting structure includes a first electrode located on the planarization layer, a light-emitting material layer located on the side of the first electrode facing away from the substrate, and a second electrode located on the side of the light-emitting material layer facing away from the substrate;
  • the plurality of auxiliary electrodes are located on the planarization layer and at least partially in direct contact with the planarization layer, and the auxiliary electrodes are used to connect the second electrodes of two adjacent light-emitting structures.
  • forming a light-emitting layer on a side of the planarization layer facing away from the substrate comprises:
  • a light emitting material layer and a second electrode are formed on a side of the first electrode facing away from the substrate.
  • the auxiliary electrode is formed synchronously with the first electrode
  • the auxiliary electrode is made of the same material as the first electrode.
  • the method includes:
  • Two undercut grooves corresponding to each auxiliary electrode are formed in the planarization layer, wherein the two undercut grooves corresponding to each auxiliary electrode have a portion located below the auxiliary electrode, and the openings of the two undercut grooves are respectively located on opposite sides of the auxiliary electrode;
  • the ends of the second electrodes of the two adjacent light-emitting structures connected to the auxiliary electrode are respectively located in the two undercut grooves and are both connected to the auxiliary electrode.
  • the method includes:
  • a supporting top layer is formed on the side of the auxiliary electrode away from the substrate; the positive projection of the auxiliary electrode in the thickness direction of the display panel is located at the thickness direction of the display panel where the supporting top layer is located.
  • the auxiliary electrode, the supporting top layer and the planarization layer form two grooves located on opposite sides of the auxiliary electrode within the orthographic projection in the direction;
  • the ends of the second electrodes of the two adjacent light-emitting structures connected to the auxiliary electrode are respectively located in the two grooves and are both connected to the auxiliary electrode.
  • the method includes:
  • the two opposite sides of the etched auxiliary electrode are etched so that the orthographic projection of the auxiliary electrode in the thickness direction of the display panel is located within the orthographic projection of the supporting top layer in the thickness direction of the display panel, and the auxiliary electrode, the supporting top layer and the planarization layer form two grooves located on the opposite sides of the auxiliary electrode.
  • the method includes:
  • a pixel defining layer is formed on the planarization layer and on the side of the first electrode and the auxiliary electrode facing away from the substrate; the pixel defining layer is provided with a plurality of pixel openings and a plurality of electrode connection openings, and the electrode connection openings are arranged between two adjacent pixel openings; wherein the plurality of pixel openings correspond one-to-one to the plurality of light-emitting structures; the first electrode is at least partially exposed from the pixel opening, and at least a portion of the light-emitting material layer is located in the pixel opening; the plurality of electrode connection openings correspond one-to-one to the plurality of auxiliary electrodes; and the auxiliary electrode is located in the electrode connection opening.
  • the method includes:
  • a pixel defining layer is formed on the planarization layer and the first electrode and the auxiliary electrode on a side away from the substrate; the pixel defining layer is provided with a plurality of pixel openings and a plurality of electrode connection openings, and the electrode connection openings are arranged between two adjacent pixel openings at intervals; wherein the plurality of pixel openings correspond to the plurality of light emitting structures one by one; the first electrode is at least partially exposed from the pixel opening; the plurality of electrode connection openings correspond to the plurality of auxiliary electrodes one by one; the auxiliary electrode is located in the electrode connection opening and exposed from the electrode connection opening;
  • Two undercut grooves corresponding to each auxiliary electrode are formed in the planarization layer, wherein the two undercut grooves corresponding to each auxiliary electrode have a portion located below the auxiliary electrode, and the openings of the two undercut grooves are respectively located on opposite sides of the auxiliary electrode;
  • the ends of the second electrodes of the two adjacent light-emitting structures connected to the auxiliary electrode are respectively located in the two undercut grooves and are both connected to the auxiliary electrode.
  • At least a portion of the plurality of light-emitting structures are first light-emitting structures having a first light-emitting color, and at least a portion are second light-emitting structures having a second light-emitting color; and forming a light-emitting material layer and a second electrode on a side of the first electrode away from the substrate comprises:
  • a region for forming a second light emitting structure forming a light emitting material layer of the second light emitting structure located on a side of the first electrode facing away from the substrate;
  • a second electrode of the second light emitting structure is formed on a side of the light emitting material layer of the second light emitting structure facing away from the substrate.
  • the method includes:
  • the method further comprises: removing the first inorganic layer;
  • the method further includes: forming a second inorganic layer on a side of the second electrode of the second light emitting structure away from the substrate, wherein the second inorganic layer is connected to the first inorganic layer.
  • the light-emitting structures have the same light-emitting color
  • forming a light-emitting material layer and a second electrode on a side of the first electrode facing away from the substrate includes:
  • a light emitting material layer and a second electrode are sequentially formed on a side of the first electrode facing away from the substrate.
  • the method includes:
  • An encapsulation layer is formed on a side of the light-emitting layer away from the substrate, wherein the encapsulation layer comprises an inorganic layer covering the light-emitting layer.
  • the auxiliary electrode and the first electrode are both located on the planarization layer, which facilitates the preparation of the auxiliary electrode and helps to reduce the impact on the first electrode while preparing the auxiliary electrode.
  • FIG1 is a partial cross-sectional view of a display panel provided in an embodiment of the present application.
  • FIG2 is a partial cross-sectional view of another display panel provided in an embodiment of the present application.
  • FIG3 is a flow chart of a method for manufacturing a display panel provided in an embodiment of the present application.
  • 4 to 14 are partial manufacturing process diagrams of a display panel provided in an embodiment of the present application.
  • 15 to 17 are partial manufacturing process diagrams of another display panel provided in an embodiment of the present application.
  • 18 to 20 are schematic diagrams of layer structures of different light-emitting structures.
  • Words such as “include” or “comprise” mean that the elements or objects appearing in front of “include” or “comprise” include the elements or objects listed after “include” or “comprise” and their equivalents, and do not exclude other elements or objects.
  • Words such as “connect” or “connected” are not limited to physical or mechanical connections, and can include electrical connections, whether direct or indirect.
  • the present application provides a display panel and a method for manufacturing the same.
  • the display panel includes a substrate, a planarization layer and a light-emitting layer.
  • the planarization layer is located on the substrate.
  • the light-emitting layer is located on the side of the planarization layer away from the substrate, and the light-emitting layer includes a plurality of light-emitting structures arranged at intervals and a plurality of auxiliary electrodes;
  • the light-emitting structure includes a first electrode located on the planarization layer, a light-emitting material layer located on the side of the first electrode away from the substrate, and a second electrode located on the side of the light-emitting material layer away from the substrate;
  • a plurality of auxiliary electrodes are located on the planarization layer and at least partially in direct contact with the planarization layer, and the auxiliary electrodes are used to connect the second electrodes of two adjacent light-emitting structures.
  • the auxiliary electrode and the first electrode are both located on the planarization layer, which facilitates the preparation of the auxiliary electrode and helps to reduce the impact on the first electrode while preparing the auxiliary electrode.
  • the auxiliary electrode is in direct contact with the planarization layer. Compared with the electrode structure formed by depositing a metal layer on the pixel defining layer and then etching it in the related art, the preparation of the auxiliary electrode will not have an adverse effect on the pixel defining layer and the first electrode due to etching the metal layer.
  • the display panel mentioned in this application may be an OLED display panel.
  • the present embodiment provides a display panel 100 .
  • the display panel 100 includes a substrate 10 , a planarization layer 58 , and a light emitting layer 20 .
  • a planarization layer 58 is located on the substrate 10 .
  • the light-emitting layer 20 is located on the side of the planarization layer 58 away from the substrate 10, and the light-emitting layer 20 includes a plurality of light-emitting structures 201 and a plurality of auxiliary electrodes 202 arranged at intervals;
  • the light-emitting structure 201 includes a first electrode 21 located on the planarization layer 58, a light-emitting material layer 22 located on the side of the first electrode 21 away from the substrate 10, and a second electrode 23 located on the side of the light-emitting material layer 22 away from the substrate 10;
  • the plurality of auxiliary electrodes 202 are located on the planarization layer 58 and at least partially in direct contact with the planarization layer 58, and the auxiliary electrodes 202 are used to connect the second electrodes 23 of two adjacent light-emitting structures 201.
  • the first electrode 21 may be an anode
  • the second electrode 23 may be a cathode.
  • the first electrode 21 may be formed of three stacked metal layers of ITO, silver, and ITO.
  • the second electrode 23 may be formed of two stacked metal layers of magnesium and silver.
  • the planarization layer 58 mentioned here may be an organic material layer.
  • the auxiliary electrode 202 is disposed in the same layer as the first electrode 21.
  • the same layer arrangement can be understood as being formed simultaneously through the same preparation process.
  • a first electrode material layer can be disposed on the planarization layer 58, and the first electrode 21 and the auxiliary electrode 202 can be formed simultaneously by etching.
  • the auxiliary electrode 202 and the first electrode 21 are disposed in the same layer, which is conducive to simplifying the preparation process of the auxiliary electrode and the first electrode, that is, simplifying the preparation process of the display panel.
  • first electrode and the auxiliary electrode may also be formed asynchronously, for example, by etching the first electrode material layer separately, or by etching different electrode material layers separately or simultaneously.
  • the auxiliary electrode 202 is made of the same material as the first electrode 21 , so that the two can be formed simultaneously.
  • the two materials may also be different.
  • the planarization layer 58 has two undercut grooves 502 and 503 partially located below the auxiliary electrode 202 and openings located on opposite sides of the auxiliary electrode 202.
  • the second electrodes 23 of two adjacent light-emitting structures 201 connected to the auxiliary electrode 202 have their ends respectively located in the two undercut grooves 502 and 503 and connected to the auxiliary electrode 202.
  • the planarization layer 58 has two undercut grooves 502 and 503 partially located below the auxiliary electrode 202 and openings located at opposite sides of the auxiliary electrode 202 in the width direction W.
  • the auxiliary electrode 202 connects the second electrodes 231 and 232 of two adjacent light emitting structures 2011 and 2012.
  • One end of the second electrode 231 of the light emitting structure 2011 is located in the undercut groove 502, and one end of the second electrode 232 of the light emitting structure 2012 is located in the undercut groove 503.
  • the display panel 200 includes a supporting top layer 60 located on the side of the auxiliary electrode 202 away from the substrate 10, the orthographic projection of the auxiliary electrode 202 in the thickness direction T of the display panel 200 is located within the orthographic projection of the supporting top layer 60 in the thickness direction T of the display panel 200, and the auxiliary electrode 202, the supporting top layer 60 and the planarization layer 58 form two grooves 601 and 602 located on opposite sides of the auxiliary electrode 202.
  • the ends of the second electrodes 233 , 234 of the two adjacent light emitting structures 2013 , 2014 connected to the auxiliary electrode 202 are respectively located in the two grooves 601 , 602 , and are both connected to the auxiliary electrode 202 .
  • the dimension of the auxiliary electrode 202 in the width direction W may be smaller than the dimension of the supporting top layer 60 in the width direction W.
  • the two opposite ends of the auxiliary electrode 202 in the width direction W, the supporting top layer 60 and the planarization layer 58 form two grooves 601 and 602 located at opposite sides of the auxiliary electrode 202 in the width direction W.
  • the end of one end of the second electrode 233 of the light emitting structure 2013 is located in the groove 601
  • the end of one end of the second electrode 234 of the light emitting structure 2014 is located in the groove 602.
  • the material of the supporting top layer 60 is an inorganic material.
  • the supporting top layer may also be made of other materials.
  • the display panel 100 further includes a pixel defining layer 40 located on the side of the planarization layer 58 away from the substrate 10 ; the pixel defining layer 40 is provided with a plurality of pixel openings 401 and a plurality of electrode connection openings 402 , and the electrode connection openings 402 are spaced between two adjacent pixel openings 401 .
  • the plurality of pixel openings 401 correspond to the plurality of light emitting structures 201 one by one.
  • the first electrode 21 is at least partially exposed from the pixel opening 401 , and at least a portion of the light emitting material layer 22 is located in the pixel opening 401 .
  • the plurality of electrode connection openings 402 correspond to the plurality of auxiliary electrodes 202 one by one.
  • the auxiliary electrodes 202 are located in the electrode connection openings 402 .
  • the encapsulation layer 30 may further include an organic layer 32 located on a side of the inorganic layer 31 facing away from the substrate 10 , and another inorganic layer 33 located on a side of the organic layer 32 facing away from the substrate.
  • the display panel 100 may include a pixel driving circuit layer 50 between a substrate 10 and a light emitting layer 20.
  • the pixel driving circuit layer 50 includes a pixel driving circuit for driving a light emitting structure 201.
  • the pixel circuit includes a thin film transistor 501.
  • the thin film transistor 501 includes an active layer 51, a gate electrode 52 located on a side of the active layer 51 away from the substrate 10, a first electrode 53 and a second electrode 54.
  • One of the first electrode 53 and the second electrode 54 is a source electrode, and the other is a drain electrode.
  • the pixel driving circuit may also include a capacitor (not shown).
  • the pixel driving circuit layer further includes a gate insulating layer 55, an interlayer dielectric layer 56, an interlayer dielectric layer 57 and a planarization layer 58.
  • the gate insulating layer 55 is located between the active layer 51 and the gate electrode 52.
  • the interlayer dielectric layer 56 is located on the side of the gate electrode 52 away from the substrate 10, and the first electrode 53 and the second electrode 54 are electrically connected to the active layer 51 through a through hole penetrating the gate insulating layer 55 and the interlayer dielectric layer 56 and the interlayer dielectric layer 57.
  • the planarization layer 58 is located on the side of the first electrode 53 and the second electrode 54 away from the substrate 10, covering the exposed interlayer dielectric layer 57.
  • planarization layer 58 here can be the top layer of the pixel driving circuit layer 50.
  • the planarization layer can also be another planarization layer of the pixel driving circuit layer 50 away from the substrate 10.
  • the light emitting material layer 22 mentioned in the present application may be a single-layer light emitting material layer.
  • the layer structure of the light emitting structure 201 may include an anode layer AE1 (corresponding to the first electrode 21), a hole transport layer HTL1, a light emitting material layer EML1, an electron transport layer ETL1 and a cathode layer CE (corresponding to the second electrode 23).
  • the light emitting material layer 22 may also be a multi-layer light emitting material layer composed of at least two stacked layers.
  • the layer structure of the light emitting structure 201 may include an anode layer AE1 (corresponding to the first electrode 21), a hole transport layer HTL1, a light emitting material layer EML11, a bonding layer CGL1, a light emitting material layer EML12, an electron transport layer ETL1 and a cathode layer CE (corresponding to the second electrode 23).
  • the layer structure of the light-emitting structure 201 may include an anode layer AE1 (corresponding to the first electrode 21), a hole transport layer HTL1, a light-emitting material layer EML11, a bonding layer CGL11, a light-emitting material layer EML12, a bonding layer CGL12, a light-emitting material layer EML13, an electron transport layer ETL1 and a cathode layer CE (corresponding to the second electrode 23).
  • the present application further provides a method for manufacturing a display panel, wherein the method comprises the following steps S101 to S105:
  • step S101 a substrate 10 is provided.
  • step S103 a planarization layer 58 is formed on the substrate 10 .
  • a light-emitting layer 20 is formed on the side of the planarization layer 58 away from the substrate 10; the light-emitting layer 20 includes a plurality of light-emitting structures 201 and a plurality of auxiliary electrodes 202 arranged at intervals; the light-emitting structure 201 includes a first electrode 21 located on the planarization layer 58, a light-emitting material layer 22 located on the side of the first electrode 21 away from the substrate 10, and a second electrode 23 located on the side of the light-emitting material layer 22 away from the substrate 10; the plurality of auxiliary electrodes 202 are located on the planarization layer 58 and at least partially in direct contact with the planarization layer 58, and the auxiliary electrodes 202 are used to connect the second electrodes 23 of two adjacent light-emitting structures 201.
  • step S101 a substrate 10 is provided.
  • the substrate 10 may be a silicon-based substrate.
  • a planarization layer 58 is formed on the substrate 10 .
  • an intermediate structure 1001 as shown in FIG5 may be formed.
  • the intermediate structure 1001 may have a driving circuit layer 50.
  • the planarization layer 58 may be the top layer of the driving circuit layer 50.
  • the driving circuit layer 50 may be formed on the provided substrate 10.
  • the top layer of the driving circuit layer 50 is the formed planarization layer 58.
  • the planarization layer may also be an independent film layer located on the side of the driving circuit layer away from the substrate. Accordingly, the step of forming the planarization layer may be formed after forming the driving circuit layer.
  • step S105 may include the following steps S1051 to S1053:
  • a first electrode material layer and an auxiliary electrode material layer are formed on a side of the planarization layer 58 facing away from the substrate 10 .
  • an intermediate structure 1002 as shown in FIG6 may be formed.
  • the auxiliary electrode material layer and the first electrode material layer may be the same material layer, for example, both are the first electrode material layer 210 .
  • the two may also be different material layers.
  • a through hole connected to the thin film transistor in the driving circuit layer may be provided in the planarization layer 58.
  • a conductive structure may be formed in the through hole.
  • step S1052 the first electrode material layer and the auxiliary electrode material layer are etched to form the first electrode 21 and the auxiliary electrode 202 .
  • step S1052 the intermediate structure 1003 as shown in FIG. 7 may be formed.
  • the first electrode 21 and the auxiliary electrode 202 can be formed by photolithography on the first electrode material layer 210 using the same mask.
  • step S1053 a light emitting material layer 22 and a second electrode 23 are formed on a side of the first electrode 21 away from the substrate 10 .
  • the auxiliary electrode 202 is formed synchronously with the first electrode 21 ;
  • the auxiliary electrode 202 is made of the same material as the first electrode 21 .
  • step S10531 As shown in FIG. 8 , after forming the first electrode and the auxiliary electrode in step S1052, the method includes step S10531:
  • step S10531 two undercut grooves corresponding to each auxiliary electrode 202 are formed in the planarization layer 58, and the two undercut grooves corresponding to each auxiliary electrode 202 both have a portion located below the auxiliary electrode 202, and the openings of the two undercut grooves are respectively located on opposite sides of the auxiliary electrode 202.
  • an intermediate structure 1004 as shown in FIG8 can be formed.
  • the planarization layer 58 has two undercut grooves 502 and 503 partially located below the auxiliary electrode 202 and openings located at opposite sides of the auxiliary electrode 202 in the width direction W.
  • the second electrodes 23 of the two adjacent light-emitting structures 201 connected to the auxiliary electrode 202 have their ends respectively located in the two bottom cut grooves and are both connected to the auxiliary electrode 202.
  • step S10532 As shown in FIG. 9 , after forming the first electrode and the auxiliary electrode in step S1052, specifically after step S10531, the method further includes step S10532:
  • a pixel defining layer 40 is formed on the side of the planarization layer 58 and the first electrode 21 and the auxiliary electrode 202 away from the substrate 10; the pixel defining layer 40 is provided with a plurality of pixel openings 401 and a plurality of electrode connection openings 402, and the electrode connection openings 402 are arranged between two adjacent pixel openings 401; wherein the plurality of pixel openings 401 correspond to the plurality of light emitting structures 201 one by one; the first electrode 21 is at least partially exposed from the pixel opening 401, and at least a portion of the light emitting material layer 22 is located in the pixel opening 401; the plurality of electrode connection openings 402 correspond to the plurality of auxiliary electrodes 202 one by one; and the auxiliary electrode 202 is located in the electrode connection opening 402.
  • the intermediate structure 1005 shown in FIG. 9 may be shown.
  • At least a portion of the plurality of light-emitting structures 201 are first light-emitting structures having a first light-emitting color, such as the light-emitting structure 2011 shown in FIG. 1
  • at least a portion of the plurality of light-emitting structures 201 are second light-emitting structures having a second light-emitting color, such as the light-emitting structure 2012 shown in FIG. 1 .
  • Part of the first light emitting structure and the second light emitting structure are arranged adjacent to each other.
  • step S10532 the method includes the following steps S10533 to S10537:
  • a light-emitting material layer 22 of a first light-emitting structure is formed on a side of the first electrode 21 facing away from the substrate 10 .
  • a second electrode 23 of the first light emitting structure is formed on a side of the light emitting material layer 22 of the first light emitting structure that is away from the substrate 10 .
  • step S10533 and step S10534 an intermediate structure 1006 as shown in FIG. 10 may be formed.
  • the light-emitting material layer 22 and the second electrode 23 of the first light-emitting structure can be formed by forming the material layers corresponding to the light-emitting material layer and the second electrode in the entire area of the display panel, and the light-emitting material layer and the second electrode in the entire area are formed by etching respectively.
  • step S10535 the light-emitting material of the first light-emitting structure and the second electrode 23 of the first light-emitting structure in the region for forming the second light-emitting structure are removed.
  • PR glue or other protective layers may be applied above the region where the first light-emitting structure is located to protect the various structures within the region of the first light-emitting structure, such as the intermediate structure 1007 shown in FIG11 .
  • an intermediate structure 1008 as shown in FIG12 can be formed.
  • the light emitting material layer and the second electrode in the region for forming the second light emitting structure are removed, and the light emitting material layer and the second electrode in the undercut groove 502 below the auxiliary electrode 202 are also removed.
  • step S10536 in the region for forming the second light emitting structure 201 , a light emitting material layer 22 of the second light emitting structure 201 located on the side of the first electrode 21 away from the substrate 10 is formed;
  • step S10537 in the region for forming the light emitting structure 201 , a second electrode 23 of the second light emitting structure 201 is formed on a side of the light emitting material layer 22 of the second light emitting structure 201 away from the substrate 10 .
  • an intermediate structure 1009 as shown in FIG. 13 may be formed, in which the second electrodes of the first light-emitting structure and the second light-emitting structure located on opposite sides of the auxiliary electrode 202 in the width direction W are connected through the auxiliary electrode 202.
  • the light-emitting material layers of the first light-emitting structure and the second light-emitting structure are different.
  • Step S10536 and step S10537 are similar to the above-mentioned step S10533 and step S10534.
  • a portion of the plurality of light-emitting structures may also be a third light-emitting structure having a third light-emitting color. Accordingly, in step S10535, the light-emitting material of the first light-emitting structure in the region for forming the third light-emitting structure and the second electrode 23 of the first light-emitting structure may be removed accordingly.
  • steps S10536 and S10537 a second light-emitting structure is formed in the region for forming the third light-emitting structure. Accordingly, similar steps from step S10535 to step S10537 may be repeated to form a third light-emitting structure in the region for forming the third light-emitting structure.
  • the first luminous color, the second luminous color, and the third luminous color can be one of red, green, and blue respectively.
  • each light emitting structure of the display panel may also have only two types of light emitting structures, one with a first light emitting color and one with a second light emitting color.
  • the first light emitting color and the second light emitting color may be any two of red, blue and green.
  • each light emitting structure may also have the same light emitting color. Accordingly, after step S1052, especially after step S10532, the method includes the following step S1530:
  • step S1530 a light emitting material layer and a second electrode are sequentially formed on a side of the first electrode facing away from the substrate.
  • the step S1530 may be similar to the step S10533 and the step S10534.
  • the subsequent film layers or structures may be directly disposed.
  • the method includes the following step S10538:
  • Step S10538 forming a first inorganic layer, such as the inorganic layer 311 shown in FIG. 10 , on the side of the second electrode 23 of the first light emitting structure 201 facing away from the substrate 10 .
  • the method further includes: removing the first inorganic layer 311, as shown in FIG12.
  • the step of removing the first inorganic layer 311 may be performed simultaneously with step S10535 or before step S10535.
  • the method further includes the following step S10539:
  • a second inorganic layer 312 is formed on the side of the second electrode 23 of the second light emitting structure 201 away from the substrate 10 , and the second inorganic layer 312 is connected to the first inorganic layer 311 to form a continuous inorganic layer 31 , as shown in FIG. 13 .
  • an encapsulation layer 30 can be directly formed on the side of the light-emitting layer 20 away from the substrate 10 , and the encapsulation layer 30 includes an inorganic layer covering the light-emitting layer 20 .
  • step S10531 and step S10532 may be interchanged, that is, after step S1052, the pixel defining layer is formed first, and then the undercut grooves 502 and 503 are formed.
  • the method includes:
  • Step S10531' forming a pixel defining layer on the planarization layer and the first electrode and the auxiliary electrode on the side away from the substrate;
  • the pixel defining layer is provided with a plurality of pixel openings and a plurality of electrode connection openings, and the electrode connection openings are arranged between two adjacent pixel openings; wherein the plurality of pixel openings correspond to the plurality of light-emitting structures one by one; the first electrode is at least partially exposed from the pixel opening; the plurality of electrode connection openings correspond to the plurality of auxiliary electrodes one by one; the auxiliary electrode is located in the electrode connection opening and exposed from the electrode connection opening;
  • Step S10532' forming two undercuts corresponding to each auxiliary electrode in the planarization layer Grooves, two undercut grooves corresponding to each auxiliary electrode, both having a portion located below the auxiliary electrode, and openings of the two undercut grooves are located at opposite sides of the auxiliary electrode;
  • the ends of the second electrodes of the two adjacent light-emitting structures connected to the auxiliary electrode are respectively located in the two undercut grooves and are both connected to the auxiliary electrode.
  • step S10532' step S10533 and other subsequent steps can be entered, and the details can still refer to the corresponding steps described above.
  • the undercut groove may not be provided in the planarization layer 58 , and a groove may be formed on the side of the planarization layer 58 facing away from the substrate 10 .
  • step S1054 after the auxiliary electrode 202 is formed in step S1052 , the method includes the following step S1054 :
  • a supporting top layer 60 is formed on the side of the auxiliary electrode 202 facing away from the substrate 10; the orthographic projection of the auxiliary electrode 202 in the thickness direction T of the display panel is located within the orthographic projection of the supporting top layer 60 in the thickness direction T of the display panel, and the auxiliary electrode 202, the supporting top layer 60 and the planarization layer 58 form two grooves 601 and 602 located on opposite sides of the auxiliary electrode 202.
  • the ends of the second electrodes 23 of the two adjacent light-emitting structures 201 connected to the auxiliary electrode 202 are respectively located in the two grooves and are both connected to the auxiliary electrode 202 .
  • step S1054 may specifically include steps S10541 to S10543:
  • a top material layer 600 is formed on the side of the planarization layer 58 , the first electrode 21 and the auxiliary electrode 202 facing away from the substrate 10 , thereby forming an intermediate structure 2001 as shown in FIG. 15 .
  • step S10542 the top material layer located outside the auxiliary electrode 202 is etched to form a supporting top layer 60 , thereby forming an intermediate structure 2002 as shown in FIG. 16 .
  • step S10543 the two opposite sides of the etched auxiliary electrode 202 are etched so that the orthographic projection of the auxiliary electrode 202 in the thickness direction T of the display panel is located within the orthographic projection of the supporting top layer 60 in the thickness direction T of the display panel, and the auxiliary electrode 202, the supporting top layer 60 and the planarization layer 58 form two grooves 601 and 602 located on the opposite sides of the auxiliary electrode 202, forming an intermediate structure 2003 as shown in FIG. 17 .

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Abstract

本申请公开了一种显示面板及其制备方法。所述显示面板包括衬底、平坦化层以及发光层。平坦化层位于所述衬底之上。发光层位于所述平坦化层背离所述衬底一侧，所述发光层包括多个间隔排布的发光结构及多个辅助电极；所述发光结构包括位于所述平坦化层之上的第一电极，位于所述第一电极背离所述衬底一侧的发光材料层，以及位于所述发光材料层背离所述衬底一侧的第二电极；多个所述辅助电极，位于所述平坦化层之上，且至少部分与所述平坦化层直接接触，所述辅助电极用于连接相邻两个发光结构的第二电极。上述显示面板，辅助电极与第一电极均位于平坦化层之上，便于辅助电极的制备，并且有利于在制备辅助电极的同时，减小对第一电极的影响。

Description

显示面板及其制备方法 技术领域
本发明涉及显示技术领域，尤其涉及一种显示面板及其制备方法。
背景技术
随着科技的快速发展，OLED显示面板由于其响应时间快、高亮度、广视角等优点，已经成为手机、电脑等显示设备的面板首选。OLED显示面板中，阴极一般采用面积较大的面电极。不同子像素的阴极之间的连接性能，直接影响阴极的连续性及显示面板的显示效果。
发明内容
本申请公开了一种显示面板，其包括：
衬底；
平坦化层，位于所述衬底之上；
发光层，位于所述平坦化层背离所述衬底一侧，所述发光层包括多个间隔排布的发光结构及多个辅助电极；所述发光结构包括位于所述平坦化层之上的第一电极，位于所述第一电极背离所述衬底一侧的发光材料层，以及位于所述发光材料层背离所述衬底一侧的第二电极；多个所述辅助电极，位于所述平坦化层之上，且至少部分与所述平坦化层直接接触，所述辅助电极用于连接相邻两个发光结构的第二电极。
在一些实施例中，所述辅助电极与所述第一电极同层设置；
所述辅助电极与所述第一电极材料相同。
在一些实施例中，所述平坦化层具有部分位于所述辅助电极下方，并且开口位于所述辅助电极相对两侧的两个底切槽；所述辅助电极所连接的相邻两个发光结构的第二电极，二者的端部分别位于所述两个底切槽中，并均与所述辅助电极连接。
在一些实施例中，所述显示面板包括位于所述辅助电极背离所述衬底一侧的支撑顶层，所述辅助电极在所述显示面板厚度方向上的正投影，位于所述支撑顶层在所述显示面板厚度方向上的正投影之内，所述辅助电极与所述支撑顶层以及所述平坦化层围成位于所述辅助电极相对两侧的两个开槽；所述辅助电极所连接的相邻两个发光结构的第二电极，二者的端部分别位于所述两个开槽中，并均与所述辅助电极连接。
在一些实施例中，所述显示面板还包括位于所述平坦化层背离所述衬底一侧的像素限定层；所述像素限定层设有多个像素开口和多个电极连接开口，所述电极连接开口间隔设于相邻两个像素开口之间；
多个所述像素开口与多个所述发光结构一一对应；所述第一电极至少部分自所述像素开口暴露，所述发光材料层的至少部分位于所述像素开口内；
多个所述电极连接开口与多个所述辅助电极一一对应；所述辅助电极位于所述电极连接开口内。
在一些实施例中，所述显示面板还包括封装层，所述封装层位于所述发光层背离所述衬底的一侧，且包括覆盖所述发光层的无机层。
在一些实施例中，所述发光材料层为单层发光材料层，或至少两层叠设的多层发光材料层。
本申请还公开了一种显示面板的制备方法，所述方法包括：
提供衬底；
在所述衬底之上形成平坦化层；
在所述平坦化层背离所述衬底的一侧形成发光层；所述发光层包括多个间隔排布的发光结构及多个辅助电极；所述发光结构包括位于所述平坦化层之上的第一电极，位于所述第一电极背离所述衬底一侧的发光材料层，以及位于所述发光材料层背离所述衬底一侧的第二电极；多个所述辅助电极，位于所述平坦化层之上，且至少部分与所述平坦化层直接接触，所述辅助电极用于连接相邻两个发光结构的第二电极。
在一些实施例中，所述在所述平坦化层背离所述衬底的一侧形成发光层包括：
在所述平坦化层背离所述衬底的一侧形成第一电极材料层以及辅助电极材料层；
对所述第一电极材料层以及辅助电极材料层进行刻蚀，形成所述第一电极及所述辅助电极；
在所述第一电极背离所述衬底的一侧形成发光材料层以及第二电极。
在一些实施例中，所述辅助电极与所述第一电极同步形成；
所述辅助电极与所述第一电极材料相同。
在一些实施例中，在形成所述第一电极及所述辅助电极之后，所述方法包括：
在所述平坦化层形成与每一个辅助电极对应的两个底切槽，每一辅助电极所对应的两个底切槽，均具有部分位于所述辅助电极下方，并且所述两个底切槽的开口分别位于所述辅助电极相对两侧；
在形成所述发光层之后，所述辅助电极所连接的相邻两个发光结构的第二电极，二者的端部分别位于所述两个底切槽中，并均与所述辅助电极连接。
在一些实施例中，在形成所述辅助电极之后，所述方法包括：
在所述辅助电极背离所述衬底的一侧形成支撑顶层；所述辅助电极在所述显示面板厚度方向上的正投影，位于所述支撑顶层在所述显示面板厚度 方向上的正投影之内，所述辅助电极与所述支撑顶层以及所述平坦化层围成位于所述辅助电极相对两侧的两个开槽；
在形成所述发光层之后，所述辅助电极所连接的相邻两个发光结构的第二电极，二者的端部分别位于所述两个开槽中，并均与所述辅助电极连接。
在一些实施例中，在形成所述辅助电极之后包括：
在所述平坦化层、第一电极及辅助电极背离所述衬底的一侧形成顶层材料层；
刻蚀位于所述辅助电极以外区域的顶层材料层，形成支撑顶层；
对所述刻蚀辅助电极的相对两侧进行刻蚀，使得所述辅助电极在所述显示面板厚度方向上的正投影，位于所述支撑顶层在所述显示面板厚度方向上的正投影之内，所述辅助电极与所述支撑顶层以及所述平坦化层围成位于所述辅助电极相对两侧的两个开槽。
在一些实施例中，在形成所述第一电极及所述辅助电极之后，所述方法包括：
在所述平坦化层以及所述第一电极和所述辅助电极背离所述衬底的一侧形成像素限定层；所述像素限定层设有多个像素开口和多个电极连接开口，所述电极连接开口间隔设于相邻两个像素开口之间；其中，多个所述像素开口与多个所述发光结构一一对应；所述第一电极至少部分自所述像素开口暴露，所述发光材料层的至少部分位于所述像素开口内；多个所述电极连接开口与多个所述辅助电极一一对应；所述辅助电极位于所述电极连接开口内。
在一些实施例中，在形成所述第一电极及所述辅助电极之后，所述方法包括：
在所述平坦化层以及所述第一电极和所述辅助电极背离所述衬底的一侧形成像素限定层；所述像素限定层设有多个像素开口和多个电极连接开口，所述电极连接开口间隔设于相邻两个像素开口之间；其中，多个所述像素开口与多个所述发光结构一一对应；所述第一电极至少部分自所述像素开口暴露；多个所述电极连接开口与多个所述辅助电极一一对应；所述辅助电极位于所述电极连接开口内，并自所述电极连接开口暴露；
在所述平坦化层形成与每一个辅助电极对应的两个底切槽，每一辅助电极所对应的两个底切槽，均具有部分位于所述辅助电极下方，并且所述两个底切槽的开口分别位于所述辅助电极相对两侧；
在形成所述发光层之后，所述辅助电极所连接的相邻两个发光结构的第二电极，二者的端部分别位于所述两个底切槽中，并均与所述辅助电极连接。
在一些实施例中，多个所述发光结构中至少一部分为具有第一发光颜色的第一发光结构，至少一部分为具有第二发光颜色的第二发光结构；所述在所述第一电极背离所述衬底的一侧形成发光材料层以及第二电极包括：
在所述第一电极背离所述衬底的一侧形成第一发光结构的发光材料层；
在所述第一发光结构的发光材料层背离所述衬底的一侧形成第一发光结构的第二电极；
去除用于形成第二发光结构的区域中的第一发光结构的发光材料及第一发光结构的第二电极；
在用于形成第二发光结构的区域中，形成位于所述第一电极背离所述衬底一侧的第二发光结构的发光材料层；
在用于形成发光结构的区域中，形成位于所述第二发光结构的发光材料层背离所述衬底的一侧形成第二发光结构的第二电极。
在一些实施例中，在形成第一发光结构的第二电极之后，所述方法包括：
在所述第一发光结构的第二电极背离所述衬底的一侧形成第一无机层；
在用于形成第二发光结构的区域中，形成位于所述第一电极背离所述衬底一侧的第二发光结构的发光材料层之前，所述方法还包括：去除所述第一无机层；
在形成第二发光结构的第二电极之后，所述方法还包括：在所述第二发光结构的第二电极背离所述衬底的一侧形成第二无机层，所述第二无机层与所述第一无机层连接。
在一些实施例中，各发光结构的发光颜色相同，所述在所述第一电极背离所述衬底的一侧形成发光材料层以及第二电极包括：
在第一电极背离所述衬底的一侧依序形成发光材料层以及第二电极。
在一些实施例中，在所述平坦化层背离所述衬底的一侧形成发光层之后，所述方法包括：
在所述发光层背离所述衬底的一侧形成封装层，所述封装层包括包覆所述发光层的无机层。
与相关技术相比，本申请的显示面板及其制备方法，辅助电极与第一电极均位于平坦化层之上，便于辅助电极的制备，并且有利于在制备辅助电极的同时，减小对第一电极的影响。
应当理解的是，以上的一般描述和后文的细节描述仅是示例性和解释性的，并不能限制本说明书。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分，示出了符合本说明书的实施例，并与说明书一起用于解释本说明书的原理。
图1为本申请实施例提供的一种显示面板的部分剖视图；
图2为本申请实施例提供的另一种显示面板的部分剖视图；
图3为本申请实施例提供的一种显示面板的制备方法流程图；
图4至图14为本申请实施例提供的一种显示面板的部分制备工艺图；
图15至图17为本申请实施例提供的另一种显示面板的部分制备工艺图；
图18至图20为不同发光结构的层结构示意图。
具体实施方式
这里将详细地对示例性实施例进行说明，其示例表示在附图中。下面的描述涉及附图时，除非另有表示，不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本说明书相一致的所有实施方式。相反，它们仅是与如所附权利要求书中所详述的、本说明书的一些方面相一致的装置和方法的例子。
在本申请使用的术语是仅仅出于描述特定实施例的目的，而非旨在限制本公开。除非另作定义，本说明书使用的技术术语或者科学术语应当为本申请所属领域内设有一般技能的人士所理解的通常意义。本说明书以及权利要求书中使用的“第一”“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”或者“一”等类似词语也不表示数量限制，而是表示存在个。“多个”或者“若干”表示两个及两个以上。除非另行指出，“前部”、“后部”、“下部”和/或“上部”等类似词语只是为了便于说明，而并非限于一个位置或者一种空间定向。“包括”或者“包含”等类似词语意指出现在“包括”或者“包含”前面的元件或者物件涵盖出现在“包括”或者“包含”后面列举的元件或者物件及其等同，并不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而且可以包括电性的连接，不管是直接的还是间接的。
在本说明书使用的术语是仅仅出于描述特定实施例的目的，而非旨在限制本公开。在本说明书和所附权利要求书中所使用的单数形式的“一种”、“所述”和“该”也旨在包括多数形式，除非上下文清楚地表示其他含义。还应当理解，本文中使用的术语“和/或”是指并包含一个或多个相关联的列出项目的任何或所有可能组合。
本申请提供一种显示面板及其制备方法。所述显示面板包括衬底、平坦化层以及发光层。平坦化层位于所述衬底之上。发光层位于所述平坦化层背离所述衬底一侧，所述发光层包括多个间隔排布的发光结构及多个辅助电极；所述发光结构包括位于所述平坦化层之上的第一电极，位于所述第一电极背离所述衬底一侧的发光材料层，以及位于所述发光材料层背离所述衬底一侧的第二电极；多个所述辅助电极，位于所述平坦化层之上，且至少部分与所述平坦化层直接接触，所述辅助电极用于连接相邻两个发光结构的第二电极。上述显示面板，辅助电极与第一电极均位于平坦化层之上，便于辅助电极的制备，并且有利于在制备辅助电极的同时，减小对第一电极的影响。该辅助电极与平坦化层直接接触，相对于相关技术中在像素限定层之上沉积金属层再刻蚀形成的电极结构而言，该辅助电极的制备不会由于刻蚀金属层而对像素限定层及第一电极等带来不利影响。
本申请所说的显示面板可以是OLED显示面板。
下面结合附图1至图20，对本申请所提供的显示面板及其制备方法的一些实施例作详细说明。
首先，请参照图1，并在必要时结合图2及图18至图20所示，本申请实施例提供了一种显示面板100。该显示面板100包括衬底10、平坦化层58以及发光层20。
平坦化层58位于所述衬底10之上。
发光层20位于所述平坦化层58背离所述衬底10一侧，所述发光层20包括多个间隔排布的发光结构201及多个辅助电极202；所述发光结构201包括位于所述平坦化层58之上的第一电极21，位于所述第一电极21背离所述衬底10一侧的发光材料层22，以及位于所述发光材料层22背离所述衬底10一侧的第二电极23；多个所述辅助电极202，位于所述平坦化层58之上，且至少部分与所述平坦化层58直接接触，所述辅助电极202用于连接相邻两个发光结构201的第二电极23。
这里第一电极21可以是阳极，第二电极23对应是阴极。第一电极21可以是层叠的ITO、银、ITO三层金属层形成。第二电极23可以是由镁、银两层层叠的金属层形成。
这里所说的平坦化层58可以是有机材料层。
在一些实施例中，所述辅助电极202与所述第一电极21同层设置。该同层设置可以理解为通过同一制备工艺同步形成。比如，可在平坦化层58之上设置第一电极材料层，通过刻蚀同时形成第一电极21及辅助电极202。所述辅助电极202与所述第一电极21二者同层设置，有利于简化辅助电极和第一电极的制备工艺，即简化显示面板的制备工艺。
当然，第一电极和辅助电极二者也可不同步形成，比如可通过对第一电极材料层分别刻蚀形成。或者通过不同电极材料层分别刻蚀或者同时刻蚀形成。
在一些实施例中，所述辅助电极202与所述第一电极21材料相同，使得二者可以同步形成。
可以理解的是，在其它一些实施例中，二者材料也可不同。
在一些实施例中，所述平坦化层58具有部分位于所述辅助电极202下方，并且开口位于所述辅助电极202相对两侧的两个底切槽502、503。所述辅助电极202所连接的相邻两个发光结构201的第二电极23。二者的端部分别位于所述两个底切槽502、503中，并均与所述辅助电极202连接。
比如图1所示，所述平坦化层58具有部分位于所述辅助电极202下方，并且开口位于所述辅助电极202在宽度方向W上相对两侧的两个底切槽502、503。所述辅助电极202连接相邻两个发光结构2011、2012的第二电极231、232。发光结构2011的第二电极231有一端端部位于底切槽502中，发光结构2012的第二电极232有一端端部位于底切槽503中。
请结合图2所示，在另一些实施例中，所述显示面板200包括位于所述辅助电极202背离所述衬底10一侧的支撑顶层60，所述辅助电极202在所述显示面板200厚度方向T上的正投影，位于所述支撑顶层60在所述显示面板200厚度方向T上的正投影之内，所述辅助电极202与所述支撑顶层60以及所述平坦化层58围成位于所述辅助电极202相对两侧的两个开槽601、602。 所述辅助电极202所连接的相邻两个发光结构2013、2014的第二电极233、234，二者的端部分别位于所述两个开槽601、602中，并均与所述辅助电极202连接。
具体地，如图2中，辅助电极202具体可在宽度方向W上的尺寸小于支撑顶层60在该宽度方向W上的尺寸，所述辅助电极202在宽度方向W上的相对两端，与所述支撑顶层60以及所述平坦化层58围成位于所述辅助电极202在宽度方向W上相对两侧的两个开槽601、602。发光结构2013的第二电极233一端的端部位于开槽601中，发光结构2014的第二电极234一端的端部位于开槽602中。
在一些实施例中，所述支撑顶层60的材料为无机材料。
当然，在其它一些实施例中，支撑顶层还可以是其它材料。
在一些实施例中，所述显示面板100还包括位于所述平坦化层58背离所述衬底10一侧的像素限定层40；所述像素限定层40设有多个像素开口401和多个电极连接开口402，所述电极连接开口402间隔设于相邻两个像素开口401之间。
多个所述像素开口401与多个所述发光结构201一一对应。所述第一电极21至少部分自所述像素开口401暴露，所述发光材料层22的至少部分位于所述像素开口401内。
多个所述电极连接开口402与多个所述辅助电极202一一对应。所述辅助电极202位于所述电极连接开口402内。
在一些实施例中，所述显示面板100还包括封装层30，所述封装层30位于所述发光层20背离所述衬底10的一侧，且包括覆盖所述发光层20的无机层31。
如图1所示，封装层30还可包括位于无机层31背离衬底10一侧的有机层32，以及位于有机层32背离衬底一侧的另一无机层33。
如图1所示，显示面板100可包括衬底10与发光层20之间的像素驱动电路层50。像素驱动电路层50包括用于驱动发光结构201的像素驱动电路。像素电路包括薄膜晶体管501。薄膜晶体管501包括有源层51、位于有源层51背离衬底10一侧的栅电极52、第一极53和第二极54。第一极53和第二极54中的一个为源电极，另一个为漏电极。像素驱动电路还可包括电容(未图示)。
像素驱动电路层还包括栅极绝缘层55、层间介质层56和层间介质层57及平坦化层58。栅极绝缘层55位于有源层51与栅电极52之间。层间介质层56位于栅电极52背离衬底10的一侧，第一极53与第二极54通过穿透栅极绝缘层55与层间介质层56、层间介质层57的通孔与有源层51电连接。平坦化层58位于第一极53及第二极54背离衬底10的一侧，覆盖露出的层间介质层57。
可以理解的是，这里平坦化层58可以为像素驱动电路层50的顶层。当然，在其它一些实施例中，平坦化层还可以为像素驱动电路层50背离衬底10的另一平坦化层。
请结合图18至图20所示，本申请所说的发光材料层22可以为单层发光材料层。比如图18所示，发光结构201的层结构可以包括阳极层AE1(即对应第一电极21)、空穴传输层HTL1、发光材料层EML1、电子传输层ETL1及阴极层CE(即对应第二电极23)。
当然，发光材料层22也可为至少两层叠设的多层发光材料层。
比如，图19所示的两层层叠的发光材料层。图19所示，发光结构201的层结构可以包括阳极层AE1(即对应第一电极21)、空穴传输层HTL1、发光材料层EML11、粘结层CGL1、发光材料层EML12、电子传输层ETL1及阴极层CE(即对应第二电极23)。
再比如，图20所示的三层层叠的发光材料层。图20所示，发光结构201的层结构可以包括阳极层AE1(即对应第一电极21)、空穴传输层HTL1、发光材料层EML11、粘结层CGL11、发光材料层EML12、粘结层CGL12、发光材料层EML13、电子传输层ETL1及阴极层CE(即对应第二电极23)。
请参照图3，并在必要时结合图4至图20所示，本申请另提供一种显示面板的制备方法，其所述方法包括如下步骤S101至步骤S105：
在步骤S101中，提供衬底10。
在步骤S103中，在所述衬底10之上形成平坦化层58。
在步骤S105中，在所述平坦化层58背离所述衬底10的一侧形成发光层20；所述发光层20包括多个间隔排布的发光结构201及多个辅助电极202；所述发光结构201包括位于所述平坦化层58之上的第一电极21，位于所述第一电极21背离所述衬底10一侧的发光材料层22，以及位于所述发光材料层22背离所述衬底10一侧的第二电极23；多个所述辅助电极202，位于所述平坦化层58之上，且至少部分与所述平坦化层58直接接触，所述辅助电极202用于连接相邻两个发光结构201的第二电极23。
如图4所示，在步骤S101中，提供衬底10。
该衬底10可以是硅基衬底。
如图5所示，在步骤S103中，在衬底10上形成平坦化层58。
经步骤S103之后可形成如图5所示的中间结构1001。该中间结构1001可具有驱动电路层50。平坦化层58可为该驱动电路层50的顶层。具体地，在一些实施例中，可在提供的衬底10上形成驱动电路层50。驱动电路层50的顶层为形成的平坦化层58。
当然，在其它一些实施例中，平坦化层还可以是位于驱动电路层背离衬底一侧的独立的膜层。相应地，形成平坦化层的步骤可在形成驱动电路层之后形成。
在一些实施例中，步骤S105可以包括如下步骤S1051至步骤S1053：
如图6所示，在步骤S1051中，在所述平坦化层58背离所述衬底10的一侧形成第一电极材料层以及辅助电极材料层。
经过步骤S1051，可形成如图6所示的中间结构1002。该中间结构1002中，辅助电极材料层可以与第一电极材料层为同一材料层，比如均为第一电极材料层210。
当然，在其它一些实施例中，二者也可为不同的材料层。
可以理解的是，第一电极材料层210形成之前，可在平坦化层58中设置与驱动电路层中薄膜晶体管连接的通孔。在形成第一电极材料层210的同时可在该通孔中形成导电结构。
如图7所示，在步骤S1052中，对所述第一电极材料层以及辅助电极材料层进行刻蚀，形成所述第一电极21及所述辅助电极202。
经过步骤S1052，可形成如图7所示的中间结构1003。
对于第一电极材料层与辅助电极材料层同为第一电极材料层210的，可以采用同一掩膜版对第一电极材料层210进行光刻形成第一电极21和辅助电极202。
如图8至图14所示，在步骤S1053中，在所述第一电极21背离所述衬底10的一侧形成发光材料层22以及第二电极23。
如图6和图7所示，在一些实施例中，所述辅助电极202与所述第一电极21同步形成；
所述辅助电极202与所述第一电极21材料相同。
如图8所示，在步骤S1052形成所述第一电极及所述辅助电极之后，所述方法包括步骤S10531：
在步骤S10531中，在所述平坦化层58形成与每一个辅助电极202对应的两个底切槽，每一辅助电极202所对应的两个底切槽，均具有部分位于所述辅助电极202下方，并且所述两个底切槽的开口分别位于所述辅助电极202相对两侧。
经步骤S10531之后，可形成如图8所示的中间结构1004。该中间结构1004中，所述平坦化层58具有部分位于所述辅助电极202下方，并且开口位于所述辅助电极202在宽度方向W上相对两侧的两个底切槽502、503。
相应地，在形成所述发光材料层以及第二电极(即形成整个发光层)之后，所述辅助电极202所连接的相邻两个发光结构201的第二电极23，二者的端部分别位于所述两个底切槽中，并均与所述辅助电极202连接。
如图9所示，在步骤S1052形成所述第一电极及所述辅助电极之后，具体地可在步骤S10531之后，所述方法还包括步骤S10532：
在步骤S10532中，在所述平坦化层58以及所述第一电极21和所述辅助电极202背离所述衬底10的一侧形成像素限定层40；所述像素限定层40设有多个像素开口401和多个电极连接开口402，所述电极连接开口402间隔设于相邻两个像素开口401之间；其中，多个所述像素开口401与多个所述发光结构201一一对应；所述第一电极21至少部分自所述像素开口401暴露，所述发光材料层22的至少部分位于所述像素开口401内；多个所述电极连接开口402与多个所述辅助电极202一一对应；所述辅助电极202位于所述电极连接开口402内。具体可如图9所示的中间结构1005所示。
在一些实施例中，多个所述发光结构201中至少一部分为具有第一发光颜色的第一发光结构，比如图1所示的发光结构2011，至少一部分为具有第二发光颜色的第二发光结构，比如图1所示的发光结构2012。其中，至少 部分第一发光结构和第二发光结构相邻设置。
在步骤S10532之后，所述方法包括如下步骤S10533至步骤S10537：
如图10所示，在步骤S10533中，在所述第一电极21背离所述衬底10的一侧形成第一发光结构的发光材料层22。
在步骤S10534中，在所述第一发光结构的发光材料层22背离所述衬底10的一侧形成第一发光结构的第二电极23。
经步骤S10533及步骤S10534后可形成如图10所示的中间结构1006。
该中间结构1006中，第一发光结构的发光材料层22和第二电极23可以是在显示面板的整个区域范围内进行发光材料层和第二电极对应的材料层的形成，并分别通过刻蚀形成位于整个区域内的发光材料层和第二电极。
如图11和图12所示，在步骤S10535中，去除用于形成第二发光结构的区域中的第一发光结构的发光材料及第一发光结构的第二电极23。
如图11所示，在去除用于形成第二发光结构的区域中的第一发光结构的发光材料及第一发光结构的第一电极时，可采用PR胶或者其它保护层涂覆于第一发光结构所在区域的上方，以对第一发光结构的区域内各结构进行保护，比如图11所示的中间结构1007。
可以理解的是，如图12所示，在去除用于形成第二发光结构的区域中的第一发光结构的发光材料及第一发光结构的第二电极23时，可同时去除位于连接相邻第一发光结构和第二发光结构的辅助电极202下方底切槽502中的第一发光结构的发光材料和第一发光结构的第二电极。
经过步骤S10535可形成如图12所示的中间结构1008。该中间结构1008中，用于形成第二发光结构的区域中的发光材料层及第二电极均被去除，并且辅助电极202下方底切槽502中的发光材料层及第二电极也被去除。
如图13所示，在步骤S10536中，在用于形成第二发光结构201的区域中，形成位于所述第一电极21背离所述衬底10一侧的第二发光结构201的发光材料层22；
在步骤S10537中，在用于形成发光结构201的区域中，形成位于所述第二发光结构201的发光材料层22背离所述衬底10的一侧形成第二发光结构201的第二电极23。
经步骤S10536及步骤S10537后，可形成如图13所示的中间结构1009，该中间结构中位于辅助电极202在宽度方向W上相对两侧的第一发光结构和第二发光结构二者的第二电极通过辅助电极202实现连接。且第一发光结构和第二发光结构二者的的发光材料层不同。
步骤S10536及步骤S10537与上述步骤S10533及步骤S10534类似。
可以理解的是，该多个发光结构还可以有一部分为具有第三发光颜色的第三发光结构。相应地，在步骤S10535中，可相应去除用于形成第三发光结构的区域中的第一发光结构的发光材料及第一发光结构的第二电极23。在步骤S10536和步骤S10537时，在用于形成第三发光结构的区域中形成了第二发光结构。相应地，可以重复步骤S10535至步骤S10537的类似步骤，在用于形成第三发光结构的区域中形成第三发光结构。
这里第一发光颜色、第二发光颜色、第三发光颜色可以分别为红色、绿色、蓝色中的一种。
当然，显示面板的各发光结构也可仅具有第一发光颜色和第二发光颜色的两类发光结构。相应地，第一发光颜色、第二发光颜色可为红色、蓝色、绿色中的任意两种。
此外，在另一些实施例中，各发光结构也可均具有同一发光颜色。相应地，在步骤S1052之后，尤其在步骤S10532之后，所述方法包括如下步骤S1530：
在步骤S1530中，在第一电极背离所述衬底的一侧依序形成发光材料层以及第二电极。
该步骤S1530可类似步骤S10533和步骤S10534。该实施例中，在形成发光材料层和第二电极后，可直接进行后续膜层或者结构的设置。
在一些实施例中，在步骤S1052形成第一发光结构201的第二电极23之后，具体可在步骤S10534之后，所述方法包括如下步骤S10538：
步骤S10538，在所述第一发光结构201的第二电极23背离所述衬底10的一侧形成第一无机层，比如图10所示的无机层311。
相应地，在用于形成第二发光结构201的区域中，形成位于所述第一电极21背离所述衬底10一侧的第二发光结构201的发光材料层22之前，所述方法还包括：去所述第一无机层311，比如如图12所示。该去除第一无机层311的步骤可与步骤S10535同步或者在步骤S10535之前进行。
相应地，在形成第二发光结构201的第二电极23之后，所述方法还包括如下步骤S10539：
在步骤S10539中，在所述第二发光结构201的第二电极23背离所述衬底10的一侧形成第二无机层312，所述第二无机层312与所述第一无机层311连接形成连续的无机层31，比如图13所示。
对于，各发光结构也可均具有同一发光颜色的，在形成发光材料层和第二电极后，可直接在所述发光层20背离所述衬底10的一侧形成封装层30，所述封装层30包括包覆所述发光层20的无机层。
需要说明的是，在另一些实施例中，上述步骤S10531和步骤S10532也可互换制备顺序。即在步骤S1052之后，先形成像素限定层，再形成底切槽502、503。
这里以形成底切槽502、503为例进行说明，在一些实施例中，在步骤S1052形成所述第一电极及所述辅助电极之后，所述方法包括：
步骤S10531’，在所述平坦化层以及所述第一电极和所述辅助电极背离所述衬底的一侧形成像素限定层；所述像素限定层设有多个像素开口和多个电极连接开口，所述电极连接开口间隔设于相邻两个像素开口之间；其中，多个所述像素开口与多个所述发光结构一一对应；所述第一电极至少部分自所述像素开口暴露；多个所述电极连接开口与多个所述辅助电极一一对应；所述辅助电极位于所述电极连接开口内，并自所述电极连接开口暴露；
步骤S10532’，在所述平坦化层形成与每一个辅助电极对应的两个底切 槽，每一辅助电极所对应的两个底切槽，均具有部分位于所述辅助电极下方，并且所述两个底切槽的开口分别位于所述辅助电极相对两侧；
在形成所述发光层之后，所述辅助电极所连接的相邻两个发光结构的第二电极，二者的端部分别位于所述两个底切槽中，并均与所述辅助电极连接。
可以理解的是，该实施例中，在步骤S10532’之后，可进入步骤S10533及后续其它步骤，具体可仍参照如上所述的相应步骤。
可以理解的是，在其它一些实施例中，也可不在平坦化层58中设置底切槽，而在平坦化层58背离衬底10的一侧形成开槽。
请结合附图15至图17，在另一些实施例中，可在步骤S1052形成所述辅助电极202之后，所述方法包括如下步骤S1054：
在步骤S1054中，在所述辅助电极202背离所述衬底10的一侧形成支撑顶层60；所述辅助电极202在所述显示面板厚度方向T上的正投影，位于所述支撑顶层60在所述显示面板厚度方向T上的正投影之内，所述辅助电极202与所述支撑顶层60以及所述平坦化层58围成位于所述辅助电极202相对两侧的两个开槽601、602。
相应地，在形成整个发光层20之后，所述辅助电极202所连接的相邻两个发光结构201的第二电极23，二者的端部分别位于所述两个开槽中，并均与所述辅助电极202连接。
请结合附图15至图17，在步骤S1052形成所述辅助电极202之后，步骤S1054具体可包括步骤S10541-步骤S10543：
如图15所示，在步骤S10541中，在所述平坦化层58、第一电极21及辅助电极202背离所述衬底10的一侧形成顶层材料层600，形成如图15所示的中间结构2001。
如图16所示，在步骤S10542中，刻蚀位于所述辅助电极202以外区域的顶层材料层，形成支撑顶层60，可形成如图16所示的中间结构2002。
如图17所示，在步骤S10543中，对所述刻蚀辅助电极202的相对两侧进行刻蚀，使得所述辅助电极202在所述显示面板厚度方向T上的正投影，位于所述支撑顶层60在所述显示面板厚度方向T上的正投影之内，所述辅助电极202与所述支撑顶层60以及所述平坦化层58围成位于所述辅助电极202相对两侧的两个开槽601、602，形成如图17所示的中间结构2003。
该实施例后续设置发光材料层及第二电极、封装层等步骤与上述设置底切槽502、503的实施方式类似，可参照上述相关描述，此处不予以赘述。
本领域技术人员在考虑说明书及实践这里申请的发明后，将容易想到本说明书的其它实施方案。本说明书旨在涵盖本说明书的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本说明书的一般性原理并包括本说明书未申请的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本说明书的真正范围和精神由下面的权利要求指出。
应当理解的是，本说明书并不局限于上面已经描述并在附图中示出的 精确结构，并且可以在不脱离其范围进行各种修改和改变。本说明书的范围仅由所附的权利要求来限制。
以上所述仅为本说明书的较佳实施例而已，并不用以限制本说明书，凡在本说明书的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本说明书保护的范围之内。

Claims (19)

  1. 一种显示面板，其特征在于，包括：
    衬底；
    平坦化层，位于所述衬底之上；
    发光层，位于所述平坦化层背离所述衬底一侧，所述发光层包括多个间隔排布的发光结构及多个辅助电极；所述发光结构包括位于所述平坦化层之上的第一电极，位于所述第一电极背离所述衬底一侧的发光材料层，以及位于所述发光材料层背离所述衬底一侧的第二电极；多个所述辅助电极，位于所述平坦化层之上，且至少部分与所述平坦化层直接接触，所述辅助电极用于连接相邻两个发光结构的第二电极。
  2. 如权利要求1所述的显示面板，其特征在于，所述辅助电极与所述第一电极同层设置；
    所述辅助电极与所述第一电极材料相同。
  3. 如权利要求1所述的显示面板，其特征在于，所述平坦化层具有部分位于所述辅助电极下方，并且开口位于所述辅助电极相对两侧的两个底切槽；所述辅助电极所连接的相邻两个发光结构的第二电极，二者的端部分别位于所述两个底切槽中，并均与所述辅助电极连接。
  4. 如权利要求1所述的显示面板，其特征在于，所述显示面板包括位于所述辅助电极背离所述衬底一侧的支撑顶层，所述辅助电极在所述显示面板厚度方向上的正投影，位于所述支撑顶层在所述显示面板厚度方向上的正投影之内，所述辅助电极与所述支撑顶层以及所述平坦化层围成位于所述辅助电极相对两侧的两个开槽；所述辅助电极所连接的相邻两个发光结构的第二电极，二者的端部分别位于所述两个开槽中，并均与所述辅助电极连接。
  5. 如权利要求1所述的显示面板，其特征在于，所述显示面板还包括位于所述平坦化层背离所述衬底一侧的像素限定层；所述像素限定层设有多个像素开口和多个电极连接开口，所述电极连接开口间隔设于相邻两个像素开口之间；
    多个所述像素开口与多个所述发光结构一一对应；所述第一电极至少部分自所述像素开口暴露，所述发光材料层的至少部分位于所述像素开口内；
    多个所述电极连接开口与多个所述辅助电极一一对应；所述辅助电极位于所述电极连接开口内。
  6. 如权利要求1至5中任一项所述的显示面板，其特征在于，所述显示面板还包括封装层，所述封装层位于所述发光层背离所述衬底的一侧，且包括覆盖所述发光层的无机层。
  7. 如权利要求1至5中任一项所述的显示面板，其特征在于，所述发光材料层为单层发光材料层，或至少两层叠设的多层发光材料层。
  8. 一种显示面板的制备方法，其特征在于，所述方法包括：
    提供衬底；
    在所述衬底之上形成平坦化层；
    在所述平坦化层背离所述衬底的一侧形成发光层；所述发光层包括多个间隔排布的发光结构及多个辅助电极；所述发光结构包括位于所述平坦化层之上的第一电极，位于所述第一电极背离所述衬底一侧的发光材料层，以及位于所述发光材料层背离所述衬底一侧的第二电极；多个所述辅助电极，位于所述平坦化层之上，且至少部分与所述平坦化层直接接触，所述辅助电极用于连接相邻两个发光结构的第二电极。
  9. 如权利要求1所述的显示面板的制备方法，其特征在于，所述在所述平坦化层背离所述衬底的一侧形成发光层包括：
    在所述平坦化层背离所述衬底的一侧形成第一电极材料层以及辅助电极材料层；
    对所述第一电极材料层以及辅助电极材料层进行刻蚀，形成所述第一电极及所述辅助电极；
    在所述第一电极背离所述衬底的一侧形成发光材料层以及第二电极。
  10. 如权利要求9所述的显示面板的制备方法，其特征在于，所述辅助电极与所述第一电极同步形成；
    所述辅助电极与所述第一电极材料相同。
  11. 如权利要求9所述的显示面板的制备方法，其特征在于，在形成所述第一电极及所述辅助电极之后，所述方法包括：
    在所述平坦化层形成与每一个辅助电极对应的两个底切槽，每一辅助电极所对应的两个底切槽，均具有部分位于所述辅助电极下方，并且所述两个底切槽的开口分别位于所述辅助电极相对两侧；
    在形成所述发光层之后，所述辅助电极所连接的相邻两个发光结构的第二电极，二者的端部分别位于所述两个底切槽中，并均与所述辅助电极连接。
  12. 如权利要求9所述的显示面板的制备方法，其特征在于，在形成所述辅助电极之后，所述方法包括：
    在所述辅助电极背离所述衬底的一侧形成支撑顶层；所述辅助电极在所述显示面板厚度方向上的正投影，位于所述支撑顶层在所述显示面板厚度方向上的正投影之内，所述辅助电极与所述支撑顶层以及所述平坦化层围成位于所述辅助电极相对两侧的两个开槽；
    在形成所述发光层之后，所述辅助电极所连接的相邻两个发光结构的第二电极，二者的端部分别位于所述两个开槽中，并均与所述辅助电极连接。
  13. 如权利要求12所述的显示面板的制备方法，其特征在于，在形成所述辅助电极之后包括：
    在所述平坦化层、第一电极及辅助电极背离所述衬底的一侧形成顶层材料层；
    刻蚀位于所述辅助电极以外区域的顶层材料层，形成支撑顶层；
    对所述刻蚀辅助电极的相对两侧进行刻蚀，使得所述辅助电极在所述显示面板厚度方向上的正投影，位于所述支撑顶层在所述显示面板厚度方向上的正投影之内，所述辅助电极与所述支撑顶层以及所述平坦化层围成位于所述辅助电极相对两侧的两个开槽。
  14. 如权利要求9至13中任一项所述的显示面板的制备方法，其特征在于，在形成所述第一电极及所述辅助电极之后，所述方法包括：
    在所述平坦化层以及所述第一电极和所述辅助电极背离所述衬底的一侧形成像素限定层；所述像素限定层设有多个像素开口和多个电极连接开口，所述电极连接开口间隔设于相邻两个像素开口之间；其中，多个所述像素开口与多个所述发光结构一一对应；所述第一电极至少部分自所述像素开口暴露，所述发光材料层的至少部分位于所述像素开口内；多个所述电极连接开口与多个所述辅助电极一一对应；所述辅助电极位于所述电极连接开口内。
  15. 如权利要求9所述的显示面板的制备方法，其特征在于，在形成所述第一电极及所述辅助电极之后，所述方法包括：
    在所述平坦化层以及所述第一电极和所述辅助电极背离所述衬底的一侧形成像素限定层；所述像素限定层设有多个像素开口和多个电极连接开口，所述电极连接开口间隔设于相邻两个像素开口之间；其中，多个所述像素开口与多个所述发光结构一一对应；所述第一电极至少部分自所述像素开口暴露；多个所述电极连接开口与多个所述辅助电极一一对应；所述辅助电极位于所述电极连接开口内，并自所述电极连接开口暴露；
    在所述平坦化层形成与每一个辅助电极对应的两个底切槽，每一辅助电极所对应的两个底切槽，均具有部分位于所述辅助电极下方，并且所述两个底切槽的开口分别位于所述辅助电极相对两侧；
    在形成所述发光层之后，所述辅助电极所连接的相邻两个发光结构的第二电极，二者的端部分别位于所述两个底切槽中，并均与所述辅助电极连接。
  16. 如权利要求9至13及15中任一项所述的显示面板的制备方法，其特征在于，多个所述发光结构中至少一部分为具有第一发光颜色的第一发光结构，至少一部分为具有第二发光颜色的第二发光结构；所述在所述第一电极背离所述衬底的一侧形成发光材料层以及第二电极包括：
    在所述第一电极背离所述衬底的一侧形成第一发光结构的发光材料层；
    在所述第一发光结构的发光材料层背离所述衬底的一侧形成第一发光结构的第二电极；
    去除用于形成第二发光结构的区域中的第一发光结构的发光材料及第一发光结构的第二电极；
    在用于形成第二发光结构的区域中，形成位于所述第一电极背离所述衬底一侧的第二发光结构的发光材料层；
    在用于形成发光结构的区域中，形成位于所述第二发光结构的发光材料层背离所述衬底的一侧形成第二发光结构的第二电极。
  17. 如权利要求16所述的显示面板的制备方法，其特征在于，在形成第一发光结构的第二电极之后，所述方法包括：
    在所述第一发光结构的第二电极背离所述衬底的一侧形成第一无机层；
    在用于形成第二发光结构的区域中，形成位于所述第一电极背离所述衬底一侧的第二发光结构的发光材料层之前，所述方法还包括：去除所述第一无机层；
    在形成第二发光结构的第二电极之后，所述方法还包括：在所述第二发光结构的第二电极背离所述衬底的一侧形成第二无机层，所述第二无机层与所述第一无机层连接。
  18. 如权利要求9至13及15中任一项所述的显示面板的制备方法，其特征在于，各发光结构的发光颜色相同，所述在所述第一电极背离所述衬底的一侧形成发光材料层以及第二电极包括：
    在第一电极背离所述衬底的一侧依序形成发光材料层以及第二电极。
  19. 如权利要求18所述的显示面板的制备方法，其特征在于，在所述平坦化层背离所述衬底的一侧形成发光层之后，所述方法包括：
    在所述发光层背离所述衬底的一侧形成封装层，所述封装层包括包覆所述发光层的无机层。
PCT/CN2024/126350 2023-11-29 2024-10-22 显示面板及其制备方法 Pending WO2025112987A1 (zh)

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CN110854290A (zh) * 2019-10-29 2020-02-28 深圳市华星光电半导体显示技术有限公司 一种显示面板及其制备方法
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CN114695498A (zh) * 2022-04-27 2022-07-01 深圳市华星光电半导体显示技术有限公司 一种显示面板及其制备方法、显示装置
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CN112262477A (zh) * 2018-06-28 2021-01-22 三星显示有限公司 显示装置
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