WO2025028109A1 - コンバータ装置 - Google Patents

コンバータ装置 Download PDF

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Publication number
WO2025028109A1
WO2025028109A1 PCT/JP2024/023673 JP2024023673W WO2025028109A1 WO 2025028109 A1 WO2025028109 A1 WO 2025028109A1 JP 2024023673 W JP2024023673 W JP 2024023673W WO 2025028109 A1 WO2025028109 A1 WO 2025028109A1
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WIPO (PCT)
Prior art keywords
switching element
switching
bridge inverter
output
control device
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PCT/JP2024/023673
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English (en)
French (fr)
Japanese (ja)
Inventor
尚人 泉本
和憲 木寺
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Panasonic Intellectual Property Management Co Ltd
Original Assignee
Panasonic Intellectual Property Management Co Ltd
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Application filed by Panasonic Intellectual Property Management Co Ltd filed Critical Panasonic Intellectual Property Management Co Ltd
Priority to CN202480048839.4A priority Critical patent/CN121569432A/zh
Priority to JP2025537750A priority patent/JPWO2025028109A1/ja
Publication of WO2025028109A1 publication Critical patent/WO2025028109A1/ja
Anticipated expiration legal-status Critical
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/02—Conversion of AC power input into DC power output without possibility of reversal
    • H02M7/04—Conversion of AC power input into DC power output without possibility of reversal by static converters
    • H02M7/12—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Definitions

  • This disclosure relates to a converter device.
  • Patent Document 1 discloses a power conversion device (converter device) that converts input power from an AC power source into a desired DC power.
  • the power conversion device disclosed in Patent Document 1 includes a transformer.
  • a series resonant reactor and a series resonant capacitor are connected in series to the primary winding of the transformer, and a parallel resonant reactor is connected in parallel.
  • Insulated converter devices equipped with transformers are desired to achieve even higher efficiency.
  • the purpose of this disclosure is to provide a converter device that can achieve high efficiency.
  • a converter device includes a first rectifier, a half-bridge inverter, an input inductor, a transformer, a second rectifier, an output inductor, and a control device.
  • the first rectifier has a first diode and a second diode connected in series with each other, and a first AC output end of an AC power supply is connected to a connection point between the first diode and the second diode.
  • the half-bridge inverter has a first series circuit of a first switching element and a second switching element, and a second series circuit of a first capacitor and a second capacitor. The second series circuit is connected in parallel to the first series circuit.
  • the first switching element is connected to the cathode of the first diode.
  • the second switching element is connected to the anode of the second diode.
  • the second AC output end of the AC power supply is connected to a connection point between the first switching element and the second switching element.
  • the input inductor is connected between the AC power supply and the first rectifier or the half-bridge inverter.
  • the transformer includes a primary winding and a secondary winding. The first winding of the transformer is connected between a first output terminal between the first switching element and the second switching element and a second output terminal between the first capacitor and the second capacitor.
  • the second rectifier is connected to the secondary winding of the transformer and outputs an output voltage obtained by rectifying a secondary voltage generated in the secondary winding to an output capacitor.
  • the output inductor is connected between the secondary winding and the output capacitor.
  • the control device controls at least the half-bridge inverter.
  • FIG. 1 is a circuit diagram showing a converter device according to a first embodiment.
  • FIG. 2 is a timing chart for explaining the operation of the converter device.
  • FIG. 3 is a diagram illustrating the operation of the converter device when the polarity of the input voltage is positive.
  • 4A to 4C are diagrams illustrating the operation of the converter device when the polarity of the input voltage is positive.
  • FIG. 5 is an operational waveform diagram of the converter device.
  • FIG. 6 is a diagram illustrating the operation of the converter device when the polarity of the input voltage is negative.
  • 7A to 7C are diagrams illustrating the operation of the converter device when the polarity of the input voltage is negative.
  • FIG. 8 is a block diagram showing a control device provided in the converter device.
  • FIG. 9 is a circuit diagram showing a converter device according to the second embodiment.
  • the following embodiments generally relate to converter devices. More specifically, they relate to isolated converter devices that include a transformer.
  • a converter device 100 according to the present embodiment is an isolated AC-DC converter having the configuration shown in FIG. 1 and performing power conversion from AC power to DC power.
  • the converter device 100 includes a first rectifier 2, a half-bridge inverter 3, an input inductor Li, a transformer Tr1, a second rectifier 4, an output inductor Lo1, and a control device 5.
  • the first rectifier 2 has a first diode D1 and a second diode D2 connected in series with each other, and the first AC output terminal 81 of the AC power source 8 is connected to the connection point 21 between the first diode D1 and the second diode D2.
  • the half-bridge inverter 3 has a first series circuit 31 made up of a first switching element Q1 and a second switching element Q2, and a second series circuit 32 made up of a first capacitor C1 and a second capacitor C2.
  • the second series circuit 32 is connected in parallel to the first series circuit 31.
  • the first switching element Q1 is connected to the cathode of the first diode D1
  • the second switching element Q2 is connected to the anode of the second diode D2.
  • the second AC output end 82 of the AC power supply 8 is connected to the connection point 33 between the first switching element Q1 and the second switching element Q2.
  • the input inductor Li is connected between the AC power source 8 and the first rectifier 2 or the half-bridge inverter 3.
  • the transformer Tr1 includes a primary winding N1 and a secondary winding N2.
  • the primary winding N1 is connected between a first output terminal 34 between the first switching element Q1 and the second switching element Q2, and a second output terminal 35 between the first capacitor C1 and the second capacitor C2.
  • the second rectifier 4 is connected to the secondary winding N2 of the transformer Tr1, and outputs the output voltage Vo, which is the rectified output voltage V2 generated in the secondary winding N2, to the output capacitor Co.
  • the output inductor Lo1 is connected between the secondary winding N2 and the output capacitor Co.
  • the control device 5 controls at least the half-bridge inverter 3.
  • the converter device 100 can achieve high efficiency.
  • the second rectifier 4 outputs an output current Io (see FIG. 1) via an output inductor Lo1.
  • the output current Io is smoothed by the output inductor Lo1, and the ripple component contained in the output current Io is suppressed, so that the loss in the output capacitor Co due to the output current Io can be suppressed.
  • the converter device 100 includes an input filter 1, a first rectifier 2, a half-bridge inverter 3, a second rectifier 4, a control device 5, a pair of input terminals 11, 12, a pair of output terminals 13, 14, an input inductor Li, a transformer Tr1, an output inductor Lo1, and an output capacitor Co.
  • the input terminals 11, 12 are connected to an AC power supply 8.
  • the AC power supply 8 is, for example, a 100V or 200V commercial power supply, has a first AC output terminal 81 and a second AC output terminal 82, and generates an AC input voltage Vi between the first AC output terminal 81 and the second AC output terminal 82.
  • the input terminal 11 is connected to the first AC output terminal 81, and the input terminal 12 is connected to the second AC output terminal 82. That is, the AC input voltage Vi is applied between the input terminals 11, 12.
  • the converter device 100 converts the AC input voltage Vi into a DC output voltage Vo, and outputs the DC output voltage Vo from the output terminals 13 and 14. That is, the DC output voltage Vo is applied between the output terminals 13 and 14.
  • the AC power source 8 may be a power source that utilizes renewable energy such as solar, wind, geothermal, water, or biomass.
  • the AC power source 8 may also be a power source that generates AC power from charging power of a storage battery.
  • the input filter 1 is a filter circuit having at least one of an inductor and a capacitor.
  • the input filter 1 includes, for example, any of a low-pass filter, a high-pass filter, a band-pass filter, and a band-stop filter.
  • the pair of input ends of the input filter 1 are connected to the input terminals 11 and 12, respectively.
  • One of the pair of output ends of the input filter 1 is connected to a connection point 21 (described later) of the first rectifier 2.
  • the other of the pair of output ends of the input filter 1 is connected to a connection point 33 (described later) of the half-bridge inverter 3 via an input inductor Li.
  • AC power input from the AC power source 8 to the input terminals 11 and 12 is supplied via the input filter 1 to the first rectifier 2 and half-bridge inverter 3 in the subsequent stage.
  • the first rectifier 2 includes a first diode D1 and a second diode D2.
  • the cathode of the second diode D2 is connected to the anode of the first diode D1, and the first diode D1 and the second diode D2 are connected in series.
  • the connection point between the anode of the first diode D1 and the cathode of the second diode D2 constitutes a connection point 21.
  • the first AC output end 81 of the AC power supply 8 is connected to the connection point 21 via the input terminal 11 and the input filter 1.
  • the input inductor Li is connected between the second AC output terminal 82 of the AC power supply 8 and a connection point 33 (described later) of the half-bridge inverter 3. More specifically, the input inductor Li has a first end and a second end. The first end of the input inductor Li is connected to the second AC output terminal 82 of the AC power supply 8 via the input filter 1 and the input terminal 12. The second end of the input inductor Li is connected to the connection point 33 of the half-bridge inverter 3.
  • the half-bridge inverter 3 has a first series circuit 31 including a first switching element Q1 and a second switching element Q2, and a second series circuit 32 including a first capacitor C1 and a second capacitor C2.
  • the second series circuit 32 is connected in parallel to the first series circuit 31.
  • the first switching element Q1 is connected to the cathode of a first diode D1
  • the second switching element Q2 is connected to the anode of a second diode D2.
  • connection point 33 is connected to the second AC output terminal 82 of the AC power source 8 via the input inductor Li, the input filter 1, and the input terminal 12.
  • each of the first switching element Q1 and the second switching element Q2 is a semiconductor switching element having a control terminal, a first main terminal, and a second main terminal.
  • the control terminals of the first switching element Q1 and the second switching element Q2 are connected to the control device 5.
  • the first switching element Q1 is turned on and off in response to a first switching signal S1 provided by the control device 5.
  • the second switching element Q2 is turned on and off in response to a second switching signal S2 provided by the control device 5.
  • the first switching element Q1 and the second switching element Q2 are, for example, GaN-based GITs (Gate Injection Transistors).
  • the control terminal, the first main terminal, and the second main terminal are the gate terminal, the drain terminal, and the source terminal, respectively.
  • the drain terminal of the first switching element Q1 is connected to the cathode of the first diode D1.
  • the source terminal of the first switching element Q1 is connected to the drain terminal of the second switching element Q2.
  • the source terminal of the second switching element Q2 is connected to the anode of the second diode D2.
  • the first end of the first capacitor C1 is connected to the drain terminal of the first switching element Q1 and the cathode of the first diode D1.
  • the second end of the first capacitor C1 is connected to the first end of the second capacitor C2.
  • the second end of the second capacitor C2 is connected to the source terminal of the second switching element Q2 and the anode of the second diode D2.
  • the transformer Tr1 includes a primary winding N1 and a secondary winding N2.
  • the primary winding N1 is connected between a first output terminal 34 between the first switching element Q1 and the second switching element Q2 in the half-bridge inverter 3, and a second output terminal 35 between the first capacitor and the second capacitor in the half-bridge inverter 3.
  • the secondary winding N2 is connected to the second rectifier 4.
  • the first switching element Q1 and the second switching element Q2 are turned on and off, so that the primary voltage V1 generated in the primary winding N1 becomes an alternating voltage, and the secondary voltage V2 generated in the secondary winding N2 becomes an alternating voltage.
  • the second rectifier 4 in this embodiment is configured with a full-bridge inverter 40 .
  • the full-bridge inverter 40 is connected to the secondary winding N2 of the transformer Tr1.
  • the full-bridge inverter 40 has a third switching element Q3, a fourth switching element Q4, a fifth switching element Q5, and a sixth switching element Q6.
  • the full-bridge inverter 40 generates a DC output voltage Vo by full-wave rectifying the secondary voltage V2 generated in the secondary winding N2 by turning on and off the third to sixth switching elements Q3 to Q6, respectively.
  • the full-bridge inverter 40 has a series circuit 41 of a third switching element Q3 and a fourth switching element Q4, and a series circuit 42 of a fifth switching element Q5 and a sixth switching element Q6.
  • the series circuit 41 is connected between the output terminal 13 and the output terminal 14 via the output inductor Lo1.
  • the series circuit 42 is connected between the output terminal 13 and the output terminal 14 via the output inductor Lo1.
  • the full-bridge inverter 40 also has a third diode D3, a fourth diode D4, a fifth diode D5, and a sixth diode D6.
  • the third diode D3 is connected in anti-parallel to the third switching element Q3.
  • the fourth diode D4 is connected in anti-parallel to the fourth switching element Q4.
  • the fifth diode D5 is connected in anti-parallel to the fifth switching element Q5.
  • the sixth diode D6 is connected in anti-parallel to the sixth switching element Q6.
  • each of the third to sixth switching elements Q3 to Q6 is a semiconductor switching element having a control terminal, a first main terminal, and a second main terminal.
  • the control terminals of the third to sixth switching elements Q3 to Q6 are connected to the control device 5.
  • the third to sixth switching elements Q3 to Q6 are turned on and off in response to third to sixth switching signals S3 to S6 provided by the control device 5, respectively.
  • the third to sixth switching elements Q3 to Q6 are, for example, MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors). More specifically, each of the third to sixth switching elements Q3 to Q6 is an n-channel MOSFET.
  • the n-channel MOSFET is a normally-off type Si-based MOSFET.
  • the control terminal, the first main terminal, and the second main terminal are the gate terminal, the drain terminal, and the source terminal, respectively.
  • the drain terminal of the third switching element Q3 is connected to the output terminal 13 via the output inductor Lo1.
  • the source terminal of the third switching element Q3 is connected to the drain terminal of the fourth switching element Q4.
  • the source terminal of the fourth switching element Q4 is connected to the output terminal 14.
  • the drain terminal of the fifth switching element Q5 is connected to the output terminal 13 via the output inductor Lo1.
  • the source terminal of the fifth switching element Q5 is connected to the drain terminal of the sixth switching element Q6.
  • the source terminal of the sixth switching element Q6 is connected to the output terminal 14.
  • the third to sixth diodes D3 to D6 are parasitic diodes of the MOSFETs of the third to sixth switching elements Q3 to Q6, respectively.
  • Each of the third to sixth diodes D3 to D6 has an anode and a cathode.
  • the anode and cathode of each of the third to sixth diodes D3 to D6 are connected to the second main terminal (source terminal) and the first main terminal (drain terminal) of the corresponding switching element among the third to sixth switching elements Q3 to Q6, respectively.
  • the full-bridge inverter 40 has a first input terminal 44 between the third switching element Q3 and the fourth switching element Q4, and a second input terminal 45 between the fifth switching element Q5 and the sixth switching element Q6.
  • the first input terminal 44 is a connection point between the source of the third switching element Q3 and the drain of the fourth switching element Q4.
  • the second input terminal 45 is a connection point between the source of the fifth switching element Q5 and the drain of the sixth switching element Q6.
  • the secondary winding N2 of the transformer Tr1 is connected between the first input terminal 44 and the second input terminal 45.
  • the full-bridge inverter 40 has a first DC output terminal 46 and a second DC output terminal 47.
  • the drains of the third switching element Q3 and the fifth switching element Q5 are connected to the first DC output terminal 46, and the output terminal 13 is connected via the output inductor Lo1.
  • the sources of the fourth switching element Q4 and the sixth switching element Q6 are connected to the second DC output terminal 47, and the output terminal 14 is connected to the second DC output terminal 47.
  • the above-mentioned full-bridge inverter 40 full-wave rectifies the secondary voltage V2 generated in the secondary winding N2 by turning on and off the third to sixth switching elements Q3 to Q6, respectively.
  • the full-bridge inverter 40 then outputs the DC voltage obtained by full-wave rectifying the secondary voltage V2 as an output voltage Vo from the first DC output terminal 46 and the second DC output terminal 47.
  • the current that the full-bridge inverter 40 outputs from the first DC output terminal 46 is defined as an output current Io.
  • the output inductor Lo1 is connected between the output capacitor Co and one of the first DC output terminal 46 and the second DC output terminal 47, which are a pair of DC output terminals of the second rectifier 4.
  • the output inductor Lo1 is connected between the first DC output terminal 46 and the output terminal 13 of the full-bridge inverter 40. That is, a first terminal of the output inductor Lo1 is connected to the first DC output terminal 46, and a second terminal of the output inductor Lo1 is connected to the output terminal 13.
  • the output inductor Lo1 smoothes the output current Io output from the full-bridge inverter 40.
  • a first end of the output capacitor Co is connected to the output terminal 13, and is also connected to the first DC output end 46 of the full-bridge inverter 40 via the output inductor Lo1.
  • a second end of the output capacitor Co is connected to the output terminal 14, and is also connected to the second DC output end 47 of the full-bridge inverter 40.
  • the output capacitor Co smoothes the output voltage Vo output from the first DC output end 46 and the second DC output end 47.
  • the output voltage Vo is output from the output terminals 13 and 14.
  • the control device 5 controls the half-bridge inverter 3 and the full-bridge inverter 40.
  • the control device 5 controls the first switching element Q1 and the second switching element Q2 of the half-bridge inverter 3.
  • the control device 5 also controls the third switching element Q3, the fourth switching element Q4, the fifth switching element Q5, and the sixth switching element Q6 of the full-bridge inverter 40.
  • the control device 5 is configured to provide first to sixth switching signals (control signals) S1 to S6 to the first to sixth switching elements Q1 to Q6, respectively.
  • the first to sixth switching signals S1 to S6 are gate voltages (gate signals) applied between the control terminals and the second main terminals of the first to sixth switching elements Q1 to Q6, respectively, to turn on and off the first to sixth switching elements Q1 to Q6.
  • the first to sixth switching signals S1 to S6 are voltages whose voltage levels change between a voltage level (hereinafter also referred to as a high level) higher than the threshold voltages (gate threshold voltages) of the first to sixth switching elements Q1 to Q6 and a voltage level (hereinafter also referred to as a low level) lower than the threshold voltages.
  • the control device 5 is configured to be able to change the frequencies of the first to sixth switching signals S1 to S6. That is, the control device 5 can control the output voltage Vo by controlling the half-bridge inverter 3 and the full-bridge inverter 40.
  • FIG. 2 is a time chart when the control device 5 controls the first to sixth switching elements Q1 to Q6. From the top to bottom, FIG. 2 shows the waveforms of the first switching signal S1, the second switching signal S2, the third switching signal S3, the fourth switching signal S4, the fifth switching signal S5, the sixth switching signal S6, the primary voltage V1, and the secondary voltage V2.
  • the primary voltage V1 is the voltage between the first output terminal 34 and the second output terminal 35 when the potential of the second output terminal 35 is set as the reference potential.
  • the secondary voltage V2 is the voltage between the first input terminal 44 and the second input terminal 45 when the potential of the second input terminal 45 is set as the reference potential.
  • the control device 5 alternately switches the first switching signal S1 between a high level and a low level, and alternately switches the second switching signal S2 between a high level and a low level. At this time, the control device 5 sets the second switching signal S2 to a low level when the first switching signal S1 is at a high level, and sets the second switching signal S2 to a high level when the first switching signal S1 is at a low level. In other words, the control device 5 alternately turns the first and second switching elements Q1 and Q2 on and off.
  • the control device 5 makes the duty of the first switching signal S1 that controls the first switching element Q1 and the duty of the second switching signal S2 that controls the second switching element Q2 equal to each other.
  • the duty of a switching signal is the ratio of the high level period to the total time of the high level period and the low level period in one period of the switching signal. Specifically, the duty of each of the first and second switching signals S1 to S2 is 50%. In this way, the control device 5 makes the duty of the first switching signal S1 and the duty of the second switching signal S2 equal to each other, thereby simplifying the generation process of the first switching signal S1 and the second switching signal S2.
  • the control device 5 controls the first and second switching elements Q1 and Q2, so that a primary voltage V1 is generated across the primary winding N1 (between the first output terminal 34 and the second output terminal 35), and a secondary voltage V2 is generated across the secondary winding N2 (between the first input terminal 44 and the second input terminal 45).
  • the primary voltage V1 is an alternating voltage that is a positive voltage when the first switching element Q1 is on and a negative voltage when the second switching element Q2 is on.
  • the secondary voltage V2 is an alternating voltage that is a positive voltage when the first switching element Q1 is on and a negative voltage when the second switching element Q2 is on.
  • the full-bridge inverter 40 which is the second rectifier 4, generates and outputs a DC output voltage Vo by full-wave rectifying the secondary voltage V2.
  • the control device 5 turns on the third and sixth switching elements Q3, Q6 and turns off the fourth and fifth switching elements Q4, Q5 during a period in which the polarity of the secondary voltage V2 is positive (the potential of the first input terminal 44 is higher than the potential of the second input terminal 45).
  • the control device 5 turns on the fourth and fifth switching elements Q4, Q5 and turns off the third and sixth switching elements Q3, Q6 during a period in which the polarity of the secondary voltage V2 is negative (the potential of the second input terminal 45 is higher than the potential of the first input terminal 44). That is, the control device 5 alternately turns on the third and sixth switching elements Q3, Q6 and the fourth and fifth switching elements Q4, Q5 depending on the polarity of the secondary voltage V2.
  • the control device 5 also makes the duty of the third switching signal S3 that controls the third switching element Q3, the duty of the fourth switching signal S4 that controls the fourth switching element Q4, the duty of the fifth switching signal S5 that controls the fifth switching element Q5, and the duty of the sixth switching signal S6 that controls the sixth switching element Q6 equal to each other.
  • the duty of a switching signal is the ratio of the high level period to the total time of the high level period and the low level period in one period of the switching signal. Specifically, the duty of each of the third to sixth switching signals S3 to S6 is 50%.
  • control device 5 synchronizes the drive timing of the first switching element Q1 and the second switching element Q2 with the drive timing of the third switching element Q3, the fourth switching element Q4, the fifth switching element Q5, and the sixth switching element Q6.
  • the control device 5 can simplify the generation process of the first to sixth switching signals S1 to S6.
  • the first switching signal S1, the third switching signal S3, and the sixth switching signal S6 are in-phase signals that switch to the same voltage level at the same timing. That is, the first switching signal S1, the third switching signal S3, and the sixth switching signal S6 switch from a low level to a high level at the same timing, and from a high level to a low level at the same timing. Therefore, the first switching element Q1, the third switching element Q3, and the sixth switching element Q6 turn on and off at the same timing.
  • the second switching signal S2, the fourth switching signal S4, and the fifth switching signal S5 are in-phase signals that switch to the same voltage level at the same timing. That is, the second switching signal S2, the fourth switching signal S4, and the fifth switching signal S5 switch from a low level to a high level at the same timing, and from a high level to a low level at the same timing. Therefore, the second switching element Q2, the fourth switching element Q4, and the fifth switching element Q5 turn on and off at the same timing.
  • the dead time Td is a period during which both of the two switching elements connected in series are maintained in the off state. During the dead time Td, both of the two switching signals for driving the two switching elements connected in series are maintained at a low level.
  • the dead time Td is provided when the voltage levels of the first switching signal S1 and the second switching signal S2 are inverted. Also, the dead time Td is provided when the voltage levels of the third switching signal S3 and the fourth switching signal S4 are inverted. Also, the dead time Td is provided when the voltage levels of the fifth switching signal S5 and the sixth switching signal S6 are inverted. That is, during the dead time Td, the first to sixth switching signals S1 to S6 are maintained at a low level, and the first to sixth switching elements Q1 to Q6 are maintained in an off state.
  • the control device 5 also controls the first switching element Q1 and the second switching element Q2 so that the mode of the current (inductor current IL1) flowing through the input inductor Li is discontinuous current mode.
  • FIG. 3 illustrates the relationship between the first switching signal S1 and the second switching signal S2, the inductor current IL1, and the primary voltage V1 when the polarity of the input voltage Vi is positive (the potential of the input terminal 11 is higher than the potential of the input terminal 12).
  • the first period T1 is a period in which the first switching signal S1 is at a high level and the second switching signal S2 is at a low level.
  • the second period T2 and the third period T3 are periods in which the first switching signal S1 is at a low level and the second switching signal S2 is at a high level.
  • the dead time Td is a period in which the first switching signal S1 and the second switching signal S2 are at a low level.
  • the switching period Tsw of the half-bridge inverter 3 is composed of dead time Td-first period T1-dead time Td-second period T2-third period T3.
  • FIGS. 4A, 4B, and 4C are diagrams illustrating the operation of the first period T1, the second period T2, and the third period T3 in FIG. 3, respectively.
  • the current path of the inductor current IL1 (see FIG. 5) is shown by a thin dashed line.
  • the first period T1 as shown in FIG. 4A, energy is stored in the input inductor Li by the inductor current IL1.
  • the second period T2 as shown in FIG. 4B, energy is released from the input inductor Li.
  • the inductor current IL1 is zero, so the inductor current IL1 is not shown in FIG. 4C.
  • the primary current I1 flowing through the primary winding N1 of the transformer Tr1 is shown by a thick dashed line.
  • an inductor current IL1 flows through the path of the first diode D1-first switching element Q1-input inductor Li.
  • the inductor current IL1 increases as time passes from the start of the first period T1, and energy is stored in the input inductor Li.
  • a primary current I1 flows through the path of the first capacitor C1-first switching element Q1-primary winding N1-first capacitor C1, as shown in FIG. 4A.
  • the third period T3 in FIG. 3 is a zero current period in which no current flows through the input inductor Li. That is, the control device 5 controls the first switching element Q1 and the second switching element Q2 so as to include the third period T3 in which the inductor current IL1 is zero, thereby setting the mode of the inductor current IL1 to a discontinuous current mode.
  • the primary current I1 flows through the path of the second capacitor C2-primary winding N1-second switching element Q2-second capacitor C2. Note that in the third period T3, resonance occurs due to stray capacitance.
  • FIG. 6 illustrates the relationship between the first switching signal S1 and the second switching signal S2, the inductor current IL1, and the primary voltage V1 when the polarity of the input voltage Vi is negative (the potential of the input terminal 12 is higher than the potential of the input terminal 11).
  • the control device 5 When the polarity of the input voltage Vi is negative, the control device 5 generates the first switching signal S1 and the second switching signal S2 so as to transition as follows: fourth period T11-dead time Td-fifth period T12-sixth period T13-dead time Td-fourth period T11-... as shown in FIG. 6.
  • the fourth period T11 is a period in which the first switching signal S1 is at a low level and the second switching signal S2 is at a high level.
  • the fifth period T12 and the sixth period T13 are periods in which the first switching signal S1 is at a high level and the second switching signal S2 is at a low level.
  • the dead time Td is a period in which the first switching signal S1 and the second switching signal S2 are at a low level.
  • the switching period Tsw of the half-bridge inverter 3 is composed of dead time Td-fourth period T11-dead time Td-fifth period T12-sixth period T13.
  • FIGS. 7A, 7B, and 7C are diagrams illustrating the operation of the fourth period T11, the fifth period T12, and the sixth period T13 in FIG. 6, respectively.
  • the current path of the inductor current IL1 is shown by a thin dashed line.
  • the fourth period T11 as shown in FIG. 7A, energy is stored in the input inductor Li by the inductor current IL1.
  • the fifth period T12 as shown in FIG. 7B, energy is released from the input inductor Li.
  • the inductor current IL1 is zero, so the inductor current IL1 is not shown in FIG. 7C.
  • the primary current I1 flowing through the primary winding N1 of the transformer Tr1 is shown by a thick dashed line.
  • the first switching element Q1 is off and the second switching element Q2 is on, so that as shown in FIG. 7A, an inductor current IL1 flows through the path of the input inductor Li-second switching element Q2-second diode D2.
  • the inductor current IL1 increases as time passes from the start of the fourth period T11, and energy is stored in the input inductor Li.
  • a primary current I1 flows through the path of the second capacitor C2-primary winding N1-second switching element Q2-second capacitor C2.
  • the first switching element Q1 is on and the second switching element Q2 is off, so as shown in FIG. 7B, an inductor current IL1 flows through the path of input inductor Li - first switching element Q1 - first capacitor C1 - second capacitor C2 - second diode D2.
  • the stored energy in the input inductor Li is released from the input inductor Li, and the inductor current IL1 (absolute value) decreases to zero as time passes from the start of the fifth period T12.
  • a primary current I1 flows through the path of first capacitor C1 - first switching element Q1 - primary winding N1 - first capacitor C1.
  • the sixth period T13 in FIG. 6 is a zero current period in which no current flows through the input inductor Li. That is, the control device 5 controls the first switching element Q1 and the second switching element Q2 so as to include the sixth period T13 in which the inductor current IL1 is zero, thereby setting the mode of the inductor current IL1 to a discontinuous current mode.
  • the primary current I1 flows through the path of the first capacitor C1-first switching element Q1-primary winding N1-first capacitor C1. Note that in the sixth period T13, resonance occurs due to stray capacitance.
  • control device 5 controls the first switching element Q1 and the second switching element Q2 so as to enter a discontinuous current mode that includes a period during which the inductor current IL1 is zero.
  • FIG. 5 also illustrates the waveform of the input current Ii (see FIG. 1) that flows from the AC power source 8 to the converter device 100.
  • ILmax is expressed by the following formula 1.
  • [Li] is the inductance of the input inductor Li.
  • Ton is the on-time in the switching period Tsw of the half-bridge inverter 3, and is the respective lengths of the first period T1 and the fourth period T11.
  • the respective duties of the first switching signal S1 and the second switching signal S2 are equal to each other, so the respective lengths of the first period T1 and the fourth period T11 are the same on-time Ton.
  • the peak value ILmax of the inductor current IL1 changes in proportion to the instantaneous value of the input voltage Vi, making it possible to improve the power factor.
  • the control device 5 also controls the DC bus voltage Vdc of the half-bridge inverter 3 and controls the output voltage Vo of the full-bridge inverter 40.
  • the DC bus voltage Vdc is the voltage across the second series circuit 32 of the first capacitor C1 and the second capacitor C2.
  • the DC bus voltage Vdc is expressed by the following equation 2. Note that Vmax is the maximum value (peak value) of the input voltage Vi. Po is the output power of the converter device 100.
  • Tsw is the switching period of the half-bridge inverter 3 (see Figures 3 and 6). Ton is the on-time in the switching period Tsw of the half-bridge inverter 3, and is the duration of each of the first period T1 and the fourth period T11. [Li] is the inductance of the input inductor Li.
  • the control device 5 makes the duties of the first switching signal S1 and the second switching signal S2 equal to each other, so that if the output power Po is constant, the DC bus voltage Vdc can be kept constant.
  • the control device 5 can control the output voltage Vo by controlling the DC bus voltage Vdc.
  • control device 5 controls the switching frequencies of the first to sixth switching elements Q1 to Q6, thereby controlling the DC bus voltage Vdc of the half-bridge inverter 3 and the output voltage Vo of the full-bridge inverter 40.
  • the control device 5 controls the switching frequency of the first switching element Q1 and the second switching element Q2 by PI control based on the command value Vdc* of the DC bus voltage Vdc of the half-bridge inverter 3 and the detected value [Vdc] of the DC bus voltage Vdc, or by PI control based on the command value Vo* of the output voltage Vo of the full-bridge inverter 40 and the detected value [Vo] of the output voltage Vo. Then, the control device 5 sets the switching frequencies of the third switching element Q3, the fourth switching element Q4, the fifth switching element Q5, and the sixth switching element Q6 to be the same as the switching frequencies of the first switching element Q1 and the second switching element Q2.
  • the control device 5 controls the DC bus voltage Vdc and the output voltage Vo by PFM (Pulse Frequency Modulation) control of the first to sixth switching elements Q1 to Q6.
  • the control device 5 obtains the detection value [Vdc] of the DC bus voltage Vdc and the detection value [Vo] of the output voltage Vo from the detection unit of the DC bus voltage Vdc and the detection unit of the output voltage Vo, respectively.
  • the detection units of the DC bus voltage Vdc and the output voltage Vo may be provided in the converter device 100 or may be provided outside the converter device 100.
  • the control device 5 includes a subtraction unit 51, a PI control unit 52, and a generation unit 53.
  • the subtraction unit 51 calculates the difference between the command value Vdc* and the detection value [Vdc].
  • the PI control unit 52 generates a switching frequency command value fsw* for feedback control to bring the difference value calculated by the subtraction unit 51 closer to zero.
  • the generation unit 53 generates the first and second switching signals S1 to S2, which are rectangular wave signals having a frequency based on the switching frequency command value fsw*, to control the switching frequency of the first and second switching elements Q1 to Q2. Furthermore, the generation unit 53 generates the third to sixth switching signals S3 to S6, which are rectangular wave signals having the same frequency as the first to second switching signals S1 to S2. Thus, the switching frequency of the third to sixth switching elements Q3 to Q6 is controlled to the same frequency as the switching frequency of the first and second switching elements Q1 to Q2.
  • the converter device 100 controls the DC bus voltage Vdc by PFM controlling the first and second switching elements Q1 and Q2. As a result, the converter device 100 can suppress fluctuations in the DC bus voltage Vdc when the load fluctuates.
  • the subtraction unit 51 calculates the difference between the command value Vo* and the detection value [Vo].
  • the PI control unit 52 generates a switching frequency command value fsw* for feedback control that brings the difference value calculated by the subtraction unit 51 closer to zero.
  • the generation unit 53 generates the first to sixth switching signals S1 to S6 in the same manner as above.
  • the converter device 100 controls the output voltage Vo by PFM controlling the first to sixth switching elements Q1 to Q6. As a result, the converter device 100 can suppress fluctuations in the output voltage Vo during load fluctuations.
  • the command value Vdc* of the DC bus voltage Vdc and the command value Vo* of the output voltage Vo are determined in the control device 5 by an external command from the external device to the control device 5.
  • the control device 5 has a function of generating the command value Vdc* or the command value Vo* based on an external command from the external device.
  • a communication protocol used for communication between the external device and the control device 5 for example, MODBUS, CAN, or other serial communication protocols can be used.
  • the external device may be, for example, an external controller. Note that it is not essential to use a specific communication protocol for communication of an external command from the external device to the control device 5.
  • the control device 5 may also be configured to hold data on the command value Vdc* in advance.
  • the control device 5 performs PFM control, which controls the switching frequency of the first to sixth switching elements Q1 to Q6 using PI control.
  • PFM control controls the switching frequency of the first to sixth switching elements Q1 to Q6 using PI control.
  • the converter device 100 can bring the DC bus voltage Vdc or the output voltage Vo closer to the command value even if the output power Po of the converter device 100 fluctuates due to load fluctuations, etc.
  • the control device 5 preferably includes a computer system.
  • the computer system executes a program to realize some or all of the functions of the control device 5.
  • the computer system includes a processor that operates according to a program as its main hardware configuration.
  • the type of processor is not important as long as it can realize the functions by executing the program.
  • the processor is composed of one or more electronic circuits including a semiconductor integrated circuit (Integrated Circuit) or an LSI (Large Scale Integration). Here, it is called an IC or an LSI, but the name changes depending on the degree of integration, and it may be called a system LSI, VLSI (Very Large Scale Integration), or ULSI (Ultra Large Scale Integration).
  • a field-programmable gate array which is programmed after the LSI is manufactured, or a reconfigurable logic device that can reconfigure the junction relationship inside the LSI or set up the circuit partition inside the LSI, can also be used for the same purpose.
  • Multiple electronic circuits may be integrated into one chip or provided on multiple chips.
  • the multiple chips may be integrated in one device, or may be provided in multiple devices.
  • the program is recorded on a non-transitory recording medium such as a computer-readable ROM, an optical disk, or a hard disk drive.
  • the program may be pre-stored on the recording medium, or may be supplied to the recording medium via a wide area communication network including the Internet.
  • the control device 5 may be realized as either a single computer device or multiple computer devices linked to each other.
  • the control device 5 may also be constructed as a cloud computing system.
  • the converter device 100 does not have an inductor connected in series to the primary winding N1 of the transformer Tr1. Therefore, the converter device 100 can reduce iron loss compared to a configuration that has an inductor connected in series to the primary winding N1 of the transformer Tr1.
  • the converter device 100 can achieve high efficiency.
  • the control device 5 makes the duty of the first switching signal S1 and the duty of the second switching signal S2 equal to each other, thereby simplifying the process of generating the first switching signal S1 and the second switching signal S2.
  • control device 5 makes the duties of the third to sixth switching signals S3 to S6 equal to each other, thereby simplifying the process of generating the third to sixth switching signals S3 to S6.
  • control device 5 synchronizes the drive timing of each of the first to sixth switching elements Q1 to Q6, thereby simplifying the process of generating the first to sixth switching signals S1 to S6.
  • control device 5 controls the first switching element Q1 and the second switching element Q2 so that the mode of the current flowing through the input inductor Li is a discontinuous current mode, thereby improving the power factor.
  • the control device 5 controls the switching frequency of the first and second switching elements Q1 to Q2 by PI control based on the command value Vdc* and the detection value [Vdc] of the DC bus voltage Vdc, or by PI control based on the command value Vo* and the detection value [Vo] of the output voltage Vo, and makes the switching frequency of the third to sixth switching elements Q3 to Q6 the same as the switching frequency of the first to second switching elements Q1 to Q2.
  • the converter device 100 according to the first embodiment can suppress fluctuations in the DC bus voltage Vdc or the output voltage Vo during load fluctuations.
  • the converter device 100A according to the second embodiment includes a first half-bridge inverter 3A having the same configuration as the half-bridge inverter 3 in the converter device 100 according to the first embodiment.
  • the converter device 100A also includes a second half-bridge inverter 40A as a second rectifier 4, instead of the full-bridge inverter 40 of the converter device 100.
  • the converter device 100A also includes an output inductor Lo2, instead of the output inductor Lo1 of the converter device 100.
  • the converter device 100A also includes a control device 5A, instead of the control device 5 of the converter device 100.
  • the control device 5A controls the first to fourth switching elements Q1 to Q4, thereby converting the AC input voltage Vi into a DC output voltage Vo.
  • the control device 5A can control the output voltage Vo by controlling the first half-bridge inverter 3A and the second half-bridge inverter 40A.
  • the first half-bridge inverter 3A has the same configuration as the half-bridge inverter 3, and includes a first switching element Q1, a second switching element Q2, a first capacitor C1, and a second capacitor C2. Control terminals of the first switching element Q1 and the second switching element Q2 are connected to the control device 5A.
  • the first switching element Q1 is turned on and off in response to a first switching signal S1 provided by the control device 5A.
  • the second switching element Q2 is turned on and off in response to a second switching signal S2 provided by the control device 5A.
  • the second half-bridge inverter 40A is connected to the secondary winding N2 of the transformer Tr1 via an output inductor Lo2.
  • the second half-bridge inverter 40A includes a third capacitor C3 and a fourth capacitor C4 instead of the fifth switching element Q5 and the sixth switching element Q6 in the converter device 100 according to the first embodiment.
  • the second half-bridge inverter 40A includes a series circuit 41 of the third switching element Q3 and the fourth switching element Q4, and a series circuit 43 of the third capacitor C3 and the fourth capacitor C4.
  • the series circuit 41 of the third switching element Q3 and the fourth switching element Q4 is connected between the output terminal 13 and the output terminal 14.
  • the series circuit 43 of the third capacitor C3 and the fourth capacitor C4 is connected between the output terminal 13 and the output terminal 14.
  • the output capacitor Co is connected between the output terminal 13 and the output terminal 14.
  • the third switching element Q3 and the fourth switching element Q4 each have a control terminal, a first main terminal, and a second main terminal.
  • the control terminals of the third switching element Q3 and the fourth switching element Q4 are connected to the control device 5A.
  • the third switching element Q3 is turned on and off in response to a third switching signal S3 provided by the control device 5A.
  • the fourth switching element Q4 is turned on and off in response to the third switching signal S3 provided by the control device 5A.
  • the control device 5A controls the first half-bridge inverter 3A and the second half-bridge inverter 40A.
  • the control device 5A controls the first switching element Q1 and the second switching element Q2 of the first half-bridge inverter 3A.
  • the control device 5A also controls the third switching element Q3 and the fourth switching element Q4 of the second half-bridge inverter 40A.
  • the control device 5A is configured to provide first to fourth switching signals (control signals) S1 to S4 to the first to fourth switching elements Q1 to Q4, respectively.
  • the first to fourth switching signals S1 to S4 are gate voltages (gate signals) applied between the control terminals and the second main terminals of the first to fourth switching elements Q1 to Q4 to turn the first to fourth switching elements Q1 to Q4 on and off.
  • the control device 5A makes the duty of the third switching signal S3 that controls the third switching element Q3 equal to the duty of the fourth switching signal S4 that controls the fourth switching element Q4. Specifically, the duty of each of the third to fourth switching signals S3 to S4 is 50%.
  • control device 5A controls the first switching element Q1 and the second switching element Q2 so that the mode of the current flowing through the input inductor Li is a discontinuous current mode.
  • control device 5A synchronizes the drive timing of the first switching element Q1 and the second switching element Q2 with the drive timing of the third switching element Q3 and the fourth switching element Q4.
  • control device 5A controls the DC bus voltage Vdc of the first half-bridge inverter 3A and controls the output voltage Vo of the second half-bridge inverter 40A.
  • the control device 5A controls the switching frequency of the first switching element Q1 and the second switching element Q2 by PI control based on the command value Vdc* of the DC bus voltage Vdc of the first half-bridge inverter 3A and the detection value [Vdc] of the DC bus voltage Vdc, or by PI control based on the command value Vo* of the output voltage Vo of the second half-bridge inverter 40A and the detection value [Vo] of the output voltage Vo.
  • the control device 5A then makes the switching frequency of the third switching element Q3 and the fourth switching element Q4 the same as the switching frequency of the first switching element Q1 and the second switching element Q2.
  • the output inductor Lo2 is connected in series to the secondary winding N2, and the output inductor Lo2 is provided between the secondary winding N2 and the second half-bridge inverter 40A.
  • the output current Io is smoothed by the output inductor Lo2, and the ripple component contained in the output current Io is suppressed, so that the loss in the output capacitor Co due to the output current Io can be suppressed. Therefore, the converter device 100A can achieve high efficiency.
  • the control device 5A makes the duty of the first switching signal S1 and the duty of the second switching signal S2 equal to each other, thereby simplifying the process of generating the first switching signal S1 and the second switching signal S2.
  • control device 5A makes the duty of the third switching signal S3 and the duty of the fourth switching signal S4 equal to each other, thereby simplifying the process of generating the third to fourth switching signals S3 to S4.
  • control device 5A synchronizes the drive timing of each of the first to fourth switching elements Q1 to Q4, thereby simplifying the process of generating the first to fourth switching signals S1 to S4.
  • control device 5A controls the first switching element Q1 and the second switching element Q2 so that the mode of the current flowing through the input inductor Li is a discontinuous current mode, thereby improving the power factor.
  • the control device 5 controls the switching frequency of the first and second switching elements Q1 and Q2 by PI control based on the command value Vdc* and the detection value [Vdc] of the DC bus voltage Vdc, or by PI control based on the command value Vo* and the detection value [Vo] of the output voltage Vo, and makes the switching frequency of the third and fourth switching elements Q3 and Q4 the same as the switching frequency of the first and second switching elements Q1 and Q2.
  • the converter device 100A according to the second embodiment can suppress fluctuations in the DC bus voltage Vdc or the output voltage Vo during load fluctuations. Note that suppressing fluctuations in the DC bus voltage Vdc leads to suppressing fluctuations in the output voltage Vo.
  • each of the first switching element Q1 and the second switching element Q2 is not limited to a GaN-based MOSFET, but may be, for example, a Si-based MOSFET, a SiC-based MOSFET, or an IGBT (Insulated Gate Bipolar Transistor).
  • the third to sixth switching elements Q3 to Q6 are not limited to n-channel MOSFETs, but may be p-channel MOSFETs. Furthermore, the MOSFETs constituting the third to sixth switching elements Q3 to Q6 are not limited to Si-based MOSFETs, but may be, for example, SiC-based MOSFETs, IGBTs, or GaN-based GITs.
  • the output inductor Lo1 may be connected between the second DC output terminal 47 of the full-bridge inverter 40 and the low-potential side pole of the output capacitor Co.
  • the output inductor Lo2 may be connected between the first input terminal 44 of the second half-bridge inverter 40A and the secondary winding N2.
  • the input filter 1 may be, for example, a common mode filter.
  • the input inductor Li is not limited to being connected between the AC power source 8 and the half-bridge inverter 3 or the first half-bridge inverter 3A, but may also be connected between the AC power source 8 and the first rectifier 2.
  • the input inductor Li is not limited to being connected between the input terminal 12 and the connection point 33, but may also be connected between the input terminal 11 and the connection point 21.
  • both the input inductor Li connected between the input terminal 12 and the connection point 33, and the input inductor Li connected between the input terminal 11 and the connection point 21 may be provided.
  • a converter device (100, 100A) includes a first rectifier (2), a half-bridge inverter (3, 3A), an input inductor (Li), a transformer (Tr1), a second rectifier (4), an output inductor (Lo1, Lo2), and a control device (5, 5A).
  • the first rectifier (2) has a first diode (D1) and a second diode (D2) connected in series with each other, and a first AC output terminal (81) of an AC power source (8) is connected to a connection point (21) between the first diode (D1) and the second diode (D2).
  • the half-bridge inverter (3, 3A) has a first series circuit (31) of a first switching element (Q1) and a second switching element (Q2), and a second series circuit (32) of a first capacitor (C1) and a second capacitor (C2).
  • the second series circuit (32) is connected in parallel to the first series circuit (31).
  • the first switching element (Q1) is connected to the cathode of the first diode (D1).
  • the second switching element (Q2) is connected to the anode of the second diode (D2).
  • the second AC output terminal (82) of the AC power source (8) is connected to the connection point (33) between the first switching element (Q1) and the second switching element (Q2).
  • the input inductor (Li) is connected between the AC power source (8) and the first rectifier (2) or the half-bridge inverter (3, 3A).
  • the transformer (Tr1) includes a primary winding (N1) and a secondary winding (N2).
  • the primary winding (N1) of the transformer (Tr1) is connected between a first output terminal (34) between the first switching element (Q1) and the second switching element (Q2) and a second output terminal (35) between the first capacitor (C1) and the second capacitor (C2).
  • the second rectifier (4) is connected to the secondary winding (N2) of the transformer (Tr1) and outputs an output voltage (Vo) obtained by rectifying a secondary voltage (V2) generated in the secondary winding (N2) to an output capacitor (Co).
  • the output inductors (Lo1, Lo2) are connected between the secondary winding (N2) and the output capacitor (Co).
  • the control device (5, 5A) controls at least the half-bridge inverter (3).
  • the above-mentioned converter device (100, 100A) can achieve high efficiency.
  • the second rectifier (4) is preferably a full-bridge inverter (40) having a third switching element (Q3), a fourth switching element (Q4), a fifth switching element (Q5) and a sixth switching element (Q6).
  • the output inductor (Lo1) is connected between one of a pair of DC output terminals (46, 47) of the full-bridge inverter (40) and the output capacitor (Co).
  • the control device (5) controls the half-bridge inverter (3) and the full-bridge inverter (40).
  • the above-mentioned converter device (100) can control the output voltage (Vo) by controlling the half-bridge inverter (3) and the full-bridge inverter (40).
  • control device (5) controls the DC bus voltage (Vdc) of the half-bridge inverter (3) and controls the output voltage (Vo) of the full-bridge inverter (40).
  • the above-mentioned converter device (100) can precisely control the output voltage (Vo).
  • the control device (5) makes the duty of the first switching signal (S1) that controls the first switching element (Q1) and the duty of the second switching signal (S2) that controls the second switching element (Q2) equal to each other.
  • the above-mentioned converter device (100) can simplify the process of generating the first switching signal (S1) and the second switching signal (S2).
  • the control device (5) makes the duty of the third switching signal (S3) that controls the third switching element (Q3), the duty of the fourth switching signal (S4) that controls the fourth switching element (Q4), the duty of the fifth switching signal (S5) that controls the fifth switching element (Q5), and the duty of the sixth switching signal (S6) that controls the sixth switching element (Q6) equal to each other.
  • the above-mentioned converter device (100) can simplify the process of generating the third to sixth switching signals (S3 to S6).
  • control device (5) controls the first switching element (Q1) and the second switching element (Q2) so that the mode of the current (IL1) flowing through the input inductor (Li) is a discontinuous current mode.
  • the above-mentioned converter device (100) can improve the power factor.
  • control device (5) synchronizes the drive timing of the first switching element (Q1) and the second switching element (Q2) with the drive timing of the third switching element (Q3), the fourth switching element (Q4), the fifth switching element (Q5), and the sixth switching element (Q6).
  • the above-mentioned converter device (100) can simplify the process of generating the first to sixth switching signals (S1 to S6).
  • the control device (5) preferably controls the switching frequency of the first switching element (Q1) and the second switching element (Q2) by PI control based on the command value (Vdc*) of the DC bus voltage (Vdc) of the half-bridge inverter (3) and the detected value ([Vdc]) of the DC bus voltage (Vdc), or by PI control based on the command value (Vo*) of the output voltage (Vo) of the full-bridge inverter (40) and the detected value ([Vo]) of the output voltage (Vo).
  • the control device (5) sets the switching frequencies of the third switching element (Q3), the fourth switching element (Q4), the fifth switching element (Q5), and the sixth switching element (Q6) to be the same as the switching frequencies of the first switching element (Q1) and the second switching element (Q2).
  • the above-mentioned converter device (100) can suppress fluctuations in the DC bus voltage (Vdc) or the output voltage (Vo) during load fluctuations.
  • the half-bridge inverter is a first half-bridge inverter (3A).
  • the second rectifier (4) is preferably a second half-bridge inverter (40A) having a third switching element (Q3), a fourth switching element (Q4), a third capacitor (C3) and a fourth capacitor (C4).
  • the output inductor (Lo2) is connected in series to the secondary winding (N2).
  • the control device (5A) controls the first half-bridge inverter (3A) and the second half-bridge inverter (40A).
  • the above-mentioned converter device (100A) can control the output voltage (Vo) by controlling the first half-bridge inverter (3A) and the second half-bridge inverter (40A).
  • the control device (5A) controls the DC bus voltage (Vdc) of the first half-bridge inverter (3A) and controls the output voltage (Vo) of the second half-bridge inverter (40A).
  • the above-mentioned converter device (100A) can precisely control the output voltage (Vo).
  • the control device (5A) makes the duty of the first switching signal (S1) that controls the first switching element (Q1) and the duty of the second switching signal (S2) that controls the second switching element (Q2) equal to each other.
  • the above-mentioned converter device (100A) can simplify the process of generating the first switching signal (S1) and the second switching signal (S2).
  • the control device (5A) makes the duty of the third switching signal (S3) that controls the third switching element (Q3) and the duty of the fourth switching signal (S4) that controls the fourth switching element (Q4) equal to each other.
  • the converter device (100A) described above can simplify the process of generating the third and fourth switching signals (S3 to S4).
  • the control device (5A) controls the first switching element (Q1) and the second switching element (Q2) so that the mode of the current (IL1) flowing through the input inductor (Li) is a discontinuous current mode.
  • the above-mentioned converter device (100A) can improve the power factor.
  • the control device (5A) synchronizes the drive timing of the first switching element (Q1) and the second switching element (Q2) with the drive timing of the third switching element (Q3) and the fourth switching element (Q4).
  • the converter device (100A) described above can simplify the process of generating the first to fourth switching signals (S1 to S4).
  • the control device (5A) preferably controls the switching frequency of the first switching element (Q1) and the second switching element (Q2) by PI control based on the command value (Vdc*) of the DC bus voltage (Vdc) of the first half-bridge inverter (3A) and the detected value ([Vdc]) of the DC bus voltage (Vdc), or by PI control based on the command value (Vo*) of the output voltage (Vo) of the second half-bridge inverter (40A) and the detected value ([Vo]) of the output voltage (Vo).
  • the control device (5A) makes the switching frequency of the third switching element (Q3) and the fourth switching element (Q4) the same as the switching frequency of the first switching element (Q1) and the second switching element (Q2).
  • the above-mentioned converter device (100A) can suppress fluctuations in the DC bus voltage (Vdc) or the output voltage (Vo) during load fluctuations.

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0523791U (ja) * 1991-08-28 1993-03-26 株式会社三社電機製作所 絶縁型コンバータ装置
JPH11243646A (ja) * 1998-02-23 1999-09-07 Nippon Electric Ind Co Ltd 充電器用のコンバータ回路
WO2015002088A1 (ja) * 2013-07-04 2015-01-08 住友電気工業株式会社 双方向ａｃ／ｄｃ変換装置、突入電流防止方法及びコンピュータプログラム

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0523791U (ja) * 1991-08-28 1993-03-26 株式会社三社電機製作所 絶縁型コンバータ装置
JPH11243646A (ja) * 1998-02-23 1999-09-07 Nippon Electric Ind Co Ltd 充電器用のコンバータ回路
WO2015002088A1 (ja) * 2013-07-04 2015-01-08 住友電気工業株式会社 双方向ａｃ／ｄｃ変換装置、突入電流防止方法及びコンピュータプログラム

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