WO2025004705A1 - コンデンサ - Google Patents

コンデンサ Download PDF

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Publication number
WO2025004705A1
WO2025004705A1 PCT/JP2024/020279 JP2024020279W WO2025004705A1 WO 2025004705 A1 WO2025004705 A1 WO 2025004705A1 JP 2024020279 W JP2024020279 W JP 2024020279W WO 2025004705 A1 WO2025004705 A1 WO 2025004705A1
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WIPO (PCT)
Prior art keywords
electrode
edge
wiring
dielectric layer
capacitor
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PCT/JP2024/020279
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English (en)
French (fr)
Japanese (ja)
Inventor
悟 直川
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Kyocera Corp
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Kyocera Corp
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Priority to JP2024558230A priority Critical patent/JPWO2025004705A1/ja
Publication of WO2025004705A1 publication Critical patent/WO2025004705A1/ja
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/30—Stacked capacitors

Definitions

  • This disclosure relates to a capacitor.
  • a multilayer ceramic capacitor having multiple dielectric layers and multiple electrodes that are alternately stacked is known (for example, see Patent Document 1 below).
  • two rectangular electrodes face each other with a rectangular dielectric layer in between.
  • Wires extend from one electrode toward a pair of diagonal corners of the dielectric layer.
  • Wires extend from the other electrode toward the other pair of diagonal corners of the dielectric layer.
  • an external terminal for connection to the outside is provided so as to cover the side surface of the dielectric layer.
  • the shape of each wire is rectangular with the corners overlapping the electrode. In other words, the edges of the wire extend in a direction perpendicular to the sides of the electrodes and the sides of the dielectric layer.
  • the capacitor according to one aspect of the present disclosure has a dielectric layer, a first electrode, a second electrode, a first wiring, and a second wiring.
  • the dielectric layer is rectangular with a first side extending from a first side to a second side.
  • the first electrode and the second electrode face each other with the dielectric layer sandwiched in the thickness direction.
  • Each electrode is rectangular with four sides parallel to the four sides of the dielectric layer.
  • the first wiring extends from the first electrode to an end of the first side of the first side.
  • the second wiring extends from the second electrode to an end of the first side of the first side.
  • the first edge of the first wiring on the second side is inclined with respect to the first side in a first direction located on the second side as it approaches the first electrode.
  • the second edge of the second wiring on the first side is inclined with respect to the first side in a second direction located on the first side as it approaches the second electrode.
  • FIG. 1 is a perspective view showing a capacitor according to an embodiment.
  • FIG. 2 is a schematic exploded perspective view of the capacitor of FIG. 1 .
  • FIG. 2 is a cross-sectional view taken along line III-III in FIG.
  • FIG. 4 is a cross-sectional view taken along line IV-IV in FIG.
  • FIG. 2 is a plan view perspective view illustrating the effect of the capacitor of FIG. 1 .
  • 1 is a table showing characteristics of capacitors according to examples and comparative examples.
  • the corners may be chamfered with a curved surface or the like, as long as the concept of the shape described above is valid. For example, one side may be chamfered to a length of 1/10 or 1/20 of its length or less. It goes without saying that when viewed microscopically, the corners may be rounded due to manufacturing precision (error). The same applies to other polygons, etc.
  • Fig. 1 is a perspective view showing a capacitor 1 according to an embodiment.
  • a Cartesian coordinate system D1D2D3 is attached to Fig. 1 and other figures described later.
  • the capacitor 1 may be used with either side being the upper or lower.
  • the +D3 side may be considered to be the upper side, and terms such as the upper surface and the lower surface may be used.
  • Capacitor 1 is, for example, a multilayer ceramic capacitor. Capacitor 1 has a roughly rectangular parallelepiped body 3 and four external terminals 5 located at the four corners of body 3 in a plan view (as viewed in the D3 direction). The external terminals 5 contribute to the electrical connection between capacitor 1 and other electronic components (for example, a circuit board not shown).
  • FIG. 2 is an exploded perspective view of the capacitor 1.
  • FIG. 3 is a cross-sectional view taken along line III-III in FIG. 1. Note that FIG. 2 is a schematic view for understanding the shape and relative positions of the electrodes. Therefore, FIG. 2 shows a smaller number of various layers, which will be described later, than FIG. 3.
  • the main body 3 has a first electrode 9A and a second electrode 9B (sometimes referred to as “electrodes 9" without distinguishing between them) that face each other with a dielectric layer 7 in between. From another perspective, in the main body 3, a plurality of dielectric layers 7 and a plurality of electrodes 9 are stacked alternately one by one.
  • the first electrode 9A is connected to a pair of external terminals 5 via a pair of first wirings 11A.
  • the second electrode 9B is connected to another pair of external terminals 5 via a pair of second wirings 11B.
  • the first wirings 11A and the second wirings 11B are sometimes referred to as "wirings 11" without distinguishing between them.
  • the planar shape of the dielectric layer 7 is generally rectangular (square in the illustrated example).
  • the planar shape of the electrode 9 is generally rectangular (square in the illustrated example) with four sides parallel to the four sides of the dielectric layer 7.
  • the pair of wirings 11 extend from a pair of opposing corners of the electrode 9 and reach a pair of corners of the dielectric layer 7 located on the outside. When viewed from above, the pair of first wirings 11A and the pair of second wirings 11B are located at a pair of different corners of the dielectric layer 7.
  • FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 1. From another perspective, it is a plan view of the upper surface of the first electrode 9A. In this figure, the second wiring 11B is also shown by a dotted line.
  • the first wiring 11A on the -D1 side can be considered to extend to the end on the +D2 side of the first side 7a.
  • the second wiring 11B on the -D1 side can be considered to extend to the end on the -D2 side of the first side 7a.
  • the first wiring 11A and the second wiring 11B may refer to the -D1 side unless otherwise specified.
  • the first edge 11Aa which is the edge on the -D2 side of the first wiring 11A, is inclined with respect to the first side 7a in a direction that is closer to the -D2 side as it approaches the first electrode 9A.
  • the second edge 11Ba which is the edge on the +D2 side of the second wiring 11B, is inclined with respect to the first side 7a in a direction that is closer to the +D2 side as it approaches the second electrode 9B.
  • the capacitor 1 may be in various forms so long as it has a first wiring 11A extending from the first electrode 9A to one end of the first side 7a on the upper surface of the dielectric layer 7, and a second wiring 11B extending to the other end of the first side 7a on the lower surface of the dielectric layer 7. That is, the overall configuration of the capacitor 1 is not limited to those illustrated in Figures 1 to 4. However, in the description of the embodiment, for convenience, the description may be made on the premise of the illustrated example, without special notice.
  • Capacitor 1 is configured, for example, as a surface-mounted chip-type component. Specifically, for example, capacitor 1 is placed with its -D3 side or +D3 side facing a circuit board (not shown). Then, the four pads on the circuit board and the four external terminals 5 are respectively joined with a conductive bonding material (for example, solder) (not shown), thereby mounting the capacitor on the circuit board.
  • a conductive bonding material for example, solder
  • the configuration (internal structure and external shape) of capacitor 1 is, for example, roughly (except for asymmetry resulting from differences in the orientation of first wiring 11A and second wiring 11B) symmetrical with respect to a plane of symmetry (not shown) that is parallel to the D1D2 plane and passes through the center of capacitor 1 in the thickness direction.
  • the configuration of capacitor 1 is, for example, rotationally symmetrical by 180° when viewed in the D3 direction. Of course, capacitor 1 does not have to have such symmetry.
  • the shape of the main body 3 shown in FIG. 1 is generally a thin rectangular parallelepiped.
  • This rectangular parallelepiped may be a square (as shown in the example) or a rectangle (excluding a square; the same applies below) in plan view.
  • a square shape may be assumed unless otherwise specified.
  • the specific dimensions of the main body 3 (or the capacitor 1) are arbitrary. As an example of dimensions when the capacitor 1 is relatively small, the length of the main body 3 (or the capacitor 1) in the D1 direction and the D2 direction are each 400 ⁇ m or more and 800 ⁇ m or less, and the thickness in the D3 direction is 50 ⁇ m or more and 100 ⁇ m or less.
  • the portion of the main body 3 where the dielectric layers 7 and the electrodes 9 (and wiring 11) are alternately stacked is referred to as the functional portion 13.
  • the functional portion 13 may be a part of the main body 3 (as in the illustrated example) or may be the entirety of the main body 3.
  • the main body 3 has two covers 15 that overlap the upper and lower surfaces of the functional portion 13, respectively.
  • the covers 15 contribute, for example, to improving the strength of the main body 3.
  • multiple components of the same type may be provided with the same (or corresponding) shape, size, material, and position, etc., unless otherwise specified or unless a contradiction occurs.
  • multiple dielectric layers 7 may be configured with the same shape, size, and material, and may overlap with each other without any excess or deficiency in a planar perspective. Therefore, unless otherwise specified or unless a contradiction occurs, a description of one component may be considered to be common to multiple components of the same type.
  • individual mention of multiple components of the same type being able to overlap with each other without any excess or deficiency in a planar perspective may be omitted.
  • a single layered (membrane-like) component may be entirely made of one type of material. However, it may also be made of layers of different materials stacked on top of each other.
  • the capacitor 1 may have, for example, two external terminals 5 at both ends of the longitudinal direction in a plan view, instead of four external terminals 5.
  • the D2 direction is the longitudinal direction
  • one first wiring 11A extending from almost the entirety of one side on the +D2 side of the first electrode 9A to the +D2 side
  • one second wiring 11B extending from almost the entirety of one side on the -D2 side of the second electrode 9B to the -D2 side
  • the edge of the wiring 11 may be inclined with respect to the -D1 side and/or the +D1 side.
  • the capacitor 1 may also have an exterior resin that covers the entire illustrated structure, and lead wires that are connected to the external terminals 5 (for example, the total number is four or two) and extend from the exterior resin.
  • the configuration in which the first edge portion 11Aa and the second edge portion 11Ba are inclined as described in the outline of the embodiment is established, for example, on all four sides of the dielectric layer 7. Also, it is established on all of the dielectric layers 7. However, the above configuration may be established on only one of the four sides. Also, it may be established on only some of the dielectric layers 7.
  • the shape of the functional part 13 is, for example, roughly a thin rectangular parallelepiped. Its planar shape is the same as that of the main body part 3. However, unlike the illustrated example, the planar shape of the functional part 13 may differ from that of the main body part 3 by, for example, covering the side of the functional part 13 perpendicular to the first edge 7a with another insulating layer.
  • the specific thickness of the functional part 13 is arbitrary. For example, the thickness of the functional part 13 may be 0.2 to 0.8 times the thickness of the main body part 3 (both thicknesses are based on the surface of the insulating part).
  • the functional section 13 has multiple dielectric layers 7. However, in theory, the functional section 13 may have only one dielectric layer 7.
  • the first electrodes 9A and the second electrodes 9B are stacked alternately, one by one, with the dielectric layer 7 sandwiched between them. Unlike the example shown in the figure, the first electrodes 9A and the second electrodes 9B may be stacked alternately, two by two. In other words, the layers may be stacked in the following order in the thickness direction: first electrode 9A, dielectric layer 7, first electrode 9A, dielectric layer 7, second electrode 9B, dielectric layer 7, second electrode 9B, dielectric layer 7, first electrode 9A, dielectric layer 7, first electrode 9A, etc.
  • the dielectric layer 7 is basically a layer having a constant thickness (at least between the electrodes 9).
  • the thickness of the dielectric layer 7 may be appropriately set according to the characteristics required of the capacitor 1.
  • An example of a relatively thin thickness is a thickness between the electrodes 9 of 3 ⁇ m or less, or 1 ⁇ m or less.
  • the shape and dimensions of the dielectric layer 7 in a planar view are the same as the shape and dimensions of the functional section 13 in a planar view.
  • the material of the dielectric layer is, for example, ceramics, and the specific type is also arbitrary.
  • the number of laminated dielectric layers 7 (electrodes 9) is arbitrary. For example, it is 10 layers or more and 30 layers or less.
  • the electrode 9 is in the form of a layer having a certain thickness.
  • the thickness of the electrode 9 is arbitrary, and may be thinner, approximately the same as, or thicker than the thickness of the region between the electrodes 9 of the dielectric layer 7.
  • the material of the electrode 9 is, for example, a metal.
  • the specific type of metal is arbitrary, and may be, for example, a base metal (e.g., Ni and Cu).
  • the planar shape of the electrode 9 is, for example, a rectangle with four sides parallel to the four sides of the dielectric layer 7.
  • the relationship between the two planar shapes may be square-square (as shown in the example), square-rectangle, or rectangle-square.
  • the outer edge of the electrode 9 is spaced inward from the outer edge of the dielectric layer 7 along its entire circumference (along all four sides). However, it is acceptable for them to overlap in part.
  • the geometric center of the electrode 9 roughly coincides with the geometric center of the dielectric layer 7, for example. However, it is acceptable for the two to be misaligned with each other.
  • the dimensions of the electrode 9 in a plan view are arbitrary, so long as there is a distance between the first side 7a of the dielectric layer 7 and one side of the electrode 9 parallel to it (so long as the length of the electrode 9 in the D1 direction is shorter than the length of the dielectric layer 7 in the D1 direction).
  • the former when comparing the lengths of the parallel sides of the electrode 9 and the dielectric layer 7, the former may be 0.6 to 0.9 or 0.8 to 0.9 relative to the latter.
  • the distance between the parallel sides of the electrode 9 and the dielectric layer 7 may be 0.05 to 0.20 or 0.05 to 0.10 of the length of the dielectric layer 7 in the opposing direction of the two.
  • the above example lengths and distances may apply to, for example, all four sides.
  • the wiring 11 is in the form of a layer having a certain thickness.
  • the wiring 11 is, for example, formed integrally with the electrode 9. That is, the material and thickness of the wiring 11 are the same as the material and thickness of the electrode 9.
  • the wiring 11 extends from the electrode 9 to the edge of the dielectric layer 7 and is exposed at the side surface of the main body 3.
  • the external terminal 5 is joined to this exposed portion. This electrically connects the external terminal 5 and the electrode 9.
  • the wiring 11 extends from the corner of the electrode 9 to the corner of the dielectric layer 7 located on the outside of the electrode 9.
  • the two lateral edges of the wiring 11 extend from the two intersecting sides of the electrode 9 and reach the two sides of the dielectric layer 7 that are parallel to the two sides.
  • the center line (not shown) of the wiring 11 extends from the apex of the corner of the electrode 9 (integrated with the wiring 11, but can be identified from the two intersecting sides of the electrode 9) to the apex of the corner of the dielectric layer 7.
  • the wiring 11 has a shape that is line-symmetrical with respect to a line (not shown) that extends from the apex of the corner of the electrode 9 to the apex of the corner of the dielectric layer 7. Therefore, a description of one of the two edges of the wiring 11 may be applied to the other edge, unless a contradiction arises.
  • the center line of the wiring 11 may be offset from the line from the vertex of the electrode 9 to the vertex of the dielectric layer 7. Furthermore, the offset between the center line of the wiring 11 and the line between the vertices may be so large that one edge of the wiring 11 overlaps or exceeds the line between the vertices. Furthermore, the center line of the wiring 11 and the line between the vertices may be inclined relative to each other.
  • the wiring 11 extends linearly, for example, with a constant width. In other words, the edges on both sides of the wiring 11 are linear and parallel to each other over their entire length.
  • the width of the wiring 11 may vary depending on the position along the length of the wiring 11 over part or all of the length of the wiring 11. Also, the centerline, one edge, and/or both edges of the wiring 11 may be curved (curved and/or bent) over part or all of the length of the wiring 11.
  • the inclination of the wiring 11 described in the overview of the embodiment is established on all four sides of the dielectric layer 7. From another perspective, both of the two lateral edges of each wiring 11 are inclined with respect to the side of the dielectric layer 7 (and electrode 9) to which it is connected. However, the inclination of the wiring 11 may be established on only one of the two edges.
  • the first edge 11Aa or the second edge 11Ba may be inclined with respect to the first side 7a only in a portion thereof.
  • the length over which the first edge 11Aa (or the second edge 11Ba) is inclined with respect to the first side 7a may be, for example, 0.5 or more or 0.8 or more of the length of the first edge 11Aa.
  • the dimensions of the wiring 11 are arbitrary.
  • the length of the wiring 11 please refer to the example of the distance between the side of the dielectric layer 7 and the side of the electrode 9 (mentioned above).
  • the width of the wiring 11 may be set, for example, so that the length L1 (FIG. 4) of the wiring 11 in contact with one side of the dielectric layer 7 is 0.3 to 0.4 times the length of one side of the electrode 9 and/or 0.2 to 0.4 times the length of one side of the dielectric layer 7.
  • the inclination angle ⁇ (FIG. 4) of the first edge 11Aa (or the second edge 11Ba) with respect to the first side 7a is also arbitrary.
  • the inclination angle ⁇ may be 18° or more and 80° or less, or 30° or more and 60° or less.
  • the magnitude of this inclination angle ⁇ may be, for example, 0.6 or more, 0.8 or more, or the entire length of the first edge 11Aa.
  • the effect of the magnitude of the inclination angle ⁇ on the characteristics of the capacitor 1 will be described later in the explanation of the embodiment (FIG. 6).
  • the cover 15 shown in Fig. 3 is provided on both the upper and lower surfaces of the functional part 13, for example. Unlike the illustrated example, the cover 15 may be provided on only one of the upper and lower surfaces of the functional part 13.
  • the cover 15 is, for example, a layer having a shape and dimensions that overlap the functional part 13 without excess or deficiency in planar perspective.
  • the thickness of the cover 15 is approximately constant.
  • the ratio of the thickness of the cover 15 to the thickness of the main body part 3 is the reverse of the ratio of the thickness of the functional part 13 to the thickness of the main body part 3 (already described), so an example of the specific ratio will be omitted.
  • Each cover 15 has, for example, at least one (multiple in the illustrated example) insulating layer 17 and at least one (multiple in the illustrated example) dummy layer 21 (the reference numerals cover FIG. 3) overlapping the insulating layer 17.
  • Each dummy layer 21 has, for example, four dummy electrodes 19 as shown in FIG. 2.
  • the dummy electrodes 19 contribute, for example, to reinforcing the cover 15 and/or improving the connection strength between the main body 3 and the external terminals 5.
  • the cover 15 may have only one or more insulating layers 17 (it may not have a dummy layer 21).
  • the insulating layers 17 and the dummy layers 21 are alternately stacked one on top of the other.
  • the dummy layers 21 are provided at the boundaries of all the insulating layers 17.
  • the dummy layers 21 may be provided only at some of the boundaries.
  • the dummy layers 21 may not be provided at one or more boundaries that are relatively close to the functional section 13, and the dummy layers 21 may be provided only at one or more boundaries that are relatively far from the functional section 13.
  • two or more insulating layers 17 that are in close contact with each other without a dummy layer 21 in between may be regarded as one insulating layer 17.
  • the insulating layer 17 is a layer having a generally constant thickness, except for variations in thickness resulting from the presence or absence of overlap with the conductor layers (9, 11, and 19).
  • the planar shape of the insulating layer 17 is, for example, the same as the planar shape of the dielectric layer 7.
  • the material of the insulating layer 17 is arbitrary.
  • the material of the insulating layer 17 may be the same as the material of the dielectric layer 7, or may be different.
  • the material of the insulating layer 17 may be, for example, ceramics, or a material other than ceramics.
  • the thickness of the insulating layer 17 is arbitrary.
  • the thickness of the insulating layer 17 may be thicker (as in the illustrated example), equal to, or thinner than the thickness of the dielectric layer 7 (either the thickness between the conductor layers or the thickness of the area not overlapping the conductor layers; the same applies below in this paragraph).
  • the thickness of the insulating layer 17 may be at least two times, at least five times, or at least ten times, the thickness of the dielectric layer 7, and may be at least 5 ⁇ m and at most 20 ⁇ m.
  • the top layer of the functional section 13 is a conductor layer including electrodes 9 and wiring 11.
  • the top electrode 9 is covered by the bottom insulating layer 17 of the top cover 15.
  • the configuration at the above-mentioned boundary may be different from that shown in the example.
  • the top layer of the functional section 13 may be a dielectric layer 7.
  • the top dielectric layer 7 may overlap the bottom insulating layer 17 of the upper cover 15, or the top dielectric layer 7 may overlap the bottom dummy electrode 19.
  • all of the dielectric layers 7 and all of the insulating layers 17 do not need to be distinguishable from each other in terms of their materials, thicknesses, etc.
  • the material between the electrodes 9 functions as a dielectric to increase the capacitance.
  • the material between the topmost of the multiple electrodes 9 and the bottommost of the multiple dummy electrodes 19 of the upper cover 15 functions as an insulating layer that insulates them.
  • the insulating layer between the topmost of the multiple electrodes 9 and the bottommost of the multiple dummy electrodes 19 may be considered as the insulating layer 17 of the cover 15, regardless of whether it has the same configuration as the dielectric layer 7 between the electrodes 9 or the insulating layer 17 between the dummy layers 21, or whether it is a combination of the previous two layers.
  • the upper cover 15 is used as an example, but the same applies to the lower cover 15.
  • the words top layer and bottom layer are interchangeable.
  • the dummy electrode 19 (in other words, the dummy layer 21) is, for example, a layer having a certain thickness.
  • the material of the dummy electrode 19 is, for example, a metal.
  • the specific type of metal is arbitrary, and is, for example, a base metal (e.g., Ni and Cu).
  • the material of the dummy electrode 19 may be the same as or different from the material of the electrode 9 (and the wiring 11).
  • the position, shape, and dimensions of the dummy electrodes 19 are arbitrary.
  • the dummy electrodes 19 are located at the four corners of the dielectric layer 7 in a planar perspective view. From another perspective, the positions of the dummy electrodes 19 correspond to the positions of the external terminals 5.
  • the planar shape of the dummy electrodes 19 is rectangular (more specifically, square).
  • the lengths of the four sides of the dummy electrodes 19 are the same as the length L1 on the first side 7a of the wiring 11 described above. In other words, the lengths of the wiring 11 and the dummy electrodes 19 are the same on each side of the dielectric layer 7.
  • the size of the dummy electrodes 19 in plan view is roughly the same as the size of the external terminals 5 in plan view.
  • the dummy electrode 19 may overlap the electrode 9 in plan view (overlapping a corner of the electrode 9 in the illustrated example), or may not overlap. In the latter case, the dummy electrode 19 may be formed, for example, in an L-shape along a corner (two intersecting sides) of the dielectric layer 7.
  • the dummy electrode 19 overlaps the electrode 9, for example, a large area of the dummy electrode 19 is ensured, and the effect of improving the strength by the dummy electrode 19 is improved.
  • the dummy electrode 19 does not overlap the electrode 9, for example, the electrical influence of the dummy electrode 19 on the electrode 9 is reduced.
  • the dummy electrode 19 is exposed, for example, on the side of the main body 3. This exposed portion is joined to the external terminal 5. As a result, the dummy electrode 19 contributes to improving the connection strength between the main body 3 and the external terminal 5. Unlike the example shown, the dummy electrode 19 does not have to be connected to the external terminal 5. For example, the dummy electrode 19 is provided so as not to be exposed from the side of the main body 3, and while it contributes to improving the strength of the main body 3, it does not have to contribute to improving the connection strength with the external terminal 5.
  • the thickness of the dummy electrode 19 is arbitrary.
  • the thickness of the dummy electrode 19 may be thicker than the thickness of the electrode 9 (as in the illustrated example), may be approximately the same as the thickness of the electrode 9, or may be thinner.
  • the thickness of the dummy electrode 19 may be two or more times, five or more times, or ten or more times the thickness of the electrode 9.
  • the thickness of the dummy electrode 19 may be thinner than the thickness of the insulating layer 17 (as in the illustrated example), may be the same as the thickness of the electrode 9, or may be thicker than the thickness of the insulating layer 17.
  • a dummy layer 21 is provided on the top layer of the upper cover 15.
  • the four dummy electrodes 19 are covered by the external terminals 5.
  • the dummy layer 21 does not have to be provided on the top layer of the upper cover 15.
  • the layered (film-like) components may be composed of two or more layers.
  • the external terminal 5 may also be composed of two or more layers.
  • the lower layer of the external terminal 5 and the uppermost dummy electrode 19 may or may not be distinguishable from the standpoint of thickness and/or material. Therefore, the presence or absence of the dummy electrode 19 may be determined by the presence or absence of the dummy electrode 19 that is covered by the insulating layer 17 from the side opposite the functional section 13 (dielectric layer 7).
  • the four dummy electrodes 19 overlap the electrodes 9 in planar perspective, and the four dummy electrodes 19 are connected to external terminals 5 at different potentials. Therefore, the dummy layer 21 and the conductive layer including the electrodes 9 must be separated by the dielectric layer 7 and/or the insulating layer 17. However, this does not apply in cases where some or all of the four dummy electrodes 19 do not overlap the electrodes 9 in planar perspective, or where some or all of the four dummy electrodes 19 are not connected to the external terminals 5.
  • the external terminal 5 shown in FIG. 1 is, for example, generally in the form of a layer covering the four faces (upper face, lower face, and two side faces) of the main body 3 at the four corners in a plan view of the main body 3. This allows the connection between the external terminal 5 and the wiring 11 to be made at the two side faces of the main body 3, and also allows the capacitor 1 to be surface-mounted on either the upper or lower face. If the decrease in practicality is ignored, the external terminal 5 may cover only two faces (a combination of the upper or lower face and one side face), for example. Unlike the illustrated example, in a mode in which two external terminals 5 are provided at both ends of the main body 3, the external terminal 5 may cover five faces at both ends. In a mode in which a lead wire is joined to the external terminal 5, the external terminal 5 may only cover at least one side face.
  • the shape, dimensions, and material of the portions on each side of the external terminal 5 are arbitrary. As described above, the planar shape and dimensions of the portion of the external terminal 5 located on the upper or lower surface of the main body 3 are generally the same as those of the dummy electrode 19 (e.g., square). Therefore, the description of the planar shape and dimensions of the dummy electrode 19 may be applied to the above-mentioned portion of the external terminal 5. In addition, the planar shape and dimensions of the portion of the external terminal 5 located on the side surface of the main body 3 are rectangular with the same lateral length as the portion located on the upper or lower surface.
  • the thickness of the external terminal 5 (film) may be, for example, thicker than the thickness of the electrode 9 and the dummy electrode 19.
  • the material of the external terminal 5 may be, for example, a layer of Ag or Cu plated with Ni and Sn.
  • first external terminal 5A located on the +D2 side of the first side 7a.
  • the end of the first edge 11Aa on the first side 7a side and the end of the first external terminal 5A on the -D2 side are in roughly the same position in the D2 direction.
  • the above ends being in roughly the same position may be defined as, for example, a case in which the positional deviation of the above ends is small as follows.
  • the distance between the end of the first edge 11Aa on the first electrode 9A side and the end of the first edge 11Aa on the first side 7a side is defined as d1.
  • the distance between the end of the first edge 11Aa on the first side 7a side and the end of the -D2 side of the portion of the first external terminal 5A that is along the first side 7a may be less than 1/2, 1/5, or 1/10 of the distance d1 (approximately 0 in the illustrated example).
  • the specific value of the distance d1 is arbitrary.
  • the distance d1 may be 0.2 or less, 0.1 or less, or 0.08 or less relative to the length of the first side 7a.
  • the distance d1 may be 100 ⁇ m or less, or 50 ⁇ m or less.
  • the distance between the ends may be within a range of a predetermined absolute value.
  • the distance between the ends may be less than 20 ⁇ m, less than 10 ⁇ m, or less than 5 ⁇ m.
  • the above-mentioned range of distances between the ends may be allowed only on the +D2 side with respect to the end on the -D2 side of the first external terminal 5A (i.e., the first edge 11Aa may be required to be connected to the first external terminal 5A), or may be allowed on both the +D2 side and the -D2 side.
  • the side surface of the film constituting the first external terminal 5A is not necessarily perpendicular to the first edge 7a. That is, the position of the end of the first external terminal 5A in the D2 direction may differ between the inner surface (in other words, the surface connected to the wiring 11) and the outer surface of the first external terminal 5A. If such a difference in position is an issue when determining whether the distance between the first edge 11Aa and the first external terminal 5A is within the above range, the position of the end of the inner surface may be used as the reference. Of course, if there is no effect on the determination, there is no need to distinguish between the inner surface and the outer surface of the external terminal 5.
  • the first edge portion 11Aa and the first external terminal 5A are taken as an example, but the same applies to the second edge portion 11Ba and the external terminal 5 connected to the second edge portion 11Ba (sometimes referred to as the "second external terminal 5B").
  • the capacitor 1 may be manufactured by various methods, for example, a method similar to a known method. An example is shown below.
  • ceramic green sheets that will become the dielectric layer 7 and the insulating layer 17 are prepared.
  • a conductive paste that will become the conductor layer including the electrode 9 or the dummy layer 21 is applied to the ceramic green sheets.
  • the ceramic green sheets are stacked to prepare a laminate that will become the main body portion 3.
  • the above-mentioned laminate is produced, for example, on a mother board of a size on which a large number of main body parts 3 are obtained.
  • the arrangement of the multiple main body parts 3 on the mother board is arbitrary.
  • the main body parts 3 are arranged vertically and horizontally parallel to the D1 and D2 directions.
  • the parts of the wiring 11 located on the sides of the dielectric layer 7 of adjacent main body parts 3 may be connected to each other.
  • the mother board including the laminate is diced (e.g., cut) into pieces of a size roughly corresponding to the size of the main body 3.
  • the laminate having the size of the main body 3 is fired.
  • polishing e.g., barrel polishing
  • a metal film is formed on the main body 3 to form the external terminals 5.
  • Fig. 5 is a schematic diagram for explaining the principle of the effect of inclining the first edge portion 11Aa and the second edge portion 11Ba.
  • the upper and lower diagrams correspond to Fig. 4 with the external terminals 5 omitted.
  • the upper diagram shows a capacitor 101 according to a comparative example.
  • the lower diagram shows a capacitor 1 according to the embodiment.
  • the wiring 111 (first wiring 111A and second wiring 111B) is in the shape of a square with the corners overlapping the electrode 9. That is, the edges of the wiring 111 (first edge 111Aa and second edge 111Ba) are perpendicular to the first side 7a.
  • a current path from the first wiring 111A to the second wiring 111B is created along the first edge 111Aa and second edge 111Ba, as shown by arrow a1.
  • the shape of this path is like three sides of a rectangle, since the first edge 111Aa and second edge 111Ba are perpendicular to the first side 7a.
  • first edge 11Aa and second edge 11Ba are inclined.
  • the current path equivalent to the current path indicated by arrow a1 in capacitor 101 has a shape like two legs and an upper base of a trapezoid, as indicated by arrow a3.
  • the length L1 at which wiring 11 or 111 contacts first side 7a is the same for both.
  • the path indicated by arrow a3 is shorter than the path indicated by arrow a1.
  • the equivalent series inductance is reduced in capacitor 1 compared to capacitor 101.
  • the manufacturing method of the capacitor 1 reduces the variation in the equivalent series inductance and/or the equivalent series resistance. Specifically, this is as follows:
  • the edge of electrode 9 and the edge of wiring 111 are perpendicular to each other. That is, a 90° concave corner is formed in the conductor layer including electrode 9 and wiring 111. In such a portion, the corners are likely to be rounded, resulting in errors from the intended shape. Furthermore, errors are likely to occur in the length of the current paths along these edges. As a result, the equivalent series inductance and/or equivalent series resistance are likely to vary.
  • capacitor 1 as shown in region R3, the edge of electrode 9 and the edge of wiring 11 form a concave corner at an angle greater than 90°. Therefore, compared to region R1, errors such as rounded corners are less likely to occur. As a result, the equivalent series inductance and/or equivalent series resistance are less likely to vary.
  • the main body portion 3 may be produced by dividing the mother substrate, and on the mother substrate, adjacent main body portions 3 may be connected to each other at the portions of the wiring 11 that are located on the sides of the dielectric layer 7.
  • regions R5 and R7 the edges of adjacent wirings 111 or adjacent wirings 11 are connected to each other.
  • the angle of the concave corners is smaller in region R7 than in region R5, making it easier for errors to occur in the form of rounded corners.
  • (6.2. Example) 6 is a table showing the characteristics of the capacitors according to the example and the comparative example, which shows, for example, that the above-mentioned effects are achieved.
  • “No.” is an identification number assigned to the sample.
  • “ ⁇ (°)” is the inclination angle of the edge of the wiring 11 (or 111) with respect to the side of the dielectric layer 7 (see Figure 4).
  • ESL (pH) is the value of the equivalent series inductance.
  • CV_ESL (%) is the coefficient of variation (standard deviation of ESL/average value of ESL) that indicates the variation of the equivalent series inductance (ELS).
  • “CV_ESR (%)” is the coefficient of variation (standard deviation of ESR/average value of ESR) that indicates the variation of the equivalent series resistance (ESR).
  • Length of one side of the dielectric layer 7 590 ⁇ m Distance between one side of the electrode 9 and one side of the dielectric layer 7 that are parallel to each other: 40 ⁇ m
  • the CV of ESL is smallest when ⁇ is 45°, and increases when ⁇ is smaller or larger than 45°. The same is true for the CV of ESR. This is believed to be because, when ⁇ decreases from 90° to 45°, the shape error of the corners of regions R1 and R3 in Figure 5 decreases, while when ⁇ decreases from 45° to 18°, the shape error of the corners of regions R5 and R7 in Figure 5 increases.
  • the capacitor 1 has the dielectric layer 7, the first electrode 9A, the second electrode 9B, the first wiring 11A, and the second wiring 11B.
  • the dielectric layer 7 is rectangular including the first side 7a extending from the first side (+D2 side) to the second side (-D2 side).
  • the first electrode 9A and the second electrode 9B are opposed to each other with the dielectric layer 7 sandwiched in the thickness direction, and are rectangular having four sides parallel to the four sides of the dielectric layer 7.
  • the first wiring 11A extends from the first electrode 9A to the end of the first side 7a on the +D2 side.
  • the second wiring 11B extends from the second electrode 9B to the end of the first side 7a on the -D2 side.
  • the first edge 11Aa on the -D2 side of the first wiring 11A is inclined with respect to the first side 7a in a first direction located closer to the first electrode 9A on the -D2 side.
  • a second edge 11Ba on the +D2 side of the second wiring 11B is inclined with respect to the first side 7a in a second direction located closer to the +D2 side as it approaches the second electrode 9B.
  • ESL can be reduced.
  • the concave corner formed by the electrode 9 and the wiring 11 can be made larger than 90°, the likelihood of shape errors occurring such as rounding the corner can be reduced. As a result, for example, the variation in ESL and ESR can be reduced.
  • the first edge 11Aa may be inclined in the above-mentioned first direction from the first electrode 9A to the first side 7a.
  • the second edge 11Ba may be inclined in the above-mentioned second direction from the second electrode 9B to the first side 7a.
  • the above-mentioned ends can be connected over a shorter distance compared to a configuration in which a portion of the first edge 11Aa is not inclined toward the first side 7a (this configuration may also be included in the technology related to the present disclosure).
  • this configuration may also be included in the technology related to the present disclosure.
  • the effect of reducing ESL is improved.
  • the second edge 11Ba Note that, from the perspective of reducing the CV of ESL and the CV of ESR, the portion of the first edge 11Aa that reaches the first side 7a does not need to be inclined toward the first side 7a.
  • the first edge 11Aa may be linear from the first electrode 9A to the first side 7a.
  • the second edge 11Ba may be linear from the second electrode 9B to the first side 7a.
  • the first edge 11Aa may be curved so that the ⁇ of the portion connected to the electrode 9 is relatively small and the ⁇ of the portion reaching the first side 7a is relatively large.
  • the capacitor 1 may further have a first external terminal 5A and a second external terminal 5B.
  • the first external terminal 5A may be connected to the first wiring 11A by covering the side of the dielectric layer 7 at the end on the first side (+D2) of the first side 7a.
  • the second external terminal 5B may be connected to the second wiring 11B by covering the side of the dielectric layer 7 at the end on the second side (-D2) of the first side 7a.
  • the distance parallel to the first side 7a between the end of the first edge 11Aa on the first electrode 9A side and the end of the first edge 11Aa on the first side 7a side is defined as a first distance (distance d1).
  • the distance between the end of the first edge 11Aa on the first side 7a side and the end of the first external terminal 5A on the -D2 side of the portion along the first side 7a may be less than 1/2 of the first distance.
  • the distance between the end of the second edge 11Ba on the second electrode 9B side and the end of the second edge 11Ba on the first side 7a side is defined as the second distance (distance d1).
  • the distance between the end of the second edge 11Ba on the first side 7a side and the end of the portion of the second external terminal 5B along the first side 7a on the +D2 side may be less than 1/2 of the second distance.
  • the contact area between the first wiring 11A and the first external terminal 5A is larger than in a configuration in which the end of the first edge 11Aa on the first side 7a side is separated from the end of the first external terminal 5A on the -D2 side by a distance d1 or more on the +D2 side (referred to as "another configuration" in this paragraph.
  • This other configuration may also be included in the technology related to this disclosure). Therefore, the bonding strength is improved.
  • the connection position of the first edge 11Aa to the electrode 9 is constant, the first edge 11Aa is shorter than in the other configuration. As a result, the effect of reducing ESL is improved.
  • the first wiring 11A does not protrude from the first external terminal 5A to the -D2 side or the amount of protrusion is small, for example, the likelihood of an unintended short circuit occurring due to a conductive bonding material bonded to the external terminal 5 is reduced.
  • the angle (tilt angle ⁇ ) that the first edge 11Aa makes with respect to the first side 7a may be greater than or equal to 30° and less than or equal to 60° from the first electrode 9A to the first side 7a.
  • the angle (tilt angle ⁇ ) that the second edge 11Ba makes with respect to the first side 7a may be greater than or equal to 30° and less than or equal to 60° from the second electrode 9B to the first side 7a.
  • the edge (symbol omitted) of the first wiring 11A opposite the first edge 11Aa may be parallel to the first edge 11Aa.
  • the edge (symbol omitted) of the second wiring 11B opposite the second edge 11Ba may be parallel to the second edge 11Ba.
  • the first wiring 11A and the second wiring 11B may extend with a constant width.
  • the current path along the two edges on either side of the wiring 11 can be made uniform and linear.
  • the likelihood of characteristics fluctuating due to unintended current disturbances is reduced.
  • the capacitor 1 may further have four dummy electrodes 19 located at the four corners of the dielectric layer 7 in a plan view, and an insulating layer 17 overlapping the four dummy electrodes 19 from the side opposite the dielectric layer 7.
  • the dummy electrodes 19 may be provided inside the cover 15.
  • the cover 15 can be reinforced with dummy electrodes 19.
  • the four corners of the main body 3 are areas that are easily subjected to external forces. Examples of external forces include a force caused by the capacitor 1 coming into contact with another member before the capacitor 1 is mounted, and a force that the capacitor 1 receives from another member (e.g., a circuit board) via a bonding material after the capacitor 1 is mounted.
  • the main body 3 is efficiently reinforced by reinforcing the areas that are easily subjected to forces with the dummy electrodes 19. From another perspective, the overlap between the dummy electrodes 19 and the electrodes 9 is reduced in plan view, thereby reducing the electrical effect of the dummy electrodes 19 on the electrodes 9.
  • the capacitor 1 may further have four external terminals 5 that overlap the sides of the dielectric layer 7 at the four corners of the dielectric layer 7 and are joined to four dummy electrodes 19.
  • the dummy electrodes 19 contribute not only to improving the strength of the four corners of the main body 3, but also to improving the bonding strength between the main body 3 and the external terminals 5. This in turn reduces the likelihood that the external terminals 5 and the wiring 11 will become separated, improving electrical reliability.
  • the insulating layer 17 may be thicker than the dielectric layer 7. And/or the dummy electrode 19 may be thicker than the first electrode 9A and the second electrode 9B. And/or the capacitor 1 may have a plurality of dummy layers 21 and a plurality of insulating layers 17, with the dummy layers 21 including four dummy electrodes 19 and the insulating layers 17 being alternately stacked.
  • the dummy electrode 19 has the effect of improving strength, etc.
  • the capacitor may be part of a multi-functional electronic component.
  • the position and size of the electrode 9 may remain the same as in the illustrated example, but the dielectric layer 7 may be longer on the +D1 side than in the illustrated example, the two wirings 11 on the +D1 side may not be provided, and another electronic element (e.g., an inductor) may be provided that is connected to the external terminal 5 on the +D1 side. Or, for example, in the D3 direction, another electronic element may be provided at a position separate from the functional unit 13.
  • another electronic element e.g., an inductor
  • a concept may be extracted that does not require that the edge of the wiring 11 be inclined toward the side of the dielectric layer 7.
  • a concept may be extracted that requires that the dummy electrodes 19 are provided at the four corners, that the insulating layer 17 is thicker than the dielectric layer 7, and/or that the dummy electrodes 19 are thicker than the electrodes 9.
  • the effect of shortening the current path indicated by the arrow a3 (FIG. 5) may not be achieved. Therefore, the electrodes 9 at different potentials do not need to face each other.
  • two electrodes connected to external terminals at different potentials may be provided in different regions of the same layer, and an electrode may be provided that faces both of the two electrodes and is not connected to an external terminal. That is, two (or three or more) parallel plate capacitors connected in series may be included in the chip.

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  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000049035A (ja) * 1998-07-30 2000-02-18 Kyocera Corp 積層セラミックコンデンサ
JP2013093374A (ja) * 2011-10-24 2013-05-16 Murata Mfg Co Ltd 電子部品
US20200027658A1 (en) * 2018-07-19 2020-01-23 Samsung Electro-Mechanics Co., Ltd. Multilayer capacitor
JP2020077793A (ja) * 2018-11-08 2020-05-21 株式会社村田製作所 積層セラミックコンデンサ

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3309813B2 (ja) * 1998-10-06 2002-07-29 株式会社村田製作所 積層コンデンサ
US6282079B1 (en) * 1998-11-30 2001-08-28 Kyocera Corporation Capacitor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000049035A (ja) * 1998-07-30 2000-02-18 Kyocera Corp 積層セラミックコンデンサ
JP2013093374A (ja) * 2011-10-24 2013-05-16 Murata Mfg Co Ltd 電子部品
US20200027658A1 (en) * 2018-07-19 2020-01-23 Samsung Electro-Mechanics Co., Ltd. Multilayer capacitor
JP2020077793A (ja) * 2018-11-08 2020-05-21 株式会社村田製作所 積層セラミックコンデンサ

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