WO2024111033A1 - Circuit de détection de fréquence et système de détection de fréquence - Google Patents

Circuit de détection de fréquence et système de détection de fréquence Download PDF

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Publication number
WO2024111033A1
WO2024111033A1 PCT/JP2022/043083 JP2022043083W WO2024111033A1 WO 2024111033 A1 WO2024111033 A1 WO 2024111033A1 JP 2022043083 W JP2022043083 W JP 2022043083W WO 2024111033 A1 WO2024111033 A1 WO 2024111033A1
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Prior art keywords
frequency
signal
circuit
conversion
mixer
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PCT/JP2022/043083
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English (en)
Japanese (ja)
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平 和田
英之 中溝
達也 萩原
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三菱電機株式会社
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Priority to PCT/JP2022/043083 priority Critical patent/WO2024111033A1/fr
Publication of WO2024111033A1 publication Critical patent/WO2024111033A1/fr

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/02—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
    • G01R23/14—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage by heterodyning; by beat-frequency comparison

Definitions

  • This disclosure relates to a frequency detection circuit and a frequency detection system that detect the frequency of an input signal.
  • the frequency detection circuit is a circuit that detects the frequency of an arbitrary input signal.
  • the frequency detection circuit is configured using a frequency converter such as a mixer, an analog to digital converter (ADC), and an arithmetic circuit (also called a logic circuit or a digital circuit) such as a field programmable gate array (FPGA).
  • a frequency converter such as a mixer, an analog to digital converter (ADC), and an arithmetic circuit (also called a logic circuit or a digital circuit) such as a field programmable gate array (FPGA).
  • ADC analog to digital converter
  • FPGA field programmable gate array
  • Patent Document 1 shows a configuration in which a plurality of systems, each of which is made up of a mixer, a low pass filter (LPF), and a digitizer, are connected in parallel.
  • LO Local Oscillator
  • LO Local Oscillator
  • the frequency detection circuit detects the frequency of the input signal by formulating and solving simultaneous equations based on information on the frequency, amplitude, and phase of the LO signal used for frequency conversion in each system and the signal after frequency conversion in each system.
  • This disclosure has been made to solve the problems described above, and aims to provide a frequency detection circuit that can detect the frequency of the input signal without increasing the circuit size, regardless of the frequency.
  • the frequency detection circuit disclosed herein is characterized by comprising a first frequency conversion circuit that uses a first LO signal to convert the frequency of an input signal, a second frequency conversion circuit that uses a second LO signal that has the same frequency but a different phase as the first LO signal to convert the frequency of the input signal, and a frequency calculation circuit that calculates the frequency of the input signal based on the phase difference between the signal after frequency conversion by the first frequency conversion circuit and the signal after frequency conversion by the second frequency conversion circuit, and the phase difference between the first LO signal and the second LO signal.
  • the above configuration makes it possible to detect the frequency of the input signal without increasing the circuit size, regardless of the frequency of the input signal.
  • FIG. 1 is a block diagram showing a configuration example (when an input signal has one wave) of a frequency detection circuit according to a first embodiment
  • 4 is a block diagram showing a configuration example (when the input signal has one wave) of a frequency calculation circuit in the first embodiment
  • FIG. 4 is a diagram showing an example of a frequency spectrum of a signal after frequency conversion by the first mixer in the first embodiment (when the input signal has one wave).
  • FIG. 10 is a diagram showing an example of a frequency spectrum of a signal after frequency conversion by the second mixer in the first embodiment (when the input signal has one wave).
  • FIG. 1 is a block diagram showing a configuration example (when an input signal has two waves) of a frequency detection circuit according to a first embodiment
  • 4 is a diagram showing an example of a frequency spectrum of a signal after frequency conversion by the first mixer in the first embodiment (when the input signal has two waves).
  • FIG. 10 is a diagram showing an example of a frequency spectrum of a signal after frequency conversion by the second mixer in the first embodiment (when the input signal has two waves).
  • FIG. 4 is a diagram showing an example of a phase difference calculated by the phase difference calculation circuit in the first embodiment (when the input signal has two waves).
  • FIG. 13 is a block diagram showing another configuration example (when the input signal has one wave) of the frequency detection circuit according to the first embodiment;
  • FIG. 13 is a block diagram showing another configuration example (when the input signal has one wave) of the frequency calculation circuit in the first embodiment.
  • FIG. 11 is a block diagram showing a configuration example (when the input signal has one wave) of a frequency detection circuit according to a second embodiment;
  • FIG. 11 is a diagram showing an example of the behavior of frequency conversion related to f LO1 by the first quadrature mixer in the second embodiment (when the input signal has one wave).
  • FIG. 11 is a diagram showing an example of the behavior of frequency conversion related to f LO2 by the first quadrature mixer in the second embodiment (when the input signal has one wave).
  • FIG. 11 is a diagram showing an example of the behavior of frequency conversion related to f LO1 by the second quadrature mixer in the second embodiment (when the input signal has one wave).
  • FIG. 13 is a diagram showing an example of the behavior of frequency conversion related to f LO2 by the second quadrature mixer in the second embodiment (when the input signal has one wave).
  • FIG. 11 is a block diagram showing a configuration example (when the input signal has one wave) of a frequency detection system according to a third embodiment. 13 is a flowchart showing an example of setting the frequencies of a first LO signal and a second LO signal for a first frequency detection circuit and the frequencies of the first LO signal and a second LO signal for a second frequency detection circuit by an arithmetic circuit in embodiment 3.
  • FIG. 1 is a block diagram showing an example of the configuration of a frequency detection circuit 1 according to a first embodiment.
  • the frequency detection circuit 1 is a circuit for detecting the frequency of an input signal, and includes a first signal source 11, a second signal source 12, a first mixer 13, a second mixer 14, a first filter 15, a second filter 16, and a frequency calculation circuit 17, as shown in FIG.
  • f RF denotes the frequency of the input signal
  • ⁇ RF denotes the initial phase of the input signal
  • f LOi indicates the frequency of the first LO signal generated by the first signal source 11 and the second LO signal generated by the second signal source
  • ⁇ LOi_1 indicates the initial phase of each frequency component included in the first LO signal generated by the first signal source
  • ⁇ LOi_2 indicates the initial phase of each frequency component included in the second LO signal generated by the second signal source 12. Note that ⁇ LOi_1 ⁇ ⁇ LOi_2 .
  • f out indicates the frequency of the signal passing through the first filter 15 and the signal passing through the second filter
  • ⁇ out1 indicates the initial phase of the signal passing through the first filter
  • ⁇ out2 indicates the initial phase of the signal passing through the second filter 16.
  • i is 1, 2, . . . , m
  • m is an integer of 2 or more.
  • the first signal source 11 is a circuit capable of generating a signal of any signal waveform or any frequency.
  • the first signal source 11 in the first embodiment generates a first LO signal having the same frequency (including substantially the same meaning) as the frequency and the same initial phase (including substantially the same meaning) as the initial phase. It is preferable that the first LO signal has a plurality of frequency components.
  • the first signal source 11 may generate the first LO signal using a control signal or reference signal input from the outside.
  • the first LO signal generated by the first signal source 11 is output to the first mixer 13.
  • control terminal is connected to the first output terminal of the frequency calculation circuit 17, and the output terminal is connected to the LO terminal of the first mixer 13.
  • the first signal source 11 for example, a DAC (Digital-to-Analog Converter), a DDS (Direct Digital Synthesizer), or a PLL (Phase Locked Loop) circuit is used.
  • the first signal source 11 may be configured to combine multiple PLL circuits and a synthesizer that synthesizes the signals output by the PLL circuits.
  • the first signal source 11 may be any circuit capable of generating a signal of any signal waveform or any frequency.
  • the second signal source 12 is a circuit capable of generating a signal of any signal waveform or any frequency.
  • the second signal source 12 generates a second LO signal having the same frequency (including substantially the same meaning) as the signal output by the frequency calculation circuit 17 and the same initial phase (including substantially the same meaning) as the signal output by the frequency calculation circuit 17 in accordance with the frequency and initial phase. It is preferable that the second LO signal has a plurality of frequency components.
  • the second LO signal is a signal having the same frequency as the first LO signal but a different phase.
  • the second signal source 12 may generate the second LO signal using a control signal or a reference signal input from the outside.
  • the second LO signal generated by the second signal source 12 is output to the second mixer 14.
  • control terminal is connected to the second output terminal of the frequency calculation circuit 17, and the output terminal is connected to the LO terminal of the second mixer 14.
  • This second signal source 12 may be, for example, a DAC, DDS, or PLL circuit.
  • the second signal source 12 may be configured to combine multiple PLL circuits and a synthesizer that synthesizes the signals output by the PLL circuits.
  • the second signal source 12 may be any circuit capable of generating a signal of any signal waveform or any frequency.
  • the first mixer 13 is a mixer that converts the frequency by mixing two input signals.
  • the first mixer 13 converts the frequency of the input signal by mixing the input signal with the first LO signal output by the first signal source 11.
  • the mixed signal which is the signal after frequency conversion by the first mixer 13, is output to the first filter 15.
  • the RF terminal is connected to the output terminal of the first signal source 11, and the IF (Intermediate Frequency) terminal is connected to the input terminal of the first filter 15. Note that in this connection, the RF terminal and the LO terminal of the first mixer 13 may be connected in reverse.
  • the first mixer 13 may be, for example, a diode mixer that uses the nonlinearity of diodes to perform mixing, or a switching mixer that uses switching transistors.
  • the first mixer 13 may have any configuration as long as it is capable of converting the frequency by mixing two input signals.
  • the second mixer 14 is a mixer that converts the frequency by mixing two input signals.
  • the second mixer 14 converts the frequency of the input signal by mixing the input signal with the second LO signal output by the second signal source 12.
  • the mixed signal which is the signal after frequency conversion by the second mixer 14, is output to the second filter 16.
  • an input signal is input to the RF terminal, the LO terminal is connected to the output terminal of the second signal source 12, and the IF terminal is connected to the input terminal of the second filter 16. Note that in this connection, the RF terminal and the LO terminal of the second mixer 14 may be connected in reverse.
  • This second mixer 14 may be, for example, a diode mixer that uses the nonlinearity of diodes to perform mixing, or a switching mixer that uses switching transistors.
  • the second mixer 14 may have any configuration as long as it is capable of converting the frequency by mixing two input signals.
  • the first filter 15 has a predetermined passband and passes signals in a frequency band within the passband among the input signals and suppresses signals in a frequency band outside the passband.
  • the first filter 15 in the first embodiment passes signals in a frequency band within the passband among the signals after frequency conversion by the first mixer 13 and suppresses signals in a frequency band outside the passband and unwanted waves.
  • the signal that has passed through this first filter 15 is output to the frequency calculation circuit 17.
  • the input terminal of this first filter 15 is connected to the IF terminal of the first mixer 13, and the output terminal is connected to the first input terminal of the frequency calculation circuit 17.
  • the first filter 15 may be, for example, an LPF, a HPF (High Pass Filter), or a BPF (Band Pass Filter).
  • the first filter 15 is implemented using a chip inductor or a chip capacitor.
  • the first filter 15 may also be configured using other resonators such as a microstrip or a coaxial resonator depending on the frequency band to be passed or the required amount of suppression.
  • the second filter 16 has a predetermined passband and is a filter that passes, of the input signals, signals in a frequency band within the passband and suppresses signals in a frequency band outside the passband.
  • the second filter 16 passes, of the signals after frequency conversion by the second mixer 14, signals in a frequency band within the passband and suppresses signals in a frequency band outside the passband and unwanted waves.
  • the signal that has passed through this second filter 16 is output to the frequency calculation circuit 17.
  • the input terminal of this second filter 16 is connected to the IF terminal of the second mixer 14, and the output terminal is connected to the second input terminal of the frequency calculation circuit 17.
  • This second filter 16 may be, for example, an LPF, HPF, or BPF.
  • the second filter 16 is implemented using a chip inductor or a chip capacitor.
  • the second filter 16 may also be configured using other resonators such as a microstrip or coaxial resonator depending on the frequency band to be passed or the required amount of suppression.
  • the frequency calculation circuit 17 is a circuit that calculates the frequency of the input signal based on the phase difference between the signal that has passed through the first filter 15 and the signal that has passed through the second filter 16, and the phase difference between the first LO signal generated by the first signal source 11 and the second LO signal generated by the second signal source 12.
  • a signal indicating the calculation result by this frequency calculation circuit 17 is output to the outside.
  • the frequency calculation circuit 17 outputs a signal indicating the frequency and initial phase of the first LO signal generated by the first signal source 11 to the first signal source 11, and outputs a signal indicating the frequency and initial phase of the second LO signal generated by the second signal source 12 to the second signal source 12.
  • This frequency calculation circuit 17 has a first input terminal connected to the output terminal of the first filter 15, a second input terminal connected to the output terminal of the second filter 16, a first output terminal connected to the control terminal of the first signal source 11, and a second output terminal connected to the control terminal of the second signal source 12.
  • FIG. 2 is a block diagram showing an example of the configuration of the frequency calculation circuit 17 according to the first embodiment.
  • the frequency calculation circuit 17 has a first quantizer 1701, a second quantizer 1702, a first frequency calculation circuit 1703, a phase difference calculation circuit 1704, a signal source control circuit 1705, a phase comparison circuit 1706, and a second frequency calculation circuit 1707.
  • the first quantizer 1701 is a circuit that quantizes an input signal.
  • the first quantizer 1701 quantizes the signal that has passed through the first filter 15.
  • the signal quantized by the first quantizer 1701 is output to the first frequency calculation circuit 1703 and the phase difference calculation circuit 1704.
  • the input terminal of this first quantizer 1701 is connected to the output terminal of the first filter 15, and the output terminal is connected to the input terminal of the first frequency calculation circuit 1703 and the first input terminal of the phase difference calculation circuit 1704.
  • an ADC can be used as the first quantizer 1701.
  • the first quantizer 1701 may perform quantization in synchronization with a clock signal input from the outside.
  • the first quantizer 1701 may have any configuration as long as it is capable of quantizing the input signal.
  • the second quantizer 1702 is a circuit that quantizes the input signal.
  • the second quantizer 1702 quantizes the signal that has passed through the second filter 16.
  • the signal quantized by the second quantizer 1702 is output to the phase difference calculation circuit 1704.
  • the input terminal of this second quantizer 1702 is connected to the output terminal of the second filter 16, and the output terminal is connected to the second input terminal of the phase difference calculation circuit 1704.
  • an ADC can be used as the second quantizer 1702.
  • the second quantizer 1702 may perform quantization in synchronization with a clock signal input from the outside.
  • the second quantizer 1702 may have any configuration as long as it is capable of quantizing the input signal.
  • the first frequency calculation circuit 1703 is a circuit that calculates the frequency of an input signal.
  • the first frequency calculation circuit 1703 in the first embodiment calculates the frequency (f out ) of the signal based on the signal quantized by the first quantizer 1701.
  • a signal indicating the frequency calculated by the first frequency calculation circuit 1703 is output to the second frequency calculation circuit 1707.
  • the input terminal of this first frequency calculation circuit 1703 is connected to the output terminal of the first quantizer 1701, and the output terminal is connected to the first input terminal of the second frequency calculation circuit 1707.
  • This first frequency calculation circuit 1703 can be, for example, a logic circuit (also called a digital circuit) such as an FPGA.
  • a logic circuit also called a digital circuit
  • the first frequency calculation circuit 1703 calculates the frequency by, for example, arithmetic processing such as FFT (Fast Fourier Transform).
  • FFT Fast Fourier Transform
  • the first frequency calculation circuit 1703 may have any configuration as long as it is capable of calculating the frequency of the input signal.
  • the first frequency calculation circuit 1703 is capable of calculating the frequency of the input signal. In other words, since the frequency band of the signal input to the first frequency calculation circuit 1703 is within a frequency band expected in advance and there are no problems due to high frequencies, such as with the input signal to the frequency detection circuit 1, the first frequency calculation circuit 1703 can calculate the frequency of the signal using existing technology.
  • the phase difference calculation circuit 1704 is a circuit that calculates the phase difference between two input signals.
  • the phase difference calculation circuit 1704 in the first embodiment calculates the phase difference ( ⁇ out2 - ⁇ out1 ) between the two signals based on the signal quantized by the first quantizer 1701 and the signal quantized by the second quantizer 1702.
  • a signal indicating the phase difference calculated by this phase difference calculation circuit 1704 is output to the phase comparison circuit 1706.
  • This phase difference calculation circuit 1704 has a first input terminal connected to the output terminal of the first quantizer 1701, a second input terminal connected to the output terminal of the second quantizer 1702, and an output terminal connected to the first input terminal of the phase comparison circuit 1706.
  • an FPGA can be used as the phase difference calculation circuit 1704.
  • the phase difference calculation circuit 1704 can calculate the phase difference by, for example, combining an orthogonal demodulation calculation and an arctangent calculation.
  • phase difference calculation circuit 1704 may have any configuration as long as it is capable of calculating the phase difference between the two input signals.
  • the signal source control circuit 1705 outputs a signal indicating the frequency (f LOi ) and initial phase ( ⁇ LOi_1 ) of the first LO signal generated by the first signal source 11 to the first signal source 11, and outputs a signal indicating the frequency (f LOi ) and initial phase ( ⁇ LOi_2 ) of the second LO signal generated by the second signal source 12 to the second signal source 12.
  • the signal source control circuit 1705 outputs a signal indicating the phase difference ( ⁇ LOi_1 ⁇ LOi_2 ) between the first LO signal generated by the first signal source 11 and the second LO signal generated by the second signal source 12 to the phase comparison circuit 1706.
  • the signal source control circuit 1705 has a first output terminal connected to the control terminal of the first signal source 11, a second output terminal connected to the control terminal of the second signal source 12, and a third output terminal connected to the second input terminal of the phase comparison circuit 1706.
  • an FPGA or a memory can be used as the signal source control circuit 1705.
  • the signal source control circuit 1705 may determine f LOi , ⁇ LOi_1 , and ⁇ LOi_2 by calculation, or may read data stored in advance in a memory or the like.
  • the signal source control circuit 1705 may have any configuration as long as it is capable of outputting a signal indicating f LOi and ⁇ LOi_1 , a signal indicating f LOi and ⁇ LOi_2 , and a signal indicating ⁇ LOi_1 - ⁇ LOi_2 .
  • the phase comparator circuit 1706 specifies a conversion frequency based on the phase difference ( ⁇ out2 - ⁇ out1 ) calculated by the phase difference calculation circuit 1704 and the phase difference ( ⁇ LOi_1 - ⁇ LOi_2 ) indicated by the signal output by the signal source control circuit 1705.
  • the conversion frequency is a frequency component used for frequency conversion of the input signal among a plurality of frequency components included in the first LO signal and the second LO signal.
  • the phase comparator circuit 1706 compares the absolute value of the phase difference calculated by the phase difference calculation circuit 1704 with the absolute value of the phase difference indicated by the signal output by the signal source control circuit 1705.
  • the phase comparison circuit 1706 identifies, among the multiple frequency components contained in the first LO signal and the second LO signal, a frequency component where the absolute value of the phase difference calculated by the phase difference calculation circuit 1704 matches (including the meaning of approximately matching) the absolute value of the phase difference indicated by the signal output by the signal source control circuit 1705, as the conversion frequency.
  • the phase comparison circuit 1706 specifies the sign based on the phase difference ( ⁇ out2 - ⁇ out1 ) calculated by the phase difference calculation circuit 1704 and the phase difference ( ⁇ LOi_1 - ⁇ LOi_2 ) indicated by the signal output by the signal source control circuit 1705.
  • the sign indicates the direction of phase rotation due to the frequency conversion of the input signal, and indicates f RF >f LOi or f RF ⁇ f LOi .
  • the phase comparison circuit 1706 compares the sign of the phase difference calculated by the phase difference calculation circuit 1704 with the sign of the phase difference at the conversion frequency.
  • phase comparison circuit 1706 determines that the phase has rotated in the forward direction (f RF >f LOi ) due to the frequency conversion of the input signal, and if the signs of both phase differences are different, the phase comparison circuit 1706 determines that the phase has rotated in the reverse direction (f RF ⁇ f LOi ) due to the frequency conversion of the input signal.
  • the signal indicating the result of the determination by the phase comparison circuit 1706 is sent to the second frequency calculation circuit 1707.
  • This phase comparison circuit 1706 has a first input terminal connected to the output terminal of the phase difference calculation circuit 1704, a second input terminal connected to the first output terminal of the signal source control circuit 1705, and an output terminal connected to the second input terminal of the second frequency calculation circuit 1707.
  • This phase comparison circuit 1706 can be, for example, a combination of an FPGA and a memory.
  • the signal indicating the phase difference output by the signal source control circuit 1705 is stored in advance in the memory.
  • the phase comparison circuit 1706 may have any configuration as long as it is capable of identifying the conversion frequency and code based on the phase difference calculated by the phase difference calculation circuit 1704 and the phase difference indicated by the signal output by the signal source control circuit 1705.
  • the second frequency calculation circuit 1707 is a circuit that calculates the frequency (f RF ) of the input signal based on the frequency ( f out ) calculated by the first frequency calculation circuit 1703 and the frequency component and sign specified by the phase comparison circuit 1706. A signal indicating the frequency calculated by this second frequency calculation circuit 1707 is output to the outside.
  • the first input terminal of this second frequency calculation circuit 1707 is connected to the output terminal of the first frequency calculation circuit 1703, and the second input terminal is connected to the output terminal of the phase comparison circuit 1706.
  • This second frequency calculation circuit 1707 can be, for example, an FPGA.
  • the second frequency calculation circuit 1707 may have any configuration as long as it is capable of calculating the frequency of the input signal based on the frequency calculated by the first frequency calculation circuit 1703 and the frequency components and code identified by the phase comparison circuit 1706.
  • the first signal source 11 and the second signal source 12 two PLL circuits and a synthesizer that synthesizes the signals output by the PLL circuits are used.
  • f LO1 5 GHz
  • f LO2 10 GHz
  • ⁇ LO1_1 0°
  • ⁇ LO2_1 0°
  • ⁇ LO1_2 30°
  • ⁇ LO2_2 60°
  • the first filter 15 and the second filter 16 an LPF with a passband of 2.5 GHz is used.
  • the frequency calculation circuit 17 the configuration shown in FIG. 2 is used.
  • ADCs are used as the first quantizer 1701 and the second quantizer 1702.
  • FPGAs are used as the first frequency calculation circuit 1703, the phase difference calculation circuit 1704, the signal source control circuit 1705, and the second frequency calculation circuit 1707.
  • phase comparison circuit 1706 an FPGA and a memory are used as the phase comparison circuit 1706.
  • the memory may be a memory inside the FPGA or may be a memory outside the FPGA.
  • the ADCs used as the first quantizer 1701 and the second quantizer 1702 are both assumed to perform quantization in synchronization with a clock signal input from the outside, and to perform oversampling.
  • the first signal source 11 In an example of operation of the frequency detection circuit 1 according to the first embodiment shown in FIG. 1, first, the first signal source 11 generates a first LO signal.
  • the first signal source 11 generates, as the first LO signal, a signal having a frequency of 5 GHz and an initial phase of 0°, and a signal having a frequency of 10 GHz and an initial phase of 0°.
  • the first LO signal generated by the first signal source 11 is output to the first mixer 13.
  • the second signal source 12 also generates a second LO signal.
  • the second signal source 12 generates, as the second LO signal, a signal having a frequency of 5 GHz and an initial phase of 30°, and a signal having a frequency of 10 GHz and an initial phase of 60°.
  • the second LO signal generated by the second signal source 12 is output to the second mixer 14.
  • the first mixer 13 frequency-converts the input signal by mixing the input signal with the first LO signal generated by the first signal source 11.
  • the signal after frequency conversion by the first mixer 13 is output to the first filter 15.
  • the second mixer 14 also converts the frequency of the input signal by mixing the input signal with a second LO signal generated by the second signal source 12.
  • the signal after frequency conversion by the second mixer 14 is output to the second filter 16.
  • f mix1 ⁇ (k f RF ⁇ l f LOi ) (1)
  • ⁇ mix1 ⁇ (k ⁇ RF ⁇ l ⁇ LOi_1 )
  • ⁇ mix2 ⁇ (k ⁇ RF ⁇ l ⁇ LOi_2 )
  • the first mixer 13 performs frequency conversion by subtracting the frequency of the first LO signal from the frequency of the input signal
  • the second mixer 14 performs frequency conversion by subtracting the frequency of the second LO signal from the frequency of the input signal; that is, the signs of the second terms on the right-hand sides of equations (1), (2), and (3) are negative.
  • FIG. 3 is a diagram showing an example of a frequency spectrum of a signal after frequency conversion by the first mixer 13.
  • the horizontal axis represents frequency and the vertical axis represents power.
  • reference numeral 301 denotes the pass band of the first filter 15.
  • the first mixer 13 performs frequency conversion of an input signal having a frequency of 3 GHz and an initial phase of 0° by mixing the input signal with a first LO signal including a signal having a frequency of 5 GHz and an initial phase of 0° and a signal having a frequency of 10 GHz and an initial phase of 0°.
  • the first mixer 13 frequency-converts an input signal having a frequency of 3 GHz into a signal having a frequency of 2 GHz by using the first LO signal having a frequency of 5 GHz.
  • ⁇ -1.
  • the initial phase of the input signal having a frequency of 3 GHz in the first mixer 13 is 0°
  • the initial phase of the signal having a frequency of 5 GHz among the first LO signals is 0°, so that the initial phase of the signal having a frequency of 2 GHz after frequency conversion is 0°.
  • the first mixer 13 converts the input signal having a frequency of 3 GHz into a signal having a frequency of 7 GHz by using the first LO signal having a frequency of 10 GHz.
  • ⁇ ⁇ 1.
  • the first mixer 13 has an initial phase of an input signal having a frequency of 3 GHz which is 0°, and an initial phase of a signal among the first LO signals having a frequency of 10 GHz which is 0°, so that the initial phase of a signal having a frequency of 7 GHz after frequency conversion is 0°.
  • FIG. 4 is a diagram showing an example of a frequency spectrum of a signal after frequency conversion by the second mixer 14.
  • the horizontal axis represents frequency and the vertical axis represents power.
  • reference numeral 401 denotes the pass band of the second filter 16.
  • the second mixer 14 frequency converts the input signal by mixing the input signal having a frequency of 3 GHz and an initial phase of 0° with a second LO signal including a signal having a frequency of 5 GHz and an initial phase of 30° and a signal having a frequency of 10 GHz and an initial phase of 60°.
  • the second mixer 14 frequency-converts the input signal having a frequency of 3 GHz into a signal having a frequency of 2 GHz by using the second LO signal having a frequency of 5 GHz.
  • ⁇ ⁇ 1.
  • the second mixer 14 has an initial phase of an input signal having a frequency of 3 GHz of 0°, and an initial phase of a signal among the second LO signals having a frequency of 5 GHz of 30°, so that the initial phase of a signal having a frequency of 2 GHz after frequency conversion is 30°.
  • the second mixer 14 frequency-converts the input signal having a frequency of 3 GHz into a signal having a frequency of 7 GHz by using the second LO signal having a frequency of 10 GHz.
  • ⁇ ⁇ 1.
  • the second mixer 14 has an initial phase of an input signal having a frequency of 3 GHz of 0°, and an initial phase of a signal among the second LO signals having a frequency of 10 GHz of 60°, so that the initial phase of a signal having a frequency of 7 GHz after frequency conversion is 60°.
  • the signal that has passed through the first filter 15 and the signal that has passed through the second filter 16 have the same frequency but different initial phases.
  • the first filter 15 and the second filter 16 are provided to prevent malfunction due to a signal with a large number of frequency components being input to the frequency calculation circuit 17, or to prevent failure due to a signal with a high power frequency component being input. Since many frequency components other than f out exist in the signal after frequency conversion by the first mixer 13 and the signal after frequency conversion by the second mixer 14, the passband or implementation method of the first filter 15 and the second filter 16 is determined so that the components other than f out can be sufficiently suppressed.
  • the first filter 15 and the second filter 16 may be a BPF or a HPF.
  • the first filter 15 and the second filter 16 may not be provided and a through circuit may be used.
  • the first quantizer 1701 quantizes the analog signal that has passed through the first filter 15.
  • the digital signal that has been quantized by the first quantizer 1701 is output to the first frequency calculation circuit 1703 and the phase difference calculation circuit 1704.
  • the second quantizer 1702 quantizes the analog signal that has passed through the second filter 16.
  • the digital signal that has been quantized by the second quantizer 1702 is output to the phase difference calculation circuit 1704.
  • the first frequency calculation circuit 1703 calculates the frequency (f out ) of the signal based on the signal after quantization by the first quantizer 1701.
  • a signal indicating the frequency calculated by this first frequency calculation circuit 1703 is output to the second frequency calculation circuit 1707.
  • phase difference calculation circuit 1704 calculates the phase difference ( ⁇ out2 - ⁇ out1 ) between the signal quantized by the first quantizer 1701 and the signal quantized by the second quantizer 1702.
  • a signal indicating the phase difference calculated by this phase difference calculation circuit 1704 is output to the phase comparison circuit 1706.
  • the phase comparator circuit 1706 compares the absolute value of the phase difference ( ⁇ out2 - ⁇ out1 ) calculated by the phase difference calculation circuit 1704 with the absolute value of the phase difference ( ⁇ LOi_1 - ⁇ LOi_2 ) indicated by the signal output by the signal source control circuit 1705, and identifies a conversion frequency which is a frequency component used for frequency conversion of the input signal among multiple frequency components contained in the first LO signal and the second LO signal.
  • the signal indicating the frequency component identified by this phase comparator circuit 1706 is output to the second frequency calculation circuit 1707.
  • ⁇ out2 - ⁇ out1 30°
  • ⁇ LO1_1 - ⁇ LO1_2 -0° - 30°
  • the absolute value of ⁇ out2 - ⁇ out1 matches the absolute value of ⁇ LO1_1 - ⁇ LO1_2
  • the phase comparator circuit 1706 compares the sign of the phase difference ( ⁇ out2 - ⁇ out1 ) calculated by the phase difference calculation circuit 1704 with the sign of the phase difference at the conversion frequency, and specifies the sign indicating the phase rotation direction due to the frequency conversion of the input signal.
  • the signal indicating the sign specified by this phase comparator circuit 1706 is output to the second frequency calculation circuit 1707.
  • the second frequency calculation circuit 1707 calculates the frequency (f RF ) of the input signal using the following equation (5) based on the frequency (f out ) calculated by the first frequency calculation circuit 1703 and the frequency component and sign specified by the phase comparison circuit 1706. Note that here, the sign of the second term on the right side of equation (5) is negative .
  • a signal indicating the frequency calculated by this second frequency calculation circuit 1707 is output to the outside of the frequency detection circuit 1.
  • f out ⁇ (f RF ⁇ f LOi ) (5)
  • the frequency detection circuit 1 in the case where the input signal to the frequency detection circuit 1 is two waves (two frequency components) as shown in FIG. 5 will be described.
  • one input signal has a frequency of f RF1 and an initial phase of ⁇ RF1
  • the other input signal has a frequency of f RF2 and an initial phase of ⁇ RF2 .
  • the signal passing through the first filter 15 and the signal passing through the second filter 16 also have multiple waves.
  • the signal passing through the first filter 15 is two waves, a signal having a frequency of f OUT1 and an initial phase of ⁇ OUT1_1 , and a signal having a frequency of f OUT2 and an initial phase of ⁇ OUT1_2 .
  • the signal passing through the second filter 16 is two waves, a signal having a frequency of f OUT1 and an initial phase of ⁇ OUT2_1 , and a signal having a frequency of f OUT2 and an initial phase of ⁇ OUT2_2 .
  • f RF1 3 GHz
  • ⁇ RF1 0°
  • f RF2 6 GHz
  • ⁇ RF2 0°.
  • the first signal source 11 In the operation example of the frequency detection circuit 1 according to the first embodiment shown in FIG. 5, first, the first signal source 11 generates a first LO signal.
  • the first signal source 11 generates, as the first LO signal, a signal having a frequency of 5 GHz and an initial phase of 0°, and a signal having a frequency of 10 GHz and an initial phase of 0°.
  • the first LO signal generated by the first signal source 11 is output to the first mixer 13.
  • the first mixer 13 frequency-converts the input signal by mixing the input signal with the first LO signal generated by the first signal source 11.
  • the signal after frequency conversion by the first mixer 13 using the first LO signal is output to the first filter 15.
  • the second signal source 12 also generates a second LO signal.
  • the second signal source 12 generates, as the second LO signal, a signal having a frequency of 5 GHz and an initial phase of 30°, and a signal having a frequency of 10 GHz and an initial phase of 60°.
  • the second LO signal generated by the second signal source 12 is output to the second mixer 14.
  • the second mixer 14 frequency-converts the input signal by mixing the input signal with the second LO signal generated by the second signal source 12.
  • the signal after frequency conversion by the second mixer 14 using the second LO signal is output to the second filter 16.
  • Fig. 6 is a diagram showing an example of the frequency spectrum of a signal after frequency conversion by the first mixer 13.
  • the horizontal axis is frequency
  • the vertical axis is power.
  • Reference numeral 601 indicates the passband of the first filter 15.
  • a signal with a triangular tip indicates a signal obtained by frequency conversion of an input signal having a frequency of 3 GHz and an initial phase of 0°.
  • a signal with a round tip indicates a signal obtained by frequency conversion of an input signal having a frequency of 6 GHz and an initial phase of 0°.
  • the first mixer 13 performs frequency conversion of an input signal having a frequency of 3 GHz and an initial phase of 0° by mixing the input signal with a first LO signal including a signal having a frequency of 5 GHz and an initial phase of 0° and a signal having a frequency of 10 GHz and an initial phase of 0°.
  • the first mixer 13 frequency converts the input signal having a frequency of 6 GHz and an initial phase of 0° by mixing the input signal with a first LO signal including a signal having a frequency of 5 GHz and an initial phase of 0° and a signal having a frequency of 10 GHz and an initial phase of 0°.
  • the first mixer 13 frequency-converts an input signal having a frequency of 3 GHz into a signal having a frequency of 2 GHz by using the first LO signal having a frequency of 5 GHz.
  • ⁇ -1.
  • the initial phase of the input signal having a frequency of 3 GHz in the first mixer 13 is 0°
  • the initial phase of the signal having a frequency of 5 GHz among the first LO signals is 0°, so that the initial phase of the signal having a frequency of 2 GHz after frequency conversion is 0°.
  • the first mixer 13 converts the input signal having a frequency of 3 GHz into a signal having a frequency of 7 GHz by using the first LO signal having a frequency of 10 GHz.
  • ⁇ ⁇ 1.
  • the first mixer 13 has an initial phase of an input signal having a frequency of 3 GHz which is 0°, and an initial phase of a signal among the first LO signals having a frequency of 10 GHz which is 0°, so that the initial phase of a signal having a frequency of 7 GHz after frequency conversion is 0°.
  • the first mixer 13 frequency-converts an input signal having a frequency of 6 GHz into a signal having a frequency of 4 GHz by using the first LO signal having a frequency of 10 GHz.
  • ⁇ ⁇ 1.
  • the first mixer 13 has an initial phase of an input signal having a frequency of 6 GHz which is 0°, and an initial phase of a signal among the first LO signals having a frequency of 10 GHz which is 0°, so that the initial phase of a signal having a frequency of 4 GHz after frequency conversion is 0°.
  • Fig. 7 is a diagram showing an example of the frequency spectrum of a signal after frequency conversion by the second mixer 14.
  • the horizontal axis is frequency
  • the vertical axis is power.
  • Reference numeral 701 indicates the passband of the second filter 16.
  • a signal with a triangular tip indicates a signal obtained by frequency conversion of an input signal having a frequency of 3 GHz and an initial phase of 0°.
  • a signal with a round tip indicates a signal obtained by frequency conversion of an input signal having a frequency of 6 GHz and an initial phase of 0°.
  • the second mixer 14 frequency converts the input signal by mixing the input signal having a frequency of 3 GHz and an initial phase of 0° with a second LO signal including a signal having a frequency of 5 GHz and an initial phase of 30° and a signal having a frequency of 10 GHz and an initial phase of 60°.
  • the second mixer 14 frequency converts the input signal having a frequency of 6 GHz and an initial phase of 0° by mixing the input signal with a second LO signal including a signal having a frequency of 5 GHz and an initial phase of 30° and a signal having a frequency of 10 GHz and an initial phase of 60°.
  • the second mixer 14 frequency-converts the input signal having a frequency of 3 GHz into a signal having a frequency of 2 GHz by using the second LO signal having a frequency of 5 GHz.
  • ⁇ ⁇ 1.
  • the second mixer 14 has an initial phase of an input signal having a frequency of 3 GHz of 0°, and an initial phase of a signal among the second LO signals having a frequency of 5 GHz of 30°, so that the initial phase of a signal having a frequency of 2 GHz after frequency conversion is 30°.
  • the second mixer 14 frequency-converts the input signal having a frequency of 6 GHz into a signal having a frequency of 1 GHz by using the second LO signal having a frequency of 5 GHz.
  • ⁇ +1.
  • the second mixer 14 has an initial phase of an input signal having a frequency of 6 GHz of 0°, and an initial phase of a signal among the second LO signals having a frequency of 5 GHz of 30°, so that the initial phase of a signal having a frequency of 1 GHz after frequency conversion is -30°.
  • the second mixer 14 frequency-converts the input signal having a frequency of 3 GHz into a signal having a frequency of 7 GHz by using the second LO signal having a frequency of 10 GHz.
  • ⁇ ⁇ 1.
  • the second mixer 14 has an initial phase of an input signal having a frequency of 3 GHz of 0°, and an initial phase of a signal among the second LO signals having a frequency of 10 GHz of 60°, so that the initial phase of a signal having a frequency of 7 GHz after frequency conversion is 60°.
  • the second mixer 14 frequency-converts the input signal having a frequency of 6 GHz into a signal having a frequency of 4 GHz by the second LO signal having a frequency of 10 GHz.
  • ⁇ ⁇ 1.
  • the second mixer 14 has an initial phase of an input signal having a frequency of 6 GHz of 0°, and an initial phase of a signal among the second LO signals having a frequency of 10 GHz of 60°, so that the initial phase of a signal having a frequency of 4 GHz after frequency conversion is 60°.
  • the first filter 15 outputs a signal having a frequency f out1 and an initial phase ⁇ out1 — 1 and a signal having a frequency f out2 and an initial phase ⁇ out1 — 2 through frequency conversion in the first mixer 13 .
  • the second filter 16 outputs a signal having a frequency f out1 and an initial phase ⁇ out2 — 1 and a signal having a frequency f out2 and an initial phase ⁇ out2 — 2 as a result of frequency conversion in the second mixer 14 .
  • the frequency detection circuit 1 (phase difference calculation circuit 1704) performs the same operation as when the input signal to the frequency detection circuit 1 is one wave, thereby calculating the phase difference ( ⁇ out2_1 - ⁇ out1_1 , ⁇ out2_2 - ⁇ out1_2 ) between the signal that has passed through the first filter 15 and the signal that has passed through the second filter 16, as shown in FIG. 8.
  • the phase comparison circuit 1706 compares the absolute value of the phase difference ( ⁇ out2_1 - ⁇ out1_1 , ⁇ out2_2 - ⁇ out1_2 ) calculated by the phase difference calculation circuit 1704 with the absolute value of the phase difference ( ⁇ LOi_1 - ⁇ LOi_2 ) indicated by the signal output by the signal source control circuit 1705, and identifies a conversion frequency which is a frequency component used for frequency conversion of the input signal among multiple frequency components contained in the first LO signal and the second LO signal.
  • the signal indicating the frequency component identified by this phase comparison circuit 1706 is output to the second frequency calculation circuit 1707.
  • ⁇ out2_1 - ⁇ out1_1 -30°
  • ⁇ out2_2 - ⁇ out1_2 30°
  • phase comparator circuit 1706 compares the sign of the phase difference ( ⁇ out2_1 - ⁇ out1_1 , ⁇ out2_2 - ⁇ out1_2 ) calculated by the phase difference calculation circuit 1704 with the sign of the phase difference at the conversion frequency, and specifies the sign indicating the phase rotation direction due to the frequency conversion of the input signal.
  • the signal indicating the sign specified by this phase comparator circuit 1706 is output to the second frequency calculation circuit 1707.
  • the second frequency calculation circuit 1707 calculates the frequency (f RF1 , f RF2 ) of the input signal using equation (5) based on the frequency (f out1 , f out2 ) calculated by the first frequency calculation circuit 1703 and the frequency component and sign specified by the phase comparison circuit 1706.
  • the first frequency calculation circuit 1703 can calculate the frequencies of the signal that has passed through the first filter 15 and the signal that has passed through the second filter 16 by using calculations such as FFT, even if each of them is a multiple wave.
  • the signal indicating the frequency calculated by this second frequency calculation circuit 1707 is output to the outside of the frequency detection circuit 1.
  • the frequencies of the first LO signal and the second LO signal are 5 GHz and 10 GHz. However, this is not limited thereto, and the frequencies of the first LO signal and the second LO signal may be any value.
  • the first LO signal and the second LO signal each include two frequency components, but the present invention is not limited to this.
  • the first LO signal and the second LO signal each may include one frequency component or three or more frequency components.
  • the first LO signal and the second LO signal each contain one frequency component, the frequency of that frequency component becomes the conversion frequency as is.
  • the first frequency calculation circuit 1703 calculates the frequency of the signal after quantization by the first quantizer 1701.
  • the first frequency calculation circuit 1703 may calculate the frequency of the signal after quantization by the second quantizer 1702.
  • the frequency calculation circuit 17 may calculate the frequency of the signal that has passed through the first filter 15 or the signal that has passed through the second filter 16.
  • the phase difference calculation circuit 1704 calculates ⁇ out2 - ⁇ out1 as the phase difference. However, this is not limiting, and the phase difference calculation circuit 1704 may calculate ⁇ out1 - ⁇ out2 as the phase difference. In this case, however, the phase comparison circuit 1706 compares ⁇ out1 - ⁇ out2 with ⁇ LOi_2 - ⁇ LOi_1 .
  • the first filter 15 suppresses high-frequency signals among the signals after frequency conversion by the first mixer 13 and passes low-frequency signals
  • the second filter 16 suppresses high-frequency signals among the signals after frequency conversion by the second mixer 14 and passes low-frequency signals
  • the frequency calculation circuit 17 calculates fRF from the phase difference.
  • the present invention is not limited to this, and the first filter 15 may suppress low-frequency signals among the signals after frequency conversion by the first mixer 13 and pass high-frequency signals, and the second filter 16 may suppress low-frequency signals among the signals after frequency conversion by the second mixer 14 and pass high-frequency signals, and the frequency calculation circuit 17 may calculate fRF from the phase difference.
  • the frequency detection circuit 1 may pass signals of both frequency components and calculate f RF from the phase difference between the respective frequency components.
  • the first mixer 13 is used as the first frequency conversion circuit that converts the frequency of the input signal.
  • a circuit other than the first mixer 13 e.g., a frequency divider, a multiplier, or a S/H (Sample and Hold) circuit, etc.
  • the second mixer 14 is used as the second frequency conversion circuit that converts the frequency of the input signal.
  • a circuit other than the second mixer 14 e.g., a frequency divider, a multiplier, or an S/H circuit
  • the frequency conversion circuit (the first mixer 13 and the second mixer 14 in FIGS. 1 and 5) is provided in one stage.
  • the present invention is not limited to this, and multiple stages of frequency conversion circuits may be provided.
  • the frequency detection circuit 1 may further include a frequency conversion circuit in front of the first mixer 13 and the second mixer 14. In this case, the frequency and phase of the RF signals input to the first mixer 13 and the second mixer 14 must be the same, and the frequency of the signals passing through the first filter 15 and the second filter 16 must be the same.
  • FIG. 9 shows a case where a third mixer 19 is provided as the frequency conversion circuit in the frequency detection circuit 1. Also, in FIG. 9, a third signal source 18 is provided in the frequency detection circuit 1. 9, a frequency calculation circuit 17 outputs a signal indicating the frequency and initial phase of an LO signal generated by a third signal source 18 to the third signal source 18. Then, the third signal source 18 generates an LO signal having the same frequency (including substantially the same meaning) as the frequency and initial phase (including substantially the same meaning) as the initial phase according to the frequency and initial phase indicated by the signal output by the frequency calculation circuit 17. Then, a third mixer 19 mixes an input signal with the LO signal output by the third signal source 18 to frequency convert the input signal.
  • the frequency calculation circuit 17 calculates the frequency (f RF ) of the input signal based on the phase difference between the signal that has passed through the first filter 15 and the signal that has passed through the second filter 16, the phase difference between the first LO signal generated by the first signal source 11 and the second LO signal generated by the second signal source 12, and the frequency of the LO signal used in the frequency conversion circuit (the third mixer 19 in Figure 9) provided in front of the first mixer 13 and the second mixer 14 .
  • the frequency calculation circuit 17 calculates the frequency (f RF ') of the input signal to the first mixer 13 and the second mixer 14 based on the phase difference between the signal passed through the first filter 15 and the signal passed through the second filter 16, and the phase difference between the first LO signal generated by the first signal source 11 and the second LO signal generated by the second signal source 12. In this way, the frequency calculation circuit 17 can calculate the frequency (f RF ') of the input signal to the first mixer 13 and the second mixer 14.
  • the frequency (f RF ') of this signal is the frequency of the signal after frequency conversion by a frequency conversion circuit (third mixer 19 in FIG. 9) provided in the front stage of the first mixer 13 and the second mixer 14.
  • the frequency calculation circuit 17 performs an inverse frequency conversion on the calculated frequency of the signal based on the calculated frequency of the signal (f RF ') and the frequency (f LO ) of an LO signal used in a frequency conversion circuit (third mixer 19 in FIG. 9 ) provided in front of the first mixer 13 and the second mixer 14. This allows the frequency calculation circuit 17 to calculate the frequency (f RF ) of the signal input to the frequency conversion circuit (frequency detection circuit 1).
  • the first signal source 11 generates the first LO signal
  • the second signal source 12 generates the second LO signal
  • the present invention is not limited to this, and the first LO signal and the second LO signal may be signals having the same frequency and different phases, and may be generated using different circuits.
  • the signal generated by the signal source is divided into two signals by the power divider, one of the signals is set as the first LO signal, and the phase of the other signal is shifted by the phase shifter to become the second LO signal.
  • the frequency calculation circuit 17 has the first quantizer 1701 quantizing the signal that has passed through the first filter 15, the second quantizer 1702 quantizing the signal that has passed through the second filter 16, and then the digital circuit calculates ⁇ out2 - ⁇ out1 .
  • the present invention is not limited to this, and the frequency calculation circuit 17 may extract ⁇ out2 - ⁇ out1 using an analog circuit and then quantize it.
  • FIG. 10 is a block diagram showing another example of the configuration of the frequency calculation circuit 17 in the first embodiment.
  • the first quantizer 1701 and the first frequency calculation circuit 1703 are changed to a first frequency calculation circuit 1708
  • the second quantizer 1702 and the phase difference calculation circuit 1704 are changed to a phase difference calculation circuit 1709.
  • the first frequency calculation circuit 1708 has a first quantizer 1710 and a first calculator 1711.
  • the first quantizer 1710 quantizes the signal that has passed through the first filter 15.
  • the signal quantized by the first quantizer 1710 is output to the first calculator 1711.
  • the first calculator 1711 calculates the frequency (f out ) of the quantized signal by performing arithmetic processing such as FFT on the signal quantized by the first quantizer 1710. A signal indicating the frequency calculated by this first calculator 1711 is output to the second frequency calculation circuit 1707. Note that, for example, an FPGA or the like is used as the first calculator 1711.
  • the phase difference calculation circuit 1709 has a mixer 1712, a second quantizer 1713, a memory 1714, and a second calculator 1715.
  • the mixer 1712 calculates the phase difference between the signal that has passed through the first filter 15 and the signal that has passed through the second filter 16 by mixing the two signals.
  • An analog signal indicating the phase difference calculated by the mixer 1712 is output to the second quantizer 1713.
  • Second quantizer 1713 quantizes the signal indicating the phase difference calculated by mixer 1712.
  • a digital signal which is the signal after quantization by second quantizer 1713, is output to second calculator 1715.
  • the phase difference calculated by mixer 1712 is not the value of ⁇ out2 - ⁇ out1 itself, but is a value that uniquely corresponds to ⁇ out2 - ⁇ out1 .
  • the memory 1714 pre-stores information indicating the correspondence between the phase difference calculated by the mixer 1712 and ⁇ out2 ⁇ out1 .
  • the second calculator 1715 reads out ⁇ out2 - ⁇ out1 corresponding to the signal quantized by the second quantizer 1713 from the memory 1714.
  • the signal indicating ⁇ out2 - ⁇ out1 read out by the second calculator 1715 is output to the phase comparison circuit 1706. Note that, for example, an FPGA or the like is used as the second calculator 1715.
  • the phase comparator circuit 1706 determines whether the absolute value of ⁇ out2 - ⁇ out1 matches the absolute value of ⁇ LOi_1 - ⁇ LOi_2 to specify the conversion frequency. However, due to variations in circuit performance or noise generated in the circuit, the absolute value of ⁇ out2 - ⁇ out1 may not match the absolute value of ⁇ LOi_1 - ⁇ LOi_2 . In such a case, the phase comparator circuit 1706 may select ⁇ LOi_1 - ⁇ LOi_2 whose absolute value is closest to the absolute value of ⁇ out2 - ⁇ out1 , and specify the corresponding frequency component as the conversion frequency.
  • the frequency of the input signal to the frequency detection circuit 1 is exactly in the middle of the frequencies of any two frequency components in the first LO signal and the second LO signal (hereinafter referred to as event A).
  • event A the signals obtained by frequency-converting the input signal in each of the two frequency components have the same frequency.
  • the frequencies of the first LO signal and the second LO signal are 5 GHz and 10 GHz, so that when f RF is 7.5 GHz, the signals obtained by frequency-converting at 5 GHz and at 10 GHz are both 2.5 GHz.
  • a circuit for monitoring the result of the determination by the phase comparison circuit 1706 may be provided in the frequency detection circuit 1.
  • this circuit notifies the outside.
  • the phase comparison circuit 1706 determines that ⁇ out2 - ⁇ out1 and ⁇ LOi_1 - ⁇ LOi_2 are significantly different values, at least one of the frequencies of the first LO signal and the second LO signal may be changed to an arbitrary value, either manually or automatically by the frequency detection circuit 1, and control may be applied to avoid the frequency relationship of event A.
  • a circuit for monitoring the calculation result by the first frequency calculation circuit 1703 may be provided in the frequency detection circuit 1.
  • this circuit determines that the f out calculated by the first frequency calculation circuit 1703 is DC, it notifies the outside to that effect.
  • at least one of the frequencies of the first LO signal and the second LO signal may be changed to an arbitrary value manually or automatically by the frequency detection circuit 1, and control may be applied to avoid the frequency relationship of event B.
  • the frequency detection circuit 1 includes a first frequency conversion circuit that uses a first LO signal to convert the frequency of an input signal, a second frequency conversion circuit that uses a second LO signal that has the same frequency but a different phase as the first LO signal to convert the frequency of the input signal, and a frequency calculation circuit 17 that calculates the frequency of the input signal based on the phase difference between the signal after frequency conversion by the first frequency conversion circuit and the signal after frequency conversion by the second frequency conversion circuit, and the phase difference between the first LO signal and the second LO signal.
  • the frequency detection circuit 1 according to the first embodiment can detect the frequency without increasing the circuit size, regardless of the frequency of the input signal.
  • Embodiment 2 In the frequency detection circuit 1 according to the first embodiment, in the case of a frequency relationship that results in event A, it takes time to detect the correct f RF because it cannot detect f RF correctly, or after it is determined that f RF cannot be detected, f LOi is changed so as to avoid the frequency relationship that results in event A. In contrast, in the frequency detection circuit 1 according to the second embodiment, a quadrature mixer is used as the mixer, and an image component is suppressed, so that the correct f RF can be detected even if event A occurs.
  • FIG. 11 is a block diagram showing a configuration example of a frequency detection circuit 1 according to embodiment 2.
  • the first mixer 13 is changed to a first orthogonal mixer 20, and the second mixer 14 is changed to a second orthogonal mixer 21, compared to the frequency detection circuit 1 according to embodiment 1 shown in FIG. 1.
  • the other configuration examples of the frequency detection circuit 1 according to embodiment 2 shown in FIG. 11 are similar to the configuration example of the frequency detection circuit 1 according to embodiment 1 shown in FIG. 1, so the same reference numerals are used and their description will be omitted.
  • the first orthogonal mixer 20 is a mixer that converts the frequency by mixing two input signals, while suppressing the image component. This mixer is also called an image rejection mixer or IRM (Image Rejection Mixer).
  • IRM Image Rejection Mixer
  • the first orthogonal mixer 20 in the second embodiment converts the frequency of the input signal by mixing the input signal with the first LO signal output by the first signal source 11, while suppressing the input signal that exists at either a higher or lower frequency than the frequency of the first LO signal.
  • the signal after frequency conversion by the first orthogonal mixer 20 is output to the first filter 15.
  • the RF terminal is connected to the output terminal of the first signal source 11, and the IF terminal is connected to the input terminal of the first filter 15. Note that in this connection, the RF terminal and the LO terminal of the first quadrature mixer 20 may be connected in reverse.
  • This first quadrature mixer 20 can be, for example, a combination of a diode mixer that uses the nonlinearity of diodes to perform mixing, and a 90° phase shifter.
  • the first quadrature mixer 20 may have any configuration as long as it is capable of converting the frequency by mixing the two input signals while suppressing the image component.
  • the second orthogonal mixer 21 is a mixer that converts the frequency by mixing two input signals while suppressing the image component. This mixer is also called an image suppression mixer or IRM.
  • the second orthogonal mixer 21 in the second embodiment mixes the input signal with the second LO signal output by the second signal source 12 to convert the frequency of the input signal, while suppressing the input signal that exists at either a higher or lower frequency than the frequency of the second LO signal.
  • the signal after frequency conversion by this second orthogonal mixer 21 is output to the second filter 16.
  • This second quadrature mixer 21 has an RF terminal to which an input signal is input, an LO terminal connected to the output terminal of the second signal source 12, and an IF terminal connected to the input terminal of the second filter 16. Note that in this connection, the RF terminal and the LO terminal of the second quadrature mixer 21 may be connected in reverse.
  • This second quadrature mixer 21 can be, for example, a combination of a diode mixer that uses the nonlinearity of diodes to perform mixing, and a 90° phase shifter.
  • the second quadrature mixer 21 may have any configuration as long as it is capable of converting the frequency by mixing the two input signals while suppressing the image component.
  • the operation examples other than the first orthogonal mixer 20 and the second orthogonal mixer 21 are similar to the operation examples of the frequency detection circuit 1 according to the first embodiment, and therefore the description thereof will be omitted.
  • first signal source 11 and the second signal source 12 Two PLL circuits and a synthesizer that synthesizes the signals output by the PLL circuits are used as the first signal source 11 and the second signal source 12.
  • f LO1 5 GHz
  • f LO2 10 GHz
  • ⁇ LO1_1 0°
  • ⁇ LO2_1 0°
  • ⁇ LO1_2 30°
  • ⁇ LO2_2 60°.
  • an LPF with a passband of 3 GHz is used as the first filter 15 and the second filter 16.
  • the first quadrature mixer 20 converts the frequency of the input signal while suppressing the input signal that exists at a frequency lower than the frequency of the first LO signal.
  • the second quadrature mixer 21 converts the frequency of the input signal while suppressing the input signal that exists at a frequency lower than the frequency of the second LO signal.
  • the first quadrature mixer 20 mixes an input signal with a first LO signal output by a first signal source 11 to convert the frequency of the input signal, while suppressing an input signal that exists at a frequency lower than the frequency of the first LO signal.
  • the signal after frequency conversion by the first quadrature mixer 20 is output to the first filter 15.
  • the detailed circuit configuration of the first quadrature mixer 20 and the operation principle of suppression are well known to those skilled in the art and are not directly related to the present disclosure, so a detailed description thereof will be omitted.
  • the second quadrature mixer 21 mixes the input signal with the second LO signal output by the second signal source 12 to convert the frequency of the input signal, while suppressing an input signal that exists at a frequency lower than the frequency of the second LO signal.
  • the signal after frequency conversion by the second quadrature mixer 21 is output to the second filter 16.
  • the detailed circuit configuration of the second quadrature mixer 21 and the operation principle of suppression are well known to those skilled in the art and are not directly related to the present disclosure, so a detailed description thereof will be omitted.
  • FIG. 12 is a diagram showing an example of the behavior of frequency conversion related to fLO1 by the first quadrature mixer 20.
  • the horizontal axis is frequency and the vertical axis is power.
  • reference numeral 1201 denotes the passband of the first filter 15.
  • the first quadrature mixer 20 mixes an input signal having a frequency of 7.5 GHz and an initial phase of 0° with a signal having a frequency of 5 GHz and an initial phase of 0° among frequency components contained in the first LO signal, thereby converting the frequency of the input signal.
  • the first quadrature mixer 20 outputs the signal after frequency conversion without suppressing it.
  • the initial phase of the signal having a frequency of 2.5 GHz after frequency conversion is 0°.
  • FIG. 13 is a diagram showing an example of the behavior of frequency conversion related to fLO2 by the first quadrature mixer 20.
  • the horizontal axis is frequency and the vertical axis is power.
  • reference numeral 1301 denotes the passband of the first filter 15.
  • the first quadrature mixer 20 mixes an input signal having a frequency of 7.5 GHz and an initial phase of 0° with a signal having a frequency component of a first LO signal, the frequency of which is 10 GHz and an initial phase of 0°, to thereby convert the frequency of the input signal.
  • f RF 7.5 GHz
  • f LO2 10 GHz
  • the first quadrature mixer 20 suppresses and outputs the signal after frequency conversion.
  • the signal having a frequency of 2.5 GHz after frequency conversion by the first orthogonal mixer 20 is the input signal frequency-converted by a signal having a frequency f LO1 (5 GHz) among the frequency components contained in the first LO signal.
  • FIG. 14 is a diagram showing an example of the behavior of frequency conversion related to fLO1 by the second quadrature mixer 21.
  • the horizontal axis is frequency and the vertical axis is power.
  • reference numeral 1401 denotes the passband of the second filter 16.
  • the second quadrature mixer 21 mixes an input signal having a frequency of 7.5 GHz and an initial phase of 0° with a signal having a frequency of 5 GHz and an initial phase of 30° among frequency components contained in the second LO signal, thereby converting the frequency of the input signal.
  • the second quadrature mixer 21 outputs the signal after frequency conversion without suppressing it.
  • the initial phase of the signal having a frequency of 2.5 GHz after frequency conversion is ⁇ 30°.
  • the second quadrature mixer 21 mixes an input signal having a frequency of 7.5 GHz and an initial phase of 0° with a signal having a frequency of 10 GHz and an initial phase of 60° among frequency components contained in the second LO signal, thereby converting the frequency of the input signal.
  • f RF 7.5 GHz
  • f LO2 10 GHz
  • the second quadrature mixer 21 suppresses and outputs the signal after frequency conversion.
  • the signal having a frequency of 2.5 GHz after frequency conversion by the second orthogonal mixer 21 is the input signal frequency-converted by a signal having a frequency f LO1 (5 GHz) among the frequency components contained in the second LO signal.
  • the signal that has passed through the first filter 15 and the signal that has passed through the second filter 16 have the same frequency but different initial phases.
  • the signal that has passed through the first filter 15 has a frequency of 2.5 GHz and an initial phase of 0°
  • the signal that has passed through the second filter 16 has a frequency of 2.5 GHz and an initial phase of ⁇ 30°.
  • the first quadrature mixer 20 performs frequency conversion on the input signal while suppressing the input signal that exists at a frequency lower than the first LO signal.
  • the present invention is not limited to this, and the first quadrature mixer 20 may suppress the input signal that exists at a frequency higher than the first LO signal while performing frequency conversion on the input signal.
  • the second quadrature mixer 21 suppresses an input signal that exists at a frequency lower than the second LO signal while converting the frequency of the input signal.
  • the present invention is not limited to this, and the second quadrature mixer 21 may suppress an input signal that exists at a frequency higher than the second LO signal while converting the frequency of the input signal.
  • the first frequency conversion circuit is the first quadrature mixer 20 that converts the frequency of the input signal using the first LO signal and suppresses the image component of the signal after the frequency conversion
  • the second frequency conversion circuit is the second quadrature mixer 21 that converts the frequency of the input signal using the second LO signal and suppresses the image component of the signal after the frequency conversion.
  • Embodiment 3 In the frequency detection circuit 1 according to the first embodiment, in the case of a frequency relationship resulting in events A and B, it takes time to detect the correct f RF because it cannot detect f RF correctly, or after it is determined that f RF cannot be detected, f LOi is changed so as to avoid the frequency relationship resulting in events A and B. In contrast, in the frequency detection system according to the third embodiment, two frequency detection circuits 1 are used, and the LO signals used in the respective frequency detection circuits 1 are set to different frequencies, thereby making it possible to detect the correct f RF by avoiding events A and B in at least one of the frequency detection circuits 1.
  • FIG. 16 is a block diagram illustrating a configuration example of a frequency detection system according to the third embodiment.
  • the frequency detection system includes a first frequency detection circuit 1 - 1 , a second frequency detection circuit 1 - 2 , a determination circuit 2 , and an arithmetic circuit 3 .
  • f 2LOi indicates the frequencies of the first LO signal generated by the first signal source 11-2 and the second LO signal generated by the second signal source 12-2
  • ⁇ 2LOi_1 indicates the initial phase of each frequency component contained in the first LO signal generated by the first signal source 11-2
  • ⁇ 2LOi_2 indicates the initial phase of each frequency component contained in the second LO signal generated by the second signal source 12-2.
  • f 2out indicates the frequency of the signal passing through the first filter 15-2
  • ⁇ 2out1 indicates the initial phase of the signal passing through the first filter 15-2
  • ⁇ 2out2 indicates the initial phase of the signal passing through the second filter 16-2.
  • the first frequency detection circuit 1-1 is a circuit that detects the frequency of the input signal. A signal indicating the frequency detected by this first frequency detection circuit 1-1 is output to the judgment circuit 2.
  • This first frequency detection circuit 1-1 (frequency calculation circuit 17-1) has a control terminal connected to the first output terminal of the calculation circuit 3, and an output terminal connected to the first input terminal of the judgment circuit 2.
  • the frequency detection circuit 1 can be used as this first frequency detection circuit 1-1. That is, in the first frequency detection circuit 1-1, the first signal source 11-1 is the same as the first signal source 11, the second signal source 12-1 is the same as the second signal source 12, the first mixer 13-1 is the same as the first mixer 13, the second mixer 14-1 is the same as the second mixer 14, the first filter 15-1 is the same as the first filter 15, the second filter 16-1 is the same as the second filter 16, and the frequency calculation circuit 17-1 is the same as the frequency calculation circuit 17.
  • the second frequency detection circuit 1-2 is a circuit that detects the frequency of the input signal.
  • the frequencies of the first LO signal and the second LO signal used in the second frequency detection circuit 1-2 are different from the frequencies of the first LO signal and the second LO signal used in the first frequency detection circuit 1-1.
  • a signal indicating the frequency detected by this second frequency detection circuit 1-2 is output to the determination circuit 2.
  • This second frequency detection circuit 1-2 (frequency calculation circuit 17-2) has a control terminal connected to the second output terminal of the calculation circuit 3, and an output terminal connected to the second input terminal of the judgment circuit 2.
  • the frequency detection circuit 1 can be used as the second frequency detection circuit 1-2. That is, in the second frequency detection circuit 1-2, the first signal source 11-2 is the same as the first signal source 11, the second signal source 12-2 is the same as the second signal source 12, the first mixer 13-2 is the same as the first mixer 13, the second mixer 14-2 is the same as the second mixer 14, the first filter 15-2 is the same as the first filter 15, the second filter 16-2 is the same as the second filter 16, and the frequency calculation circuit 17-2 is the same as the frequency calculation circuit 17.
  • the determination circuit 2 is a circuit that identifies the correct frequency from among the frequencies detected by the first frequency detection circuit 1-1 and the second frequency detection circuit 1-2.
  • This determination circuit 2 has a first input terminal connected to the output terminal of the first frequency detection circuit 1-1 (frequency calculation circuit 17-1) and a second input terminal connected to the output terminal of the second frequency detection circuit 1-2 (frequency calculation circuit 17-2).
  • the determination circuit 2 may be, for example, an FPGA.
  • the arithmetic circuit 3 calculates f LOi and f 2LOi so as to avoid the frequency relationship resulting in event A and event B.
  • a signal indicating f LOi calculated by this arithmetic circuit 3 is output to the first signal source 11-1 and the second signal source 12-1 via a frequency calculation circuit 17-1.
  • a signal indicating f 2LOi calculated by the arithmetic circuit 3 is output to the first signal source 11-2 and the second signal source 12-2 via a frequency calculation circuit 17-2.
  • the first output terminal of this calculation circuit 3 is connected to the control terminal of the first frequency detection circuit 1-1 (frequency calculation circuit 17-1), and the second output terminal is connected to the control terminal of the second frequency detection circuit 1-2 (frequency calculation circuit 17-2).
  • the arithmetic circuit 3 can be, for example, a computer consisting of a CPU (Central Processing Unit) and memory, a microcomputer, or an FPGA.
  • any type of arithmetic circuit may be used as the arithmetic circuit 3 as long as it is configured to execute the determination flow of f LOi and f 2LOi shown below.
  • FIG. 16 shows a case where the arithmetic circuit 3 is provided inside the frequency detection system. However, this is not limiting, and the arithmetic circuit 3 may be provided outside the frequency detection system.
  • the one frequency detection circuit 1 when the frequency relationship of event A and event B occurs, the one frequency detection circuit 1 cannot correctly detect f RF .
  • the frequencies of the first LO signal and the second LO signal used for frequency conversion are different from the frequencies of the first LO signal and the second LO signal used in the one frequency detection circuit 1 that cannot correctly detect f RF . Therefore, the other frequency detection circuit 1 can avoid the frequency relationship of event A or event B and can correctly detect f RF .
  • Events A and B occur when there is a certain combination of the frequency of the input signal and the frequencies of the first LO signal and the second LO signal.
  • the frequency of the input signal does not change and the frequencies of the first LO signal and the second LO signal are different. Therefore, when the above relationship is satisfied in one frequency detection circuit 1, the above relationship is not satisfied in the other frequency detection circuit 1.
  • the determination circuit 2 identifies the correct frequency (f RF ) from the frequency detected by the first frequency detection circuit 1-1 and the frequency detected by the second frequency detection circuit 1-2. At this time, for example, the judgment circuit 2 first compares the frequency detected by the first frequency detection circuit 1-1 with the frequency detected by the second frequency detection circuit 1-2. If the two frequencies are the same (including the meaning of approximately the same), the judgment circuit 2 judges that both frequencies are correct. On the other hand, if the two frequencies are different, the judgment circuit 2 judges whether the frequency is within the correct frequency range and selects the correct frequency.
  • f RF correct frequency
  • the judgment circuit 2 may use the phase difference ( ⁇ out2 - ⁇ out1 ) calculated by the first frequency detection circuit 1-1 and the phase difference ( ⁇ LOi_1 - ⁇ LOi_2 ) at the specified conversion frequency, as well as the phase difference ( ⁇ 2out2 - ⁇ 2out1 ) calculated by the second frequency detection circuit 1-2 and the phase difference ( ⁇ 2LOi_1 - ⁇ 2LOi_2 ) at the specified conversion frequency, to judge the validity of the frequency (f RF ) detected by the first frequency detection circuit 1-1 and the frequency (f RF ) detected by the second frequency detection circuit 1-2.
  • the judgment circuit 2 determines that the difference between the phase difference ( ⁇ out2 - ⁇ out1 ) calculated by the first frequency detection circuit 1-1 and the phase difference ( ⁇ LOi_1 - ⁇ LOi_2 ) at the identified conversion frequency is less than or equal to a threshold value, it determines that the frequency calculated by the first frequency detection circuit 1-1 is correct, and if it determines that the difference is greater than the threshold value, it determines that the frequency calculated by the first frequency detection circuit 1-1 is incorrect.
  • the judgment circuit 2 determines that the difference between the phase difference ( ⁇ 2out2 - ⁇ 2out1 ) calculated by the second frequency detection circuit 1-2 and the phase difference ( ⁇ 2LOi_1 - ⁇ 2LOi_2 ) at the specified conversion frequency is equal to or smaller than a threshold value, it determines that the frequency calculated by the second frequency detection circuit 1-2 is correct, and if it determines that the difference is greater than the threshold value, it determines that the frequency calculated by the second frequency detection circuit 1-2 is incorrect. Then, the judgment circuit 2 selects only the frequencies that it determines to be correct from the above judgment results.
  • FIG. 17 is a flowchart showing an example of a procedure for setting f LOi and f 2LOi by the arithmetic circuit 3 according to the third embodiment shown in FIG.
  • the frequency detection range in the first frequency detection circuit 1-1 and the frequency detection range in the second frequency detection circuit 1-2 are from fmin to fmax .
  • step ST1701 In the procedure for setting f LOi and f 2LOi by the arithmetic circuit 3 in the third embodiment shown in FIG. 16, first, as shown in FIG. 17, for example, the arithmetic circuit 3 sets f LOi (step ST1701).
  • the arithmetic circuit 3 calculates f RF where f out becomes DC in the range from f min to f max from f LOi set in step ST1701 (step ST1702). Note that there are a plurality of values of f RF .
  • arithmetic circuit 3 sets f 2LOi (step ST1703).
  • the arithmetic circuit 3 calculates fRF from f2LOi set in step ST1703, at which f2out becomes DC in the range from fmin to fmax (step ST1704). Note that there are a plurality of values of fRF .
  • arithmetic circuit 3 compares f RF calculated in step ST1702 with f RF calculated in step ST1704 to determine whether they have the same value (step ST1705). If it is determined in step ST1705 that there is no fRF with the same value, the sequence proceeds to step ST1706. On the other hand, if in step ST1705 arithmetic circuit 3 determines that there is f RF with the same value, the sequence returns to step ST1703, and arithmetic circuit 3 sets f 2LOi to a value other than the value previously set in step ST1703.
  • the arithmetic circuit 3 compares the calculation result in step ST1706 with the calculation result in step ST1707, and judges whether or not there is the same combination of fRF (step ST1708). In step ST1708, if the arithmetic circuit 3 determines that there is no identical combination, the sequence ends. After that, the arithmetic circuit 3 outputs a signal indicating f LOi to the first frequency detection circuit 1-1 (frequency calculation circuit 17-1) and outputs a signal indicating f 2LOi to the second frequency detection circuit 1-2 (frequency calculation circuit 17-2).
  • the frequency calculation circuit 17-1 outputs f LOi to the first signal source 11-1 and the second signal source 12-1, the first signal source 11-1 sets the frequency of the first LO signal it generates to f LOi , and the second signal source 12-1 sets the frequency of the second LO signal it generates to f LOi .
  • the frequency calculation circuit 17-2 outputs f 2LOi to the first signal source 11-2 and the second signal source 12-2, the first signal source 11-2 sets the frequency of the first LO signal it generates to f 2LOi , and the second signal source 12-2 sets the frequency of the second LO signal it generates to f 2LOi .
  • step ST1708 determines in step ST1708 that the same combination exists.
  • the sequence proceeds to step ST1709.
  • the arithmetic circuit 3 judges whether or not f 2LOi can be set to a value other than the f 2LOi set in the flow up to this point (step ST1709).
  • the arithmetic circuit 3 makes the above judgment in consideration of the f 2LOi set in the flow up to this point and the frequency setting ranges of the first signal source 11-2 and the second signal source 12-2.
  • step ST1709 If the arithmetic circuit 3 determines in step ST1709 that f 2LOi can be set to another value within the frequency setting range, the sequence returns to step ST1703, and the arithmetic circuit 3 sets f 2LOi to another value. On the other hand, if in step ST1709 the arithmetic circuit 3 determines that f 2LOi cannot be set to another value within the frequency setting range, the sequence returns to step ST1701, and the arithmetic circuit 3 sets f LOi to a value other than the previously set value.
  • the first frequency detection circuit 1-1 uses the first mixer 13-1 and the second mixer 14-1
  • the second frequency detection circuit 1-2 uses the first mixer 13-2 and the second mixer 14-2.
  • the present invention is not limited to this, and the second embodiment may be applied to the third embodiment
  • the first frequency detection circuit 1-1 may use the first quadrature mixer 20-1 and the second quadrature mixer 21-1
  • the second frequency detection circuit 1-2 may use the first quadrature mixer 20-2 and the second quadrature mixer 21-2.
  • the processes of steps ST1706 to ST1709 in the flowchart shown in FIG. 17 are not required.
  • the frequency detection system includes a first frequency detection circuit 1-1 that has the same configuration as the frequency detection circuit 1 and detects the frequency of an input signal, a second frequency detection circuit 1-2 that has the same configuration as the frequency detection circuit 1 and detects the frequency of an input signal using a first LO signal and a second LO signal that are different in frequency from the frequencies of the first LO signal and the second LO signal used in the first frequency detection circuit 1-1, and a determination circuit 2 that specifies the correct frequency of the input signal based on the frequency of the input signal detected by the first frequency detection circuit 1-1 and the frequency of the input signal detected by the second frequency detection circuit 1-2.
  • the frequency detection system according to the third embodiment can obtain the same effect as the frequency detection circuit 1 of the first embodiment.
  • two frequency detection circuits 1 are used, and the LO signals input to the frequency conversion circuits in the respective frequency detection circuits 1 are set to different frequencies, so that even if one of the frequency detection circuits 1 has a frequency relationship of event A or event B, the other frequency detection circuit 1 can correctly detect f RF .
  • the reliability of frequency detection can be improved.
  • the frequency detection circuit disclosed herein is capable of detecting the frequency of an input signal without increasing the circuit size, regardless of the frequency of the input signal, and is suitable for use in frequency detection circuits that detect the frequency of an input signal.
  • 1 Frequency detection circuit 1-1 First frequency detection circuit, 1-2 Second frequency detection circuit, 2 Judgment circuit, 3 Calculation circuit, 11 First signal source, 12 Second signal source, 13 First mixer, 14 Second mixer, 15 First filter, 16 Second filter, 17 Frequency calculation circuit, 18 Third signal source, 19 Third mixer, 20 First quadrature mixer, 21 Second quadrature mixer, 1701 First quantity quantizer, 1702 second quantizer, 1703 first frequency calculation circuit, 1704 phase difference calculation circuit, 1705 signal source control circuit, 1706 phase comparison circuit, 1707 second frequency calculation circuit, 1708 first frequency calculation circuit, 1709 phase difference calculation circuit, 1710 first quantizer, 1711 first calculator, 1712 mixer, 1713 second quantizer, 1714 memory, 1715 second calculator.

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  • General Physics & Mathematics (AREA)
  • Superheterodyne Receivers (AREA)

Abstract

Circuit de détection de fréquence comprenant : un premier circuit de conversion de fréquence qui utilise un premier signal LO pour convertir la fréquence d'un signal d'entrée ; un second circuit de conversion de fréquence qui utilise un second signal LO qui présente la même fréquence que le premier signal LO, mais présente une phase différente, pour convertir la fréquence du signal d'entrée ; et un circuit de calcul de fréquence (17) qui calcule la fréquence du signal d'entrée sur la base d'une différence de phase entre le signal après la conversion de fréquence par le premier circuit de conversion de fréquence et un signal après la conversion de fréquence par le second circuit de conversion de fréquence, et d'une différence de phase entre le premier signal LO et le second signal LO.
PCT/JP2022/043083 2022-11-22 2022-11-22 Circuit de détection de fréquence et système de détection de fréquence WO2024111033A1 (fr)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4771231A (en) * 1987-11-16 1988-09-13 Westinghouse Electric Corp. Microwave oscillator with optical readout of resonance phenomena
JP2001264370A (ja) * 2000-03-15 2001-09-26 Anritsu Corp 周波数測定装置
JP2003249905A (ja) * 2002-02-22 2003-09-05 Nippon Hoso Kyokai <Nhk> 周波数測定装置
JP2013007616A (ja) * 2011-06-23 2013-01-10 Advantest Corp 信号測定装置、信号測定方法、プログラム、記録媒体
WO2017090116A1 (fr) * 2015-11-25 2017-06-01 三菱電機株式会社 Circuit de détection de fréquence
US20180316444A1 (en) * 2015-06-12 2018-11-01 Bird Technologies Group Inc Channel-selective rf power sensor
JP2021173590A (ja) * 2020-04-22 2021-11-01 株式会社アドバンテスト 較正装置、変換装置、較正方法、および較正プログラム

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4771231A (en) * 1987-11-16 1988-09-13 Westinghouse Electric Corp. Microwave oscillator with optical readout of resonance phenomena
JP2001264370A (ja) * 2000-03-15 2001-09-26 Anritsu Corp 周波数測定装置
JP2003249905A (ja) * 2002-02-22 2003-09-05 Nippon Hoso Kyokai <Nhk> 周波数測定装置
JP2013007616A (ja) * 2011-06-23 2013-01-10 Advantest Corp 信号測定装置、信号測定方法、プログラム、記録媒体
US20180316444A1 (en) * 2015-06-12 2018-11-01 Bird Technologies Group Inc Channel-selective rf power sensor
WO2017090116A1 (fr) * 2015-11-25 2017-06-01 三菱電機株式会社 Circuit de détection de fréquence
JP2021173590A (ja) * 2020-04-22 2021-11-01 株式会社アドバンテスト 較正装置、変換装置、較正方法、および較正プログラム

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