WO2024098936A1 - 存储方法、装置、设备和存储介质 - Google Patents
存储方法、装置、设备和存储介质 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 56
- 238000005192 partition Methods 0.000 claims abstract description 130
- 238000012360 testing method Methods 0.000 claims description 19
- 238000004590 computer program Methods 0.000 claims description 14
- 238000004891 communication Methods 0.000 claims description 12
- 238000012423 maintenance Methods 0.000 claims description 6
- 230000008569 process Effects 0.000 abstract description 16
- 238000010586 diagram Methods 0.000 description 16
- 230000006870 function Effects 0.000 description 12
- 238000012545 processing Methods 0.000 description 11
- 230000008859 change Effects 0.000 description 10
- 238000004519 manufacturing process Methods 0.000 description 8
- 230000005055 memory storage Effects 0.000 description 8
- 239000000047 product Substances 0.000 description 7
- 210000004027 cell Anatomy 0.000 description 4
- 238000013500 data storage Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 210000000352 storage cell Anatomy 0.000 description 3
- 101100012902 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) FIG2 gene Proteins 0.000 description 2
- 239000012467 final product Substances 0.000 description 2
- 230000014509 gene expression Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 101000827703 Homo sapiens Polyphosphoinositide phosphatase Proteins 0.000 description 1
- 102100023591 Polyphosphoinositide phosphatase Human genes 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
Definitions
- the present application relates to the field of data storage, and in particular to a storage method, apparatus, device and storage medium.
- motherboards For example, electronic devices such as mobile phones and POS terminals generally have their own motherboards. When the motherboard is manufactured, the manufacturer will store key data such as calibration parameters and IMEI in the storage medium of the motherboard. Later, when downstream manufacturers use these motherboards for secondary production, they often need to perform surface mounting on these motherboards again, and then store specific test software in the storage medium of the motherboard according to the product type to test and ship the final product.
- the embodiments of the present application disclose a storage method, an apparatus, a device and a storage medium.
- the present application provides a storage method, which is applied to a smart module, and the method includes: configuring the storage density of a first storage partition in a storage medium to be a first storage density, and configuring the storage density of a second storage partition to be a second storage density, the first storage density being less than the second storage density; the first storage partition and the second storage partition being two independent partitions in the storage medium, the stability of data in the first storage partition in a high temperature environment being better than the stability of data in the second storage partition in a high temperature environment; storing target data in the first storage partition, the target data being data used to perform performance maintenance on the smart module.
- the present application provides a storage device, comprising: a configuration unit, configured to configure the storage density of a first storage partition in a storage medium to be a first storage density, and to configure the storage density of a second storage partition to be a second storage density, wherein the first storage density is less than the second storage density; the first storage partition and the second storage partition are two independent partitions in the storage medium, and the stability of data in the first storage partition in a high temperature environment is better than the stability of data in the second storage partition in a high temperature environment; and a storage unit, configured to store target data in the first storage partition, wherein the target data is data used to perform performance maintenance on the smart module.
- the present application provides an electronic device, which includes a processor, a memory, and a communication interface, wherein the processor, memory, and communication interface are interconnected, wherein the communication interface is used to receive and send data, the memory is used to store program code, and the processor is used to call the program code to execute a method as described in the first aspect and any possible implementation scheme of the first aspect.
- the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and the computer program is executed by a processor to implement the method in the first aspect and any possible implementation of the first aspect.
- FIG1A is a schematic diagram of a TLC storage unit provided in an embodiment of the present application.
- FIG1B is a schematic diagram of a voltage state and data change process of a TLC type memory cell provided by an embodiment of the present application.
- FIG2 is a flow chart of a storage method provided in an embodiment of the present application.
- FIG3A is a schematic diagram of an SLC storage unit provided in an embodiment of the present application.
- FIG3B is a schematic diagram of a voltage state and data change process of an SLC storage unit provided by an embodiment of the present application.
- FIG4 is a schematic diagram of the structure of a storage device provided in an embodiment of the present application.
- FIG5 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application.
- At least one (item) means one or more, “more than one” means two or more, “at least two (items)” means two or three and more than three, and "and/or” is used to describe the association relationship of associated objects, indicating that three relationships may exist.
- a and/or B can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural.
- the character “/” generally indicates that the previous and next associated objects are in an “or” relationship.
- At least one of the following” or similar expressions refers to any combination of these items.
- at least one of a, b or c can mean: a, b, c, "a and b", “a and c", “b and c", or "a and b and c”.
- the embodiments of the present invention provide a storage method, apparatus, device and storage medium. To more clearly describe the solution of the present invention, some knowledge related to the storage method, apparatus, device and storage medium provided in the embodiments of the present application is first introduced below.
- Storage density refers to the number of bits of data stored in each data storage unit in a non-volatile memory device (such as the floating gate in a MOSFET).
- Non-volatile storage devices can be divided into three types according to storage density, namely SLC (Single Level Cell), MLC (Multi-Level Cell), and TLC (Tripple Level Cell).
- SLC means that one memory storage unit can store 1 bit of data, and there are only two charge values 0 and 1
- MLC means that one memory storage unit can store 2 bits of data, and there are 4 values represented by 00, 01, 10, and 11
- TLC means that one memory storage unit can store 3 bits of data, and there are 4 values represented by 00, 01, 10, and 11.
- the storage medium with higher storage density has greater storage capacity, but shorter service life, lower reliability and data security.
- NAND stores data through an insulating layer.
- When writing data it is necessary to apply voltage and form an electric field so that electrons can enter the storage cell through the insulator, and the data is written. If the storage cell (data) is to be deleted, the voltage must be applied again to allow the electrons to pass through the insulating layer and leave the storage cell. Therefore, NAND flash memory must delete the original data before rewriting new data.
- the access time required for data in TLC is longer, so the transmission speed is slower.
- the range of each voltage state in TLC also needs to be set relatively small. Therefore, when the charge is unstable, the data stored in TLC is very easy to be destroyed due to changes in voltage states.
- motherboards For example, electronic devices such as mobile phones and POS terminals generally have their own motherboards. When the motherboard is manufactured, the manufacturer will store key data such as calibration parameters and IMEI in the storage medium of the motherboard. Later, when downstream manufacturers use these motherboards for secondary production, they often need to perform surface mounting on these motherboards again, and then store specific test software in the storage medium of the motherboard according to the product type to test and ship the final product.
- FIG1A is a schematic diagram of a TLC storage unit provided in an embodiment of the application.
- the storage unit 10 is a storage unit in a NAND flash memory, which is configured as a TLC storage unit.
- the bit 10A is a bit of data contained in the 3 bits of data, and its corresponding bit value can be 0 or 1.
- the data that may be stored in the storage unit 10 can be embodied as any one of the 8 values of 000, 001, 010, 011, 100, 101, 110, and 111.
- the value of each bit in the storage unit 10 is determined by the amount of charge stored in the MOS floating gate.
- the threshold between the lowest voltage state and the highest voltage state is generally very small.
- the interval length (or voltage difference) corresponding to each voltage range also needs to be set smaller.
- the threshold of 0.8V is divided into 8 different voltage ranges, and it can be seen that the interval length of each range is 0.1V. Then the bit value corresponding to the voltage range of 1.50V-1.60V can be set to 000, the bit value corresponding to the voltage range of 1.60V-1.70V can be set to 001, the bit value corresponding to the voltage range of 1.70V-1.80V can be set to 010, and so on. It is difficult to calculate, as the interval length of each voltage range is very small, only 0.1V.
- the activity of electrons is very high.
- the high temperature environment generated during surface mounting can easily cause the electrons in the storage unit to escape the floating gate limit of the MOS, causing the charge stored in the MOS floating gate to change, and the voltage state to change.
- the value of each bit in the storage unit 10 will also change accordingly, and the content of its stored data will also change.
- FIG1B assuming that the voltage value generated by the charge stored in the MOS floating gate in the original storage unit 10 is 1.55V, then corresponding to the various voltage ranges described above, it can be seen that the data stored in the storage unit at this time (i.e., the bit value of the three-bit data) is 000.
- the storage unit 10 stores key data such as calibration parameters, international mobile equipment identity codes, etc., when the storage medium where the storage unit 10 is located is re-produced to obtain a specific mobile device, the mobile device may not be able to provide normal functions and play its due role.
- an embodiment of the present application provides a storage method.
- This method configures some storage partitions in the storage medium as low storage density storage partitions, and stores key data in the low storage density storage partitions.
- the key data can be prevented from being destroyed during the surface mounting process of the smart module where the storage medium is located by the user, thereby improving the security of the data.
- the method may include the following steps:
- the electronic device configures the storage density of the first storage partition in the storage medium to be the first storage density, and configures the storage density of the second storage partition to be the second storage density, wherein the first storage density is less than the second storage density.
- the first storage partition and the second storage partition are two independent partitions in the storage medium, and the stability of the data in the first storage partition in a high temperature environment is better than the stability of the data in the second storage partition in a high temperature environment.
- the above-mentioned electronic device may be a mobile phone, a tablet computer (pad), a computer with data receiving and sending functions (such as a laptop computer, a PDA, etc.), a mobile Internet device (mobile internet device, MID), a terminal in industrial control (industrial control), a terminal device in a 5G network, or a terminal device in a public land mobile communication network (public land mobile network, PLMN) to be evolved in the future, etc.; it can be understood that the present application does not limit the specific form of the above-mentioned electronic devices.
- the storage medium may be a large-capacity flash memory chip such as an embedded multimedia card or a universal flash memory storage, and the storage medium may be deployed or integrated in a smart module.
- the smart module may be a motherboard in a mobile device such as a mobile phone or a POS machine, and the manufacturer may perform secondary assembly and production based on the smart module to obtain a mobile device such as a mobile phone or a POS machine.
- Flash memory chips can be divided into three types according to storage density, namely SLC, TLC and MLC mentioned in the above description.
- SLC means that 1 memory storage unit can store 1 bit of data
- MLC means that 1 memory storage unit can store 2 bits of data
- TLC means that 1 memory storage unit can store 3 bits of data.
- FIG3A is a schematic diagram of an SLC storage unit provided in an embodiment of the application.
- a storage unit 30 is a storage unit in a NAND flash memory, which is configured as an SLC storage unit.
- Bit 10A is 1 bit of data included in the 3 bits of data, and its corresponding bit value can be 0 or 1. It can be inferred that the data that can be stored in the storage unit 30 can only be 0 or 1.
- the storage density of the first storage partition can be 1 bit/storage unit, and the storage density of the second storage partition can be 3 bits/storage unit; or, the storage density of the first storage partition can be 1 bit/storage unit, and the storage density of the second storage partition can be 2 bits/storage unit; or, the storage density of the first storage partition can be 2 bits/storage unit, and the storage density of the second storage partition can be 3 bits/storage unit.
- the storage density of the two partitions can be determined based on the storage density of the second storage partition and the comprehensive requirements for capacity and data security. This application does not limit this. It is only necessary to configure the first storage partition as a storage partition with a lower storage density than the second storage partition.
- the electronic device stores the target data into the first storage partition.
- the target data includes at least one of the performance calibration parameters of the mobile device and the international mobile equipment identity code of the mobile device.
- the calibration parameters may include radio frequency calibration parameters, power calibration parameters, and sensitivity calibration parameters, which are used to maintain the performance of the smart module in terms of radio frequency, power, communication, etc.
- IMEI is the international mobile equipment identity code, which is the "file” and "ID number" of the smart module in the manufacturer, and can be used to identify the mobile device.
- the supplier will store key data such as calibration parameters and international mobile equipment identity codes (i.e., the above-mentioned target data) in the above-mentioned storage medium.
- the calibration parameters may include radio frequency calibration parameters, power calibration parameters, and sensitivity calibration parameters.
- the international mobile equipment identity code is composed of four parts: model approval number, last assembly number, serial number and inspection code, which can be read and written in the memory (i.e., the above-mentioned storage medium).
- IMEI can also be recognized by signal transmission towers, which can help security agencies locate the location of mobile phones and their users, and can also help find store information that sells the above-mentioned mobile devices. Therefore, the target data needs to be stored stably in the storage medium. Therefore, storing these data in the first storage partition can improve the security of these data in the subsequent secondary patch process.
- the capacity of the first storage partition accounts for less than a first threshold value in the total capacity of the storage medium. It should be understood that the storage capacity of a low-density storage partition is generally small, and it is precisely by sacrificing capacity in exchange for the security of the data stored therein. However, if most of the storage partitions in the above-mentioned storage medium are configured as storage partitions with low storage density, the storage capacity of the storage medium will be greatly reduced. In addition, some data in the storage medium are not critical data, and the security of these data does not need to be considered too much.
- a part of the storage partitions in the above-mentioned storage medium can be configured as storage partitions with low storage density, and the total capacity of this part of the storage partitions accounts for a very small proportion of the total capacity of the above-mentioned storage medium, such as one percent or one thousandth.
- a part of the storage partitions can be configured as SLC partitions. Assume that the total capacity of the configured SLC partitions is 100 MB. Although these storage partitions can be configured as TLC partitions, the total capacity can be increased by 200 MB. However, considering data security and storage capacity, this implementation method can still configure these storage partitions as SLC partitions. Although this requires sacrificing 200 MB of storage capacity, it is basically negligible compared to devices with a total capacity of tens to hundreds of GB, and will not significantly reduce the storage capacity of the storage medium, while effectively protecting key data.
- the manufacturer needs to test the above-mentioned smart module, so it is necessary to download a set of test software into the above-mentioned smart module.
- the above-mentioned test software needs to be downloaded and installed in the above-mentioned storage medium, but the test software is only used for testing the smart module.
- the relevant data of the above-mentioned test software does not need to be used again in the secondary production process of the smart module.
- the above-mentioned electronic device can also store the above-mentioned test software in the above-mentioned second storage partition; the test software tests the performance of the above-mentioned smart module to obtain test data.
- the above-mentioned first storage partition will have more capacity to store key data such as calibration parameters and IMEI that need to be used in subsequent processes.
- the electronic device can also erase the test data from the second storage partition.
- the test data can be erased from the second storage partition to further save storage capacity in the storage medium.
- the storage capacity of a low-density storage partition is generally small, and it sacrifices capacity in exchange for the security of the data stored therein.
- Reasonable design of the storage capacity of a low-density storage partition can minimize the reduction in the storage capacity of the storage medium and effectively protect key data. Therefore, in a possible implementation, the above-mentioned electronic device can also obtain the size of the storage space occupied by the above-mentioned target data, and determine the capacity of the above-mentioned first storage partition according to the size of the storage space occupied by the above-mentioned target data. Specifically, the capacity of the above-mentioned first storage partition is greater than or equal to the above-mentioned target capacity. By calculating the size of the storage space that the above-mentioned target data needs to occupy to reasonably plan the capacity of the above-mentioned first storage partition, the storage capacity of the above-mentioned storage medium can be further guaranteed.
- steps in the flowchart of FIG. 2 are shown in sequence as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction for the execution of these steps, and they can be executed in other orders. Moreover, at least some of the steps in the figure may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be combined with other steps or sub-steps or stages of other steps. At least part of the two phases are performed in turn or alternately.
- FIG 4 The following is a schematic diagram of the structure of a positioning device provided by an embodiment of the present application, please refer to Figure 4.
- the storage device in Figure 4 can execute the process of the storage method in Figure 2, and the device includes:
- the configuration unit 401 is used to configure the storage density of the first storage partition in the storage medium to be the first storage density, and to configure the storage density of the second storage partition to be the second storage density, wherein the first storage density is less than the second storage density; the first storage partition and the second storage partition are two independent partitions in the storage medium, and the stability of the data in the first storage partition in a high temperature environment is better than the stability of the data in the second storage partition in a high temperature environment; the storage unit 402 is used to store the target data in the first storage partition, and the target data is the data used for performance maintenance of the smart module.
- the proportion of the capacity of the first storage partition in the total capacity of the storage medium is smaller than a first threshold.
- the storage density of the first storage partition is 1 bit/storage unit, and the storage density of the second storage partition is 3 bits/storage unit; or, the storage density of the first storage partition is 1 bit/storage unit, and the storage density of the second storage partition is 2 bits/storage unit; or, the storage density of the first storage partition is 2 bits/storage unit, and the storage density of the second storage partition is 3 bits/storage unit.
- the device is applied to a smart module
- the smart module is applied to a mobile device
- the target data includes at least one of a performance calibration parameter of the mobile device and an international mobile equipment identity code of the mobile device.
- the device further includes a testing unit 403, and the storage unit 402 is further used to store the test software into the second storage partition; the testing unit 403 is used to test the performance of the smart module based on the test software to obtain test data.
- the apparatus further includes an erasing unit 404, configured to erase the test data from the second storage partition.
- the device further includes an acquisition unit 405 and a determination unit 406, wherein the acquisition unit 405 is used to acquire a target capacity, wherein the target capacity represents the size of the storage space occupied by the target data; and the determination unit 406 is used to determine the capacity of the first storage partition according to the target capacity, wherein the capacity of the first storage partition is greater than or equal to the target capacity.
- the division of the various units of the above positioning device is only a division of logical functions. In actual implementation, they can be fully or partially integrated into one physical entity, or they can be physically separated.
- the above units can be separately established processing elements, or they can be integrated into the same chip for implementation.
- they can also be stored in the storage unit of the controller in the form of program code, and called and executed by a certain processing element of the processor.
- the various units can be integrated together or implemented independently.
- the processing element here can be an integrated circuit chip with signal processing capabilities. In the implementation process, the steps of the method or the above units can be completed by hardware integrated logic circuits in the processor element or software instructions.
- the processing element can be a general processor, such as a CPU, or it can be one or more integrated circuits configured to implement the above method, such as: one or more specific integrated circuits (application-specific integrated circuit, ASIC), or, one or more microprocessors (digital signal processor, DSP), or, one or more field programmable gate arrays (field-programmable gate array, FPGA), etc.
- ASIC application-specific integrated circuit
- DSP digital signal processor
- FPGA field-programmable gate array
- FIG5 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application.
- the electronic device 50 includes a processor 501, a memory 502, and a communication interface 503; the processor 501, the memory 502, and the communication interface 503 are interconnected via a bus 504.
- the electronic device 50 may be the electronic device in the aforementioned description.
- the memory 502 includes, but is not limited to, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), or a portable read-only memory (CDROM), and the above memory 702 is used for related instructions and data.
- the communication interface 503 is used to receive and send data. Specifically, the communication interface 503 can realize the function of the acquisition unit 405 in Figure 4.
- the processor 501 may be one or more central processing units (CPUs). When the processor 501 is a CPU, the CPU may be a single-core CPU or a multi-core CPU. Specifically, the processor 501 may implement the functions of the configuration unit 401, the storage unit 402, the test unit 403, the erasure unit 404, and the determination unit 406 in FIG. 4 .
- CPUs central processing units
- the processor 501 may implement the functions of the configuration unit 401, the storage unit 402, the test unit 403, the erasure unit 404, and the determination unit 406 in FIG. 4 .
- another computer-readable storage medium which stores a computer program, and when the computer program is executed by a processor, it is implemented: the storage density of the first storage partition in the storage medium is configured to be the first storage density, and the storage density of the second storage partition is configured to be the second storage density, and the above-mentioned first storage density is less than the above-mentioned second storage density; the above-mentioned first storage partition and the above-mentioned second storage partition are two independent partitions in the above-mentioned storage medium, and the stability of the data in the above-mentioned first storage partition in a high temperature environment is better than the stability of the data in the above-mentioned second storage partition in a high temperature environment; the target data is stored in the above-mentioned first storage partition, and the above-mentioned target data is data used to perform performance maintenance on the above-mentioned smart module.
- the embodiment of the present application also provides a computer program product including instructions, which, when executed on a computer, enables the computer to execute the storage method provided by the aforementioned embodiment.
- embodiments of the present invention may provide methods, devices, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
- computer-usable storage media including but not limited to disk storage, CD-ROM, optical storage, etc.
- the present invention is described by flowcharts and/or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and/or box in the flowchart and/or block diagram, as well as the combination of the processes and/or boxes in the flowchart and/or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate a device for implementing the functions specified in one or more processes in the flowchart and/or one or more boxes in the block diagram.
- These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device that implements the functions specified in one or more processes in the flowchart and/or one or more boxes in the block diagram.
- These computer program instructions may also be loaded onto a computer or other programmable data processing device, so that a series of operating steps are executed on the computer or other programmable device to produce computer-implemented processing, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more processes of the flowchart and/or one or more boxes of the block diagram.
- the above is only a specific implementation method of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or substitutions within the technical scope disclosed in the present application, and these modifications or substitutions should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.
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Abstract
一种存储方法、装置、设备和存储介质。方法通过将存储介质中的部分存储分区配置为低存储密度的存储分区,并将关键数据存储在低存储密度的存储分区中,利用低存储密度存储分区在高温环境下的稳定性,能在用户对存储介质所在的智能模组进行表面贴装过程中,避免关键数据被破坏,提升数据的安全性。
Description
本申请要求于2022年11月09日提交中国专利局、申请号为2022113972684、申请名称为“存储方法、装置、设备和存储介质”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
本申请涉及数据存储领域,尤其涉及一种存储方法、装置、设备和存储介质。
例如手机、POS机这样的电子设备一般都拥有自己的主板。在主板生产制造时,生产供应商会将例如校准参数、IMEI等关键数据存储在主板中的存储介质中。之后,下游厂商使用这些主板进行二次生产时,往往需要对这些主板进行再一次的表面贴装,然后根据产品类型将具体的测试软件存储到主板的存储介质中,来对最后成型的产品进行测试出货。
需理解,例如校准参数、IMEI等关键数据需要一直保存在主板中,以确保主板能在后续出产的电子产品中发挥正常的作用。但是目前主板中所使用的大容量的存储介质在高温下数据保存能力较差,当下游厂商对主板进行表面贴装时,表面贴装时所产生的高温环境可能使得原本存储在主板中的关键数据被破坏。因此,需要研究新的存储方法。
发明内容
本申请实施例公开了一种存储方法、装置、设备和存储介质。
本发明的一个或多个实施例的细节在下面的附图和描述中提出。本发明的其它特征、目的和优点将从说明书、附图以及权利要求书变得明显。
第一方面,本申请提供了一种存储方法,所述方法应用于智能模组,所述方法包括:将存储介质中的第一存储分区的存储密度配置为第一存储密度,将第二存储分区的存储密度配置为第二存储密度,所述第一存储密度小于所述第二存储密度;所述第一存储分区和所述第二存储分区为所述存储介质中的两个独立的分区,所述第一存储分区中数据在高温环境下的稳定性优于所述第二存储分区中数据在高温环境下的稳定性;将目标数据存入所述第一存储分区,所述目标数据为用于对所述智能模组进行性能维护的数据。
第二方面,本申请提供了一种存储装置,所述装置包括:配置单元,用于将存储介质中的第一存储分区的存储密度配置为第一存储密度,将第二存储分区的存储密度配置为第二存储密度,所述第一存储密度小于所述第二存储密度;所述第一存储分区和所述第二存储分区为所述存储介质中的两个独立的分区,所述第一存储分区中数据在高温环境下的稳定性优于所述第二存储分区中数据在高温环境下的稳定性;存入单元,用于将目标数据存入所述第一存储分区,所述目标数据为用于对所述智能模组进行性能维护的数据。
第三方面,本申请提供了一种电子设备,所属设备包括处理器、存储器以及通信接口,所述处理器、存储器和通信接口相互连接,其中,所述通信接口用于接收和发送数据,所述存储器用于存储程序代码,所述处理器用于调用所述程序代码,执行如所述第一方面以及第一方面任一项可能的实施方式中的方法。
第四方面,本申请提供了一种计算机可读存储介质,所述计算机可读存储介质存储有计算机程序,所述计算机程序被处理器执行以实现如所述第一方面以及第一方面任一项可能的实施方式中的方法。
图1A为本申请实施例提供的一种TLC式存储单元的示意图;
图1B为本申请实施例提供的一种TLC式存储单元的电压状态和数据变化的过程示意图;
图2为本申请实施例提供的一种存储方法的流程图;
图3A为本申请实施例提供的一种SLC式存储单元的示意图;
图3B为本申请实施例提供的一种SLC式存储单元的电压状态和数据变化的过程示意图;
图4为本申请实施例提供的一种存储装置的结构示意图;
图5为本申请实施例提供的一种电子设备的结构示意图。
为了使本申请的目的、技术方案和优点更加清楚,下面将结合附图对本申请作进一步地描述。
本申请的说明书、权利要求书及附图中的术语“第一”和“第二”等仅用于区别不同对象,而不是用于描述特定顺序。此外,术语“包括”和“具有”以及它们的任何变形,意图在于覆盖不排他的包含。例如包含了一系列步骤或单元的过程、方法、系统、产品或设备等,没有限定于已列出的步骤或单元,而是可选地还包括没有列出的步骤或单元等,或可选地还包括对于这些过程、方法、产品或设备等固有的其它步骤或单元。
在本文中提及的“实施例”意味着,结合实施例描述的特定特征、结构或特性可以包含在本申请的至少一个实施例中。在说明书中的各个位置出现该短语并不一定均是指相同的实施例,也不是与其它实施例互斥的独立的或备选的实施例。本领域技术人员可以显式地和隐式地理解的是,本文所描述的实施例可以与其它实施例相结合。
在本申请中,“至少一个(项)”是指一个或者多个,“多个”是指两个或两个以上,“至少两个(项)”是指两个或三个及三个以上,“和/或”,用于描述关联对象的关联关系,表示可以存在三种关系,例如,“A和/或B”可以表示:只存在A,只存在B以及同时存在A和B三种情况,其中A,B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项(个)”或其类似表达,是指这些项中的任意组合。例如,a,b或c中的至少一项(个),可以表示:a,b,c,“a和b”,“a和c”,“b和c”,或“a和b和c”。
本发明实施例提供了一种存储方法、装置、设备和存储介质,为更清楚的描述本发明的方案,下面先介绍一些本申请实施例提供的存储方法、装置、设备和存储介质所涉及的知识。
(1)存储密度
存储密度是指属于非易失性存储设备(Non-volatile Memory Device)中的每一个存储数据的单元(例如MOSFET里面的悬浮门(Floating Gate))中存储的bit数据的数量。
非易失性存储设备根据存储密度可以分为三种,即SLC(Single Level Cell)、MLC(Multi-Level Cell)、TLC(Tripple Level Cell)。其中,SLC表示1个存储器储存单元可存放1bit的数据,只存在0和1两个充电值;MLC表示1个存储器储存单元可存放2bit的数据,存在00、01、10、11表示的4个值;TLC表示1个存储器储存单元可存放3bit的数据,存
在000、001、010、011、100、101、110、111表示的8个充电值。
存储密度越大的存储介质存储容量越大,但是使用寿命却更短,可靠性和数据的安全性也更差。
(2)NAND闪存的存储原理
根据NAND闪存的物理结构,NAND是通过绝缘层存储数据的。当要写入数据,需要施加电压并形成一个电场,这样电子就可以通过绝缘体进入到存储单元,此时完成写入数据。如果要删除存储单元(数据),则要再次施加电压让电子穿过绝缘层,从而离开存储单元。所以,NAND闪存在重新写入新数据之前必须要删除原来数据。
由于TLC的1个存储器储存单元可存放3bit的数据,为了区分,必须使用不同电压来实现。除了能够实现和SLC一样的000(TLC)=0(SLC)和111(TLC)=1(SLC)外、还有另外六种数据格式必须采用其他不同的电压来区分,让不同数量的电子进入到存储单元,实现不同的数据表达。这样,才能让TLC实现单位存储单元存放比SLC、MLC更多数据的目的。由于数据写入到TLC中需要八种不同电压状态,而施加不同的电压状态、尤其是相对较高的电压,需要更长的时间才能得以实现(电压不断增高的过程,直到合适的电压值被发现才算完成)。所以,在TLC中数据所需访问时间更长,因此传输速度更慢。且由于TLC中需要八种不同电压状态来表示八个不同的数据值,因此TLC中每个电压状态的区间范围也需要设定的比较小,因此当电荷不稳定时,需要TLC中存储的数据极易因为电压状态的变化而被破坏。
例如手机、POS机这样的电子设备一般都拥有自己的主板。在主板生产制造时,生产供应商会将例如校准参数、IMEI等关键数据存储在主板中的存储介质中。之后,下游厂商使用这些主板进行二次生产时,往往需要对这些主板进行再一次的表面贴装,然后根据产品类型将具体的测试软件存储到主板的存储介质中,来对最后成型的产品进行测试出货。
需理解,例如校准参数、IMEI等关键数据需要一直保存在主板中,以确保主板能在后续出产的电子产品中发挥正常的作用。但是目前主板中所使用的大容量的存储介质的存储密度较高,其在高温下数据保存能力较差,当下游厂商对主板进行表面贴装时,表面贴装时所产生的高温环境可能使得原本存储在主板中的关键数据被破坏。
图1A为申请实施例提供的一种TLC式存储单元的示意图。如图1A所示,存储单元10为NAND闪存中的存储单元,其被配置为TLC式存储单元。结合前述说明可知,在存储单元10中,存放有3bit的数据。其中比特位10A即为包含在这3bit的数据中的1个bit的数据,其对应的比特值可以为0或者1。可以推知,存储单元10可能存放的数据可以体现为000、001、010、011、100、101、110、111的8个数值任意一个数值。
根据NAND闪存的物理结构,为了区分上述8个数值,必须使用不同范围的8个电压将对应的数值写入存储单元10中。需理解,存储单元10中的各个比特位的数值是通过MOS浮栅存储的电荷多少来判断的。为了保证数据的写入速度,最低电压状态和最高电压状态之间的阈值通常来说都很小,当电荷量需要划分的级别越多时,每个电压范围对应的区间长度(或者说电压差)也需要被设定更小。例如图1A所示,假设存储单元10的最低写入电压状态为1.50V,最高写入电压状态为2.30V,则它们之间的差值为0.8V,那么将这0.8V的阈值进行划分得到8个不同的电压范围,则可知每个范围的区间长度为0.1V。那么可以将1.50V-1.60V这个电压范围对应的比特值设定为000、将1.60V-1.70V这个电压范围对应的比特值设定为001、将1.70V-1.80V这个电压范围对应的比特值设定为010,……以此类推。不
难算出,每个电压范围的区间长度很小,只有0.1V。
而在高温下电子的活性很高,当下游厂商对主板进行表面贴装时,表面贴装时所产生的高温环境很容易使得存储单元中的电子会跑出MOS的浮栅限制,导致MOS浮栅存储的电荷发生变化,电压状态也就变化了。当电压状态改变的时候,存储单元10中各个比特位的数值也会随之改变,其存储数据内容也就改变了。如图1B所示,假设原本存储单元10中的MOS浮栅存储的电荷所产生的电压值为1.55V,则对应前述说明的各个电压范围可知,此时存储单元中存储的数据(即三个比特数据的比特值)为000。若高温环境导致存储单元10中的电子活性变高,进一步引发其MOS浮栅存储的电荷发生变化,电压状态相应地变化为1.65V,则对应前述说明的各个电压范围可知,此时存储单元中存储的数据(即三个比特数据的比特值)会由原来的000变化为001,则原本存储在存储单元10中的数据就已经被破坏了。如果存储单元10中存储的是例如校准参数、国际移动设备身份码等关键数据,那么存储单元10所在的存储介质被二次生产得到具体的移动设备时,该移动设备很可能无法提供正常的使用功能和发挥应有的作用。
针对上述缺陷,本申请实施例提供了一种存储方法。该方法通过将存储介质中的部分存储分区配置为低存储密度的存储分区,并将关键数据存储在该低存储密度的存储分区中,利用低存储密度存储分区在高温环境下的稳定性,能在用户对上述存储介质所在的智能模组进行表面贴装过程中,避免关键数据被破坏,提升数据的安全。如图2所示,该方法可以包括以下步骤:
201、将存储介质中的第一存储分区的存储密度配置为第一存储密度,将第二存储分区的存储密度配置为第二存储密度,该第一存储密度小于该第二存储密度。
电子设备将存储介质中的第一存储分区的存储密度配置为第一存储密度,将第二存储分区的存储密度配置为第二存储密度,该第一存储密度小于该第二存储密度。所述第一存储分区和所述第二存储分区为所述存储介质中的两个独立的分区,所述第一存储分区中数据在高温环境下的稳定性优于所述第二存储分区中数据在高温环境下的稳定性。
具体的,上述电子设备可以是其可以是手机(mobile phone)、平板电脑(pad)、带数据收发功能的电脑(如笔记本电脑、掌上电脑等)、移动互联网设备(mobile internet device,MID)、工业控制(industrial control)中的终端、5G网络中的终端设备或者未来演进的公用陆地移动通信网络(public land mobile network,PLMN)中的终端设备等;可理解,对于上述电子设备的具体形态,本申请不作限定。
上述存储介质可以是例如嵌入式多媒体卡、通用闪存存储这样大容量的闪存芯片,上述存储介质被部署或者集成在智能模组中。具体的,上述智能模组可以是例如手机、POS机这样的移动设备中的主板,生产商可以基于上述智能模组进行二次组装和生产,得到例如手机、POS机这样的移动设备。
闪存芯片根据存储密度可以分为三种,即前述说明中提及的SLC、TLC还有就是MLC。其中,SLC表示1个存储器储存单元可存放1bit的数据,MLC表示1个存储器储存单元可存放2bit的数据,TLC表示1个存储器储存单元可存放3bit的数据。结合前述说明可知,相同面积下,存储密度越小的存储分区的存储容量越小,但是其数据的稳定性和安全性会更高。
以图3A和图3B为例进行说明。图3A为申请实施例提供的一种SLC式存储单元的示意图。如图3A所示,存储单元30为NAND闪存中的存储单元,其被配置为SLC式存储单元。
结合前述说明可知,在存储单元30中,只存放1bit的数据。其中比特位10A即为包含在这3bit的数据中的1个bit的数据,其对应的比特值可以为0或者1。可以推知,存储单元30可能存放的数据只能体现为0或1。
根据NAND闪存的物理结构,为了区分上述2个数值,必须使用不同范围的2个电压将对应的数值写入存储单元30中。为了与图1A中的存储单元10比对,这里同样假设存储单元30的最低写入电压状态为1.50V,最高写入电压状态为2.30V,则它们之间的差值为0.8V,那么将这0.8V的阈值进行划分得到2个不同的电压范围,则可知每个范围的区间长度为0.4V。那么可以将1.50V-1.90V这个电压范围对应的比特值设定为0、将1.90V-2.30V这个电压范围对应的比特值设定为1。不难算出,每个电压范围的区间长度比较大,有0.4V。
因此只有在电压变化的幅度较大的时候,存储单元30中各个比特位的数值才会随之改变,其存储数据内容才会北欧破坏。如图3B所示,假设原本存储单元30中的MOS浮栅存储的电荷所产生的电压值为1.55V,则对应前述说明的各个电压范围可知,此时存储单元中存储的数据0。若高温环境导致存储单元30中的电子活性变高,进一步引发其MOS浮栅存储的电荷发生变化,电压状态相应地变化为1.65V,则对应前述说明的各个电压范围可知,此时存储单元中存储的数据依旧为0,则原本存储在存储单元30中的数据就并没有被破坏。
则结合前述说明可以推知,存储密度越小的存储分区的存储容量越小,但是其数据在高温环境下的稳定性和安全性会更高。因此,在一个可选的实施方式中,因此,上述第一存储分区的存储密度可以为1bit/存储单元,上述第二存储分区的存储密度可以为3bit/存储单元;或者,上述第一存储分区的存储密度可以为1bit/存储单元,上述第二存储分区的存储密度可以为2bit/存储单元;或,上述第一存储分区的存储密度为可以2bit/存储单元,上述第二存储分区的存储密度为可以3bit/存储单元。具体可以根据所述第二存储分区的存储密度以及对容量和数据安全性的综合需求来确定两个分区的存储密度,本申请对此不作限定,只需将上述第一存储分区配置为比上述第二存储分区的存储密度更低的存储分区即可。
202、将目标数据存入上述第一存储分区。
电子设备将目标数据存入上述第一存储分区。
上述目标数据包括上述移动设备的性能校准参数以及上述移动设备的国际移动设备识别码中的至少一项。具体的,上述校准参数可以包括射频校准参数、功率校准参数、灵敏度校准参数,些参数用于维护智能模组在射频、功率、通信等方面的性能。而IMEI即为国际移动设备身份码,是上述智能模组在生产厂商中的"档案"和"身份证号",可以用于识别上述移动设备。
需理解,在上述智能模组的生产过程中,供应商会将例如校准参数、国际移动设备身份码等关键数据(即上述目标数据)存储在上述存储介质中。其中,校准参数可以包括射频校准参数、功率校准参数、灵敏度校准参数。在利用上述智能模组进行生产得到上述移动设备时,由于移动设备中包含了多个器件,器件与器件之间也存在差异性,因此在生产时需要利用这些校准参数对上述移动设备进行校准,以确保上述智能模组和上述移动设备可以正常发挥其提供的功能,并且可以在用户的使用过程中利用这些参数来维护其在射频、功率、通信等方面的性能。而国际移动设备身份码,是由型号核准号码、最后装配号、串号和检验码四部分组成,其可以读写于内存(即上述存储介质)中。它是上述智能模组在生产厂商中的"档案"和"身份证号",可以用于识别上述移动设备,标示该设备的全球唯一性。此外,IMEI还可以被信号发射塔识别,可以帮助安全机构定位手机及其使用者的位置,同时也能帮助找到销售上述移动设备的商店资料。因此,上述目标数据其需要一直稳定保存在上述存储介质
中,不能被破坏。因此,将这些数据存储在上述第一存储分区中,可以提升这些数据其在后续二次贴片过程中的安全性。
在一种可能的实施方式中,上述第一存储分区的容量在上述存储介质的总容量中的占比小于第一阈值。需要理解的是,低密度存储分区的存储容量一般较小,其正是通过牺牲容量来换取存储在其中的数据安全性。但是如果将上述存储介质中的大部分存储分区都配置为低存储密度的存储分区,那么存储介质的存储容量就会大幅度减小。另外,存储介质中有些数据并不是关键数据,并不需要过多考虑这些数据的安全性。因此,在本实施方式中,可以只将上述存储介质中的一小部分存储分区配置为低存储密度的存储分区,这部分存储分区的总容量在上述存储介质的总容量中的占比很小,例如百分之一或者千分之一。例如在总容量几十到上百GB的存储介质,可以将其中一部分存储分区配置为SLC分区,假设配置的SLC分区的总容量为100MB,虽然原本可以将这些存储分区配置为TLC分区,那么总容量可以增加200MB的容量,但是综合考虑数据安全性和存储容量,本实施方式还是可以将这部分存储分区配置为SLC分区,虽然这样需要牺牲200MB的存储容量,但是相对于总容量几十到上百GB的器件来说基本可以忽略,不会大幅缩减存储介质的存储容量,又能对关键数据进行有效保护。
需理解,在上述智能模组生产出来后,生产商需要对上述智能模组进行测试,因此需要下载一套测试软件在上述智能模组中。上述测试软件需要下载并安装在上述存储介质中,但是,该测试软件仅用于对智能模组的测试,不同于上述校准参数和IMEI,上述测试软件的相关数据并不需要在智能模组的二次生产过程再次使用。因此,在一种可能的实施方式中,在将上述第二存储分区的存储密度配置为第二存储密度之后,上述电子设备还可以将上述测试软件存入上述第二存储分区;该测试软件对上述智能模组的性能进行测试,得到测试数据。这样,上述第一存储分区就能有更多的容量来存储例如校准参数和IMEI此类需要在后续过程中使用的关键数据。
进一步的,在上述得到测试数据之后,上述电子设备还可以将上述测试数据从上述第二存储分区中擦除。结合前述说明可知,在后续对上述智能模组进行二次生产,得到例如手机、POS机这样的移动设备之后,下游厂商往往需要下载另一套测试软件对生产出来的移动设备进行测试。此外,结合前述说明可知,上述测试软件的相关数据并不需要在智能模组的二次生产过程再次使用。因此,在上述得到测试数据之后,可以将上述测试数据从上述第二存储分区中擦除,进一步节省存储介质中的存储容量。
需理解,低密度存储分区的存储容量一般较小,其是通过牺牲容量来换取存储在其中的数据安全性。合理设计低密度存储分区的存储容量,可以尽可能缩小存储介质的存储容量的缩减幅度,又能对关键数据进行有效保护。因此,在一种可能的实施方式中,上述电子设备还可以获取上述目标数据所占存储空间的大小,并根据上述目标数据所占存储空间的大小确定上述第一存储分区的容量。具体的,上述第一存储分区的容量大于或等于上述目标容量。通过计算上述目标数据需要占据的存储空间的大小来合理规划上述第一存储分区的容量,能进一步保证上述存储介质的存储容量。
应该理解的是,虽然图2的流程图中的各个步骤按照箭头的指示依次显示但是这些步骤并不是必然按照箭头指示的顺序依次执行。除非本文中有明确的说明,这些步骤的执行并没有严格的顺序限制,其可以以其他的顺序执行。而且,图中的至少部分步骤可以包括多个子步骤或者多个阶段,这些子步骤或者阶段并不必然是在同一时刻执行完成,而是可以在不同的时刻执行,其执行顺序也不必然是依次进行,而是可以与其他步骤或者其他步骤的子步骤或
者阶段的至少一部分轮流或者交替地执行。
下面介绍本申请实施例提供的一种定位装置的结构示意图,请参阅图4。如图4所示,图4中的存储装置可以执行图2中存储方法的流程,该装置包括:
配置单元401,用于将存储介质中的第一存储分区的存储密度配置为第一存储密度,将第二存储分区的存储密度配置为第二存储密度,上述第一存储密度小于上述第二存储密度;上述第一存储分区和上述第二存储分区为上述存储介质中的两个独立的分区,上述第一存储分区中数据在高温环境下的稳定性优于上述第二存储分区中数据在高温环境下的稳定性;存入单元402,用于将目标数据存入上述第一存储分区,上述目标数据为用于对上述智能模组进行性能维护的数据。
在一种可能的实施方式中,上述第一存储分区的容量在上述存储介质的总容量中的占比小于第一阈值。
在一种可能的实施方式中,上述第一存储分区的存储密度为1bit/存储单元,上述第二存储分区的存储密度为3bit/存储单元;或,上述第一存储分区的存储密度为1bit/存储单元,上述第二存储分区的存储密度为2bit/存储单元;或,上述第一存储分区的存储密度为2bit/存储单元,上述第二存储分区的存储密度为3bit/存储单元。
在一种可能的实施方式中,上述装置应用于智能模组,上述智能模组应用于移动设备,上述目标数据包括上述移动设备的性能校准参数以及上述移动设备的国际移动设备识别码中的至少一项。
在一种可能的实施方式中,上述装置还包括测试单元403,上述存入单元402还用于将测试软件存入上述第二存储分区;上述测试单元403用于基于上述测试软件对上述智能模组的性能进行测试,得到测试数据。
在一种可能的实施方式中,上述装置还包括擦除单元404,用于将上述测试数据从上述第二存储分区中擦除。
在一种可能的实施方式中,上述装置还包括获取单元405和确定单元406,上述获取单元405用于获取目标容量,上述目标容量表征上述目标数据所占存储空间的大小;上述确定单元406用于根据上述目标容量确定上述第一存储分区的容量,上述第一存储分区的容量大于或等于上述目标容量。
应理解,以上定位装置的各个单元的划分仅仅是一种逻辑功能的划分,实际实现时可以全部或部分集成到一个物理实体上,也可以物理上分开。例如,以上各个单元可以为单独设立的处理元件,也可以集成同一个芯片中实现,此外,也可以以程序代码的形式存储于控制器的存储单元中,由处理器的某一个处理元件调用并执行以上各个单元的功能。此外各个单元可以集成在一起,也可以独立实现。这里的处理元件可以是一种集成电路芯片,具有信号的处理能力。在实现过程中,所述方法的各步骤或以上各个单元可以通过处理器元件中的硬件的集成逻辑电路或者软件形式的指令完成。所述处理元件可以是通用处理器,例如CPU,还可以是被配置成实施以上方法的一个或多个集成电路,例如:一个或多个特定集成电路(application-specific integrated circuit,ASIC),或,一个或多个微处理器(digital signal processor,DSP),或,一个或者多个现场可编程门阵列(field-programmable gate array,FPGA)等。
图5为本申请实施例提供的一种电子设备的结构示意图。如图5所示,电子50包括处理器501、存储器502和通信接口503;上述处理器501、存储器502和通信接口503通过总线504相互连接。具体的,电子设备50可以是前述说明中的电子设备。
存储器502包括但不限于是随机存储记忆体(random access memory,RAM)、只读存储器(read-only memory,ROM)、可擦除可编程只读存储器(erasable programableread only memory,EPROM)、或便携式只读存储器(compact disc read-only memory,CDROM),上述存储器702用于相关指令及数据。通信接口503用于接收和发送数据。具体的,通信接口503可实现图4中的获取单元405的功能。
处理器501可以是一个或多个中央处理器(central processing unit,CPU),在处理器501是一个CPU的情况下,上述CPU可以是单核CPU也可以是多核CPU。具体的,处理器501可实现图4中的配置单元401、存入单元402、测试单元403、擦除单元404和确定单元406的功能。
在本申请的实施例中提供另一种计算机可读存储介质,该计算机可读存储介质存储有计算机程序,该计算机程序被处理器执行时实现:将存储介质中的第一存储分区的存储密度配置为第一存储密度,将第二存储分区的存储密度配置为第二存储密度,上述第一存储密度小于上述第二存储密度;上述第一存储分区和上述第二存储分区为上述存储介质中的两个独立的分区,上述第一存储分区中数据在高温环境下的稳定性优于上述第二存储分区中数据在高温环境下的稳定性;将目标数据存入上述第一存储分区,上述目标数据为用于对上述智能模组进行性能维护的数据。
本申请实施例还提供了一种包含指令的计算机程序产品,当其在计算机上运行时,使得计算机执行前述实施例所提供的存储方法。
本领域内的技术人员应明白,本发明的实施例可提供方法、装置、或计算机程序产品。因此,本发明可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且,本发明可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。
本发明是根据本发明实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器,使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中,使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品,该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上,使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理,从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。以上所述,仅为本申请的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到各种等效的修改或替换,这些修改或替换都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以权利要求的保护范围为准。
Claims (10)
- 一种存储方法,所述方法应用于智能模组,包括:将存储介质中的第一存储分区的存储密度配置为第一存储密度,将第二存储分区的存储密度配置为第二存储密度,所述第一存储密度小于所述第二存储密度;所述第一存储分区和所述第二存储分区为所述存储介质中的两个独立的分区,所述第一存储分区中数据在高温环境下的稳定性优于所述第二存储分区中数据在高温环境下的稳定性;将目标数据存入所述第一存储分区,所述目标数据为用于对所述智能模组进行性能维护的数据。
- 根据权利要求1所述的方法,其特征在于,所述第一存储分区的容量在所述存储介质的总容量中的占比小于第一阈值。
- 根据权利要求1或2所述的方法,其特征在于,所述第一存储分区的存储密度为1bit/存储单元,所述第二存储分区的存储密度为3bit/存储单元;或,所述第一存储分区的存储密度为1bit/存储单元,所述第二存储分区的存储密度为2bit/存储单元;或,所述第一存储分区的存储密度为2bit/存储单元,所述第二存储分区的存储密度为3bit/存储单元。
- 根据权利要求1或2所述的方法,其特征在于,所述智能模组应用于移动设备,所述目标数据包括所述移动设备的性能校准参数以及所述移动设备的国际移动设备识别码中的至少一项。
- 根据权利要求4所述的方法,其特征在于,在所述将所述第二存储分区的存储密度配置为第二存储密度之后,所述方法还包括:将测试软件存入所述第二存储分区;基于所述测试软件对所述智能模组的性能进行测试,得到测试数据。
- 根据权利要求5所述的方法,其特征在于,在所述得到测试数据之后,所述方法还包括:将所述测试数据从所述第二存储分区中擦除。
- 根据权利要求1或2所述的方法,其特征在于,在所述将存储介质中的第一存储分区的存储密度配置为第一存储密度,将第二存储分区的存储密度配置为第二存储密度之前,所述方法还包括:获取目标容量,所述目标容量表征所述目标数据所占存储空间的大小;根据所述目标容量确定所述第一存储分区的容量,所述第一存储分区的容量大于或等于所述目标容量。
- 一种存储装置,包括:配置单元,用于将存储介质中的第一存储分区的存储密度配置为第一存储密度,将第二存储分区的存储密度配置为第二存储密度,所述第一存储密度小于所述第二存储密度;所述 第一存储分区和所述第二存储分区为所述存储介质中的两个独立的分区,所述第一存储分区中数据在高温环境下的稳定性优于所述第二存储分区中数据在高温环境下的稳定性;存入单元,用于将目标数据存入所述第一存储分区,所述目标数据为用于对所述智能模组进行性能维护的数据。
- 一种电子设备,包括处理器、存储器以及通信接口,所述处理器、存储器和通信接口相互连接,其中,所述通信接口用于接收和发送数据,所述存储器用于存储程序代码,所述处理器用于调用所述程序代码,执行如权利要求1至7任一项所述的方法。
- 一种计算机可读存储介质,所述计算机可读存储介质存储有计算机程序,所述计算机程序被处理器执行以实现权利要求1至7任一项所述的方法。
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2022
- 2022-11-09 CN CN202211397268.4A patent/CN115826854A/zh active Pending
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