WO2024098355A1

WO2024098355A1 - Nitride-based semiconductor circuit and method for manufacturing the same

Info

Publication number: WO2024098355A1
Application number: PCT/CN2022/131257
Authority: WO
Inventors: Ergang Xu; Kai Cao; Jianping Zhang
Original assignee: Innoscience (suzhou) Semiconductor Co., Ltd.
Priority date: 2022-11-11
Filing date: 2022-11-11
Publication date: 2024-05-16

Abstract

A nitride-based semiconductor circuit comprises a conductive layer, a nitride-based semiconductor die, and antenna structures. The nitride-based semiconductor die is disposed over the conductive layer. The antenna structures are disposed over the nitride-based semiconductor die. The nitride-based semiconductor die comprises a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, and a cavity structure. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The second nitride-based semiconductor layer has a bandgap less than a bandgap of the first nitride-based semiconductor layer. The cavity structure is disposed over the second nitride-based semiconductor layer. The antenna structures are electrically connected to the conductive layer.

Description

NITRIDE-BASED SEMICONDUCTOR CIRCUIT AND METHOD FOR MANUFACTURING THE SAME

Inventors: Ergang Xu, Kai Cao, Jiangping Zhang

Field of the Invention:

The present invention generally relates to a semiconductor circuit. More specifically, the present invention relates to a high electron mobility transistor (HEMT) nitride-based semiconductor circuit having an antenna.

Background of the Invention:

In recent years, intense research on high-electron-mobility transistors (HEMTs) has been prevalent for semiconductor devices, such as high power switching and high frequency applications. The HEMT utilizes a heterojunction interface between two materials with different bandgaps to form a quantum well-like structure, which accommodates a two-dimensional electron gas (2DEG) region, satisfying demands of high power/frequency devices. In addition to HEMTs, examples of devices having heterostructures further include heterojunction bipolar transistors (HBT) , heterojunction field effect transistor (HFET) , and modulation-doped FETs (MODFET) . At present, there is a need to improve the yield rate for HEMT devices, thereby making them suitable for mass production.

Summary of the Invention:

In accordance with one aspect of the present disclosure, a nitride-based semiconductor circuit is provided. The nitride-based semiconductor circuit comprises a conductive layer, a nitride-based semiconductor die, and a plurality of antenna structures. The nitride-based semiconductor die is disposed over the conductive layer. The antenna structures are disposed over the nitride-based semiconductor die. The nitride-based semiconductor die comprises a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, and a cavity structure. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The second nitride-based semiconductor layer has a bandgap less than a bandgap of the first nitride-based semiconductor layer. The cavity structure is disposed over the second nitride-based semiconductor layer. The antenna structures are electrically connected to the conductive layer.

In accordance with one aspect of the present disclosure, a method for manufacturing a nitride-based semiconductor circuit is provided. The method includes steps as follows: disposing a nitride-based semiconductor die on a first substrate; etching the nitride-based semiconductor die and form a cavity structure on the nitride-based semiconductor die; disposing a plurality of antenna structures over the nitride-based semiconductor die; disposing a second substrate on the antenna structures; flipping the nitride-based semiconductor die and removing the first substrate; disposing a conductive layer over the nitride-based semiconductor die; and removing the second substrate. The nitride-based semiconductor die comprises a first nitride-based semiconductor layer; a second nitride-based semiconductor layer, and the cavity structure. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The second nitride-based semiconductor layer has a bandgap less than a bandgap of the first nitride-based semiconductor layer. The cavity structure is disposed over the second nitride-based semiconductor layer. The antenna structures are electrically connected to the conductive layer.

In accordance with one aspect of the present disclosure, a nitride-based semiconductor circuit is provided. The nitride-based semiconductor circuit comprises a conductive layer, a nitride-based semiconductor die, and a plurality of antenna structures. The nitride-based semiconductor die is disposed over the conductive layer. The antenna structures are disposed over the nitride-based semiconductor die. The nitride-based semiconductor die comprises a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, and a well. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The second nitride-based semiconductor layer has a bandgap less than a bandgap of the first nitride-based semiconductor layer. The well is disposed over the second nitride-based semiconductor layer. The antenna structures are electrically connected to the conductive layer. The antenna structures cover a periphery of the well.

By applying the above configuration, nitride-based semiconductor circuit comprising antenna structures having wide bandwidth and high efficiency can be achieved. As such, a HEMT circuit with antenna structures can be manufactured with wide bandwidth and high efficiency.

Brief Description of the Drawings:

Aspects of the present disclosure are readily understood from the following detailed description when read with the accompanying figures. It should be noted that various features may not be drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion. Embodiments of the present disclosure are described in more detail hereinafter with reference to the drawings, in which:

FIG. 1 is a side sectional view of a nitride-based semiconductor circuit according to some embodiments of the present disclosure;

FIG. 2-9 are side sectional views of steps of a manufacturing method of a nitride-based semiconductor circuit according to some embodiments of the present disclosure;

FIG. 10 is a side sectional view of a nitride-based semiconductor circuit according to some embodiments of the present disclosure;

FIG. 11 is a side sectional view of a nitride-based semiconductor circuit according to some embodiments of the present disclosure;

FIG. 12 is a side sectional view of a nitride-based semiconductor circuit according to some embodiments of the present disclosure;

FIG. 13 is a side sectional view of a nitride-based semiconductor circuit according to some embodiments of the present disclosure; and

FIG. 14 is a side sectional view of a nitride-based semiconductor circuit according to some embodiments of the present disclosure.

Detailed Description:

Common reference numerals are used throughout the drawings and the detailed description to indicate the same or similar components. Embodiments of the present disclosure will be readily understood from the following detailed description taken in conjunction with the accompanying drawings.

Spatial descriptions, such as "above, " "below, " "up, " "left, " "right, " "down, " "top, " "bottom, " "vertical, " "horizontal, " "side, " "higher, " "lower, " "upper, " "over, " "under, " and so forth, are specified with respect to a certain component or group of components, or a certain plane of a component or group of components, for the orientation of the component (s) as shown in the associated figure. It should be understood that the spatial descriptions used herein are for purposes of illustration only, and that practical implementations of the structures described herein can be spatially arranged in any orientation or manner, provided that the merits of embodiments of this disclosure are not deviated from by such arrangement.

In the following description, semiconductor circuits, methods for manufacturing the same, and the likes are set forth as preferred examples. It will be apparent to those skilled in the art that modifications, including additions and/or substitutions may be made without departing from the scope and spirit of the present disclosure. Specific details may be omitted so as not to obscure the present disclosure; however, the disclosure is written to enable one skilled in the art to practice the teachings herein without undue experimentation.

FIG. 1 is a side sectional view of a nitride-based semiconductor circuit according to some embodiments of the present disclosure. Referring to FIG. 1, the nitride-based semiconductor circuit 1A of this embodiment comprises a conductive layer 10, a nitride-based semiconductor die 11, and a plurality of antenna structures 12.

The nitride-based semiconductor die 11 is disposed over the conductive layer 10, and the antenna structures 12 are disposed over the nitride-based semiconductor die 11. The antenna structures 12 are electrically connected to the conductive layer 10.

The nitride-based semiconductor die 11 comprises a nitride-based semiconductor layer 110, a nitride-based semiconductor layer 111, and a cavity structure 112. The nitride-based semiconductor layer 111 is disposed on the nitride-based semiconductor layer 110, and the cavity structure 112 is disposed over the nitride-based semiconductor layer 111.

In the nitride-based semiconductor die 11 of this embodiment, the nitride-based semiconductor layer 111 has a bandgap that is less than a bandgap of the nitride-based semiconductor layer 110. To be specific, the nitride-based semiconductor layer 110 and the nitride-based semiconductor layer 111 form a heterojunction, and a 2DEG region is formed. The nitride-based semiconductor die 11 comprise a plurality of HEMTs, and the nitride-based semiconductor layer 110 and the nitride-based semiconductor layer 111 form a channel layer and a barrier layer of every HEMTs.

The cavity structure 112 of the nitride-based semiconductor die 11 is located between the conductive layer 10 and the antenna structures 12. Therefore, the nitride-based semiconductor die 11 forms a passageway with low resistance between the antenna structures 12 and the conductive layer 10, and the bandwidth of the antenna structures 12 may be improved and widen. Also, the efficiency of the antenna structures 12 may be improved as well. In other words, there are fewer dielectric materials and substrate material such as silicon between the antenna structures 12 and the conductive layer 10, and the antenna structures 12 may have wider bandwidth because the resistance is reduced. Moreover, the cavity structure 112 is formed in the nitride-based semiconductor die 11, and no extra structure is formed around the nitride-based semiconductor die 11. Therefore, the size of the nitride-bases semiconductor circuit 1A is compact. Also, the dielectric constant of the filling material in the cavity structure 112 is smaller than silicon. Therefore, the bandwidth and the efficiency of the antenna structures are increased without increasing the volume of the nitride-based semiconductor circuit 1A.

In this embodiment, the conductive layer 10 is patterned, and the conductive layer 10 may have metal lines, pads, traces, or combination thereof, such that the conductive layer 10 can form a plurality of circuits. At least one of the circuits is grounded, and at least one of the circuits is the feed of the antenna structures 12. To be specific, at least one of the circuits that is electrically connected to the antenna structure 12 is the feed of the antenna structure 12. The exemplary materials of the conductive layer 10 can include, for example but are not limited to, conductive materials. The conductive layer 10 may include a single film or multilayered film having Ag, Al, Cu, Mo, Ni, Ti, alloys thereof, oxides thereof, nitride thereof, or combinations thereof.

In this embodiment, the exemplary materials of the antenna structures 12 can include, for example but are not limited to, conductive materials. The antenna structure 12 may include Cu. To be specific, the antenna structures 12 may be plating Cu.

In this embodiment, the nitride-based semiconductor die 11 has the nitride-based semiconductor layer 110, the nitride-based semiconductor layer 111, and the 2DEG region. The 2DEG region is formed near an interface between the nitride-based semiconductor layer 110 and the nitride-based semiconductor layer 111. For example, the nitride-based semiconductor layer 110 may include aluminum gallium nitride (AlGaN) , and the nitride-based semiconductor layer 111 may include gallium nitride (GaN) .

To be specific, the exemplary materials of the nitride-based semiconductor layers 110, 111 can include, for example but are not limited to, nitrides or group III-V compounds, such as GaN, AlN, InN, InAlN, In _xAl _yGa _(1–x–y) N where x+y ≤ 1, Al _yGa _(1–y) N where y ≤ 1.

The exemplary materials of the nitride-based semiconductor layers are selected such that the nitride-based semiconductor layer 110 has a bandgap (i.e., forbidden band width) greater than a bandgap of the nitride-based semiconductor layer 111, which causes electron affinities thereof different from each other and forms the heterojunction therebetween. As such, the nitride-based semiconductor layers 111, 110 can serve as the channel layer and the barrier layer, respectively. A triangular well potential is generated at a bonded interface between the channel and barrier layers, so that electrons accumulate in the triangular well potential, thereby generating a two-dimensional electron gas (2DEG) region adjacent to the heterojunction.

In this embodiment, the nitride-based semiconductor die 11 may include a substrate 114. The cavity structure 112 is formed in the substrate 114.

The exemplary materials of the substrate 114 can include, for example but are not limited to, Si, SiGe, SiC, gallium arsenide, p-doped Si, n-doped Si, sapphire, semiconductor on insulator, such as silicon on insulator (SOI) , or other suitable substrate materials. In some embodiments, the substrate 114 can include, for example but are not limited to, group III elements, group IV elements, group V elements, or combinations thereof (e.g., III-V compounds) . In other embodiments, the substrate 114 can include, for example, but is not limited to, one or more other features, such as a doped region, a buried layer, an epitaxy (epi) layer, or combinations thereof.

In this embodiment, the cavity structure 112 is a concave structure of the substrate 114. To be specific, the cavity structure 112 is a well, and a periphery of the well is covered by the antenna structures 12. Therefore, the well can reduce the resistance between the antenna structures 12 and the conductive layer 10, and bandwidth and efficiency of the antenna structures 12 can be improved.

In one aspect, the nitride-based semiconductor die 11 comprises a filling 113, and the filling 113 fills the cavity structure 112. In other words, the cavity structure 112 of this embodiment is a well, and the filling 113 fills the well.

The filling 113 possess low resistance, so as to improve the conductivity between the conductive layer 10 and the antenna structures 12. Moreover, the filling 113 may further provide a structural support to the antenna structures 12.

To be specific, the filling 113 may comprises foam material with low dielectric constant. For example, the dielectric constant of the filling 113 is lower than 2.25. The dielectric constant of the filling 113 is lower than the substrate 114 or the dielectric material around the nitride-based semiconductor die 11. Therefore, the cavity structure 112 filled with the filling 113 possesses lower resistance, and the cavity structure 112 may provide a good electrical passageway. In other words, the well filled with the filling 113 possesses lower resistance, and the reduction of the resistance is controlled by the size of the well, so as to provide a good electrical connection between the antenna structures 12 and the conductive layer 10.

In one aspect, part of the cavity structure 112 is located between the antenna structures 12 and the conductive layer 10. The cavity structure 112 may reduce the resistance between the antenna structures 12 and the conductive layer 10, and the nitride-based semiconductor die 11 preserves enough space for the antenna structures 12 to form solid electrical connection with the conductive layer 10.

To be specific, the nitride-based semiconductor circuit 1A comprises a plurality of vias 14. The nitride-based semiconductor die 11 is distributed among the vias 14. Every via 14 connects one of the antenna structures 12 to the conductive layer 10.

For example, in this embodiment, the nitride-based semiconductor circuit 1A has two nitride-based semiconductor dies 11, and the nitride-based semiconductor dies 11 are distributed among the vias 14. The number of the vias 14 and the number of the antenna structures 12 are the same, and the vias 14 electrically connect the antenna structures 12 and the conductive layer 10 respectively.

Also, every via 14 connects the antenna structure 12 and the conductive layer 10, and the nitride-based semiconductor die 11 provide an electrical passageway between the antenna structure 12 and the conductive layer 10 as well. Therefore, the nitride-based semiconductor die 11 and the vias 14 electrically connect the antenna structures 12 and the conductive layer 10 in parallel, and the resistance between the antenna structures 12 and the conductive layer 10 is reduced.

In one aspect, the cavity structure 112 comprises a cavity 1120 and a sidewall 1121 surrounding the cavity 1120. The sidewall 1121 can separate the cavity 1120 from the substance around the nitride-based semiconductor die 11, and the cavity 1120 surrounded by the sidewall 1121 can preserve a low resistance area in the nitride-based semiconductor die 11. To be specific, the cavity 1120 surrounded by the sidewall 1121 preserved 40%to 60%of the total volume of the nitride-based semiconductor die 11, and, therefore; the resistance is reduced prominently.

Furthermore, the sidewall 1121 of the cavity structure 112 of the nitride-based semiconductor die 11 is vertical. Therefore, the cavity structure 112 occupies most of the top surface of the nitride-based semiconductor die 11, and, therefore; the nitride-based semiconductor die 11 can provide low resistance between the antenna structures 12 and the conductive layer 10.

In one aspect, the nitride-based semiconductor circuit 1A comprises a passivation layer 13. The passivation layer 13 is disposed on the nitride-based semiconductor die 11, and the passivation layer 13 covers the cavity structure 112 of the nitride-based semiconductor die 11. The antenna structures 12 are disposed on the passivation layer 13. In other words, the cavity structure 112 is a well, and the passivation layer 13 enclosed the well.

The passivation layer 13 covers the cavity structure 112 and provides a firm base for the antenna structures 12, so the antenna structures 12 can be disposed on the cavity structure 112 properly. To be specific, in a direction d1, the nitride-based semiconductor die 11 has a thickness t1, and the passivation layer has a thickness t2. The ratio of the thickness t2 to the thickness t1 ranges from 0.01 to 0.1. For example, the thickness t2 ranges from 5 μm to 10 μm. Therefore, the passivation layer 13 is a thin layer that supports the antenna structures 12, and the passivation layer 13 won’t affect the reduction of the resistance of the nitride-based semiconductor die 11. In FIG. 1, the thickness of the passivation layer 13 has been enlarged in order to clearly describe the structure of the nitride-based semiconductor circuit 1A, and the present disclosure is not limited to structural design in the figure.

In this embodiment, the passivation layer 13 and the cavity structure 112 form a flat interface 15. To be specific, the vertical direction d1 is parallel to the normal of the flat interface 15 between the passivation layer 13 and the cavity structure 112, and the cavity structure 112 has a unified thickness, and the cavity structure 112 is expended along a direction d2 which is perpendicular to the direction d1. Therefore, the nitride-based semiconductor die 11 may provide a wide passageway between the conductive layer 10 and the antenna structures 12, so as to improve the bandwidth and the efficiency of the antenna structures 12.

In one aspect, no layer or opening is formed between the passivation layer 13 and the cavity structure 112 of the nitride-based semiconductor die 11. The nitride-based semiconductor die 11 has a direct contact with the passivation layer 13, and, therefore; the size of the nitride-based semiconductor circuit 1A is compact. Also, other than forming the cavity structure 112 with deposited dielectric material, the substrate 114 can form the cavity structure 112 precisely, and the reduction of the resistance can be controlled by the cavity structure 112.

To be specific, the cavity structure 112 of the nitride-based semiconductor die 11 is formed through dry etching, and, therefore; the shapes of the cavity structure 112 is controlled precisely. Also, the substrate 114 can form a sidewall 1121 that is firm and solid to preserve the cavity 1120. Therefore, the reduction of the resistance can be controlled precisely.

In one aspect, the antenna structures 12 cover a periphery of the cavity structure 112 of the nitride-based semiconductor die 11. The cavity structure 112 may carry multiple antenna structures 12. Therefore, the cavity structure 112 may improve the bandwidth and the efficiencies of multiple antenna structures 12.

In one aspect, the cavity structure 112 is a well, and the bottom 1122 of the well and an interface 16 between the nitride-based semiconductor die 11 and the conductive layer 10 are parallel. Therefore, the reduction of the resistance of the well is horizontally unified.

FIGS. 2-9 are side sectional views of steps of a manufacturing method of a nitride-based semiconductor circuit according to some embodiments of the present disclosure. In some embodiments, a manufacturing method of the nitride-based semiconductor circuit 1A comprises: disposing the nitride-based semiconductor die 11 on a substrate 20.

Referring to FIG. 2, the nitride-based semiconductor die 11 comprises the substrate 114, the nitride-based semiconductor layer 111, the nitride-based semiconductor layer 110, a circuit layer 115, and a plurality of connecting pads 119. The nitride-based semiconductor layer 111 is located between the nitride-based semiconductor layer 110 and the substrate 114. The nitride-based semiconductor layer 110 is located between the circuit layer 115 and the nitride-based semiconductor layer 111. The connecting pads 119 are disposed on the circuit layer 115.

To be specific, the nitride-based semiconductor die 11 has a surface 116, a surface 117, and a side surface 118. The surface 116 is opposite to the surface 117, and the side surface 118 connects the surface 116 and the surface 117. The surface 117 is formed by the substrate 114. The surface 116 is formed by the circuit layer 115, and the connecting pads 119 are embedded in the circuit layer 115, and the connecting pads 119 are exposed on the surface 116.

Referring to FIG. 3, the nitride-based semiconductor die 11 is disposed on the substrate 20. To be specific, the nitride-based semiconductor die 11 is disposed on a carrier surface 200 of the substrate 20. The surface 116 of the nitride-based semiconductor die 11 is connected to the substrate 20, and the connecting pads 119 are covered by the substrate 20. While the substrate 20 is located below the nitride-based semiconductor die 11, the nitride-based semiconductor layer 110 is disposed on the circuit layer 115, and the nitride-based semiconductor layer 111 is disposed on the nitride-based semiconductor layer 110, and the substrate 114 is disposed on the nitride- based semiconductor layer 111. The substrate 114 is located at the top, and the surface 117 of the nitride-based semiconductor layer 110 is facing upward, and nothing is covered thereon.

In this embodiment, after the nitride-based semiconductor die 11 is disposed on the substrate 20, the manufacturing method of the nitride-based semiconductor circuit 1A comprises: etching the nitride-based semiconductor die 11 and form the cavity structure 112 on the nitride-based semiconductor die 11.

Referring to FIG. 4, a dielectric material 21 is disposed on the substrate 20, and the dielectric material 21 surround the nitride-based semiconductor die 11. The dielectric material 21 covers the rest of the carrier surface 200 of the substrate 20 that is not covered by the nitride-based semiconductor die 11. For example, the nitride-based semiconductor circuit 1A of this embodiment has two nitride-based semiconductor dies 11, and the dielectric material 21 is disposed among the nitride-based semiconductor die 11.

To be specific, the dielectric material 21 covers part of the carrier surface 200 of the substrate 20, and the dielectric material 21 covers the side surfaces 118 of the nitride-based semiconductor dies 11. The dielectric material 21 exposes the surfaces 117 of the nitride-based semiconductor dies 11, and the surfaces 117 of the nitride-based semiconductor dies 11 and a top surface 210 of the dielectric material 21 are coplanar.

Referring to FIG. 5, the nitride-based semiconductor dies 11 are etched. To be specific, the step has a dry etching process, and the cavity structure 112 is formed in the substrate 114. The cavity structure 112 is concave form the surface 117.

Furthermore, in this embodiment, the step of etching the nitride-based semiconductor die 11 comprises: etching the middle part of the nitride-based semiconductor die 11. Since the middle part of the nitride-based semiconductor die 11 is etched, the cavity structure 112 has the cavity 1120 and the sidewalls 1121 surrounding the cavity 1120. The cavity 1120 occupies most of the volume of the substrate 114, and, therefore; an electrical passageway with low resistance is formed.

In one aspect, in this embodiment, after the step of etching the nitride-based semiconductor die 11, the manufacturing method comprises: filling the cavity structures 112 with the filling 113. To be specific, the filling 113 is disposed in the cavity 1120 of the cavity structure 112. The filling 113 is solidify and has a top surface 1130, and the top surface 1130, the surface 117, and the top surface 210 are coplanar. The filling 113 has low electrical resistance, and the filling 113 provide a firm base for deposition.

In this embodiment, after the nitride-based semiconductor die 11 is etched, the manufacturing method comprises: disposing the antenna structures 12 over the nitride-based semiconductor die 11.

The antenna structures 12 cover the periphery of the nitride-based semiconductor die 11. To be specific, the antenna structures 12 cover the periphery of the cavity structure 112 of the nitride-based semiconductor die 11. Furthermore, the antenna structures 12 cover the sidewalls 1121 of the cavity structure 112, and the sidewalls 1121 can provide a structural support to the antenna structures 12.

In one aspect, after the nitride-based semiconductor die 11 is etched, the manufacturing method comprises: enclosing the cavity structure 112 in the nitride-based semiconductor die 11 with the passivation layer 13. The passivation layer 13 also form a structural support to the antenna structures 12, and, therefore; the antenna structures 12 can be properly disposed on the nitride-based semiconductor die 11.

In one aspect, the step of disposing the antenna structures 12 comprises: disposing the vias 14. To be specific, the step etches a plurality of openings in the dielectric material 21, and the vias 14 are disposed in the openings. The vias 14 extend from the substrate 20 to the passivation layer 13.

In this embodiment, the passivation layer 13 has a plurality of conductive structures 130. Every conductive structure 130 connect one of the vias 14 to one of the antenna structures 12, and the antenna structures 12 are electrically connected to the vias 14 respectively.

In this embodiment, after the antenna structures 12 are disposed, the manufacturing method comprises: disposing a substrate 22 on the antenna structures 12; flipping the nitride-based semiconductor die 11 and removing the substrate 20.

Referring to FIG. 7, the substrate 22 is disposed on the antenna structures 12, and the nitride-based semiconductor die 11 is flipped. Therefore, the substrate 22 is located below the nitride-based semiconductor die 11. Also, the substrate 20 as shown in FIG. 6 is removed. Therefore, the antenna structures 12 are covered by the substrate 22, and the surface 116 and the connecting pads 119 of the nitride-based semiconductor die 11 are exposed. Moreover, top surfaces of the vias 14 are also exposed.

In this embodiment, after the substrate 20 is removed, the manufacturing method comprises: disposing the conductive layer 10 over the nitride-based semiconductor die 11.

To be specific, the conductive layer 10 has a plurality of conductive structures 100, a redistribution layer 102, a plurality of connecting pads 104, a plurality of connecting pads 106, and a plurality of connecting bumps 107. The conductive structures 100 are embedded in a dielectric material 101, and the conductive structures 100 are disposed on the nitride-based semiconductor die 11 and the vias 14. The redistribution layer 102 is embedded in a dielectric material 103, and the redistribution layer 102 is disposed on the conductive structures 100. The connecting pads 104 are disposed on the redistribution layer 102, and the connecting pads 104 are embedded in a dielectric material 105. The connecting pads 106 are disposed on the connecting pads 104 respectively, and the connecting pads 106 are bigger than the connecting pads 104. The connecting bumps 107 are disposed on the connecting pads 106 respectively, so as to provide electrical connection to external circuits.

The redistribution layer 102 is electrically connected to the vias 14 and the nitride-based semiconductor die 11 through the conductive structures 100. The connecting bumps 107 are electrically connected to the redistribution layer 102 through the connecting pads 104 and the connecting pads 106, and the connecting bumps 107 are electrically connected to the nitride-based semiconductor die 11 and the antenna structures 12.

In this embodiment, after the conductive layer 10 is disposed, the manufacturing method comprises: removing the substrate 22. Referring to FIG. 9, the substrate 22 as shown in FIG. 8 is removed, and the nitride-based semiconductor circuit 1A is formed. The nitride-based semiconductor die 11 is disposed between the conductive layer 10 and the antenna structures 12, and the nitride-based semiconductor die 11 have the cavity structure 112 that is facing towards the antenna structures 12. The cavity structure 112 of the nitride-based semiconductor die 11 is located between the antenna structures 12 and the conductive layer 10. Therefore, the resistance between the antenna structures 12 and the conductive layer 10 is reduced, and the bandwidth and the efficiency of the antenna structures 12 are improved.

FIG. 10 is a side sectional view of a nitride-based semiconductor circuit according to some embodiments of the present disclosure. Referring to FIG. 10, the nitride-based semiconductor circuit 1B is similar to the nitride-based semiconductor circuit 1A as shown in FIG. 1. The nitride-based semiconductor circuit 1B has a conductive layer 10, a nitride-based semiconductor die 11B, and a plurality of antenna structures 12. The nitride-based semiconductor die 11B is disposed over the conductive layer 10, and the antenna structures 12 are disposed over the nitride-based semiconductor die 11B. The antenna structures 12 are electrically connected to the conductive layer 10.

In this embodiment, the nitride-based semiconductor die 11B has a nitride-based semiconductor layer 110, a nitride-based semiconductor layer 111, and a cavity structure 112B. The nitride-based semiconductor layer 111 is disposed on the nitride-based semiconductor layer 110, and the cavity structure 112B is disposed over the nitride-based semiconductor layer 111. The cavity structure 112B has a plurality of cavities 1120B and a sidewall 1121B surrounding the cavities 1120B. Therefore, the cavity structure 112B can provide more support to the antenna structures 12, and the resistance between the antenna structures 12 and the conductive layer 10 is reduced by the cavities 1120B. Also, the nitride-based semiconductor circuit 1B may have flexibility to have different design, and the manufacturing method of the present disclosure may have the flexibility to make the nitride-based semiconductor circuit 1B with design that is different form the designs of the nitride-based semiconductor circuits above. To be specific, the manufacturing method of the nitride-based semiconductor circuit 1B is similar to the manufacturing method of the nitride-based semiconductor circuit 1A, and the step of etching the nitride-based semiconductor die 11B comprises: etching the cavities 1120B in a middle area of the nitride-based semiconductor die 11B.

To be specific, the nitride-based semiconductor die 11B has a substrate 114, and the cavities 1120B and the sidewall 1121B are form in the substrate 114. Therefore, the substrate 114 can provide a structural support to the antenna structures 12, and the resistance can be reduced by the cavities 1120B.

Moreover, the nitride-based semiconductor die 11B comprises filling 113, and the filling 113 fills the cavity structure 112B. To be specific, the filling 113 fills the cavities 1120B of the cavity structure 112B. The filling 113 has low resistance, and the cavity structure 112B can provide a passageway having low resistance between the antenna structures 12 and the conductive layer 10.

FIG. 11 is a side sectional view of a nitride-based semiconductor circuit according to some embodiments of the present disclosure. Referring to FIG. 11, the nitride-based semiconductor circuit 1C is similar to the nitride-based semiconductor circuit 1A as shown in FIG. 1. The nitride-based semiconductor circuit 1C has a conductive layer 10, a nitride-based semiconductor die 11C, and a plurality of antenna structures 12. The nitride-based semiconductor die 11C is disposed over the conductive layer 10, and the antenna structures 12 are disposed over the nitride-based semiconductor die 11C. The antenna structures 12 are electrically connected to the conductive layer 10.

In this embodiment, the nitride-based semiconductor die 11C has a nitride-based semiconductor layer 110, a nitride-based semiconductor layer 111, and a cavity structure 112C. The nitride-based semiconductor layer 111 is disposed on the nitride-based semiconductor layer 110, and the cavity structure 112C is disposed over the nitride-based semiconductor layer 111. A lower part of the cavity structure 112C is wider than an upper part of the cavity structure 112C. To be specific, the cavity structure 112C has a cavity 1120C and a sidewall 1121C, and the sidewall 1121C surrounds the cavity 1120C. The top of the cavity 1120C has a width w1, and the bottom of the cavity 1120C has a width w2, and the width w2 is larger than the width w1. In other words, the top of the sidewall 1121C is wider than the bottom of the sidewall 1121C, and, therefore; the sidewall 1121C can provide more support to the antenna structures 12, while the cavity 1120C may reduce the resistance. Also, the nitride-based semiconductor circuit 1C may have flexibility to have different design, and the manufacturing method of the present disclosure may have the flexibility to make the nitride-based semiconductor circuit 1C with design that is different from the designs of the nitride-based semiconductor circuits above.

To be specific, the nitride-based semiconductor die 11C has a substrate 114, and the cavity 1120C and the sidewall 1121C are form in the substrate 114. Therefore, the substrate 114 can provide more structural support to the antenna structures 12, and the resistance can be reduced by the cavity 1120C.

Moreover, the nitride-based semiconductor die 11C comprises filling 113, and the filling 113 fills the cavity structure 112C. To be specific, the filling 113 fills the cavity 1120C of the cavity structure 112C. The filling 113 has lower resistance, and the cavity structure 112C can provide a passageway having low resistance between the antenna structures 12 and the conductive layer 10.

FIG. 12 is a side sectional view of a nitride-based semiconductor circuit according to some embodiments of the present disclosure. Referring to FIG. 12, the nitride-based semiconductor circuit 1D is similar to the nitride-based semiconductor circuit 1A as shown in FIG. 1. The nitride-based semiconductor circuit 1D has a conductive layer 10, a nitride-based semiconductor die 11D, and a plurality of antenna structures 12. The nitride-based semiconductor die 11D is disposed over the conductive layer 10, and the antenna structures 12 are disposed over the nitride-based semiconductor die 11D. The antenna structures 12 are electrically connected to the conductive layer 10.

In this embodiment, the nitride-based semiconductor die 11D has a nitride-based semiconductor layer 110, a nitride-based semiconductor layer 111, and a cavity structure 112D. The nitride-based semiconductor layer 111 is disposed on the nitride-based semiconductor layer 110, and the cavity structure 112D is disposed over the nitride-based semiconductor layer 111. An upper part of the cavity structure 112D is wider than a lower part of the cavity structure 112D. To be specific, the cavity structure 112D has a cavity 1120D and sidewall 1121D, and the side wall 1121D surrounds the cavity 1120D. The top of the cavity 1120D has a width w3, and the bottom of the cavity 1120D has a width w4, and the width w3 is larger than the width w4. In other words, the top of the sidewall 1121D is thinner than the bottom of the sidewall 1121D, and, therefore; the cavity 1120D can reduce more resistance of the area near the antenna structures 12, so as to improve the bandwidth and the efficiency. Also, the nitride-based semiconductor circuit 1D may have flexibility to have different design, and the manufacturing method of the present disclosure may have the flexibility to make the nitride-based semiconductor circuit 1D with design that is different from the designs of the nitride-based semiconductor circuit above.

To be specific, the nitride-based semiconductor die 11D has a substrate 114, and the cavity 1120D and the sidewall 1121D are form in the substrate 114. Therefore, the substrate 114 can reduce more resistance of the area near the antenna structures 12.

Moreover, the nitride-based semiconductor die 11D comprises filling 113, and the filling 113 fills the cavity structure 112D. To be specific, the filling 113 fills the cavity 1120D of the cavity structure 112D. The filling 113 has lower resistance, and the cavity structure 112D can provide a passageway having low resistance between the antenna structures 12 and the conductive layer 10.

FIG. 13 is a side sectional view of a nitride-based semiconductor circuit according to some embodiments of the present disclosure. Referring to FIG. 13, the nitride-based semiconductor circuit 1E is similar to the nitride-based semiconductor circuit 1A as shown in FIG. 1. The nitride-based semiconductor circuit 1E has a conductive layer 10, a nitride-based semiconductor die 11E, and a plurality of antenna structures 12. The nitride-based semiconductor die 11E is disposed over the conductive layer 10, and the antenna structures 12 are disposed over the nitride-based semiconductor die 11E. The antenna structures 12 are electrically connected to the conductive layer 10.

In this embodiment, the nitride-based semiconductor die 11E has a nitride-based semiconductor layer 110, a nitride-based semiconductor layer 111, and a cavity structure 112E. The nitride-based semiconductor layer 111 is disposed on the nitride-based semiconductor layer 110, and the cavity structure 112E is disposed over the nitride-based semiconductor layer 111. The cavity structure 112E is filled with air. Since the air has lower resistance, the cavity structure 112E can improve the bandwidth and efficiency of the antenna structures 12.

To be specific, the cavity structure 112E has a cavity 1120E and a sidewall 1121E, and the sidewall 1121E surrounds the cavity 1120E. The cavity 1120E is filled with air, and the sidewall 1121E preserve the area to be filled with air.

In other word, the cavity structure 112E is a well, and the well is filled with air. Since the cavity 1120E is filled with air, the cavity 1120E possess lower resistance, and a passageway with low resistance is provided. Also, the nitride-based semiconductor circuit 1E may have flexibility to have different design, and the manufacturing method of the present disclosure may have the flexibility to make the nitride-based semiconductor circuit 1E with design that is different from the designs of the nitride-based semiconductor circuits above.

To be specific, the nitride-based semiconductor die 11E has a substrate 114, and the cavity 1120E and the sidewall 1121E are form in the substrate 114, and the substrate 114 is filled with air. Therefore, the substrate 114 can reduce the resistance by the cavity 1120E.

FIG. 14 is a side sectional view of a nitride-based semiconductor circuit according to some embodiments of the present disclosure. Referring to FIG. 14, the nitride-based semiconductor circuit 1F is similar to the nitride-based semiconductor circuit 1B as shown in FIG. 10. The nitride-based semiconductor circuit 1F has a conductive layer 10, a nitride-based semiconductor die 11F, and a plurality of antenna structures 12. The nitride-based semiconductor die 11F is disposed over the conductive layer 10, and the antenna structures 12 are disposed over the nitride-based semiconductor die 11F. The antenna structures 12 are electrically connected to the conductive layer 10.

In this embodiment, the nitride-based semiconductor die 11F has a nitride-based semiconductor layer 110, a nitride-based semiconductor layer 111, and a cavity structure 112F. The nitride-based semiconductor layer 111 is disposed on the nitride-based semiconductor layer 110, and the cavity structure 112F is disposed over the nitride-based semiconductor layer 111. The cavity structure 112F is filled with air. Since the air has lower resistance, the cavity structure 112F can improve the bandwidth and efficiency of the antenna structures 12.

To be specific, the cavity structure 112F has a plurality of cavities 1120F and a sidewall 1121F, and the side wall 1121F surrounds the cavities 1120F. The cavities 1120F are filled with air, and the sidewall 1121F preserve the area to be filled with air. Since the cavities 1120F are filled with air, the cavities 1120Fpossess lower resistance, and a passageway with low resistance is provided. Also, the nitride-based semiconductor circuit 1F may have flexibility to have different design, and the manufacturing method of the present disclosure may have the flexibility to make the nitride-based semiconductor circuit 1F with design that is different from the designs of the nitride-based semiconductor circuits above.

To be specific, the nitride-based semiconductor die 11F has a substrate 114, and the cavity 1120F and the sidewall 1121F are form in the substrate 114, and the substrate 114 is filled with air. Therefore, the substrate 114 can reduce the resistance by the cavity 1120F.

The foregoing description of the present invention has been provided for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Many modifications and variations will be apparent to the practitioner skilled in the art.

The embodiments were chosen and described in order to best explain the principles of the invention and its practical application, thereby enabling others skilled in the art to understand the invention for various embodiments and with various modifications that are suited to the particular use contemplated.

As used herein and not otherwise defined, the terms "substantially, " "substantial, " "approximately" and "about" are used to describe and account for small variations. When used in conjunction with an event or circumstance, the terms can encompass instances in which the event or circumstance occurs precisely as well as instances in which the event or circumstance occurs to a close approximation. For example, when used in conjunction with a numerical value, the terms can encompass a range of variation of less than or equal to ±10%of that numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. The term “substantially coplanar” can refer to two surfaces within micrometers of lying along a same plane, such as within 40 μm, within 30 μm, within 20 μm, within 10 μm, or within 1 μm of lying along the same plane.

As used herein, the singular terms “a, ” “an, ” and “the” may include plural referents unless the context clearly dictates otherwise. In the description of some embodiments, a component provided “on” or “over” another component can encompass cases where the former component is directly on (e.g., in physical contact with) the latter component, as well as cases where one or more intervening components are located between the former component and the latter component.

While the present disclosure has been described and illustrated with reference to specific embodiments thereof, these descriptions and illustrations are not limiting. It should be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the true spirit and scope of the present disclosure as defined by the appended claims. The illustrations may not necessarily be drawn to scale. There may be distinctions between the artistic renditions in the present disclosure and the actual apparatus due to manufacturing processes and tolerances. Further, it is understood that actual devices and layers may deviate from the rectangular layer depictions of the FIGS. and may include angles surfaces or edges, rounded corners, etc. due to manufacturing processes such as conformal deposition, etching, etc. There may be other embodiments of the present disclosure which are not specifically illustrated. The specification and the drawings are to be regarded as illustrative rather than restrictive. Modifications may be made to adapt a particular situation, material, composition of matter, method, or process to the objective, spirit and scope of the present disclosure. All such modifications are intended to be within the scope of the claims appended hereto. While the methods disclosed herein have been described with reference to particular operations performed in a particular order, it will be understood that these operations may be combined, sub-divided, or re-ordered to form an equivalent method without departing from the teachings of the present disclosure. Accordingly, unless specifically indicated herein, the order and grouping of the operations are not limitations.

Claims

A nitride-based semiconductor circuit comprising:

a conductive layer;

a nitride-based semiconductor die disposed over the conductive layer; and

a plurality of antenna structures disposed over the nitride-based semiconductor die;

wherein the nitride-based semiconductor die comprises:

a first nitride-based semiconductor layer;

a second nitride-based semiconductor layer disposed on the first nitride-based semiconductor layer and having a bandgap less than a bandgap of the first nitride-based semiconductor layer; and

a cavity structure disposed over the second nitride-based semiconductor layer;

wherein the antenna structures are electrically connected to the conductive layer.
The nitride-based semiconductor circuit of claim 1, wherein the nitride-based semiconductor die comprises a filling, and the filling fills the cavity structure.
The nitride-based semiconductor circuit of any one of the preceding claims, wherein materials of the filling comprise foam material with low dielectric constant.
The nitride-based semiconductor circuit of any one of the preceding claims, wherein the cavity structure comprises:

a cavity; and

a sidewall surrounding the cavity.
The nitride-based semiconductor circuit of any one of the preceding claims, wherein the sidewall is vertical.
The nitride-based semiconductor circuit of any one of the preceding claims further comprising a passivation layer;

wherein the passivation layer is disposed on the nitride-based semiconductor die, and the passivation layer covers the cavity structure of the nitride-based semiconductor die, and the antenna structures are disposed on the passivation layer.
The nitride-based semiconductor circuit of any one of the preceding claims, wherein no layer or opening is formed between the passivation layer and the cavity structure of the nitride-based semiconductor die.
The nitride-based semiconductor circuit of any one of the preceding claims, wherein the passivation layer and the cavity structure form a flat interface.
The nitride-based semiconductor circuit of any one of the preceding claims, wherein the cavity structure comprises:

a plurality of cavities; and

a sidewall surrounding the cavities.
The nitride-based semiconductor circuit of any one of the preceding claims, wherein a lower part of the cavity structure is wider than an upper part of the cavity structure.
The nitride-based semiconductor circuit of any one of the preceding claims, wherein part of the cavity structure is located between the antenna structures and the conductive layer.
The nitride-based semiconductor circuit of any one of the preceding claims further comprising a plurality of vias;

wherein the nitride-based semiconductor die is distributed among the vias, and every via connects one of the antenna structures to the conductive layer.
The nitride-based semiconductor circuit of any one of the preceding claims, wherein the antenna structures cover a periphery of the cavity structure of the nitride-based semiconductor die.
The nitride-based semiconductor circuit of any one of the preceding claims, wherein the cavity structure is formed through dry etching.
The nitride-based semiconductor circuit of any one of the preceding claims, wherein the cavity structure is filled with air.
A manufacturing method of nitride-based semiconductor circuit, comprising:

disposing a nitride-based semiconductor die on a first substrate;

etching the nitride-based semiconductor die and form a cavity structure on the nitride-based semiconductor die;

disposing a plurality of antenna structures over the nitride-based semiconductor die;

disposing a second substrate on the antenna structures;

flipping the nitride-based semiconductor die and removing the first substrate;

disposing a conductive layer over the nitride-based semiconductor die; and

removing the second substrate;

wherein the nitride-based semiconductor die comprises:

a first nitride-based semiconductor layer;

a second nitride-based semiconductor layer disposed on the first nitride-based semiconductor layer and having a bandgap less than a bandgap of the first nitride-based semiconductor layer; and

the cavity structure disposed over the second nitride-based semiconductor layer;

wherein the antenna structures are electrically connected to the conductive layer.
The manufacturing method of claim 16, wherein the step of etching the nitride-based semiconductor die comprises:

etching the middle part of the nitride-based semiconductor die.
The manufacturing method of any one of the preceding claims, wherein the step of etching the nitride-based semiconductor die comprises:

etching a plurality of cavities in a middle area of the nitride-based semiconductor die.
The manufacturing method of any one of the preceding claims, after the step of etching the nitride-based semiconductor die, further comprising:

enclosing the cavity structure in the nitride-based semiconductor die with a passivation layer.
The manufacturing method of any one of the preceding claims, after the step of etching the nitride-based semiconductor die, further comprising:

filling the cavity structures with a filling.
A nitride-based semiconductor circuit comprising:

a conductive layer;

a nitride-based semiconductor die disposed over the conductive layer; and

a plurality of antenna structures disposed over the nitride-based semiconductor die; wherein the nitride-based semiconductor die comprises:

a first nitride-based semiconductor layer;

a second nitride-based semiconductor layer disposed on the first nitride-based semiconductor layer and having a bandgap less than a bandgap of the first nitride-based semiconductor layer; and

a well disposed over the second nitride-based semiconductor layer;

wherein the antenna structures are electrically connected to the conductive layer, and the antenna structures cover a periphery of the well.
The nitride-based semiconductor circuit of claim 21, wherein the nitride-based semiconductor die comprising a filling, and the filling fills the well.
The nitride-based semiconductor circuit of any one of the preceding claims further comprising a passivation layer;

wherein the passivation layer is disposed on the nitride-based semiconductor die, and the passivation layer encloses the well.
The nitride-based semiconductor circuit of any one of the preceding claims, wherein the well is filled with air.
The nitride-based semiconductor circuit of any one of the preceding claims, wherein the bottom of the well and an interface between the nitride-based semiconductor die and the conductive layer are parallel.