WO2024072186A1 - Carte de circuit imprimé et boîtier semi-conducteur la comprenant - Google Patents

Carte de circuit imprimé et boîtier semi-conducteur la comprenant Download PDF

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Publication number
WO2024072186A1
WO2024072186A1 PCT/KR2023/015221 KR2023015221W WO2024072186A1 WO 2024072186 A1 WO2024072186 A1 WO 2024072186A1 KR 2023015221 W KR2023015221 W KR 2023015221W WO 2024072186 A1 WO2024072186 A1 WO 2024072186A1
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WIPO (PCT)
Prior art keywords
electrode
substrate
penetrating
insulating layer
penetration
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PCT/KR2023/015221
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English (en)
Korean (ko)
Inventor
이수민
심우섭
유종현
Original Assignee
엘지이노텍 주식회사
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Publication of WO2024072186A1 publication Critical patent/WO2024072186A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components

Definitions

  • the embodiment relates to a circuit board, and in particular, to a circuit board capable of resolving height differences between a plurality of through electrodes connected to a semiconductor device and a semiconductor package including the same.
  • Such a semiconductor package has a structure in which a plurality of semiconductor devices are connected to each other in the horizontal and/or vertical directions on a substrate. Accordingly, the semiconductor package has the advantage of efficiently using the mounting area of the semiconductor device and enabling high-speed signal transmission through a short signal transmission path between the semiconductor devices.
  • the above semiconductor package is widely applied to mobile devices, etc.
  • semiconductor packages applied to products that provide the Internet of Things (IoT), self-driving cars, and high-performance servers have increased the number of semiconductor devices and/or the size of each semiconductor device due to the trend of high integration.
  • IoT Internet of Things
  • high-performance servers have increased the number of semiconductor devices and/or the size of each semiconductor device due to the trend of high integration.
  • the functional parts of devices are divided, the concept is expanding to semiconductor chiplets.
  • the interposer gradually increases the width or width of the circuit pattern from the semiconductor device to the semiconductor package in order to facilitate mutual communication between semiconductor devices and/or semiconductor chiplets, or to interconnect semiconductor devices and semiconductor package substrates. By functioning as a redistribution layer, it can function to facilitate electrical signals between the semiconductor device and the semiconductor package substrate, which has a circuit pattern that is relatively large compared to the circuit pattern of the semiconductor device.
  • a package substrate and/or an interposer applied to a semiconductor package is provided with a connection member connected to a semiconductor device and/or a semiconductor chiplet.
  • the connecting member functions to horizontally connect a plurality of semiconductor devices and/or semiconductor chiplets.
  • the connection member may be embedded in the package substrate and/or the interposer.
  • the package substrate and/or the interposer are provided with a plurality of through electrodes connected to the semiconductor device and/or the semiconductor chiplet.
  • the through electrode includes a first through electrode that overlaps the connection member in a vertical direction, and a second through electrode that does not overlap the connection member in the vertical direction but overlaps the first through electrode in the horizontal direction.
  • the first through electrode is connected to the connection member. Accordingly, the width and/or thickness of the first through electrode may be determined by the width of the connection electrode provided on the connection member and the thickness of the connection member. Accordingly, the first through electrode and the second through electrode may have different widths and/or thicknesses.
  • the first through electrode and the second through electrode provided on the package substrate and/or interposer may have different heights. For example, due to the difference in width and/or thickness, a difference may occur in the height of the first through electrode and the height of the second through electrode. In addition, when there is a difference in height between the first and second through electrodes, a problem may occur in which the semiconductor device and/or the semiconductor chiplet cannot be mounted stably, thereby causing the semiconductor device and/or the semiconductor Problems may arise where the operating characteristics of the chiplet deteriorate.
  • Embodiments provide a circuit board with a new structure and a semiconductor package including the same.
  • the embodiment provides a circuit board with embedded connection members and a semiconductor package including the same.
  • the embodiment provides a circuit board capable of controlling a height difference between a plurality of through electrodes connected to a semiconductor device and a semiconductor package including the same.
  • the embodiment provides a circuit board with improved heat dissipation characteristics and a semiconductor package including the same.
  • the embodiment provides a circuit board with improved adhesion between the board and the connection member and a semiconductor package including the same.
  • a circuit board includes an insulating layer; a plurality of electrode portions including penetrating portions penetrating from the upper surface of the insulating layer to a portion of the region; and a connecting member embedded in the insulating layer, wherein the plurality of electrode portions include a first electrode portion including a first penetration portion that overlaps the connecting member in a vertical direction, and a first electrode portion that does not overlap the connecting member in the vertical direction. and a second electrode portion including a second through portion that does not include a second through portion, and the size of the first through portion satisfies a range of 80% to 100% of the size of the second through portion.
  • a plurality of each of the first and second penetration parts is provided, and the size of each of the plurality of first penetration parts satisfies a range of 80% to 100% of the size of each of the plurality of second penetration parts.
  • the plurality of first penetration parts overlap the plurality of second penetration parts in the horizontal direction.
  • the vertical thickness of the first penetration part and the second penetration part are the same, and the horizontal width of the first penetration part and the second penetration part are the same.
  • the vertical thickness of the first penetration part is smaller than the vertical thickness of the second penetration part, and the horizontal width of the first penetration part is greater than the horizontal width of the second penetration part.
  • the vertical thickness of the first penetration part is greater than the vertical thickness of the second penetration part, and the horizontal width of the first penetration part is smaller than the horizontal width of the second penetration part.
  • At least one of the density and volume of the first penetrating portion satisfies a range of 80% to 100% of at least one of the density and volume of the second penetrating portion.
  • first electrode portion is disposed on the first through portion and includes a first protrusion protruding onto the insulating layer
  • the second electrode portion is disposed on the second through portion and includes a first protrusion protruding onto the insulating layer. It includes a protruding second protrusion.
  • the height of the upper surface of the first protrusion is the same as the height of the upper surface of the second protrusion.
  • the horizontal width of the first penetration part satisfies the range of 10 ⁇ m to 40 ⁇ m.
  • each of the first and second penetrating portions has an inclination in which the width gradually decreases from the upper surface to the lower surface.
  • each of the first and second penetration parts includes a first metal layer; and a second metal layer disposed on the first metal layer and including a metal material different from the first metal layer.
  • the lower surface of the first metal layer of each of the first and second penetrating portions includes a convex portion toward the lower surface of the insulating layer.
  • the semiconductor package further includes first and second semiconductor devices disposed on the first and second electrode portions, and the first electrode portion is connected to a terminal of the first semiconductor device. It includes an electrode portion and a second group of first electrode portions connected to terminals of the second semiconductor device, wherein the second electrode portion includes a first group of second electrode portions connected to terminals of the first semiconductor device and the second semiconductor portion. It includes a second group of second electrode parts connected to the terminals of the device.
  • the second penetration portion of at least one of the second electrode portions of the first group and the second group includes a plurality of sub-penetrating portions that vertically overlap with the single protrusion and are horizontally spaced apart from each other.
  • the upper surface of the single protrusion that vertically overlaps the plurality of sub-penetrating parts includes a concave portion facing each of the plurality of sub-penetrating parts.
  • the embodiment can minimize the difference in height of the first and second electrode portions that are connected to the semiconductor device and penetrate a portion of the upper surface of the insulating layer.
  • the first electrode portion may overlap the connecting member vertically, and the second electrode portion may overlap the first electrode portion horizontally without vertically overlapping the connecting member.
  • the first electrode unit may include a first penetration part penetrating at least a portion of an insulating layer and a first protrusion located on the first penetration part and protruding on the insulating layer.
  • the second electrode unit may include a second penetration part penetrating at least a portion of the insulating layer and a second protrusion located on the second penetration part and protruding on the insulating layer.
  • the size of the second penetrating portion may correspond to the size of the first penetrating portion.
  • the size of the second through portion may satisfy a range of 80% to 100% of the size of the first through portion.
  • the embodiment can minimize the height difference between the first electrode portion and the second electrode portion that occurs due to the size difference between the first penetration portion and the second penetration portion, and through this, the height difference between the first and second electrode portions can be minimized.
  • Semiconductor devices can be placed stably.
  • the vertical thickness of the first penetration part may be the same as the vertical thickness of the second penetration part
  • the horizontal width of the first penetration part may be the same as the horizontal width of the second penetration part.
  • the vertical thickness of the first penetration part may be smaller than the vertical thickness of the second penetration part, and the horizontal width of the first penetration part may be greater than the horizontal width of the second penetration part.
  • the vertical thickness of the first penetration part may be greater than the vertical thickness of the second penetration part, and the horizontal width of the first penetration part may be smaller than the horizontal width of the second penetration part.
  • the embodiment can ensure that the height of the first electrode portion and the height of the second electrode portion are uniform.
  • the first and second semiconductor devices can be stably placed. Accordingly, the embodiment can improve the operating characteristics of the first and second semiconductor devices. Furthermore, the embodiment can ensure smooth operation of the first and second semiconductor devices, and thereby enable smooth operation of electronic products or servers.
  • the embodiment allows the first electrode portion and the second electrode portion to have the same height to prevent impedance changes that occur due to changes in the thickness of the first electrode portion and the second electrode portion, thereby further improving electrical reliability. It can be improved.
  • the second penetration portion of the second electrode portion may include a plurality of sub-penetration portions that vertically overlap in common with one second pad portion. Additionally, the size of each of the plurality of sub-penetrating parts may correspond to the size of the first penetrating part. Therefore, even if the second penetration part includes a plurality of sub-penetrating parts, the first electrode part and the second electrode part can be made to have uniform heights. Additionally, a concave portion may be provided on the upper surface of the second protrusion that vertically overlaps the plurality of sub-penetrating portions. Additionally, a conductive adhesive member such as solder can be stably seated in the concave portion provided in the second protrusion.
  • the concave portion of the second protrusion may function as a dam that prevents movement of the solder while guiding the seating position where the solder is seated.
  • the embodiment allows heat to be transmitted through the plurality of sub-penetrating portions, thereby improving the heat dissipation characteristics of the semiconductor package and further improving the operating characteristics of the semiconductor package.
  • the second penetrating portion includes a plurality of sub-penetrating portions
  • an impedance change caused by a decrease in the width of the second penetrating portion can be prevented, thereby improving the operation of the first and second semiconductor devices. Characteristics can be improved.
  • the embodiment can ensure smooth operation of the first and second semiconductor devices, and thereby enable smooth operation of electronic products or servers.
  • FIG. 1A is a cross-sectional view showing a semiconductor package according to a first embodiment.
  • FIG. 1B is a cross-sectional view showing a semiconductor package according to a second embodiment.
  • Figure 1C is a cross-sectional view showing a semiconductor package according to a third embodiment.
  • Figure 1D is a cross-sectional view showing a semiconductor package according to a fourth embodiment.
  • Figure 1e is a cross-sectional view showing a semiconductor package according to a fifth embodiment.
  • Figure 2 is a cross-sectional view showing a circuit board according to the first embodiment.
  • FIG. 3 is a plan view of the circuit board of FIG. 2 viewed from above.
  • FIG. 4 is an enlarged cross-sectional view of the first region R1 of FIG. 2.
  • FIG. 5 is a cross-sectional view showing the detailed layer structure of the first and second through electrodes of FIG. 2.
  • FIG. 6 is an enlarged cross-sectional view of the first region of FIG. 2 according to the second embodiment.
  • FIG. 7 is an enlarged cross-sectional view of the first region of FIG. 2 according to the third embodiment.
  • FIG. 8 is an enlarged cross-sectional view of the first region of FIG. 2 according to the fourth embodiment.
  • FIG. 9 is an enlarged cross-sectional view of the first region of FIG. 2 according to the fifth embodiment.
  • Figure 10 is a cross-sectional view showing a circuit board according to the sixth embodiment.
  • the electronic device includes a main board (not shown).
  • the main board may be physically and/or electrically connected to various components.
  • the main board may be connected to the semiconductor package of the embodiment.
  • Various semiconductor devices may be mounted on the semiconductor package.
  • the semiconductor device may include active devices and/or passive devices. Active devices may be semiconductor chips in the form of integrated circuits (ICs) in which hundreds to millions of devices are integrated into one chip.
  • Semiconductor devices may be logic chips, memory chips, etc.
  • the logic chip may be a central processor (CPU), a graphics processor (GPU), or the like.
  • the logic chip is an application processor (AP) chip that includes at least one of a central processor (CPU), graphics processor (GPU), digital signal processor, cryptographic processor, microprocessor, microcontroller, or an analog-digital chip. It could be a converter, an application-specific IC (ASIC), or a set of chips containing a specific combination of the ones listed so far.
  • AP application processor
  • the memory chip may be a stack memory such as HBM. Additionally, the memory chip may include memory chips such as volatile memory (eg, DRAM), non-volatile memory (eg, ROM), and flash memory.
  • volatile memory eg, DRAM
  • non-volatile memory eg, ROM
  • flash memory e.g., NAND
  • Chip Scale Package (CSP), Flip Chip-Chip Scale Package (FC-CSP), Flip Chip Ball Grid Array (FC-BGA), Package On Package (POP), and SIP ( System In Package), but is not limited to this.
  • CSP Chip Scale Package
  • FC-CSP Flip Chip-Chip Scale Package
  • FC-BGA Flip Chip Ball Grid Array
  • POP Package On Package
  • SIP System In Package
  • the electronic devices include smart phones, personal digital assistants, digital video cameras, digital still cameras, vehicles, high-performance servers, and network systems. ), computer, monitor, tablet, laptop, netbook, television, video game, smart watch, automotive It may be, etc. However, it is not limited to this, and of course, it can be any other electronic device that processes data.
  • the semiconductor package of the embodiment may have various package structures including a circuit board, which will be described later.
  • the circuit board may be a first board described below.
  • the circuit board may be a second board described below.
  • FIG. 1A is a cross-sectional view showing a semiconductor package according to a first embodiment
  • FIG. 1B is a cross-sectional view showing a semiconductor package according to a second embodiment
  • FIG. 1C is a cross-sectional view showing a semiconductor package according to a third embodiment
  • FIG. 1D is a cross-sectional view showing a semiconductor package according to a fourth embodiment
  • FIG. 1E is a cross-sectional view showing a semiconductor package according to a fifth embodiment.
  • the semiconductor package of the first embodiment may include a first substrate 1100, a second substrate 1200, and a semiconductor device 1300.
  • the first substrate 1100 may refer to a package substrate.
  • the first substrate 1100 may provide a space where at least one external substrate is coupled.
  • the external substrate may refer to a second substrate 1200 coupled to the first substrate 1100.
  • the external substrate may refer to a main board included in an electronic device coupled to the lower portion of the first substrate 1100.
  • the first substrate 1100 may provide a space where at least one semiconductor device is mounted.
  • the first substrate 1100 may include at least one insulating layer and an electrode portion disposed on the at least one insulating layer.
  • a second substrate 1200 may be disposed on the first substrate 1100.
  • the second substrate 1200 may be an interposer.
  • the second substrate 1200 may provide a space where at least one semiconductor device is mounted.
  • the second substrate 1200 may be connected to the at least one semiconductor device 1300.
  • the second substrate 1200 may provide a space where the first semiconductor device 1310 and the second semiconductor device 1320 are mounted.
  • the second substrate 1200 electrically connects the first semiconductor device 1310 and the second semiconductor device 1320, and connects the first and second semiconductor devices 1310 and 1320 to the first substrate ( 1100) can be electrically connected. That is, the second substrate 1200 can function as a horizontal connection between a plurality of semiconductor devices and a vertical connection between the semiconductor devices and the package substrate.
  • FIG. 1A two semiconductor devices 1310 and 1320 are shown disposed on the second substrate 1200, but the present invention is not limited thereto.
  • one semiconductor device may be disposed on the second substrate 1200, or alternatively, three or more semiconductor devices may be disposed on the second substrate 1200.
  • the second substrate 1200 may be disposed between the at least one semiconductor device 1300 and the first substrate 1100.
  • the second substrate 1200 may be an active interposer that functions as a semiconductor device.
  • the semiconductor package of the embodiment may have a vertical stack structure on the first substrate 1100 and function as a plurality of logic chips. Being able to have the functions of a logic chip may mean having the functions of an active element and a passive element. In the case of active devices, unlike passive devices, the current and voltage characteristics may not be linear, and in the case of active interposers, they may have the function of active devices.
  • the active interposer may function as a corresponding logic chip and perform a signal transmission function between the first substrate 1100 and a second logic chip disposed on top of the active interposer.
  • the second substrate 1200 may be a passive interposer.
  • the second substrate 1200 may function as a signal relay between the semiconductor device 1300 and the first substrate 1100, and may have passive device functions such as a resistor, capacitor, and inductor. there is.
  • the number of terminals of the semiconductor device 1300 is gradually increasing due to 5G, Internet of Things (IOT), increased image quality, increased communication speed, etc. That is, the number of terminals provided in the semiconductor device 1300 increases, and as a result, the width of the terminal or the gap between a plurality of terminals is reduced.
  • the first substrate 1100 may be connected to the main board of the electronic device.
  • the second substrate 1200 may be disposed on the first substrate 1100 and the semiconductor device 1300. And the second substrate 1200 may include electrodes having a fine width and spacing corresponding to the terminals of the semiconductor device 1300.
  • the semiconductor device 1300 may be a logic chip, a memory chip, or the like.
  • the logic chip may be a central processor (CPU), a graphics processor (GPU), or the like.
  • the logic chip is an AP that includes at least one of a central processor (CPU), a graphics processor (GPU), a digital signal processor, a cryptographic processor, a microprocessor, and a microcontroller, or an analog-to-digital converter, an ASIC (application -specific IC), etc., or it may be a chip set containing a specific combination of those listed so far.
  • the memory chip may be a stack memory such as HBM.
  • the memory chip may include memory chips such as volatile memory (eg, DRAM), non-volatile memory (eg, ROM), and flash memory.
  • the semiconductor package of the first embodiment may include a connection portion.
  • a semiconductor package may include a first connection portion 1410 disposed between the first substrate 1100 and the second substrate 1200.
  • the first connection part 1410 may couple the second substrate 1200 to the first substrate 1100 and electrically connect them.
  • the semiconductor package may include a second connection portion 1420 disposed between the second substrate 1200 and the semiconductor device 1300.
  • the second connection part 1420 may couple the semiconductor device 1300 to the second substrate 1200 and electrically connect them.
  • the semiconductor package may include a third connection portion 1430 disposed on the lower surface of the first substrate 1100.
  • the third connection part 1430 can connect the first substrate 1100 to the main board and electrically connect them.
  • the first connection part 1410, the second connection part 1420, and the third connection part 1430 electrically connect a plurality of components using at least one bonding method among wire bonding, solder bonding, and direct metal-to-metal bonding. You can connect with . That is, because the first connection part 1410, the second connection part 1420, and the third connection part 1430 have the function of electrically connecting a plurality of components, when direct bonding between metals is used, the semiconductor package is solder or It can be understood as an electrically connected part rather than a wire.
  • the wire bonding method may mean electrically connecting a plurality of components using conductors such as gold (Au). Additionally, the solder bonding method can electrically connect a plurality of components using a material containing at least one of Sn, Ag, and Cu.
  • the direct bonding method between metals may mean recrystallization by applying heat and pressure between a plurality of components without the absence of solder, wire, conductive adhesive, etc., thereby directly bonding the plurality of components. .
  • the direct bonding method between metals may refer to a bonding method using the second connection part 1420. In this case, the second connection portion 1420 may refer to a metal layer formed between a plurality of components through recrystallization.
  • first connection part 1410, the second connection part 1420, and the third connection part 1430 may be connected to a plurality of components using a thermal compression bonding method.
  • the thermocompression bonding method may refer to a method of directly bonding a plurality of components by applying heat and pressure to the first connection part 1410, the second connection part 1420, and the third connection part 1430.
  • the electrode on which the first connection part 1410, the second connection part 1420, and the third connection part 1430 are disposed has the corresponding substrate.
  • a protrusion may be provided that protrudes in an outward direction away from the insulating layer. The protrusion may protrude outward from the first substrate 1100 or the second substrate 1200.
  • the protrusion may be referred to as a bump.
  • the protrusion may also be referred to as a post.
  • the protrusion may also be referred to as a pillar.
  • the protrusion may refer to an electrode of the second substrate 1200 on which the second connection portion 1420 for coupling to the semiconductor device 1300 is disposed. That is, as the pitch of the terminals of the semiconductor device 1300 becomes finer, a short circuit may occur between the plurality of second connection portions 1420 respectively connected to the plurality of terminals of the semiconductor device 1300 by conductive adhesive such as solder. there is. Therefore, in the embodiment, thermal compression bonding may be performed to reduce the volume of the second connection portion 1420.
  • the embodiments are based on the degree of conformity, diffusion power, and diffusion prevention power that prevents the intermetallic compound (IMC) formed between the conductive adhesive such as solder and the protrusion from diffusing into the interposer and/or the substrate.
  • the electrode of the second substrate 1200 on which the second connection portion 1420 is disposed may include a protrusion.
  • the semiconductor package may include a connection member 1210.
  • the connecting member may be referred to as a bridge board.
  • the connecting member 1210 may include a redistribution layer.
  • the connection member 1210 may function to electrically connect a plurality of semiconductor devices to each other horizontally.
  • the connection member 1210 may include a redistribution layer. Since the semiconductor package and the semiconductor device have a large difference in the width or width of the circuit pattern, a buffering role of the circuit pattern for electrical connection is required.
  • the buffering role may mean having an intermediate size between the width or width of the circuit pattern of the semiconductor package and the width or width of the circuit pattern of the semiconductor device, and the redistribution layer has the buffering function. It can be included.
  • the connecting member 1210 may be an inorganic bridge.
  • the inorganic bridge may include a silicon bridge. That is, the connecting member 1210 may include a silicon substrate and a redistribution layer disposed on the silicon substrate.
  • the connecting member 1210 may be an organic bridge.
  • the connecting member 1210 may include an organic material.
  • the connecting member 1210 may include an organic substrate containing an organic material instead of the silicon substrate.
  • the connecting member 1210 may be embedded in the second substrate 1200.
  • the second substrate 1200 may include a cavity, and the connecting member 1210 may be disposed within the cavity of the second substrate 1200.
  • the connecting member 1210 may horizontally connect a plurality of semiconductor devices disposed on the second substrate 1200.
  • the semiconductor package of the second embodiment may include a second substrate 1200 and a semiconductor device 1300. At this time, the semiconductor package of the second embodiment may have a structure in which the first substrate 1100 is omitted compared to the semiconductor package of the first embodiment.
  • the second substrate 1200 of the second embodiment can function as an interposer and as a package substrate.
  • the first connection portion 1410 disposed on the lower surface of the second substrate 1200 may couple the second substrate 1200 to the main board of the electronic device.
  • the semiconductor package of the third embodiment may include a first substrate 1100 and a semiconductor device 1300.
  • the semiconductor package of the third embodiment may have a structure in which the second substrate 1200 is omitted compared to the semiconductor package of the first embodiment.
  • the first substrate 1100 of the third embodiment can function as a package substrate and connect the semiconductor device 1300 and the main board.
  • the first substrate 1100 may include a connecting member 1110 for connecting a plurality of semiconductor devices.
  • the connecting member 1110 may be an inorganic bridge or an organic bridge that connects a plurality of semiconductor devices.
  • the semiconductor package of the fourth embodiment may further include a third semiconductor device 1330 compared to the semiconductor package of the third embodiment.
  • a fourth connection portion 1440 may be disposed on the lower surface of the first substrate 1100.
  • a third semiconductor device 1330 may be disposed on the fourth connection portion 1400. That is, the semiconductor package of the fourth embodiment may have a structure in which semiconductor devices are mounted on the upper and lower sides, respectively.
  • the third semiconductor device 1330 may have a structure disposed on the lower surface of the second substrate 1200 in the semiconductor package of FIG. 1B.
  • the semiconductor package of the fifth embodiment may include a first substrate 1100.
  • First and second semiconductor devices 1310 and 1320 may be disposed on the first substrate 1100.
  • a first connection portion 1410 may be disposed between the first substrate 1100 and the first and second semiconductor devices 1310 and 1320.
  • a connecting member 1110 may be embedded in the first substrate 1110.
  • the connecting member 1110 may horizontally connect the first and second semiconductor devices 1310 and 1320.
  • the first substrate 1100 may include a conductive coupling portion 1450.
  • the conductive coupling portion 1450 may protrude further from the first substrate 1100 toward the second semiconductor device 1320.
  • the conductive coupling portion 1450 may be referred to as a bump or, alternatively, may be referred to as a post.
  • the conductive coupling portion 1450 may be disposed with a protruding structure on the electrode disposed on the uppermost side of the first substrate 1100.
  • a third semiconductor device 1330 may be disposed on the conductive coupling portion 1450. At this time, the third semiconductor device 1330 may be connected to the first substrate 1100 through the conductive coupling portion 1450. Additionally, a second connection portion 1420 may be disposed between the first and second semiconductor devices 1310 and 1320 and the third semiconductor device 1330.
  • the third semiconductor device 1330 may be electrically connected to the first and second semiconductor devices 1310 and 1320 through the second connection portion 1420.
  • the third semiconductor device 1330 is connected to the first substrate 1100 through the conductive coupling portion 1450, and the first and second semiconductor devices 1310 and 1320 are connected to each other through the second connection portion 1420. It can also be connected with .
  • the third semiconductor device 1330 may receive a power signal and/or power through the conductive coupling portion 1450. Additionally, the third semiconductor device 1330 may exchange communication signals with the first and second semiconductor devices 1310 and 1320 through the second connection unit 1420.
  • the semiconductor package of the fifth embodiment provides sufficient power for driving the third semiconductor device 1330 by supplying a power signal and/or power to the third semiconductor device 1330 through the conductive coupling portion 1450.
  • smooth control of power operation may be possible.
  • the embodiment can improve the driving characteristics of the third semiconductor device 1330. That is, the embodiment can solve the problem of insufficient power provided to the third semiconductor device 1330. Furthermore, the embodiment may allow at least one of the power signal, power, and communication signal of the third semiconductor device 1330 to be provided through different paths through the conductive coupling portion 1450 and the second connection portion 1420. there is. Through this, the embodiment can solve the problem of loss of the communication signal caused by the power signal. For example, embodiments may minimize mutual interference between power signals and communication signals.
  • the third semiconductor device 1330 in the fifth embodiment may have a POP (Package On Package) structure in which a plurality of package substrates are stacked and may be disposed on the first substrate 1100.
  • the third semiconductor device 1330 may be a memory package including a memory chip. And the memory package may be coupled to the conductive coupling portion 1450. At this time, the memory package may not be connected to the first and second semiconductor devices 1310 and 1320.
  • FIG. 2 is a cross-sectional view showing a circuit board according to the first embodiment
  • FIG. 3 is a plan view of the circuit board of FIG. 2 viewed from above
  • FIG. 4 is an enlarged cross-sectional view of the first region R1 of FIG. 2
  • FIG. 5 is a cross-sectional view showing the detailed layer structure of the first and second through electrodes of FIG. 2
  • FIG. 6 is an enlarged cross-sectional view of the first area of FIG. 2 according to the second embodiment
  • FIG. 7 is a third embodiment.
  • FIG. 8 is an enlarged cross-sectional view of the first region of FIG. 2 according to an example
  • FIG. 8 is an enlarged cross-sectional view of the first region of FIG. 2 according to the fourth embodiment
  • FIG. 9 is an enlarged cross-sectional view of the first region of FIG. 2 according to the fifth embodiment.
  • It is a cross-sectional view enlarging an area
  • Figure 10 is a cross-sectional view showing a circuit board according to the
  • FIGS. 2 to 10 a circuit board provided in a semiconductor package according to an embodiment and a connection member embedded in the circuit board will be described with reference to FIGS. 2 to 10.
  • the semiconductor package of the embodiment may include a substrate 100 and a connection member 200 embedded in the substrate 100.
  • the connecting member 200 can horizontally connect a plurality of semiconductor devices, and for this purpose, it can include high-density electrode patterns.
  • the connecting member 200 may include at least one of an inorganic bridge and an organic bridge.
  • the substrate 100 may provide a space in which the connecting member 200 is buried. Additionally, the substrate 100 may provide a space where a plurality of semiconductor devices are mounted.
  • first and second semiconductor devices may be mounted on the substrate 100 while being spaced apart from each other in the horizontal direction. At least one first terminal provided in the first semiconductor device and at least one second terminal provided in the second semiconductor device may be electrically connected to each other through the connecting member 200.
  • the first semiconductor device and the second semiconductor device may need to exchange signals with each other, and terminals for the mutual signal exchange may be electrically connected to the connection member 200.
  • the substrate 100 for this purpose may include an insulating layer 110 and an electrode portion.
  • the insulating layer 110 may include multiple layers.
  • the insulating layer 110 may include a first insulating layer 111, a second insulating layer 112, and a third insulating layer 113.
  • the first insulating layer 111 may constitute an inner layer of the insulating substrate.
  • the second insulating layer 112 may be disposed on the first insulating layer 111.
  • the second insulating layer 112 may refer to an insulating layer disposed on the uppermost side of the insulating substrate.
  • the third insulating layer 113 may be disposed below the first insulating layer 111.
  • the third insulating layer 113 may refer to an insulating layer disposed on the lowermost side of the insulating substrate.
  • the first insulating layer 111 of the substrate may have a layer structure of at least one layer.
  • the first insulating layer 111 of the substrate may have a plurality of stacked structures.
  • the laminated structure can be divided by the electrode portion.
  • the electrode unit may include a first electrode (EP1) and a second electrode (EP2).
  • the first electrode EP1 may refer to a pad and/or trace.
  • the second electrode EP2 may represent a via electrode.
  • the first electrode EP1 and the second electrode EP2 may have different widths and/or different vertical cross-sectional shapes. Accordingly, the stacked structure can be distinguished based on the difference in width and/or the difference in vertical cross-sectional shape between the first electrode (EP1) and the second electrode (EP2).
  • the substrate of the embodiment can electrically and efficiently connect at least one semiconductor device and/or the second substrate to the main board.
  • the first insulating layer 111 of the substrate in FIG. 2 is shown as having a four-layer structure, but it is not limited to this.
  • the first insulating layer 111 of the substrate may have a number of layers of 3 or less, and may have a number of layers of 5 or more.
  • each of the plurality of layers may include the same insulating material.
  • the interface between the plurality of layers of the first insulating layer 111 may not be distinguished, and accordingly, the stacked structure can be distinguished based on the first electrode (EP1) and the second electrode (EP2).
  • the first insulating layer 111 includes a plurality of layers
  • at least one layer among the plurality of layers may include an insulating material different from at least one other layer.
  • the interface between the plurality of layers containing different insulating materials can be distinguished.
  • At least one layer among the plurality of layers of the first insulating layer 111 may include a reinforcing member.
  • the reinforcing member may mean glass fiber.
  • the reinforcing member may refer to GCP (Glass Core Primer).
  • the plurality of layers of the first insulating layer 111 may not include reinforcing members such as glass fiber and/or GCP.
  • a connecting member 200 may be embedded in the first insulating layer 111.
  • the first insulating layer 111 may include a receiving portion 110B in the form of a through hole in which the connecting member 200 is accommodated.
  • the connecting member 200 may be embedded in the receiving portion 110B of the first insulating layer 111.
  • being buried may mean that the connecting member 200 is entirely covered with the first insulating layer 111.
  • the insulating layer 110 of the substrate may include a second insulating layer 112 and a third insulating layer 113.
  • the second insulating layer 112 and the third insulating layer 113 of the substrate may be resist layers.
  • the second insulating layer 112 of the substrate may be a first resist layer disposed on the uppermost side of the substrate.
  • the third insulating layer 113 of the substrate may be a second resist layer disposed on the lowermost side of the substrate.
  • the second insulating layer 112 of the substrate may include the same insulating material as the first insulating layer 111 of the substrate.
  • the first insulating layer 111 of the substrate is composed of a plurality of layers
  • the first insulating layer closest to the second insulating layer 112 among the first insulating layers of the plurality of layers is the first insulating layer 112. 2
  • the third insulating layer 113 of the substrate may include the same insulating material as the first insulating layer 111 of the substrate.
  • the second insulating layer 112 and the third insulating layer 113 of the substrate may function to protect the upper and lower surfaces of the first insulating layer 111 of the substrate, respectively. Accordingly, the second insulating layer 112 and the third insulating layer 113 of the substrate can be said to be protective layers.
  • the second insulating layer 112 and the third insulating layer 113 of the substrate may be a solder resist layer containing an organic polymer material.
  • the second insulating layer 112 and the third insulating layer 113 of the substrate may include an epoxy acrylate-based resin.
  • the second insulating layer 112 and the third insulating layer 113 of the substrate may include resin, curing agent, photoinitiator, pigment, solvent, filler, additive, acrylic monomer, etc.
  • the embodiment is not limited to this, and the second insulating layer 112 and the third insulating layer 113 of the substrate may be any one of a photo solder resist layer, a cover-lay, and a polymer material. Of course it exists.
  • the substrate 100 may include an electrode portion.
  • the electrode unit may penetrate at least a portion of the insulating layer 110.
  • the electrode unit may include a plurality of electrode units depending on location and function.
  • the electrode unit may include a first electrode unit 120.
  • the first electrode portion 120 may penetrate a portion of the upper surface of the insulating layer 110.
  • the first electrode portion 120 may vertically overlap the connecting member 200.
  • the first electrode unit 120 may refer to an electrode electrically connected to the connection member 200.
  • the first electrode portion 120 may protrude on the insulating layer 110 while penetrating at least a portion of the insulating layer 110 .
  • the first electrode unit 120 may include a first penetration part 121 that penetrates from the upper surface of the second insulating layer 112 to a partial area.
  • the first penetration part 121 may be a penetration electrode that penetrates at least a portion of the second insulating layer 112 .
  • the first penetrating portion 121 may vertically overlap the connecting member 200.
  • the connecting member 200 may include a first connecting electrode 210.
  • the first connection electrode 210 may be a pad provided on the outermost layer of the connection member 200.
  • the first electrode portion 120 may be provided on the first penetration portion 121 and include a first protrusion 122 that protrudes onto the second insulating layer 112.
  • the first penetration part 121 and the first protrusion 122 of the first electrode part 120 may be one electrode formed integrally with each other, and penetrate the second insulating layer 112. The part that is exposed and the part that protrudes onto the second insulating layer 112 may be separated.
  • the electrode portion of the substrate 100 may include a second electrode portion 130.
  • the second electrode portion 130 may penetrate a portion of the upper surface of the insulating layer 110.
  • the second electrode unit 130 may overlap the first electrode unit 120 horizontally.
  • the second electrode unit 130 may be an electrode disposed on the same layer as the first electrode unit 120.
  • the second electrode portion 130 may not overlap the connection member 200 perpendicularly. That is, the second electrode unit 130 may not be directly connected to the connecting member 200.
  • the second electrode unit 130 may refer to an electrode that overlaps the first electrode unit 120 horizontally and does not vertically overlap the connection member 200.
  • the second electrode portion 130 may protrude on the insulating layer 110 while penetrating a portion of the upper surface of the insulating layer 110 .
  • the second electrode unit 130 may include a second penetration part 131 that penetrates from the top surface of the second insulating layer 112 to a partial area.
  • the second penetrating portion 131 may be a penetrating electrode that penetrates at least a portion of the second insulating layer 112 .
  • the second penetrating portion 131 may vertically overlap the connecting member 200.
  • the second penetration portion 131 may not vertically overlap the first connection electrode 210 of the connection member 200.
  • the second electrode portion 130 may be provided on the second penetration portion 131 and include a second protrusion 132 that protrudes onto the second insulating layer 112.
  • the second penetration portion 131 and the second protrusion 132 of the second electrode portion 130 may be one electrode formed integrally with each other, and penetrate the second insulating layer 112. The part that is exposed and the part that protrudes onto the second insulating layer 112 may be separated.
  • the first electrode unit 120 and the second electrode unit 130 may be post bumps connected to a semiconductor device.
  • the embodiment can proceed with thermal compression bonding to reduce the volume of the conductive adhesive.
  • the substrate 100 does not include the first electrode portion 120 and the second electrode portion 130 that protrude onto the insulating layer 110, it may be difficult to reduce the volume of the conductive adhesive. . This may be because the height of the electrode on which the conductive adhesive is disposed is located lower than the height of the insulating layer 110, and thus the volume of the conductive adhesive increases by the difference between the height of the electrode and the height of the insulating layer.
  • the substrate 100 of the embodiment has a degree of matching with the terminal of the semiconductor device and a diffusion prevention ability to prevent the intermetallic compound (IMC) formed between the conductive adhesive and the electrode portion from diffusing into the substrate. It may be provided with a first electrode part 120 and a second electrode part 130 that have a protruding structure for securing.
  • IMC intermetallic compound
  • each of the first electrode unit 120 and the second electrode unit 130 may be divided into a plurality of groups.
  • the first electrode unit 120 may include a first group of first electrode units 120A and a second group of first electrode units 120B.
  • the first electrode portion 120A of the first group may refer to an electrode portion that overlaps the first semiconductor device in the vertical direction.
  • the first electrode part 120A of the first group may mean an electrode part connected to the first semiconductor device.
  • the first electrode portion 120B of the second group may refer to an electrode portion that overlaps the second semiconductor device in the vertical direction.
  • the first electrode part 120B of the second group may mean an electrode part connected to the second semiconductor device.
  • the second electrode unit 130 may include a first group of second electrode units 130A and a second group of second electrode units 130B.
  • the second electrode unit 130A of the first group may be disposed adjacent to the first electrode unit 120A of the first group.
  • the second electrode unit 130A of the first group may be disposed on one side of the first electrode unit 120A of the first group.
  • the second electrode portion 130A of the first group may overlap the first semiconductor device in a vertical direction.
  • the second electrode portion 130A of the first group may be connected to the first semiconductor device.
  • the second electrode portion 130B of the second group may be disposed adjacent to the first electrode portion 120B of the second group.
  • the second electrode unit 130B of the second group may be disposed on the other side of the first electrode unit 120B of the second group.
  • the second electrode portion 130B of the second group may overlap the second semiconductor device in a vertical direction.
  • the second electrode portion 130B of the second group may be connected to the first semiconductor device.
  • the height of the top surface of the first electrode unit 120 may be the same as the height of the top surface of the second electrode unit 130.
  • the top surface of the first penetration part 121 of the first electrode part 120 may be located on the same plane as the top surface of the second penetration part 131 of the second electrode part 130.
  • the top surface of the first protrusion 122 of the first electrode unit 120 may be located on the same plane as the top surface of the second protrusion 132 of the second electrode unit 130.
  • the size of the first through portion 121 of the first electrode portion 120 may be the same as the size of the second through portion 131 of the second electrode portion 130.
  • being the same size means that the difference between the size of the first penetration part 121 of the first electrode part 120 and the size of the second penetration part 131 of the second electrode part 130 is 20. It may mean % or less, 15% or less, 10% or less, or 5% or less.
  • the size of the first penetration part 121 of the first electrode part 120 is in the range of 80% to 100% of the size of the second penetration part 131 of the second electrode part 130. You can be satisfied.
  • the difference between the size of the first penetration part 121 of the first electrode part 120 and the size of the second penetration part 131 of the second electrode part 130 exceeds 20%, or the first electrode part 120
  • semiconductor devices may not be stably mounted on the first electrode unit 120 and the second electrode unit 130.
  • plating may be performed in the process of plating the first through portion 121 and the second through portion 131. Deviations may occur.
  • Each of the first through portion 121 and the second through portion 131 fills the inside of each of the first through hole and the second through hole penetrating at least a portion of the second insulating layer 112 with a conductive material. It can be formed by doing so.
  • a difference may occur between the plating amount in the first through hole and the plating amount in the second through hole.
  • a protrusion of an electrode unit with a relatively large size may have a lower height than a protrusion of an electrode unit with a relatively small size.
  • the semiconductor device on the first electrode unit 120 and the second electrode unit 130 is tilted. Problems with combining in a true state may occur.
  • the protrusion located relatively high may be electrically connected to the semiconductor device, but the protrusion located relatively low may not be electrically connected to the semiconductor device.
  • a protrusion located relatively low may be electrically connected to the semiconductor device, but a protrusion located relatively high may not be electrically connected to the semiconductor device.
  • the semiconductor device may not operate smoothly, and further, electronic products or servers may not operate smoothly.
  • the substrate can perform impedance matching by adjusting the width or thickness of the electrode portions. At this time, when a thickness difference between the first electrode portion 120 and the second electrode portion 130 occurs due to plating deviation due to the size difference between the first penetration portion 121 and the second penetration portion 131. , impedance matching may not be achieved properly, and problems with the electrical reliability of the semiconductor package may occur due to impedance mismatching.
  • the difference between the size of the first penetration part 121 of the first electrode part 120 and the size of the second penetration part 131 of the second electrode part 130 satisfies the above range. , Through this, the height difference between the first protrusion 122 of the first electrode unit 120 and the second protrusion 132 of the second electrode unit 130 is minimized, and further, the first protrusion 122 and the second protrusion 132 are The two protrusions 132 may have substantially the same height.
  • the size of the first penetration part 121 may mean the density and/or volume of the first penetration part 121.
  • the size of the second penetrating part 131 may mean the density and/or volume of the second penetrating part 131.
  • the width of the first penetration part 121 is the same as the vertical thickness of the second penetration part 131. It may range from 80% to 100% of the width of the portion 131.
  • the width of the first penetration part 121 is equal to the thickness difference. It may be larger than the width of the second penetration portion 131.
  • the width of the first penetration part 121 is greater than the vertical thickness of the second penetration part 131. It may be smaller than the width of (131) by the thickness difference.
  • the thickness of the first penetration part 121 in the vertical direction may be the same as the thickness of the second penetration part 131 in the vertical direction.
  • the horizontal width W2 of the second penetrating part 131 may range from 80% to 100% of the horizontal width W1 of the first penetrating part 121.
  • the width W1 of the first penetration portion 121 may be determined by the width of the first connection electrode 210 provided on the connection member 200. Therefore, it may be difficult to change the width W1 of the first penetration portion 121. Accordingly, the width W1 of the first penetration part 121 can be determined based on the width of the first connection electrode 210 of the connecting member 200, and the width of the second penetration part 131 is corresponding to this. Width (W2) can be adjusted.
  • the width W1 of the first penetration portion 121 may satisfy the range of 10 ⁇ m to 40 ⁇ m.
  • the width W1 of the first penetration portion 121 may satisfy the range of 12 ⁇ m to 35 ⁇ m. More preferably, the width W1 of the first penetration portion 121 may satisfy the range of 15 ⁇ m to 30 ⁇ m. If the width W1 of the first penetration part 121 is less than 10 ⁇ m, the allowable current of the signal transmitted through the first penetration part 121 may decrease. Additionally, if the width W1 of the first penetration part 121 is smaller than 10 ⁇ m, the resistance of the first penetration part 121 may increase. Additionally, if the width W1 of the first penetrating portion 121 is greater than 40 ⁇ m, it may be difficult to arrange all of the plurality of first penetrating portions 121 that vertically overlap the connecting member 200.
  • the range of the width W1 of the first through portion 121 is determined based on the width of the first connection electrode 210 of the connection member 200, and may be the same or have a deviation of 20% or less.
  • the width W2 of the second penetrating portion 131 can be determined.
  • the width of the first through portion 121 and the width of the second through portion 131 may correspond to the widths of the first and second through holes penetrating the corresponding second insulating layer 112.
  • the first and second through holes may be formed through exposure and development processes.
  • the first and second through holes may be formed through a laser process.
  • the width of the first and second through holes may be determined by the exposure resolution in the exposure process.
  • the minimum width of the first and second through-holes that can be formed in general exposure process capabilities is about 50 ⁇ m.
  • the width of the first and second through holes in the embodiment is 40 ⁇ m or less, and accordingly, in the embodiment, the first and second through holes 121 and 131 are formed through a laser process.
  • a second through hole may be formed.
  • the first and second through holes may have a shape whose width changes in the thickness direction.
  • the first penetration part 121 of the first electrode part 120 and the second penetration part 131 of the second electrode part 130 may have a shape whose width changes in the thickness direction.
  • the first penetrating part 121 and the second penetrating part 131 may have an inclination in which the width gradually decreases from the upper surface to the lower surface.
  • the width W1 of the first penetration part 121 and the width W2 of the second penetration part 131 may mean the width of the area having the largest width in the entire area in the thickness direction.
  • the width of the lower surface of each of the first and second penetrating parts 121 and 131 may be smaller than the width of the upper surface.
  • the electrode unit may further include a third electrode unit 140 disposed between the connecting member 200 and the first electrode unit 120.
  • the third electrode unit 140 may electrically connect the first connection electrode 210 of the connecting member 200 and the first electrode unit 120.
  • the electrode unit may include a fourth electrode unit 150 that overlaps the third electrode unit 140 in a horizontal direction and does not vertically overlap the connection member 200.
  • the fourth electrode unit 150 may be disposed below the second electrode unit 130 to connect the fourth electrode unit 150 and internal electrodes of the substrate 100.
  • the first through portion 121 and the second through portion 131 have the same width difference in the thickness direction as described above, the first through portion 121 and the third electrode portion 140 ) and/or the bonding force between the second penetration portion 131 and the fourth electrode portion 150 may be reduced. That is, as the contact area between the first penetrating portion 121 and the third electrode portion 140 decreases, the contact area with the third electrode portion 140 is reduced due to various factors (e.g., thermal stress). Cracks may occur in the lower area of the first penetration portion 121. In addition, as the contact area between the second penetrating portion 131 and the fourth electrode portion 150 decreases, various factors (e.g., thermal stress) cause contact with the fourth electrode portion 150. Cracks may occur in the lower area of the second penetration portion 131.
  • various factors e.g., thermal stress
  • each of the first through portion 121 of the first electrode portion 120 and the second through portion 131 of the second electrode portion 130 may include a plurality of metal layers.
  • the first penetration part 121 may include a first metal layer 121-1 disposed on the third electrode part 140. Additionally, the first penetration portion 121 may include a second metal layer 121-2 disposed on the first metal layer 121-1. At this time, the first metal layer 121-1 and the second metal layer 121-2 may include different metal materials.
  • the first metal layer 121-1 may include nickel.
  • the second metal layer 121-2 may include copper.
  • the first metal layer 121-1 may improve the bonding force between the second metal layer 121-2 and the third electrode portion 140.
  • the first metal layer 121-1 functions to prevent oxidation of the third electrode portion 140 and improve the bonding force between the second metal layer 121-2 and the third electrode portion 140. can do.
  • the first metal layer 121-1 is such that the first penetration portion 121 is separated from the third electrode portion 140 due to contraction and expansion of the second insulating layer 112 due to thermal stress. thing can be solved.
  • the first metal layer 121-1 includes nickel
  • adhesion between the third electrode portion 140 and the first penetration portion 121 of the first electrode portion 120 may be improved. You can.
  • the solder may spread to form an inter-metallic compound, and the inter-metallic compound may be formed.
  • the second metal layer 121-2 is made of copper, the problem of forming an intermetallic joint may become worse.
  • the third electrode unit 140 may include a crevice 140C.
  • the upper surface of the third electrode portion 140 may include a crevice 140C that vertically overlaps the first penetration portion 121 and is concave toward the lower surface of the third electrode portion 140.
  • the crevice 140C may be filled with the first metal layer 121-1 of the first penetration part 121. Through this, the contact area between the third electrode portion 140 and the first penetration portion 121 can be increased, and thus the bonding force can be further improved.
  • the second penetration portion 131 of the second electrode portion 130 may also include a first metal layer 133-1 and a second metal layer 133-2. .
  • the first metal layer 133-1 of the second penetrating portion 131 may be disposed on the fourth electrode portion 150.
  • the second metal layer 133-2 of the second electrode unit 130 may be disposed on the first metal layer 133-1.
  • a crevice 150C may be provided on the upper surface of the fourth electrode portion 150, and the first metal layer 133-1 of the second penetration portion 131 may be provided with a crevice (150C) of the fourth electrode portion 150. It can be provided by filling 150C).
  • the third electrode part 140 connected to the first electrode part 120 may include a first extension part 141 and a first pad part 142.
  • the first extension portion 141 of the third electrode portion 140 may be connected to the first connection electrode 210 of the connection member 200.
  • the first pad portion 142 of the third electrode portion 140 may be disposed between the first extension portion 141 and the first penetration portion 121 of the first electrode portion 120, and these You can connect between them.
  • the fourth electrode portion 150 connected to the second electrode portion 130 may include a second extension portion 151 and a second pad portion 152.
  • the second extension portion 151 of the fourth electrode portion 150 may be connected to the second connection electrode 160 provided on the substrate.
  • the second connection electrode 160 may horizontally overlap the first connection electrode 210 and/or the connection member 200.
  • the second pad portion 152 of the fourth electrode portion 150 may be disposed between the second extension portion 151 and the second penetration portion 131 of the second electrode portion 130, and these You can connect between them.
  • the first connection electrode 210 of the connection member 200 may include a plurality of electrode parts.
  • the first connection electrode 210 may include a first electrode part 211 disposed on the connection member 200.
  • the first electrode part 211 may refer to an electrode part disposed on the uppermost side among a plurality of electrode parts provided on the connection member 200.
  • the first connection electrode 210 of the connection member 200 may include a second electrode part 212 disposed on the first electrode part 211.
  • the second electrode part 212 may protrude from the first electrode part 211 to have a certain height.
  • the second electrode part 212 may be referred to as a post.
  • the second electrode part 212 may be provided to improve alignment between the first electrode part 211 and the third electrode part 140 on the connecting member 200.
  • the second electrode part 212 may be disposed at a certain height on the first electrode part 211, through which the first electrode part 211 and the plurality of first penetration parts ( 121) can be aligned vertically.
  • connection electrode 210 and the second connection electrode 160 of the connection member 200 may have different heights.
  • connection electrode 210 may be positioned higher or lower than the second connection electrode 160.
  • a difference may occur between the height of the upper surface of the third electrode unit 140 and the height of the upper surface of the fourth electrode unit 150.
  • the top surface of the first connection electrode 210 of the connection member 200 may be positioned higher than the top surface of the second connection electrode 160.
  • the upper surface of the third electrode unit 140 may be positioned higher than the upper surface of the fourth electrode unit 150.
  • the width of the first penetration part 121 of the first electrode part 120 and the width of the second penetration part 131 of the second electrode part 130 are the same, the width of the first penetration part 121 of the first electrode part 120 is the same.
  • the upper surface of 120 may be positioned higher than the upper surface of the second electrode unit 130. Accordingly, in the embodiment, the width W2 of the second penetration part 131 is smaller than the width W1 of the first penetration part 121.
  • the width W1 of the first through portion 121 is equal to the difference in height between the upper surface of the third electrode portion 140 and the upper surface of the fourth electrode portion 150. Make it larger than the width (W2).
  • the embodiment can make the thickness of the first penetration part 121 smaller than the thickness of the second penetration part 131 by making a difference in the width, and through this, the first electrode part 120
  • the height of the upper surface of the first protrusion 122 may be the same as the height of the upper surface of the second protrusion 132 of the second electrode unit 130.
  • the top surface of the first connection electrode 210 of the connection member 200 may be located lower than the top surface of the second connection electrode 160.
  • the first connection electrode 210 may include only the first electrode part.
  • the upper surface of the third electrode unit 140 may be located lower than the upper surface of the fourth electrode unit 150.
  • the width of the first penetration part 121 of the first electrode part 120 and the width of the second penetration part 131 of the second electrode part 130 are the same, the width of the first penetration part 121 of the first electrode part 120 is the same.
  • the upper surface of 120 may be located lower than the upper surface of the second electrode unit 130.
  • the width W2 of the second penetration part 131 is larger than the width W1 of the first penetration part 121.
  • the width W1 of the first through portion 121 is equal to the difference in height between the upper surface of the third electrode portion 140 and the upper surface of the fourth electrode portion 150. Make it smaller than the width (W2).
  • the embodiment can make the thickness of the first penetration part 121 larger than the thickness of the second penetration part 131 by making a difference in the width, and through this, the first electrode part 120
  • the height of the upper surface of the first protrusion 122 may be the same as the height of the upper surface of the second protrusion 132 of the second electrode unit 130.
  • the top surface of the first connection electrode 210 of the connection member 200 may be located on the same plane as the top surface of the second connection electrode 160.
  • the sizes of the third electrode unit 140 and the fourth electrode unit 150 may be the same, and accordingly, the height of the upper surface of the third electrode unit 140 and the upper surface of the fourth electrode unit 150 The height may be the same.
  • the thickness of the first penetration part 121 and the thickness of the second penetration part 131 may be the same, and further, the width of the first penetration part 121 and the width of the second penetration part 131 may be the same. may be the same.
  • the second electrode portion 130 may include at least a plurality of sub-penetrating portions.
  • first electrode units 120 described above may be spaced apart from each other and may be provided in plural numbers, and the second electrode units 130 may also be provided in plural numbers and spaced apart from each other. Additionally, the size of the first penetration part of each of the plurality of first electrode parts may correspond to the size of the second penetration part of each of the plurality of second electrode parts.
  • At least one of the plurality of second electrode units 130 may include a plurality of sub-electrodes commonly connected to one second protrusion 132.
  • the second electrode portion 130 includes a first group of second electrode portions 130A connected to the first semiconductor device and a second group of second electrode portions 130B connected to the second semiconductor device. can do.
  • at least one second electrode part among the first group of second electrode parts and the second group of second electrode parts may include one second protrusion 132 and a plurality of sub-penetrating parts vertically overlapping. .
  • the second penetrating part 131 may be smaller than the existing penetrating part in order to have the same size as the first penetrating part 121. And when the size of the second penetrating portion 131 decreases, the allowable current of the signal may decrease accordingly. In addition, when the size of the second through portion 131 is reduced, the contact area between the second through portion 131 and the insulating layer 110 decreases, and accordingly, the second through portion 131 The adhesion between the insulating layer 110 and the insulating layer 110 may decrease. Additionally, when the width of the second penetrating part 131 is reduced, the heat transfer characteristics transmitted through the second penetrating part 131 may deteriorate, and thus the heat dissipation characteristics may deteriorate.
  • the embodiment allows the second penetrating portion 131 to include a plurality of sub-penetrating portions, thereby improving heat transfer characteristics, increasing heat dissipation effect, and maintaining impedance matching accordingly.
  • At least one of the plurality of second electrode portions 130 includes a second protrusion 132 and a plurality of first sub-penetrating portions that vertically overlap the second protrusion 132 and are horizontally spaced from each other ( 131a) and a second sub-penetrating part 131b.
  • the first sub-penetrating part 131a and the second sub-penetrating part 131b may be commonly connected to one second protrusion 132.
  • the first sub-penetrating part 131a and the second sub-penetrating part 131b may each vertically overlap with one second protruding part 132.
  • first sub-penetrating part 131a and the second sub-penetrating part 131b may have the same thickness and width.
  • first sub-penetrating part 131a and the second sub-penetrating part 131b may have the same volume.
  • first sub-penetrating part 131a and the second sub-penetrating part 131b may have the same size.
  • first sub-penetrating part 131a may have the same size as the first penetrating part 121. Additionally, the second sub-penetrating part 131b may have the same volume as the first penetrating part 121. Additionally, the first sub-penetrating part 131a may have the same size as the first penetrating part 121.
  • the embodiment shows that even if the second penetration part 131 of the second electrode part 130 includes the first sub-penetrating part 131a and the second sub-penetrating part 131b, the first electrode part ( 120) and the second electrode portion 130 can be made to have a uniform height.
  • the upper surface of the second protrusion 132 may have a step.
  • the second protrusion 132 may have a step as it vertically overlaps a plurality of sub-penetrating parts.
  • the second protrusion 132 may include a dimple area provided in an area that vertically overlaps a plurality of penetrating parts.
  • the second protrusion 132 has a concave portion CP in an area vertically overlapping with the first sub-penetrating part 131a and in an area vertically overlapping with the second sub-penetrating part 131b. may be provided.
  • the concave portion CP may allow a conductive adhesive member such as solder to be stably seated on the second protrusion 134 .
  • the concave portion CP may function as a dam to prevent movement of the solder as it is seated.
  • the fourth electrode unit 150 may include a plurality of sub-extensions. .
  • At least one of the plurality of fourth electrode parts 150 vertically overlaps one second pad part 152 and includes a first sub-extension part 141a and a second sub-extension part horizontally spaced from each other. It may include (141b).
  • the first sub-extension portion 141a and the second sub-extension portion 141b of the fourth electrode portion 150 improve heat dissipation characteristics and correspond to a decrease in the width of the second penetration portion 131. Accuracy for changing impedance matching conditions can be improved.
  • the upper surface of the second pad portion 152 may include a concave portion CP2 that vertically overlaps the first sub-extension portion 141a and the second sub-extension portion 141b.
  • the concave portion CP2 may function to increase the contact area with the second insulating layer 112, thereby preventing the second insulating layer 112 from being peeled off.
  • the concave portion CP2 may function as a crevice 150C of the fourth electrode portion 150 described with reference to FIG. 5, and through this, a separate process for forming the crevice 150C can be omitted. You can.
  • the connecting member 200 may be disposed in a receiving portion provided in the first insulating layer 110.
  • the receiving part may be provided in at least a portion of the first insulating layer 110.
  • the receiving portion may be in the form of a recess rather than a through hole. Accordingly, an adhesive member 170 may be provided on the recess.
  • the adhesive member 170 may enable the connecting member 200 to be firmly fixed to the insulating layer 110 .
  • the adhesive member 170 may have a different width from the connecting member 200. Additionally, the adhesive member 170 may be larger than the width of the connecting member 200. Through this, it is possible to prevent the connection member 200 from being separated from various damages inflicted in the operating environment of the semiconductor package.
  • the embodiment can minimize the difference in height of the first and second electrode portions that are connected to the semiconductor device and penetrate a portion of the upper surface of the insulating layer.
  • the first electrode portion may vertically overlap the connecting member, and the second electrode portion may overlap the first electrode portion horizontally without vertically overlapping the connecting member.
  • the first electrode unit may include a first penetration part penetrating at least a portion of an insulating layer and a first protrusion located on the first penetration part and protruding on the insulating layer.
  • the second electrode unit may include a second penetration part penetrating at least a portion of the insulating layer and a second protrusion located on the second penetration part and protruding on the insulating layer.
  • the size of the second penetrating portion may correspond to the size of the first penetrating portion.
  • the size of the second through portion may satisfy a range of 80% to 100% of the size of the first through portion.
  • the embodiment can minimize the height difference between the first electrode portion and the second electrode portion that occurs due to the size difference between the first penetration portion and the second penetration portion, and through this, the height difference between the first and second electrode portions can be minimized.
  • Semiconductor devices can be placed stably.
  • the vertical thickness of the first penetration part may be the same as the vertical thickness of the second penetration part
  • the horizontal width of the first penetration part may be the same as the horizontal width of the second penetration part.
  • the vertical thickness of the first penetration part may be smaller than the vertical thickness of the second penetration part, and the horizontal width of the first penetration part may be greater than the horizontal width of the second penetration part.
  • the vertical thickness of the first penetration part may be greater than the vertical thickness of the second penetration part, and the horizontal width of the first penetration part may be smaller than the horizontal width of the second penetration part.
  • the embodiment can ensure that the height of the first electrode portion and the height of the second electrode portion are uniform.
  • the first and second semiconductor devices can be stably placed. Accordingly, the embodiment can improve the operating characteristics of the first and second semiconductor devices. Furthermore, the embodiment can ensure smooth operation of the first and second semiconductor devices, and thereby enable smooth operation of electronic products or servers.
  • the embodiment allows the first electrode portion and the second electrode portion to have the same height to prevent impedance changes that occur due to changes in the thickness of the first electrode portion and the second electrode portion, thereby further improving electrical reliability. It can be improved.
  • the second penetration portion of the second electrode unit may include a plurality of sub-penetrating portions that vertically overlap in common with one second pad portion. Additionally, the size of each of the plurality of sub-penetrating parts may correspond to the size of the first penetrating part. Therefore, even if the second penetration part includes a plurality of sub-penetrating parts, the first electrode part and the second electrode part can be made to have uniform heights. Additionally, a concave portion may be provided on the upper surface of the second protrusion that vertically overlaps the plurality of sub-penetrating portions. Additionally, a conductive adhesive member such as solder can be stably seated in the concave portion provided in the second protrusion.
  • the concave portion of the second protrusion may function as a dam that prevents movement of the solder while guiding the seating position where the solder is seated.
  • the embodiment allows heat to be transmitted through the plurality of sub-penetrating portions, thereby improving the heat dissipation characteristics of the semiconductor package and further improving the operating characteristics of the semiconductor package.
  • the second penetrating portion includes a plurality of sub-penetrating portions
  • an impedance change caused by a decrease in the width of the second penetrating portion can be prevented, thereby improving the operation of the first and second semiconductor devices. Characteristics can be improved.
  • the embodiment can ensure smooth operation of the first and second semiconductor devices, and thereby enable smooth operation of electronic products or servers.
  • a circuit board having the characteristics of the above-described invention when used in IT devices such as smartphones, server computers, TVs, or home appliances, functions such as signal transmission or power supply can be stably performed.
  • a circuit board having the characteristics of the present invention when a circuit board having the characteristics of the present invention performs a semiconductor package function, it can safely protect the semiconductor chip from external moisture or contaminants, and can prevent problems such as leakage current or electrical short circuits between terminals. Alternatively, the problem of electrical opening of the terminal supplying the semiconductor chip can be solved. Additionally, if it is responsible for the function of signal transmission, the noise problem can be solved.
  • the circuit board having the characteristics of the above-described invention can maintain the stable function of IT devices or home appliances, so that the entire product and the circuit board to which the present invention is applied can achieve functional unity or technical interoperability with each other.
  • a circuit board having the characteristics of the above-mentioned invention is used in a transportation device such as a vehicle, it is possible to solve the problem of distortion of signals transmitted to the transportation device, or to safely protect the semiconductor chip that controls the transportation device from the outside and prevent leakage.
  • the stability of the transport device can be further improved by solving the problem of electrical short-circuiting between currents or terminals, or the problem of electrical opening of the terminal supplying the semiconductor chip. Accordingly, the transportation device and the circuit board to which the present invention is applied can achieve functional unity or technical interoperability with each other.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Geometry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

Un boîtier semi-conducteur selon un mode de réalisation comprend : une couche d'isolation ; une pluralité de parties d'électrode comprenant une partie traversante s'étendant à travers celle-ci à partir de la surface supérieure de la couche d'isolation vers une zone partielle de celle-ci ; et un élément de connexion intégré dans la couche d'isolation, la pluralité de parties d'électrode comprenant une première partie d'électrode comprenant une première partie traversante chevauchant verticalement l'élément de connexion et une seconde partie d'électrode comprenant une seconde partie traversante qui ne chevauche pas verticalement l'élément de connexion, et la taille de la première partie traversante satisfaisant une plage de 80 % à 100 % de la taille de la seconde partie traversante.
PCT/KR2023/015221 2022-09-29 2023-10-04 Carte de circuit imprimé et boîtier semi-conducteur la comprenant WO2024072186A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2022-0124641 2022-09-29
KR1020220124641A KR20240044978A (ko) 2022-09-29 2022-09-29 반도체 패키지

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WO2024072186A1 true WO2024072186A1 (fr) 2024-04-04

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KR (1) KR20240044978A (fr)
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190393145A1 (en) * 2018-06-21 2019-12-26 Intel Corporation Electromigration resistant and profile consistent contact arrays
KR20200028602A (ko) * 2018-09-07 2020-03-17 삼성전기주식회사 연결구조체 내장기판
KR20200041876A (ko) * 2017-09-13 2020-04-22 인텔 코포레이션 능동 실리콘 브리지
KR20220001643A (ko) * 2020-06-30 2022-01-06 삼성전자주식회사 반도체 패키지
KR102380834B1 (ko) * 2015-01-06 2022-03-31 삼성전기주식회사 인쇄회로기판, 반도체 패키지 및 이들의 제조방법

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102380834B1 (ko) * 2015-01-06 2022-03-31 삼성전기주식회사 인쇄회로기판, 반도체 패키지 및 이들의 제조방법
KR20200041876A (ko) * 2017-09-13 2020-04-22 인텔 코포레이션 능동 실리콘 브리지
US20190393145A1 (en) * 2018-06-21 2019-12-26 Intel Corporation Electromigration resistant and profile consistent contact arrays
KR20200028602A (ko) * 2018-09-07 2020-03-17 삼성전기주식회사 연결구조체 내장기판
KR20220001643A (ko) * 2020-06-30 2022-01-06 삼성전자주식회사 반도체 패키지

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