WO2024066412A1 - Infrared light-emitting diode and manufacturing method therefor - Google Patents

Infrared light-emitting diode and manufacturing method therefor Download PDF

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Publication number
WO2024066412A1
WO2024066412A1 PCT/CN2023/096080 CN2023096080W WO2024066412A1 WO 2024066412 A1 WO2024066412 A1 WO 2024066412A1 CN 2023096080 W CN2023096080 W CN 2023096080W WO 2024066412 A1 WO2024066412 A1 WO 2024066412A1
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layer
type
waveguide layer
emitting diode
infrared light
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PCT/CN2023/096080
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French (fr)
Chinese (zh)
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廖寅生
李森林
毕京锋
王亚宏
薛龙
赖玉财
谢岚驰
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厦门士兰明镓化合物半导体有限公司
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Publication of WO2024066412A1 publication Critical patent/WO2024066412A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table

Definitions

  • the present invention relates to the field of semiconductor technology, and in particular to an infrared light emitting diode and a manufacturing method thereof.
  • LED Light Emitting Diode
  • infrared light-emitting diodes are an important type of light-emitting diodes, which are widely used in security monitoring, remote control, vehicle sensing and closed-circuit television.
  • Existing infrared light-emitting diodes include a substrate, an n-type semiconductor layer, a quantum well layer and a p-type semiconductor layer from bottom to top, and their luminous efficiency is low. Therefore, improving the luminous efficiency of infrared light-emitting diodes has become a research focus.
  • the object of the present invention is to provide an infrared light emitting diode and a manufacturing method thereof, so as to improve the stability of aging reliability test while avoiding the increase of the working voltage of the infrared light emitting diode and improve the luminous efficiency of the infrared light emitting diode.
  • the present invention provides an infrared light emitting diode, comprising a substrate, an n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer and a p-type semiconductor layer from bottom to top, wherein, in the direction from bottom to top, the Al component of the first waveguide layer is low
  • the Al component of the second waveguide layer changes gradually from low to high.
  • the thickness of the second waveguide layer is smaller than the thickness of the first waveguide layer.
  • the thickness of the first waveguide layer is 120 nm to 420 nm, and the thickness of the second waveguide layer is 20 nm to 320 nm.
  • the material of the first waveguide layer is AlxGa1 -xAs
  • the material of the second waveguide layer is AlyGa1 -yAs , 0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1.
  • an Al composition of the quantum well layer is smaller than a lowest Al composition in the first waveguide layer, and an Al composition of the quantum well layer is smaller than a lowest Al composition in the second waveguide layer.
  • the n-type semiconductor layer includes, from bottom to top, an n-type buffer layer, an n-type etching stop layer, an n-type ohmic contact layer, an n-type window layer and an n-type confinement layer.
  • the p-type semiconductor layer includes a p-type confinement layer, a p-type window layer and a p-type ohmic contact layer.
  • the present invention also provides a method for manufacturing an infrared light emitting diode, comprising:
  • An n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer and a p-type semiconductor layer are sequentially formed on the substrate, wherein, in a bottom-to-top direction, the Al component of the first waveguide layer changes gradually from low to high, and the Al component of the second waveguide layer changes gradually from low to high.
  • the thickness of the second waveguide layer is smaller than the thickness of the first waveguide layer.
  • the thickness of the first waveguide layer is 120 nm to 420 nm, and the thickness of the second waveguide layer is 20 nm to 320 nm.
  • the material of the first waveguide layer is AlxGa1 -xAs
  • the material of the second waveguide layer is AlyGa1 -yAs , 0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1.
  • an Al composition of the quantum well layer is smaller than a lowest Al composition in the first waveguide layer, and an Al composition of the quantum well layer is smaller than a lowest Al composition in the second waveguide layer.
  • the n-type semiconductor layer includes, from bottom to top, an n-type buffer layer, an n-type etching stop layer, an n-type ohmic contact layer, an n-type window layer and an n-type confinement layer.
  • the p-type semiconductor layer includes a p-type confinement layer, a p-type window layer and a p-type The contact layer.
  • the infrared light-emitting diode and the manufacturing method thereof of the present invention form a first waveguide layer and a second waveguide layer on both sides of a quantum well layer respectively, and in a bottom-to-top direction, the Al component of the first waveguide layer gradually changes from low to high, and the Al component of the second waveguide layer gradually changes from low to high, so that the stability of the aging reliability test is improved while avoiding the increase of the operating voltage of the infrared light-emitting diode, and the luminous efficiency of the infrared light-emitting diode is improved.
  • FIG1 is a schematic structural diagram of an infrared light emitting diode according to an embodiment of the present invention.
  • FIG. 2 is a flow chart of a method for manufacturing an infrared light emitting diode according to an embodiment of the present invention.
  • An embodiment of the present invention provides an infrared light-emitting diode, comprising, from bottom to top, a substrate, an n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer, and a p-type semiconductor layer, wherein, in a direction from bottom to top, an Al component of the first waveguide layer gradually changes from low to high, and an Al component of the second waveguide layer gradually changes from low to high.
  • FIG. 1 is also a longitudinal cross-sectional view of the infrared light emitting diode.
  • the infrared light emitting diode comprises a substrate 11, an n-type semiconductor layer 12, a first waveguide layer 13, a quantum well layer 14, a second waveguide layer 15 and a p-type semiconductor layer 16 from bottom to top, wherein, in the direction from bottom to top (i.e., along the growth direction), the Al component of the first waveguide layer 13 changes gradually from low to high, and the Al component of the second waveguide layer 15 changes gradually from low to high, that is, waveguide layers with asymmetric Al component distribution are formed on the upper and lower sides of the quantum well layer 14.
  • the Al component of the first waveguide layer 13 on the side close to the n-type semiconductor layer 12 is the lowest, and the Al component of the first waveguide layer 13 on the side close to the quantum well layer 14 is the highest; the Al component of the second waveguide layer 15 on the side close to the quantum well layer 14 is the lowest, and the Al component of the second waveguide layer 15 on the side close to the p-type semiconductor layer 16 is the highest.
  • the Al composition gradient of the first waveguide layer 13 may be linear, and the Al composition gradient of the second waveguide layer 15 may be linear.
  • the Al composition gradient range and slope of the first waveguide layer 13 and the second waveguide layer 15 are the same.
  • the Al component of the first waveguide layer 13 gradually changes from low to high
  • the Al component of the second waveguide layer 15 gradually changes from low to high
  • the average potential barrier for electrons to enter the quantum well layer 14 from the n-type semiconductor layer 12 is reduced
  • the average potential barrier for holes to enter the quantum well layer 14 from the p-type semiconductor layer 16 is reduced, thereby effectively reducing the operating voltage of the infrared light-emitting diode; at the same time, the carrier leakage in the quantum well layer 14 is reduced, thereby improving the stability of the aging reliability test.
  • the drift rate of electrons can be reduced; by defining the Al component of the second waveguide layer 15 to gradually change from low to high in the bottom-up direction, which is equivalent to holes changing from a high potential barrier to a low potential barrier, the drift rate of holes can be increased; the combination of the two can increase the probability of electrons and holes recombining to emit light in the quantum well layer 14, thereby improving the luminous efficiency.
  • the substrate 11 may be made of at least one of semiconductor materials such as silicon, germanium, silicon carbide and gallium arsenide.
  • the material of the first waveguide layer 13 is AlxGa1 -xAs
  • the material of the second waveguide layer 15 is AlyGa1 -yAs , 0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1.
  • the first waveguide layer 13 and the second waveguide layer 15 are non-doped layers.
  • the thickness of the second waveguide layer 15 is less than the thickness of the first waveguide layer 13. Since the effective mass of holes is greater than the effective mass of electrons, the drift speed of electrons is faster, and the migration speed of electrons in the device is faster.
  • the mean free path of electrons can be extended, thereby increasing the probability of electrons and holes recombining and emitting light in the quantum well layer 14, thereby improving the luminous efficiency.
  • the thickness of the first waveguide layer 13 is 120nm to 420nm, and further optionally, the thickness of the first waveguide layer 13 is 320nm; optionally, the thickness of the second waveguide layer 15 is 20nm to 320nm, and further optionally, the thickness of the second waveguide layer 15 is 120nm.
  • the Al component of the quantum well layer 14 is smaller than the lowest Al component in the first waveguide layer 13, and the Al component of the quantum well layer 14 is smaller than the lowest Al component in the second waveguide layer 15, so as to avoid the Al component of the quantum well layer 14 being too high and causing the operating voltage to be too high.
  • the material of the quantum well layer 14 can be InGaAs/AlGaAs or the like.
  • the quantum well layer 14 is a multi-quantum well structure, that is, a periodic structure composed of quantum wells and quantum barriers, and the number of periods can be selected to be 6 to 30 pairs, and the number of periods can further be selected to be 12.
  • the thickness of the quantum well layer 14 is 50 nm to 2000 nm. Further optionally, the thickness of the quantum well layer 14 is 900 nm.
  • the n-type semiconductor layer 12 includes, from bottom to top, an n-type buffer layer 121 , an n-type etching stop layer 122 , an n-type ohmic contact layer 123 , an n-type window layer 124 and an n-type confinement layer 125 .
  • the n-type buffer layer 121 is used to eliminate the influence of the surface defects of the substrate 11 on the infrared light-emitting diode to the maximum extent, reduce the probability of defects and dislocations in the infrared light-emitting diode, and provide a smooth interface for the next step of structure growth.
  • the material of the n-type buffer layer 121 may be GaAs, but is not limited thereto.
  • the dopant in the n-type buffer layer 121 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
  • the thickness of the n-type buffer layer 121 is 100 nm to 300 nm. Further optionally, the thickness of the n-type buffer layer 121 is 150 nm.
  • the n-type etching stop layer 122 is used as an etching stop layer in the subsequent etching process when manufacturing the device structure, so as to prevent the structure below the n-type etching stop layer 122 from being etched.
  • the material of the n-type etching stop layer 122 may be GaAs, but is not limited thereto.
  • the dopant in the n-type etch stop layer 122 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
  • the thickness of the n-type etching stop layer 122 is 100 nm to 300 nm. Further optionally, the thickness of the n-type etching stop layer 122 is 150 nm.
  • the n-type ohmic contact layer 123 is used to form an ohmic contact with a metal electrode.
  • the material of the n-type ohmic contact layer 123 may be InGaAs or GaAs, and may be GaAs, but is not limited thereto.
  • the dopant in the n-type ohmic contact layer 123 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
  • the thickness of the n-type ohmic contact layer 123 is 20 nm to 150 nm. Further optionally, the thickness of the n-type ohmic contact layer 123 is 50 nm.
  • the n-type window layer 124 is used as a light exit window and for current expansion.
  • the dopant in the n-type window layer 124 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon, and the doping concentration of silicon may be 0.7E18 cm -3 to 5E18 cm -3 .
  • the thickness of the n-type window layer 124 is 1.5 ⁇ m to 8 ⁇ m. Further optionally, the thickness of the n-type window layer 124 is 6 ⁇ m.
  • the n-type confinement layer 125 is used to provide electrons.
  • the material of the n-type confinement layer 125 may be AlGaAs, but is not limited thereto.
  • the dopant in the n-type confinement layer 125 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
  • the thickness of the n-type restriction layer 125 is 200 nm to 1000 nm. Further optionally, the thickness of the n-type restriction layer 125 is 500 nm.
  • the p-type semiconductor layer 16 includes a p-type confinement layer 161 , a p-type window layer 162 and a p-type ohmic contact layer 163 .
  • the p-type confinement layer 161 is used to provide holes.
  • the functions of the n-type confinement layer 125 and the p-type confinement layer 161 include: first, to limit the minority carriers from overflowing the quantum well layer 14 to improve the composite luminescence efficiency; second, to serve as an important window, so that the photons emitted by the quantum well layer 14 can easily pass through the n-type confinement layer 125 and the p-type confinement layer 161 to improve the luminescence efficiency of the infrared light-emitting diode.
  • the material of the p-type confinement layer 161 may be AlGaAs, but is not limited thereto.
  • the dopant in the p-type confinement layer 161 may be at least one of p-type dopants such as carbon, magnesium, and zinc. Further, the p-type dopant may be carbon.
  • the thickness of the p-type confinement layer 161 is 200 nm to 1500 nm. Further optionally, the thickness of the p-type confinement layer 161 is 600 nm.
  • the p-type window layer 162 is used as a light exit window and for current expansion.
  • the material of the p-type window layer 162 may be AlGaAs, but is not limited thereto.
  • the dopant in the p-type window layer 162 may be at least one of p-type dopants such as carbon, magnesium, zinc, etc. Further, the p-type dopant may be carbon.
  • the thickness of the p-type window layer 162 is 200 nm to 3000 nm. Further optionally, the thickness of the p-type window layer 162 is 1200 nm.
  • the p-type ohmic contact layer 163 is used to form an ohmic contact with another metal electrode.
  • the material of the p-type ohmic contact layer 163 may be GaP, but is not limited thereto.
  • the dopant in the p-type ohmic contact layer 163 may be carbon.
  • the thickness of the p-type ohmic contact layer 163 is 20 nm to 100 nm. Further optionally, the thickness of the p-type ohmic contact layer 163 is 50 nm.
  • the infrared light emitting diode provided by the present invention comprises, from bottom to top, a substrate, an n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer and a p-type semiconductor layer, wherein In the bottom-up direction, the Al component of the first waveguide layer changes gradually from low to high, and the Al component of the second waveguide layer changes gradually from low to high.
  • the infrared light emitting diode provided by the present invention improves the stability of the aging reliability test while avoiding the increase of the working voltage of the infrared light emitting diode, and improves the luminous efficiency of the infrared light emitting diode.
  • FIG. 2 is a flow chart of the method for manufacturing an infrared light emitting diode according to an embodiment of the present invention.
  • the method for manufacturing an infrared light emitting diode includes:
  • Step S1 providing a substrate
  • Step S2 sequentially forming an n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer and a p-type semiconductor layer on the substrate, wherein, in a bottom-to-top direction, the Al component of the first waveguide layer gradually changes from low to high, and the Al component of the second waveguide layer gradually changes from low to high.
  • a substrate 11 is provided.
  • the substrate 11 may be made of at least one of semiconductor materials such as silicon, germanium, silicon carbide and gallium arsenide.
  • an n-type semiconductor layer 12, a first waveguide layer 13, a quantum well layer 14, a second waveguide layer 15 and a p-type semiconductor layer 16 are sequentially formed on the substrate 11, wherein, in the bottom-to-top direction (i.e., along the growth direction), the Al component of the first waveguide layer 13 changes gradually from low to high, and the Al component of the second waveguide layer 15 changes gradually from low to high, that is, waveguide layers with asymmetric Al component distribution are formed on the upper and lower sides of the quantum well layer 14.
  • the Al component of the first waveguide layer 13 on the side close to the n-type semiconductor layer 12 is the lowest, and the Al component of the first waveguide layer 13 on the side close to the quantum well layer 14 is the highest; the Al component of the second waveguide layer 15 on the side close to the quantum well layer 14 is the lowest, and the Al component of the second waveguide layer 15 on the side close to the p-type semiconductor layer 16 is the highest.
  • the Al composition gradient of the first waveguide layer 13 may be linear, and the Al composition gradient of the second waveguide layer 15 may be linear.
  • the Al composition gradient range and slope of the first waveguide layer 13 and the second waveguide layer 15 are the same.
  • the Al component of the first waveguide layer 13 gradually changes from low to high
  • the Al component of the second waveguide layer 15 gradually changes from low to high
  • the average potential barrier for electrons to enter the quantum well layer 14 from the n-type semiconductor layer 12 is reduced
  • the average potential barrier for holes to enter the quantum well layer 14 from the p-type semiconductor layer 16 is reduced, thereby effectively reducing the operating voltage of the infrared light-emitting diode; at the same time, the carrier leakage in the quantum well layer 14 is reduced, thereby improving the stability of the aging reliability test.
  • the drift rate of electrons can be reduced; by defining the Al component of the second waveguide layer 15 to gradually change from low to high in the bottom-up direction, which is equivalent to holes changing from a high potential barrier to a low potential barrier, the drift rate of holes can be increased; the combination of the two can increase the probability of electrons and holes recombining to emit light in the quantum well layer 14, thereby improving the luminous efficiency.
  • any one of the metal organic compound chemical vapor deposition (MOCVD) process, molecular beam epitaxy (MBE) process or ultra-high vacuum chemical vapor deposition (UHVCVD) process can be used to sequentially form the n-type semiconductor layer 12, the first waveguide layer 13, the quantum well layer 14, the second waveguide layer 15 and the p-type semiconductor layer 16 on the substrate 11, and the metal organic compound chemical vapor deposition process can be optionally used.
  • MOCVD metal organic compound chemical vapor deposition
  • MBE molecular beam epitaxy
  • UHVCVD ultra-high vacuum chemical vapor deposition
  • the material of the first waveguide layer 13 is AlxGa1 -xAs
  • the material of the second waveguide layer 15 is AlyGa1 -yAs , 0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1.
  • the first waveguide layer 13 and the second waveguide layer 15 are non-doped layers.
  • the thickness of the second waveguide layer 15 is less than the thickness of the first waveguide layer 13. Since the effective mass of holes is greater than the effective mass of electrons, the drift speed of electrons is faster, and the migration speed of electrons in the device is faster.
  • the mean free path of electrons can be extended, thereby increasing the probability of electrons and holes recombining and emitting light in the quantum well layer 14, thereby improving the luminous efficiency.
  • the thickness of the first waveguide layer 13 is 120 nm to 420 nm. Further, optionally, the thickness of the first waveguide layer 13 is 320 nm.
  • the thickness of the second waveguide layer 15 is The thickness of the second waveguide layer 15 is 20 nm to 320 nm. Further optionally, the thickness of the second waveguide layer 15 is 120 nm.
  • the Al component of the quantum well layer 14 is smaller than the lowest Al component in the first waveguide layer 13, and the Al component of the quantum well layer 14 is smaller than the lowest Al component in the second waveguide layer 15, so as to avoid the Al component of the quantum well layer 14 being too high and causing the operating voltage to be too high.
  • the material of the quantum well layer 14 can be InGaAs/AlGaAs or the like.
  • the quantum well layer 14 is a multi-quantum well structure, that is, a periodic structure composed of quantum wells and quantum barriers, and the number of periods can be selected to be 6 to 30 pairs, and the number of periods can further be selected to be 12.
  • the thickness of the quantum well layer 14 is 50 nm to 2000 nm. Further optionally, the thickness of the quantum well layer 14 is 900 nm.
  • the n-type semiconductor layer 12 includes, from bottom to top, an n-type buffer layer 121 , an n-type etching stop layer 122 , an n-type ohmic contact layer 123 , an n-type window layer 124 and an n-type confinement layer 125 .
  • the n-type buffer layer 121 is used to eliminate the influence of the surface defects of the substrate 11 on the infrared light-emitting diode to the maximum extent, reduce the probability of defects and dislocations in the infrared light-emitting diode, and provide a smooth interface for the next step of structure growth.
  • the material of the n-type buffer layer 121 may be GaAs, but is not limited thereto.
  • the dopant in the n-type buffer layer 121 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
  • the thickness of the n-type buffer layer 121 is 100 nm to 300 nm. Further optionally, the thickness of the n-type buffer layer 121 is 150 nm.
  • the n-type etching stop layer 122 is used as an etching stop layer in the subsequent etching process when manufacturing the device structure, so as to prevent the structure below the n-type etching stop layer 122 from being etched.
  • the material of the n-type etching stop layer 122 may be GaAs, but is not limited thereto.
  • the dopant in the n-type etch stop layer 122 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
  • the thickness of the n-type etching stop layer 122 is 100 nm to 300 nm. Further optionally, the thickness of the n-type etching stop layer 122 is 150 nm.
  • the n-type ohmic contact layer 123 is used to form an ohmic contact with a metal electrode.
  • the material of the n-type ohmic contact layer 123 may be InGaAs or GaAs, and may be GaAs, but is not limited thereto.
  • the dopant in the n-type ohmic contact layer 123 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
  • the thickness of the n-type ohmic contact layer 123 is 20 nm to 150 nm. Further optionally, the thickness of the n-type ohmic contact layer 123 is 50 nm.
  • the n-type window layer 124 is used as a light exit window and for current expansion.
  • the dopant in the n-type window layer 124 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon, and the doping concentration of silicon may be 0.7E18 cm -3 to 5E18 cm -3 .
  • the thickness of the n-type window layer 124 is 1.5 ⁇ m to 8 ⁇ m. Further optionally, the thickness of the n-type window layer 124 is 6 ⁇ m.
  • the n-type confinement layer 125 is used to provide electrons.
  • the material of the n-type confinement layer 125 may be AlGaAs, but is not limited thereto.
  • the dopant in the n-type confinement layer 125 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
  • the thickness of the n-type restriction layer 125 is 200 nm to 1000 nm. Further optionally, the thickness of the n-type restriction layer 125 is 500 nm.
  • the p-type semiconductor layer 16 includes a p-type confinement layer 161 , a p-type window layer 162 and a p-type ohmic contact layer 163 .
  • the p-type confinement layer 161 is used to provide holes.
  • the functions of the n-type confinement layer 125 and the p-type confinement layer 161 include: first, to limit the minority carriers from overflowing the quantum well layer 14 to improve the composite luminescence efficiency; second, to serve as an important window, so that the photons emitted by the quantum well layer 14 can easily pass through the n-type confinement layer 125 and the p-type confinement layer 161 to improve the luminescence efficiency of the infrared light-emitting diode.
  • the material of the p-type confinement layer 161 may be AlGaAs, but is not limited thereto.
  • the dopant in the p-type confinement layer 161 may be at least one of p-type dopants such as carbon, magnesium, and zinc. Further, the p-type dopant may be carbon.
  • the thickness of the p-type confinement layer 161 is 200 nm to 1500 nm. Further optionally, the thickness of the p-type confinement layer 161 is 600 nm.
  • the p-type window layer 162 is used as a light exit window and for current expansion.
  • the material of the p-type window layer 162 may be AlGaAs, but is not limited thereto.
  • the dopant in the p-type window layer 162 may be at least one of p-type dopants such as carbon, magnesium, zinc, etc. Further, the p-type dopant may be carbon.
  • the thickness of the p-type window layer 162 is 200 nm to 3000 nm. Further optionally, the thickness of the p-type window layer 162 is 1200 nm.
  • the p-type ohmic contact layer 163 is used to form an ohmic contact with another metal electrode.
  • the material of the p-type ohmic contact layer 163 may be GaP, but is not limited thereto.
  • the dopant in the p-type ohmic contact layer 163 may be carbon.
  • the thickness of the p-type ohmic contact layer 163 is 20 nm to 100 nm. Further optionally, the thickness of the p-type ohmic contact layer 163 is 50 nm.
  • the method for manufacturing an infrared light-emitting diode comprises: providing a substrate; sequentially forming an n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer and a p-type semiconductor layer on the substrate, wherein, in a bottom-to-top direction, the Al component of the first waveguide layer changes gradually from low to high, and the Al component of the second waveguide layer changes gradually from low to high.
  • the method for manufacturing an infrared light-emitting diode provided by the present invention improves the stability of the aging reliability test while avoiding the increase of the operating voltage of the infrared light-emitting diode, and improves the luminous efficiency of the infrared light-emitting diode.

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Abstract

Provided in the present invention are an infrared light-emitting diode and a manufacturing method therefor. The infrared light-emitting diode comprises, from bottom to top, a substrate, an n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer and a p-type semiconductor layer, wherein in the direction from bottom to top, the Al component of the first waveguide layer gradually changes from low to high, and the Al component of the second waveguide layer gradually changes from low to high. The technical solution of the present invention improves the stability of an aging reliability test, prevents the operating voltage of an infrared light-emitting diode from rising, and also improves the light-emitting efficiency of the infrared light-emitting diode.

Description

红外发光二极管及其制造方法Infrared light emitting diode and method for manufacturing the same
本申请要求了申请日为2022年09月29日、申请号为202211202297.0、名称为“红外发光二极管及其制造方法”的中国发明申请的优先权，并且通过参照上述中国发明申请的全部说明书、权利要求、附图和摘要的方式，将其引用于本申请。This application claims the priority of a Chinese invention application with an application date of September 29, 2022, application number 202211202297.0, and name “Infrared light emitting diode and method for manufacturing the same”, and is incorporated in this application by reference to the entire specification, claims, drawings and abstract of the above-mentioned Chinese invention application.
技术领域Technical Field
本发明涉及半导体技术领域，具体涉及一种红外发光二极管及其制造方法。The present invention relates to the field of semiconductor technology, and in particular to an infrared light emitting diode and a manufacturing method thereof.
背景技术Background technique
发光二极管(LED，Light Emitting Diode)是一种半导体固体发光器件，具有结构简单、重量轻、无污染等优点，已广泛应用于数码、显示、照明及植物工程等多个领域，被称为环保、节能的绿色照明光源，蕴藏了巨大的商机。Light Emitting Diode (LED) is a semiconductor solid-state light-emitting device with the advantages of simple structure, light weight and no pollution. It has been widely used in many fields such as digital, display, lighting and plant engineering. It is known as an environmentally friendly and energy-saving green lighting source and contains huge business opportunities.
其中，红外发光二极管是一种重要的发光二极管，广泛应用于安防监控、远程遥控、车辆传感和闭路电视等领域。现有的红外发光二极管包括自下向上的衬底、n型半导体层、量子阱层和p型半导体层，其发光效率较低，因此，提高红外发光二极管的发光效率成为一项研究重点。Among them, infrared light-emitting diodes are an important type of light-emitting diodes, which are widely used in security monitoring, remote control, vehicle sensing and closed-circuit television. Existing infrared light-emitting diodes include a substrate, an n-type semiconductor layer, a quantum well layer and a p-type semiconductor layer from bottom to top, and their luminous efficiency is low. Therefore, improving the luminous efficiency of infrared light-emitting diodes has become a research focus.
发明内容Summary of the invention
本发明的目的在于提供一种红外发光二极管及其制造方法，使得在提高老化可靠性测试的稳定性的同时避免红外发光二极管的工作电压升高，且提高了红外发光二极管的发光效率。The object of the present invention is to provide an infrared light emitting diode and a manufacturing method thereof, so as to improve the stability of aging reliability test while avoiding the increase of the working voltage of the infrared light emitting diode and improve the luminous efficiency of the infrared light emitting diode.
为实现上述目的，本发明提供了一种红外发光二极管，包括自下向上的衬底、n型半导体层、第一波导层、量子阱层、第二波导层和p型半导体层，其中，在自下向上的方向上，所述第一波导层的Al组分由低 渐变到高，所述第二波导层的Al组分由低渐变到高。To achieve the above object, the present invention provides an infrared light emitting diode, comprising a substrate, an n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer and a p-type semiconductor layer from bottom to top, wherein, in the direction from bottom to top, the Al component of the first waveguide layer is low The Al component of the second waveguide layer changes gradually from low to high.
可选地，所述第二波导层的厚度小于所述第一波导层的厚度。Optionally, the thickness of the second waveguide layer is smaller than the thickness of the first waveguide layer.
可选地，所述第一波导层的厚度为120nm～420nm，所述第二波导层的厚度为20nm～320nm。Optionally, the thickness of the first waveguide layer is 120 nm to 420 nm, and the thickness of the second waveguide layer is 20 nm to 320 nm.
可选地，所述第一波导层的材质为AlxGa1-xAs，所述第二波导层的材质为AlyGa1-yAs，0<x<1，0<y<1。Optionally, the material of the first waveguide layer is AlxGa1 -xAs , the material of the second waveguide layer is AlyGa1 -yAs , 0<x<1, 0<y<1.
可选地，所述量子阱层的Al组分小于所述第一波导层中的最低Al组分，并且，所述量子阱层的Al组分小于所述第二波导层中的最低Al组分。Optionally, an Al composition of the quantum well layer is smaller than a lowest Al composition in the first waveguide layer, and an Al composition of the quantum well layer is smaller than a lowest Al composition in the second waveguide layer.
可选地，所述n型半导体层包括自下向上的n型缓冲层、n型腐蚀停止层、n型欧姆接触层、n型窗口层和n型限制层。Optionally, the n-type semiconductor layer includes, from bottom to top, an n-type buffer layer, an n-type etching stop layer, an n-type ohmic contact layer, an n-type window layer and an n-type confinement layer.
可选地，所述p型半导体层包括p型限制层、p型窗口层和p型欧姆接触层。Optionally, the p-type semiconductor layer includes a p-type confinement layer, a p-type window layer and a p-type ohmic contact layer.
本发明还提供一种红外发光二极管的制造方法，包括：The present invention also provides a method for manufacturing an infrared light emitting diode, comprising:
提供一衬底；providing a substrate;
依次形成n型半导体层、第一波导层、量子阱层、第二波导层和p型半导体层于所述衬底上，其中，在自下向上的方向上，所述第一波导层的Al组分由低渐变到高，所述第二波导层的Al组分由低渐变到高。An n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer and a p-type semiconductor layer are sequentially formed on the substrate, wherein, in a bottom-to-top direction, the Al component of the first waveguide layer changes gradually from low to high, and the Al component of the second waveguide layer changes gradually from low to high.
可选地，所述第二波导层的厚度小于所述第一波导层的厚度。Optionally, the thickness of the second waveguide layer is smaller than the thickness of the first waveguide layer.
可选地，所述第一波导层的厚度为120nm～420nm，所述第二波导层的厚度为20nm～320nm。Optionally, the thickness of the first waveguide layer is 120 nm to 420 nm, and the thickness of the second waveguide layer is 20 nm to 320 nm.
可选地，所述第一波导层的材质为AlxGa1-xAs，所述第二波导层的材质为AlyGa1-yAs，0<x<1，0<y<1。Optionally, the material of the first waveguide layer is AlxGa1 -xAs , the material of the second waveguide layer is AlyGa1 -yAs , 0<x<1, 0<y<1.
可选地，所述量子阱层的Al组分小于所述第一波导层中的最低Al组分，并且，所述量子阱层的Al组分小于所述第二波导层中的最低Al组分。Optionally, an Al composition of the quantum well layer is smaller than a lowest Al composition in the first waveguide layer, and an Al composition of the quantum well layer is smaller than a lowest Al composition in the second waveguide layer.
可选地，所述n型半导体层包括自下向上的n型缓冲层、n型腐蚀停止层、n型欧姆接触层、n型窗口层和n型限制层。Optionally, the n-type semiconductor layer includes, from bottom to top, an n-type buffer layer, an n-type etching stop layer, an n-type ohmic contact layer, an n-type window layer and an n-type confinement layer.
可选地，所述p型半导体层包括p型限制层、p型窗口层和p型欧 姆接触层。Optionally, the p-type semiconductor layer includes a p-type confinement layer, a p-type window layer and a p-type The contact layer.
与现有技术相比，本发明的技术方案具有以下有益效果：Compared with the prior art, the technical solution of the present invention has the following beneficial effects:
本发明的红外发光二极管及其制造方法，通过在量子阱层的两侧分别形成第一波导层和第二波导层，且在自下向上的方向上，所述第一波导层的Al组分由低渐变到高，所述第二波导层的Al组分由低渐变到高，使得在提高老化可靠性测试的稳定性的同时避免红外发光二极管的工作电压升高，且提高了红外发光二极管的发光效率。The infrared light-emitting diode and the manufacturing method thereof of the present invention form a first waveguide layer and a second waveguide layer on both sides of a quantum well layer respectively, and in a bottom-to-top direction, the Al component of the first waveguide layer gradually changes from low to high, and the Al component of the second waveguide layer gradually changes from low to high, so that the stability of the aging reliability test is improved while avoiding the increase of the operating voltage of the infrared light-emitting diode, and the luminous efficiency of the infrared light-emitting diode is improved.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
图1是本发明一实施例的红外发光二极管的结构示意图；FIG1 is a schematic structural diagram of an infrared light emitting diode according to an embodiment of the present invention;
图2是本发明一实施例的红外发光二极管的制造方法的流程图。FIG. 2 is a flow chart of a method for manufacturing an infrared light emitting diode according to an embodiment of the present invention.
其中，附图1～图2的附图标记说明如下：The reference numerals in Figures 1 and 2 are described as follows:
11-衬底；12-n型半导体层；121-n型缓冲层；122-n型腐蚀停止层；123-n型欧姆接触层；124-n型窗口层；125-n型限制层；13-第一波导层；14-量子阱层；15-第二波导层；16-p型半导体层；161-p型限制层；162-p型窗口层；163-p型欧姆接触层。11-substrate; 12-n-type semiconductor layer; 121-n-type buffer layer; 122-n-type etching stop layer; 123-n-type ohmic contact layer; 124-n-type window layer; 125-n-type confinement layer; 13-first waveguide layer; 14-quantum well layer; 15-second waveguide layer; 16-p-type semiconductor layer; 161-p-type confinement layer; 162-p-type window layer; 163-p-type ohmic contact layer.
具体实施方式Detailed ways
为使本发明的目的、优点和特征更加清楚，以下对本发明提出的红外发光二极管及其制造方法作进一步详细说明。需说明的是，附图均采用非常简化的形式且均使用非精准的比例，仅用以方便、明晰地辅助说明本发明实施例的目的。In order to make the purpose, advantages and features of the present invention more clear, the infrared light emitting diode and the manufacturing method thereof proposed by the present invention are further described in detail below. It should be noted that the drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.
本发明一实施例提供一种红外发光二极管，包括自下向上的衬底、n型半导体层、第一波导层、量子阱层、第二波导层和p型半导体层，其中，在自下向上的方向上，所述第一波导层的Al组分由低渐变到高，所述第二波导层的Al组分由低渐变到高。An embodiment of the present invention provides an infrared light-emitting diode, comprising, from bottom to top, a substrate, an n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer, and a p-type semiconductor layer, wherein, in a direction from bottom to top, an Al component of the first waveguide layer gradually changes from low to high, and an Al component of the second waveguide layer gradually changes from low to high.
下面参阅图1更为详细的介绍本实施例提供的红外发光二极管，图1也是红外发光二极管的纵向剖面图。 The infrared light emitting diode provided in this embodiment is described in more detail below with reference to FIG. 1 , which is also a longitudinal cross-sectional view of the infrared light emitting diode.
所述红外发光二极管包括自下向上的衬底11、n型半导体层12、第一波导层13、量子阱层14、第二波导层15和p型半导体层16，其中，在自下向上的方向上(即沿着生长方向)，所述第一波导层13的Al组分由低渐变到高，所述第二波导层15的Al组分由低渐变到高，即所述量子阱层14的上下两侧形成有Al组分分布不对称的波导层。因此，所述第一波导层13靠近所述n型半导体层12一面的Al组分最低，所述第一波导层13靠近所述量子阱层14一面的Al组分最高；所述第二波导层15靠近所述量子阱层14一面的Al组分最低，所述第二波导层15靠近所述p型半导体层16一面的Al组分最高。The infrared light emitting diode comprises a substrate 11, an n-type semiconductor layer 12, a first waveguide layer 13, a quantum well layer 14, a second waveguide layer 15 and a p-type semiconductor layer 16 from bottom to top, wherein, in the direction from bottom to top (i.e., along the growth direction), the Al component of the first waveguide layer 13 changes gradually from low to high, and the Al component of the second waveguide layer 15 changes gradually from low to high, that is, waveguide layers with asymmetric Al component distribution are formed on the upper and lower sides of the quantum well layer 14. Therefore, the Al component of the first waveguide layer 13 on the side close to the n-type semiconductor layer 12 is the lowest, and the Al component of the first waveguide layer 13 on the side close to the quantum well layer 14 is the highest; the Al component of the second waveguide layer 15 on the side close to the quantum well layer 14 is the lowest, and the Al component of the second waveguide layer 15 on the side close to the p-type semiconductor layer 16 is the highest.
所述第一波导层13的Al组分渐变方式可以为线性，所述第二波导层15的Al组分渐变方式可以为线性。所述第一波导层13和所述第二波导层15的Al组分渐变的范围、斜率等相同。The Al composition gradient of the first waveguide layer 13 may be linear, and the Al composition gradient of the second waveguide layer 15 may be linear. The Al composition gradient range and slope of the first waveguide layer 13 and the second waveguide layer 15 are the same.
其中，通过定义在自下向上的方向上，所述第一波导层13的Al组分由低渐变到高，且所述第二波导层15的Al组分由低渐变到高，使得电子从所述n型半导体层12进入所述量子阱层14中的平均势垒降低，且空穴从所述p型半导体层16进入所述量子阱层14中的平均势垒降低，进而能够有效降低红外发光二极管的工作电压；同时，使得所述量子阱层14内的载流子泄露减少，进而使得能够提高老化可靠性测试的稳定性。Among them, by defining that in the bottom-to-top direction, the Al component of the first waveguide layer 13 gradually changes from low to high, and the Al component of the second waveguide layer 15 gradually changes from low to high, the average potential barrier for electrons to enter the quantum well layer 14 from the n-type semiconductor layer 12 is reduced, and the average potential barrier for holes to enter the quantum well layer 14 from the p-type semiconductor layer 16 is reduced, thereby effectively reducing the operating voltage of the infrared light-emitting diode; at the same time, the carrier leakage in the quantum well layer 14 is reduced, thereby improving the stability of the aging reliability test.
并且，通过定义在自下向上的方向上所述第一波导层13的Al组分由低渐变到高，相当于电子由低势垒到高势垒，使得能够降低电子的漂移速率；通过定义在自下向上的方向上所述第二波导层15的Al组分由低渐变到高，相当于空穴由高势垒到低势垒，使得能够提高空穴的漂移速率；二者相结合使得能够增加电子和空穴在所述量子阱层14内复合发光的几率，进而提高发光效率。Furthermore, by defining the Al component of the first waveguide layer 13 to gradually change from low to high in the bottom-up direction, which is equivalent to electrons changing from a low potential barrier to a high potential barrier, the drift rate of electrons can be reduced; by defining the Al component of the second waveguide layer 15 to gradually change from low to high in the bottom-up direction, which is equivalent to holes changing from a high potential barrier to a low potential barrier, the drift rate of holes can be increased; the combination of the two can increase the probability of electrons and holes recombining to emit light in the quantum well layer 14, thereby improving the luminous efficiency.
所述衬底11的材质可以为硅、锗、碳化硅和砷化镓等半导体材料中的至少一种。 The substrate 11 may be made of at least one of semiconductor materials such as silicon, germanium, silicon carbide and gallium arsenide.
所述第一波导层13的材质为AlxGa1-xAs，所述第二波导层15的材质为AlyGa1-yAs，0<x<1，0<y<1。所述第一波导层13和所述第二波导层15为非掺杂层。The material of the first waveguide layer 13 is AlxGa1 -xAs , and the material of the second waveguide layer 15 is AlyGa1 -yAs , 0<x<1, 0<y<1. The first waveguide layer 13 and the second waveguide layer 15 are non-doped layers.
可选的，所述第二波导层15的厚度小于所述第一波导层13的厚度。其中，由于空穴的有效质量比电子的有效质量大，因此，电子的漂移速度更快，电子在器件内的迁移速度更快，通过定义所述第二波导层15的厚度小于所述第一波导层13的厚度，使得能够延长电子的平均自由程，进而能够增加电子和空穴在所述量子阱层14内复合发光的几率，从而提高发光效率。Optionally, the thickness of the second waveguide layer 15 is less than the thickness of the first waveguide layer 13. Since the effective mass of holes is greater than the effective mass of electrons, the drift speed of electrons is faster, and the migration speed of electrons in the device is faster. By defining the thickness of the second waveguide layer 15 to be less than the thickness of the first waveguide layer 13, the mean free path of electrons can be extended, thereby increasing the probability of electrons and holes recombining and emitting light in the quantum well layer 14, thereby improving the luminous efficiency.
可选的，所述第一波导层13的厚度为120nm～420nm，进一步可选的，所述第一波导层13的厚度为320nm；可选的，所述第二波导层15的厚度为20nm～320nm，进一步可选的，所述第二波导层15的厚度为120nm。Optionally, the thickness of the first waveguide layer 13 is 120nm to 420nm, and further optionally, the thickness of the first waveguide layer 13 is 320nm; optionally, the thickness of the second waveguide layer 15 is 20nm to 320nm, and further optionally, the thickness of the second waveguide layer 15 is 120nm.
可选的，所述量子阱层14的Al组分小于所述第一波导层13中的最低Al组分，并且，所述量子阱层14的Al组分小于所述第二波导层15中的最低Al组分，以避免所述量子阱层14的Al组分过高而导致工作电压过高。Optionally, the Al component of the quantum well layer 14 is smaller than the lowest Al component in the first waveguide layer 13, and the Al component of the quantum well layer 14 is smaller than the lowest Al component in the second waveguide layer 15, so as to avoid the Al component of the quantum well layer 14 being too high and causing the operating voltage to be too high.
所述量子阱层14的材质可以为InGaAs/AlGaAs等。The material of the quantum well layer 14 can be InGaAs/AlGaAs or the like.
可选的，所述量子阱层14为多量子阱结构，即为量子阱和量子垒组成的周期性结构，且周期数可选为6～30对，周期数进一步可选为12。Optionally, the quantum well layer 14 is a multi-quantum well structure, that is, a periodic structure composed of quantum wells and quantum barriers, and the number of periods can be selected to be 6 to 30 pairs, and the number of periods can further be selected to be 12.
可选的，所述量子阱层14的厚度为50nm～2000nm，进一步可选的，所述量子阱层14的厚度为900nm。Optionally, the thickness of the quantum well layer 14 is 50 nm to 2000 nm. Further optionally, the thickness of the quantum well layer 14 is 900 nm.
所述n型半导体层12包括自下向上的n型缓冲层121、n型腐蚀停止层122、n型欧姆接触层123、n型窗口层124和n型限制层125。The n-type semiconductor layer 12 includes, from bottom to top, an n-type buffer layer 121 , an n-type etching stop layer 122 , an n-type ohmic contact layer 123 , an n-type window layer 124 and an n-type confinement layer 125 .
其中，所述n型缓冲层121用于最大限度的消除所述衬底11的表面缺陷对所述红外发光二极管的影响，减少所述红外发光二极管出现缺陷和位错的概率，并为下一步结构的生长提供了平整的界面。The n-type buffer layer 121 is used to eliminate the influence of the surface defects of the substrate 11 on the infrared light-emitting diode to the maximum extent, reduce the probability of defects and dislocations in the infrared light-emitting diode, and provide a smooth interface for the next step of structure growth.
所述n型缓冲层121的材质可选为GaAs，但不限于此。 The material of the n-type buffer layer 121 may be GaAs, but is not limited thereto.
所述n型缓冲层121中的掺杂剂可以为硅、碲等n型掺杂剂中的至少一种。进一步地，所述n型掺杂剂可选为硅。The dopant in the n-type buffer layer 121 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
可选的，所述n型缓冲层121的厚度为100nm～300nm，进一步可选的，所述n型缓冲层121的厚度为150nm。Optionally, the thickness of the n-type buffer layer 121 is 100 nm to 300 nm. Further optionally, the thickness of the n-type buffer layer 121 is 150 nm.
所述n型腐蚀停止层122用于在后续制作器件结构时的刻蚀工艺中作为刻蚀停止层，避免所述n型腐蚀停止层122下方的结构被刻蚀。The n-type etching stop layer 122 is used as an etching stop layer in the subsequent etching process when manufacturing the device structure, so as to prevent the structure below the n-type etching stop layer 122 from being etched.
所述n型腐蚀停止层122的材质可选为GaAs，但不限于此。The material of the n-type etching stop layer 122 may be GaAs, but is not limited thereto.
所述n型腐蚀停止层122中的掺杂剂可以为硅、碲等n型掺杂剂中的至少一种。进一步地，所述n型掺杂剂可选为硅。The dopant in the n-type etch stop layer 122 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
可选的，所述n型腐蚀停止层122的厚度为100nm～300nm，进一步可选的，所述n型腐蚀停止层122的厚度为150nm。Optionally, the thickness of the n-type etching stop layer 122 is 100 nm to 300 nm. Further optionally, the thickness of the n-type etching stop layer 122 is 150 nm.
所述n型欧姆接触层123用于与一金属电极形成欧姆接触。The n-type ohmic contact layer 123 is used to form an ohmic contact with a metal electrode.
所述n型欧姆接触层123的材质可以为InGaAs或GaAs，可选为GaAs，但不限于此。The material of the n-type ohmic contact layer 123 may be InGaAs or GaAs, and may be GaAs, but is not limited thereto.
所述n型欧姆接触层123中的掺杂剂可以为硅、碲等n型掺杂剂中的至少一种。进一步地，所述n型掺杂剂可选为硅。The dopant in the n-type ohmic contact layer 123 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
可选的，所述n型欧姆接触层123的厚度为20nm～150nm，进一步可选的，所述n型欧姆接触层123的厚度为50nm。Optionally, the thickness of the n-type ohmic contact layer 123 is 20 nm to 150 nm. Further optionally, the thickness of the n-type ohmic contact layer 123 is 50 nm.
所述n型窗口层124用于作为出光窗口，且用于电流扩展。The n-type window layer 124 is used as a light exit window and for current expansion.
所述n型窗口层124中的掺杂剂可以为硅、碲等n型掺杂剂中的至少一种。进一步地，所述n型掺杂剂可选为硅，且硅的掺杂浓度可以为0.7E18cm-3～5E18cm-3。The dopant in the n-type window layer 124 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon, and the doping concentration of silicon may be 0.7E18 cm -3 to 5E18 cm -3 .
可选的，所述n型窗口层124的厚度为1.5μm～8μm，进一步可选的，所述n型窗口层124的厚度为6μm。Optionally, the thickness of the n-type window layer 124 is 1.5 μm to 8 μm. Further optionally, the thickness of the n-type window layer 124 is 6 μm.
所述n型限制层125用于提供电子。The n-type confinement layer 125 is used to provide electrons.
所述n型限制层125的材质可选为AlGaAs，但不限于此。The material of the n-type confinement layer 125 may be AlGaAs, but is not limited thereto.
所述n型限制层125中的掺杂剂可以为硅、碲等n型掺杂剂中的至少一种。进一步地，所述n型掺杂剂可选为硅。 The dopant in the n-type confinement layer 125 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
可选的，所述n型限制层125的厚度为200nm～1000nm，进一步可选的，所述n型限制层125的厚度为500nm。Optionally, the thickness of the n-type restriction layer 125 is 200 nm to 1000 nm. Further optionally, the thickness of the n-type restriction layer 125 is 500 nm.
另外，所述p型半导体层16包括p型限制层161、p型窗口层162和p型欧姆接触层163。In addition, the p-type semiconductor layer 16 includes a p-type confinement layer 161 , a p-type window layer 162 and a p-type ohmic contact layer 163 .
其中，所述p型限制层161用于提供空穴。The p-type confinement layer 161 is used to provide holes.
并且，所述n型限制层125与所述p型限制层161的作用包括：首先，用于限制少数载流子溢出所述量子阱层14，以提高复合发光效率；其次，是作为一个重要的窗口，使所述量子阱层14发出的光子极易通过所述n型限制层125和所述p型限制层161，来提高所述红外发光二极管的发光效率。Furthermore, the functions of the n-type confinement layer 125 and the p-type confinement layer 161 include: first, to limit the minority carriers from overflowing the quantum well layer 14 to improve the composite luminescence efficiency; second, to serve as an important window, so that the photons emitted by the quantum well layer 14 can easily pass through the n-type confinement layer 125 and the p-type confinement layer 161 to improve the luminescence efficiency of the infrared light-emitting diode.
所述p型限制层161的材质可选为AlGaAs，但不限于此。The material of the p-type confinement layer 161 may be AlGaAs, but is not limited thereto.
所述p型限制层161中的掺杂剂可以为碳、镁、锌等p型掺杂剂中的至少一种。进一步地，所述p型掺杂剂可选为碳。The dopant in the p-type confinement layer 161 may be at least one of p-type dopants such as carbon, magnesium, and zinc. Further, the p-type dopant may be carbon.
可选的，所述p型限制层161的厚度为200nm～1500nm，进一步可选的，所述p型限制层161的厚度为600nm。Optionally, the thickness of the p-type confinement layer 161 is 200 nm to 1500 nm. Further optionally, the thickness of the p-type confinement layer 161 is 600 nm.
所述p型窗口层162用于作为出光窗口，且用于电流扩展。The p-type window layer 162 is used as a light exit window and for current expansion.
所述p型窗口层162的材质可选为AlGaAs，但不限于此。The material of the p-type window layer 162 may be AlGaAs, but is not limited thereto.
所述p型窗口层162中的掺杂剂可以为碳、镁、锌等p型掺杂剂中的至少一种。进一步地，所述p型掺杂剂可选为碳。The dopant in the p-type window layer 162 may be at least one of p-type dopants such as carbon, magnesium, zinc, etc. Further, the p-type dopant may be carbon.
所述p型窗口层162的厚度为200nm～3000nm，进一步可选的，所述p型窗口层162的厚度为1200nm。The thickness of the p-type window layer 162 is 200 nm to 3000 nm. Further optionally, the thickness of the p-type window layer 162 is 1200 nm.
所述p型欧姆接触层163用于与另一金属电极形成欧姆接触。The p-type ohmic contact layer 163 is used to form an ohmic contact with another metal electrode.
所述p型欧姆接触层163的材质可选为GaP，但不限于此。The material of the p-type ohmic contact layer 163 may be GaP, but is not limited thereto.
所述p型欧姆接触层163中的掺杂剂可选为碳。The dopant in the p-type ohmic contact layer 163 may be carbon.
所述p型欧姆接触层163的厚度为20nm～100nm，进一步可选的，所述p型欧姆接触层163的厚度为50nm。The thickness of the p-type ohmic contact layer 163 is 20 nm to 100 nm. Further optionally, the thickness of the p-type ohmic contact layer 163 is 50 nm.
综上所述，本发明提供的红外发光二极管，包括自下向上的衬底、n型半导体层、第一波导层、量子阱层、第二波导层和p型半导体层，其 中，在自下向上的方向上，所述第一波导层的Al组分由低渐变到高，所述第二波导层的Al组分由低渐变到高。本发明提供的红外发光二极管使得在提高老化可靠性测试的稳定性的同时避免红外发光二极管的工作电压升高，且提高了红外发光二极管的发光效率。In summary, the infrared light emitting diode provided by the present invention comprises, from bottom to top, a substrate, an n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer and a p-type semiconductor layer, wherein In the bottom-up direction, the Al component of the first waveguide layer changes gradually from low to high, and the Al component of the second waveguide layer changes gradually from low to high. The infrared light emitting diode provided by the present invention improves the stability of the aging reliability test while avoiding the increase of the working voltage of the infrared light emitting diode, and improves the luminous efficiency of the infrared light emitting diode.
本发明一实施例提供一种红外发光二极管的制造方法，参阅图2，图2是本发明一实施例的红外发光二极管的制造方法的流程图，所述红外发光二极管的制造方法包括：An embodiment of the present invention provides a method for manufacturing an infrared light emitting diode. Referring to FIG. 2 , FIG. 2 is a flow chart of the method for manufacturing an infrared light emitting diode according to an embodiment of the present invention. The method for manufacturing an infrared light emitting diode includes:
步骤S1，提供一衬底；Step S1, providing a substrate;
步骤S2，依次形成n型半导体层、第一波导层、量子阱层、第二波导层和p型半导体层于所述衬底上，其中，在自下向上的方向上，所述第一波导层的Al组分由低渐变到高，所述第二波导层的Al组分由低渐变到高。Step S2, sequentially forming an n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer and a p-type semiconductor layer on the substrate, wherein, in a bottom-to-top direction, the Al component of the first waveguide layer gradually changes from low to high, and the Al component of the second waveguide layer gradually changes from low to high.
下面参阅图1更为详细的介绍本实施例提供的红外发光二极管的制造方法。The method for manufacturing the infrared light emitting diode provided in this embodiment is described in more detail below with reference to FIG. 1 .
按照步骤S1，提供一衬底11。所述衬底11的材质可以为硅、锗、碳化硅和砷化镓等半导体材料中的至少一种。According to step S1, a substrate 11 is provided. The substrate 11 may be made of at least one of semiconductor materials such as silicon, germanium, silicon carbide and gallium arsenide.
按照步骤S2，依次形成n型半导体层12、第一波导层13、量子阱层14、第二波导层15和p型半导体层16于所述衬底11上，其中，在自下向上的方向上(即沿着生长方向)，所述第一波导层13的Al组分由低渐变到高，所述第二波导层15的Al组分由低渐变到高，即所述量子阱层14的上下两侧形成有Al组分分布不对称的波导层。因此，所述第一波导层13靠近所述n型半导体层12一面的Al组分最低，所述第一波导层13靠近所述量子阱层14一面的Al组分最高；所述第二波导层15靠近所述量子阱层14一面的Al组分最低，所述第二波导层15靠近所述p型半导体层16一面的Al组分最高。According to step S2, an n-type semiconductor layer 12, a first waveguide layer 13, a quantum well layer 14, a second waveguide layer 15 and a p-type semiconductor layer 16 are sequentially formed on the substrate 11, wherein, in the bottom-to-top direction (i.e., along the growth direction), the Al component of the first waveguide layer 13 changes gradually from low to high, and the Al component of the second waveguide layer 15 changes gradually from low to high, that is, waveguide layers with asymmetric Al component distribution are formed on the upper and lower sides of the quantum well layer 14. Therefore, the Al component of the first waveguide layer 13 on the side close to the n-type semiconductor layer 12 is the lowest, and the Al component of the first waveguide layer 13 on the side close to the quantum well layer 14 is the highest; the Al component of the second waveguide layer 15 on the side close to the quantum well layer 14 is the lowest, and the Al component of the second waveguide layer 15 on the side close to the p-type semiconductor layer 16 is the highest.
所述第一波导层13的Al组分渐变方式可以为线性，所述第二波导层15的Al组分渐变方式可以为线性。所述第一波导层13和所述第二波导层15的Al组分渐变的范围、斜率等相同。 The Al composition gradient of the first waveguide layer 13 may be linear, and the Al composition gradient of the second waveguide layer 15 may be linear. The Al composition gradient range and slope of the first waveguide layer 13 and the second waveguide layer 15 are the same.
其中，通过定义在自下向上的方向上，所述第一波导层13的Al组分由低渐变到高，且所述第二波导层15的Al组分由低渐变到高，使得电子从所述n型半导体层12进入所述量子阱层14中的平均势垒降低，且空穴从所述p型半导体层16进入所述量子阱层14中的平均势垒降低，进而能够有效降低红外发光二极管的工作电压；同时，使得所述量子阱层14内的载流子泄露减少，进而使得能够提高老化可靠性测试的稳定性。Among them, by defining that in the bottom-to-top direction, the Al component of the first waveguide layer 13 gradually changes from low to high, and the Al component of the second waveguide layer 15 gradually changes from low to high, the average potential barrier for electrons to enter the quantum well layer 14 from the n-type semiconductor layer 12 is reduced, and the average potential barrier for holes to enter the quantum well layer 14 from the p-type semiconductor layer 16 is reduced, thereby effectively reducing the operating voltage of the infrared light-emitting diode; at the same time, the carrier leakage in the quantum well layer 14 is reduced, thereby improving the stability of the aging reliability test.
并且，通过定义在自下向上的方向上所述第一波导层13的Al组分由低渐变到高，相当于电子由低势垒到高势垒，使得能够降低电子的漂移速率；通过定义在自下向上的方向上所述第二波导层15的Al组分由低渐变到高，相当于空穴由高势垒到低势垒，使得能够提高空穴的漂移速率；二者相结合使得能够增加电子和空穴在所述量子阱层14内复合发光的几率，进而提高发光效率。Furthermore, by defining the Al component of the first waveguide layer 13 to gradually change from low to high in the bottom-up direction, which is equivalent to electrons changing from a low potential barrier to a high potential barrier, the drift rate of electrons can be reduced; by defining the Al component of the second waveguide layer 15 to gradually change from low to high in the bottom-up direction, which is equivalent to holes changing from a high potential barrier to a low potential barrier, the drift rate of holes can be increased; the combination of the two can increase the probability of electrons and holes recombining to emit light in the quantum well layer 14, thereby improving the luminous efficiency.
其中，可以采用金属有机化合物化学气相沉积(MOCVD)工艺、分子束外延(MBE)工艺或超高真空化学气相沉积(UHVCVD)工艺中的任意一种依次形成所述n型半导体层12、所述第一波导层13、所述量子阱层14、所述第二波导层15和所述p型半导体层16于所述衬底11上，并且，可选采用金属有机化合物化学气相沉积工艺。Among them, any one of the metal organic compound chemical vapor deposition (MOCVD) process, molecular beam epitaxy (MBE) process or ultra-high vacuum chemical vapor deposition (UHVCVD) process can be used to sequentially form the n-type semiconductor layer 12, the first waveguide layer 13, the quantum well layer 14, the second waveguide layer 15 and the p-type semiconductor layer 16 on the substrate 11, and the metal organic compound chemical vapor deposition process can be optionally used.
所述第一波导层13的材质为AlxGa1-xAs，所述第二波导层15的材质为AlyGa1-yAs，0<x<1，0<y<1。所述第一波导层13和所述第二波导层15为非掺杂层。The material of the first waveguide layer 13 is AlxGa1 -xAs , and the material of the second waveguide layer 15 is AlyGa1 -yAs , 0<x<1, 0<y<1. The first waveguide layer 13 and the second waveguide layer 15 are non-doped layers.
可选的，所述第二波导层15的厚度小于所述第一波导层13的厚度。其中，由于空穴的有效质量比电子的有效质量大，因此，电子的漂移速度更快，电子在器件内的迁移速度更快，通过定义所述第二波导层15的厚度小于所述第一波导层13的厚度，使得能够延长电子的平均自由程，进而能够增加电子和空穴在所述量子阱层14内复合发光的几率，从而提高发光效率。Optionally, the thickness of the second waveguide layer 15 is less than the thickness of the first waveguide layer 13. Since the effective mass of holes is greater than the effective mass of electrons, the drift speed of electrons is faster, and the migration speed of electrons in the device is faster. By defining the thickness of the second waveguide layer 15 to be less than the thickness of the first waveguide layer 13, the mean free path of electrons can be extended, thereby increasing the probability of electrons and holes recombining and emitting light in the quantum well layer 14, thereby improving the luminous efficiency.
可选的，所述第一波导层13的厚度为120nm～420nm，进一步可选的，所述第一波导层13的厚度为320nm；可选的，所述第二波导层15 的厚度为20nm～320nm，进一步可选的，所述第二波导层15的厚度为120nm。Optionally, the thickness of the first waveguide layer 13 is 120 nm to 420 nm. Further, optionally, the thickness of the first waveguide layer 13 is 320 nm. Optionally, the thickness of the second waveguide layer 15 is The thickness of the second waveguide layer 15 is 20 nm to 320 nm. Further optionally, the thickness of the second waveguide layer 15 is 120 nm.
可选的，所述量子阱层14的Al组分小于所述第一波导层13中的最低Al组分，并且，所述量子阱层14的Al组分小于所述第二波导层15中的最低Al组分，以避免所述量子阱层14的Al组分过高而导致工作电压过高。Optionally, the Al component of the quantum well layer 14 is smaller than the lowest Al component in the first waveguide layer 13, and the Al component of the quantum well layer 14 is smaller than the lowest Al component in the second waveguide layer 15, so as to avoid the Al component of the quantum well layer 14 being too high and causing the operating voltage to be too high.
所述量子阱层14的材质可以为InGaAs/AlGaAs等。The material of the quantum well layer 14 can be InGaAs/AlGaAs or the like.
可选的，所述量子阱层14为多量子阱结构，即为量子阱和量子垒组成的周期性结构，且周期数可选为6～30对，周期数进一步可选为12。Optionally, the quantum well layer 14 is a multi-quantum well structure, that is, a periodic structure composed of quantum wells and quantum barriers, and the number of periods can be selected to be 6 to 30 pairs, and the number of periods can further be selected to be 12.
可选的，所述量子阱层14的厚度为50nm～2000nm，进一步可选的，所述量子阱层14的厚度为900nm。Optionally, the thickness of the quantum well layer 14 is 50 nm to 2000 nm. Further optionally, the thickness of the quantum well layer 14 is 900 nm.
所述n型半导体层12包括自下向上的n型缓冲层121、n型腐蚀停止层122、n型欧姆接触层123、n型窗口层124和n型限制层125。The n-type semiconductor layer 12 includes, from bottom to top, an n-type buffer layer 121 , an n-type etching stop layer 122 , an n-type ohmic contact layer 123 , an n-type window layer 124 and an n-type confinement layer 125 .
其中，所述n型缓冲层121用于最大限度的消除所述衬底11的表面缺陷对所述红外发光二极管的影响，减少所述红外发光二极管出现缺陷和位错的概率，并为下一步结构的生长提供了平整的界面。The n-type buffer layer 121 is used to eliminate the influence of the surface defects of the substrate 11 on the infrared light-emitting diode to the maximum extent, reduce the probability of defects and dislocations in the infrared light-emitting diode, and provide a smooth interface for the next step of structure growth.
所述n型缓冲层121的材质可选为GaAs，但不限于此。The material of the n-type buffer layer 121 may be GaAs, but is not limited thereto.
所述n型缓冲层121中的掺杂剂可以为硅、碲等n型掺杂剂中的至少一种。进一步地，所述n型掺杂剂可选为硅。The dopant in the n-type buffer layer 121 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
可选的，所述n型缓冲层121的厚度为100nm～300nm，进一步可选的，所述n型缓冲层121的厚度为150nm。Optionally, the thickness of the n-type buffer layer 121 is 100 nm to 300 nm. Further optionally, the thickness of the n-type buffer layer 121 is 150 nm.
所述n型腐蚀停止层122用于在后续制作器件结构时的刻蚀工艺中作为刻蚀停止层，避免所述n型腐蚀停止层122下方的结构被刻蚀。The n-type etching stop layer 122 is used as an etching stop layer in the subsequent etching process when manufacturing the device structure, so as to prevent the structure below the n-type etching stop layer 122 from being etched.
所述n型腐蚀停止层122的材质可选为GaAs，但不限于此。The material of the n-type etching stop layer 122 may be GaAs, but is not limited thereto.
所述n型腐蚀停止层122中的掺杂剂可以为硅、碲等n型掺杂剂中的至少一种。进一步地，所述n型掺杂剂可选为硅。The dopant in the n-type etch stop layer 122 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
可选的，所述n型腐蚀停止层122的厚度为100nm～300nm，进一步可选的，所述n型腐蚀停止层122的厚度为150nm。 Optionally, the thickness of the n-type etching stop layer 122 is 100 nm to 300 nm. Further optionally, the thickness of the n-type etching stop layer 122 is 150 nm.
所述n型欧姆接触层123用于与一金属电极形成欧姆接触。The n-type ohmic contact layer 123 is used to form an ohmic contact with a metal electrode.
所述n型欧姆接触层123的材质可以为InGaAs或GaAs，可选为GaAs，但不限于此。The material of the n-type ohmic contact layer 123 may be InGaAs or GaAs, and may be GaAs, but is not limited thereto.
所述n型欧姆接触层123中的掺杂剂可以为硅、碲等n型掺杂剂中的至少一种。进一步地，所述n型掺杂剂可选为硅。The dopant in the n-type ohmic contact layer 123 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
可选的，所述n型欧姆接触层123的厚度为20nm～150nm，进一步可选的，所述n型欧姆接触层123的厚度为50nm。Optionally, the thickness of the n-type ohmic contact layer 123 is 20 nm to 150 nm. Further optionally, the thickness of the n-type ohmic contact layer 123 is 50 nm.
所述n型窗口层124用于作为出光窗口，且用于电流扩展。The n-type window layer 124 is used as a light exit window and for current expansion.
所述n型窗口层124中的掺杂剂可以为硅、碲等n型掺杂剂中的至少一种。进一步地，所述n型掺杂剂可选为硅，且硅的掺杂浓度可以为0.7E18cm-3～5E18cm-3。The dopant in the n-type window layer 124 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon, and the doping concentration of silicon may be 0.7E18 cm -3 to 5E18 cm -3 .
可选的，所述n型窗口层124的厚度为1.5μm～8μm，进一步可选的，所述n型窗口层124的厚度为6μm。Optionally, the thickness of the n-type window layer 124 is 1.5 μm to 8 μm. Further optionally, the thickness of the n-type window layer 124 is 6 μm.
所述n型限制层125用于提供电子。The n-type confinement layer 125 is used to provide electrons.
所述n型限制层125的材质可选为AlGaAs，但不限于此。The material of the n-type confinement layer 125 may be AlGaAs, but is not limited thereto.
所述n型限制层125中的掺杂剂可以为硅、碲等n型掺杂剂中的至少一种。进一步地，所述n型掺杂剂可选为硅。The dopant in the n-type confinement layer 125 may be at least one of n-type dopants such as silicon and tellurium. Further, the n-type dopant may be silicon.
可选的，所述n型限制层125的厚度为200nm～1000nm，进一步可选的，所述n型限制层125的厚度为500nm。Optionally, the thickness of the n-type restriction layer 125 is 200 nm to 1000 nm. Further optionally, the thickness of the n-type restriction layer 125 is 500 nm.
另外，所述p型半导体层16包括p型限制层161、p型窗口层162和p型欧姆接触层163。In addition, the p-type semiconductor layer 16 includes a p-type confinement layer 161 , a p-type window layer 162 and a p-type ohmic contact layer 163 .
其中，所述p型限制层161用于提供空穴。The p-type confinement layer 161 is used to provide holes.
并且，所述n型限制层125与所述p型限制层161的作用包括：首先，用于限制少数载流子溢出所述量子阱层14，以提高复合发光效率；其次，是作为一个重要的窗口，使所述量子阱层14发出的光子极易通过所述n型限制层125和所述p型限制层161，来提高所述红外发光二极管的发光效率。Furthermore, the functions of the n-type confinement layer 125 and the p-type confinement layer 161 include: first, to limit the minority carriers from overflowing the quantum well layer 14 to improve the composite luminescence efficiency; second, to serve as an important window, so that the photons emitted by the quantum well layer 14 can easily pass through the n-type confinement layer 125 and the p-type confinement layer 161 to improve the luminescence efficiency of the infrared light-emitting diode.
所述p型限制层161的材质可选为AlGaAs，但不限于此。 The material of the p-type confinement layer 161 may be AlGaAs, but is not limited thereto.
所述p型限制层161中的掺杂剂可以为碳、镁、锌等p型掺杂剂中的至少一种。进一步地，所述p型掺杂剂可选为碳。The dopant in the p-type confinement layer 161 may be at least one of p-type dopants such as carbon, magnesium, and zinc. Further, the p-type dopant may be carbon.
可选的，所述p型限制层161的厚度为200nm～1500nm，进一步可选的，所述p型限制层161的厚度为600nm。Optionally, the thickness of the p-type confinement layer 161 is 200 nm to 1500 nm. Further optionally, the thickness of the p-type confinement layer 161 is 600 nm.
所述p型窗口层162用于作为出光窗口，且用于电流扩展。The p-type window layer 162 is used as a light exit window and for current expansion.
所述p型窗口层162的材质可选为AlGaAs，但不限于此。The material of the p-type window layer 162 may be AlGaAs, but is not limited thereto.
所述p型窗口层162中的掺杂剂可以为碳、镁、锌等p型掺杂剂中的至少一种。进一步地，所述p型掺杂剂可选为碳。The dopant in the p-type window layer 162 may be at least one of p-type dopants such as carbon, magnesium, zinc, etc. Further, the p-type dopant may be carbon.
所述p型窗口层162的厚度为200nm～3000nm，进一步可选的，所述p型窗口层162的厚度为1200nm。The thickness of the p-type window layer 162 is 200 nm to 3000 nm. Further optionally, the thickness of the p-type window layer 162 is 1200 nm.
所述p型欧姆接触层163用于与另一金属电极形成欧姆接触。The p-type ohmic contact layer 163 is used to form an ohmic contact with another metal electrode.
所述p型欧姆接触层163的材质可选为GaP，但不限于此。The material of the p-type ohmic contact layer 163 may be GaP, but is not limited thereto.
所述p型欧姆接触层163中的掺杂剂可选为碳。The dopant in the p-type ohmic contact layer 163 may be carbon.
所述p型欧姆接触层163的厚度为20nm～100nm，进一步可选的，所述p型欧姆接触层163的厚度为50nm。The thickness of the p-type ohmic contact layer 163 is 20 nm to 100 nm. Further optionally, the thickness of the p-type ohmic contact layer 163 is 50 nm.
综上所述，本发明提供的红外发光二极管的制造方法，包括：提供一衬底；依次形成n型半导体层、第一波导层、量子阱层、第二波导层和p型半导体层于所述衬底上，其中，在自下向上的方向上，所述第一波导层的Al组分由低渐变到高，所述第二波导层的Al组分由低渐变到高。本发明提供的红外发光二极管的制造方法使得在提高老化可靠性测试的稳定性的同时避免红外发光二极管的工作电压升高，且提高了红外发光二极管的发光效率。In summary, the method for manufacturing an infrared light-emitting diode provided by the present invention comprises: providing a substrate; sequentially forming an n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer and a p-type semiconductor layer on the substrate, wherein, in a bottom-to-top direction, the Al component of the first waveguide layer changes gradually from low to high, and the Al component of the second waveguide layer changes gradually from low to high. The method for manufacturing an infrared light-emitting diode provided by the present invention improves the stability of the aging reliability test while avoiding the increase of the operating voltage of the infrared light-emitting diode, and improves the luminous efficiency of the infrared light-emitting diode.
上述描述仅是对本发明较佳实施例的描述，并非对本发明范围的任何限定，本发明领域的普通技术人员根据上述揭示内容做的任何变更、修饰，均属于权利要求书的保护范围。 The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims (14)

  1. 一种红外发光二极管，包括自下向上的衬底、n型半导体层、第一波导层、量子阱层、第二波导层和p型半导体层，其中，在自下向上的方向上，所述第一波导层的Al组分由低渐变到高，所述第二波导层的Al组分由低渐变到高。An infrared light emitting diode comprises, from bottom to top, a substrate, an n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer and a p-type semiconductor layer, wherein, in a direction from bottom to top, the Al component of the first waveguide layer changes gradually from low to high, and the Al component of the second waveguide layer changes gradually from low to high.
  2. 如权利要求1所述的红外发光二极管，其中，所述第二波导层的厚度小于所述第一波导层的厚度。The infrared light emitting diode as claimed in claim 1, wherein the thickness of the second waveguide layer is smaller than the thickness of the first waveguide layer.
  3. 如权利要求2所述的红外发光二极管，其中，所述第一波导层的厚度为120nm～420nm，所述第二波导层的厚度为20nm～320nm。The infrared light emitting diode according to claim 2, wherein the thickness of the first waveguide layer is 120nm to 420nm, and the thickness of the second waveguide layer is 20nm to 320nm.
  4. 如权利要求1所述的红外发光二极管，其中，所述第一波导层的材质为AlxGa1-xAs，所述第二波导层的材质为AlyGa1-yAs，0<x<1，0<y<1。The infrared light emitting diode according to claim 1, wherein the material of the first waveguide layer is AlxGa1 -xAs , the material of the second waveguide layer is AlyGa1 -yAs , 0<x<1, 0<y<1.
  5. 如权利要求1所述的红外发光二极管，其中，所述量子阱层的Al组分小于所述第一波导层中的最低Al组分，并且，所述量子阱层的Al组分小于所述第二波导层中的最低Al组分。The infrared light emitting diode according to claim 1, wherein the Al composition of the quantum well layer is less than the lowest Al composition in the first waveguide layer, and the Al composition of the quantum well layer is less than the lowest Al composition in the second waveguide layer.
  6. 如权利要求1所述的红外发光二极管，其中，所述n型半导体层包括自下向上的n型缓冲层、n型腐蚀停止层、n型欧姆接触层、n型窗口层和n型限制层。The infrared light emitting diode according to claim 1, wherein the n-type semiconductor layer comprises, from bottom to top, an n-type buffer layer, an n-type etching stop layer, an n-type ohmic contact layer, an n-type window layer and an n-type confinement layer.
  7. 如权利要求1所述的红外发光二极管，其中，所述p型半导体层包括p型限制层、p型窗口层和p型欧姆接触层。The infrared light emitting diode according to claim 1, wherein the p-type semiconductor layer comprises a p-type confinement layer, a p-type window layer and a p-type ohmic contact layer.
  8. 一种红外发光二极管的制造方法，包括：A method for manufacturing an infrared light emitting diode, comprising:
    提供一衬底；providing a substrate;
    依次形成n型半导体层、第一波导层、量子阱层、第二波导层和p型半导体层于所述衬底上，其中，在自下向上的方向上，所述第一波导层的Al组分由低渐变到高，所述第二波导层的Al组分由低渐变到高。An n-type semiconductor layer, a first waveguide layer, a quantum well layer, a second waveguide layer and a p-type semiconductor layer are sequentially formed on the substrate, wherein, in a bottom-to-top direction, the Al component of the first waveguide layer changes gradually from low to high, and the Al component of the second waveguide layer changes gradually from low to high.
  9. 如权利要求8所述的红外发光二极管的制造方法，其中，所述第二波导层的厚度小于所述第一波导层的厚度。The method for manufacturing an infrared light emitting diode according to claim 8, wherein the thickness of the second waveguide layer is less than the thickness of the first waveguide layer.
  10. 如权利要求9所述的红外发光二极管的制造方法，其中，所述第一波导层的厚度为120nm～420nm，所述第二波导层的厚度为 20nm～320nm。The method for manufacturing an infrared light-emitting diode according to claim 9, wherein the thickness of the first waveguide layer is 120nm to 420nm, and the thickness of the second waveguide layer is 20nm～320nm.
  11. 如权利要求8所述的红外发光二极管的制造方法，其中，所述第一波导层的材质为AlxGa1-xAs，所述第二波导层的材质为AlyGa1-yAs，0<x<1，0<y<1。The method for manufacturing an infrared light emitting diode according to claim 8, wherein the material of the first waveguide layer is AlxGa1 -xAs , the material of the second waveguide layer is AlyGa1 - yAs, 0<x<1, 0<y<1.
  12. 如权利要求8所述的红外发光二极管的制造方法，其中，所述量子阱层的Al组分小于所述第一波导层中的最低Al组分，并且，所述量子阱层的Al组分小于所述第二波导层中的最低Al组分。The method for manufacturing an infrared light emitting diode according to claim 8, wherein the Al composition of the quantum well layer is less than the lowest Al composition in the first waveguide layer, and the Al composition of the quantum well layer is less than the lowest Al composition in the second waveguide layer.
  13. 如权利要求8所述的红外发光二极管的制造方法，其中，所述n型半导体层包括自下向上的n型缓冲层、n型腐蚀停止层、n型欧姆接触层、n型窗口层和n型限制层。The method for manufacturing an infrared light emitting diode according to claim 8, wherein the n-type semiconductor layer comprises, from bottom to top, an n-type buffer layer, an n-type etching stop layer, an n-type ohmic contact layer, an n-type window layer and an n-type confinement layer.
  14. 如权利要求8所述的红外发光二极管的制造方法，其中，所述p型半导体层包括p型限制层、p型窗口层和p型欧姆接触层。 The method for manufacturing an infrared light emitting diode according to claim 8, wherein the p-type semiconductor layer comprises a p-type confinement layer, a p-type window layer and a p-type ohmic contact layer.
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CN114744485A (en) * 2022-03-18 2022-07-12 太原理工大学 Double-waveguide semiconductor laser structure with Al component and preparation method thereof
CN115548186A (en) * 2022-09-29 2022-12-30 厦门士兰明镓化合物半导体有限公司 Infrared light emitting diode and manufacturing method thereof

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CN107069429A (en) * 2017-07-05 2017-08-18 长春理工大学 A kind of composite waveguide epitaxial structure based on semiconductor laser
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