CN114551670A - Infrared light-emitting diode epitaxial structure and preparation method thereof - Google Patents

Infrared light-emitting diode epitaxial structure and preparation method thereof Download PDF

Info

Publication number
CN114551670A
CN114551670A CN202210157090.XA CN202210157090A CN114551670A CN 114551670 A CN114551670 A CN 114551670A CN 202210157090 A CN202210157090 A CN 202210157090A CN 114551670 A CN114551670 A CN 114551670A
Authority
CN
China
Prior art keywords
layer
type semiconductor
type
emitting diode
structural
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210157090.XA
Other languages
Chinese (zh)
Inventor
廖寅生
李森林
毕京锋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xiamen Silan Advanced Compound Semiconductor Co Ltd
Original Assignee
Xiamen Silan Advanced Compound Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xiamen Silan Advanced Compound Semiconductor Co Ltd filed Critical Xiamen Silan Advanced Compound Semiconductor Co Ltd
Priority to CN202210157090.XA priority Critical patent/CN114551670A/en
Publication of CN114551670A publication Critical patent/CN114551670A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/305Materials of the light emitting region containing only elements of group III and group V of the periodic system characterised by the doping materials
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention provides an infrared light-emitting diode epitaxial structure and a preparation method thereof, wherein the infrared light-emitting diode epitaxial structure sequentially comprises the following components from bottom to top: the semiconductor device comprises a buffer layer, a corrosion stop layer, a first type semiconductor layer, an active layer, a stress release layer and a second type semiconductor layer, wherein the buffer layer, the corrosion stop layer, the first type semiconductor layer, the active layer, the stress release layer and the second type semiconductor layer are positioned on a substrate, and the stress release layer is a structural layer with gradually changed components. According to the invention, the stress release layer with gradually changed components is inserted between the active layer and the second type semiconductor layer, so that the luminous efficiency of the light-emitting diode can be increased, and the voltage can be effectively reduced.

Description

Infrared light-emitting diode epitaxial structure and preparation method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to an infrared light-emitting diode epitaxial structure and a preparation method thereof.
Background
A Light Emitting Diode (LED) is a semiconductor solid-state Light Emitting device, has the advantages of simple structure, Light weight, no pollution, etc., has been widely used in a plurality of fields such as digital code, display, lighting and plant engineering, is called an environment-friendly and energy-saving green lighting source, and has hidden huge business opportunities. Among them, the infrared light emitting diode is an important light emitting diode, and is widely applied to the fields of remote control, vehicle sensing, closed circuit television and the like, and the epitaxial structure of the infrared light emitting diode is a basic structure for preparing the infrared light emitting diode.
In the epitaxial structure of the infrared light emitting diode, the active layer (InGaAs/AlGaAs) has a piezoelectric field due to the difference in lattice constant between InGaAs and AlGaAs, which is generally referred to as quantum confinement Stark effect. The Stark effect has a great negative effect on the light emitting efficiency of the light emitting diode, and in the active layer structure, under the action of an built-in polarization electric field, the energy band of a semiconductor is inclined, electron-hole pairs are spatially separated, the overlapping amount of wave functions is reduced, and the adverse phenomena of light emitting efficiency reduction, red shift of a light emitting peak (absorption edge) and the like are caused.
Therefore, it is necessary to provide an infrared light emitting diode epitaxial structure and a method for fabricating the same to improve the light emitting efficiency of the infrared light emitting diode.
Disclosure of Invention
The invention aims to provide an infrared light-emitting diode epitaxial structure and a preparation method thereof, so as to relieve stress in an active layer and improve the light-emitting efficiency of an infrared light-emitting diode.
In order to achieve the above and other related objects, the present invention provides an infrared light emitting diode epitaxial structure, which sequentially comprises, from bottom to top: the semiconductor device comprises a buffer layer, a corrosion stop layer, a first type semiconductor layer, an active layer, a stress release layer and a second type semiconductor layer, wherein the buffer layer, the corrosion stop layer, the first type semiconductor layer, the active layer, the stress release layer and the second type semiconductor layer are positioned on a substrate, and the stress release layer is a structural layer with gradually changed components.
Optionally, in the infrared light emitting diode epitaxial structure, the stress release layer includes a first structural layer and a second structural layer stacked on the active layer in sequence, a P component in the first structural layer is gradually changed, and an Al component in the second structural layer is gradually changed.
Optionally, in the infrared light emitting diode epitaxial structure, the P component in the first structure layer decreases from the active layer to the second type semiconductor layer; the Al component in the second structure layer decreases from the active layer to the second type semiconductor layer.
Optionally, in the infrared light emitting diode epitaxial structure, an Al component in the first structural layer is fixed, and the Al component in the first structural layer and the Al component in the second structural layer closest to the first structural layer have the same value.
Optionally, in the infrared light emitting diode epitaxial structure, the second type semiconductor layer includes a second type confinement layer, a second type current spreading layer, and a second type ohmic contact layer, which are sequentially stacked.
Optionally, in the infrared light emitting diode epitaxial structure, the Al component of the second type confinement layer is m, and the material of the first structure layer includes AlzGa1-zAs1-yPyWherein y is more than or equal to 0 and less than or equal to 0.15, z is more than or equal to m and less than or equal to m +0.15, and the P component of the first structural layer closest to the active layer ranges from 0.05 to 0.15.
Optionally, in the infrared led epitaxial structure, the second type confinement layer has an Al component of m, and the second structure layer is AlxGa1-xAs, wherein m is less than or equal to x is less than or equal to m + 0.15.
Optionally, in the infrared light emitting diode epitaxial structure, the thickness of the first structure layer is 5nm to 25 nm; the thickness of the second structural layer is 5 nm-25 nm.
Optionally, in the infrared light emitting diode epitaxial structure, the thickness of the stress release layer is 10nm to 50 nm.
Optionally, in the infrared light emitting diode epitaxial structure, the stress release layer is doped with C, and the doping concentration of C is 0.7E18cm-3~5E18cm-3
Optionally, in the infrared light emitting diode epitaxial structure, the first type semiconductor layer includes a first type ohmic contact layer, a first type current spreading layer, and a first type confinement layer, which are sequentially stacked.
Optionally, in the infrared light emitting diode epitaxial structure, the first type semiconductor layer is an n-type semiconductor layer, and the second type semiconductor layer is a p-type semiconductor layer.
In order to achieve the above objects and other related objects, the present invention further provides a method for preparing an infrared light emitting diode epitaxial structure, including the steps of:
providing a substrate;
sequentially growing a buffer layer, a corrosion stop layer, a first type semiconductor layer, an active layer and a stress release layer on the substrate, wherein the stress release layer is a structural layer with gradually changed components;
and growing a second type semiconductor layer on the stress release layer.
Optionally, in the method for manufacturing an infrared light emitting diode epitaxial structure, the stress release layer includes a first structural layer and a second structural layer that are sequentially stacked on the active layer, a P component in the first structural layer is gradually changed, and an Al component in the second structural layer is gradually changed.
Optionally, in the method for preparing an infrared light emitting diode epitaxial structure, a P component in the first structure layer decreases from the active layer to the second type semiconductor layer; the Al component in the second structure layer decreases from the active layer to the second type semiconductor layer.
Optionally, in the method for manufacturing an infrared light emitting diode epitaxial structure, the Al composition in the first structural layer is fixed, and the Al composition in the first structural layer and the Al composition in the second structural layer closest to the first structural layer have the same value.
Optionally, in the preparation method of the infrared light emitting diode epitaxial structure, the second type semiconductor layer includes a second type confinement layer, a second type current spreading layer, and a second type ohmic contact layer, which are sequentially stacked.
Optionally, in the preparation method of the infrared light emitting diode epitaxial structure, an Al component of the second type confinement layer is m, and a material of the first structure layer includes AlzGa1-zAs1-yPyY is more than or equal to 0 and less than or equal to 0.15, z is more than or equal to m and less than or equal to m +0.15, and the P component range of the first structural layer closest to the active layer is 0.05-0.15.
OptionalIn the method for preparing the epitaxial structure of the infrared light emitting diode, the Al component of the second type limiting layer is m, and the second structure layer is AlxGa1-xAs, wherein m is less than or equal to x is less than or equal to m + 0.15.
Optionally, in the preparation method of the infrared light emitting diode epitaxial structure, the thickness of the first structure layer is 5nm to 25 nm; the thickness of the second structural layer is 5 nm-25 nm.
Optionally, in the preparation method of the infrared light emitting diode epitaxial structure, the thickness of the stress release layer is 10nm to 50 nm.
Optionally, in the preparation method of the infrared light emitting diode epitaxial structure, the stress release layer is doped with C, and the doping concentration of C is 0.7E18cm-3~5E18cm-3
Optionally, in the preparation method of the infrared light emitting diode epitaxial structure, the first type semiconductor layer includes a first type ohmic contact layer, a first type current spreading layer, and a first type confinement layer, which are sequentially stacked.
Optionally, in the preparation method of the infrared light emitting diode epitaxial structure, the first type semiconductor layer is an n-type semiconductor layer, and the second type semiconductor layer is a p-type semiconductor layer.
Optionally, in the method for preparing the infrared light emitting diode epitaxial structure, the preparation process of the epitaxial structure is any one of an MOCVD process, a molecular beam epitaxy process, an HVPE process, a plasma-assisted chemical vapor deposition, and a sputtering method.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
according to the invention, the stress release layer with gradually changed components is added between the active layer and the second type semiconductor layer, so that the stress in the active layer can be relieved, the polarization electric field of the active layer can be improved, the surface appearance of the active layer can be improved, and the light emitting efficiency of the infrared light emitting diode can be further improved. Meanwhile, the potential barrier of the stress release layer is gradually reduced, so that the voltage can be effectively reduced.
Drawings
Fig. 1 is a schematic structural diagram of an infrared light emitting diode epitaxial structure according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a stress relieving layer according to an embodiment of the present invention;
fig. 3 is a flowchart of a method for fabricating an infrared light emitting diode epitaxial structure according to an embodiment of the invention;
in FIGS. 1 to 3, the first and second embodiments of the present invention,
10-substrate, 201-buffer layer, 202-corrosion stop layer, 203-first type ohmic contact layer, 204-first type current spreading layer, 205-first type confinement layer, 206-active layer, 207-stress release layer, 2071-first structure layer, 2072-second structure layer, 208-second type confinement layer, 209-second type current spreading layer, 210-second type ohmic contact layer.
Detailed Description
The following describes the infrared light emitting diode epitaxial structure and the preparation method thereof in detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Before describing embodiments according to the present invention, the following description will be made in advance. First, In the present specification, the term "GaInP" means that the chemical composition ratio of the sum of Ga and In to P is 1: 1, an arbitrary compound In which the ratio of Ga to In is not fixed. When only labeled "AlGaAs", it means that the chemical composition ratio of the sum of Al and Ga to As is 1: 1, an arbitrary compound having an unfixed ratio of Al to Ga. In addition, the term "InGaAs" alone means that the chemical composition ratio of the sum of Ga and In to As is 1: 1, an arbitrary compound In which the ratio of Ga to In is not fixed.
Fig. 1 is a schematic structural diagram of an infrared light emitting diode epitaxial structure according to this embodiment. Referring to fig. 1, the infrared light emitting diode epitaxial structure sequentially includes from bottom to top: a buffer layer 201, an etch stop layer 202, a first type semiconductor layer, an active layer 206, a stress relief layer 207, and a second type semiconductor layer on the substrate 10.
The stress release layer 207 includes a first structural layer 2071 and a second structural layer 2072 sequentially stacked on the active layer 206, the P (phosphorus) composition in the first structural layer 2071 is graded, and the Al (aluminum) composition in the second structural layer 2072 is graded. The P composition in the first structure layer 2071 decreases along the growth direction of the first structure layer 2071 (direction from the active layer 206 to the second type semiconductor layer); the Al composition in the second structure 2072 layer decreases along the growth direction of the second structure layer 2072 (direction from the active layer 206 to the second type semiconductor layer).
The first type semiconductor layer sequentially comprises from bottom to top: a first-type ohmic contact layer 203, a first-type current spreading layer 204, and a first-type confinement layer 205.
The second type semiconductor layer sequentially comprises from bottom to top: a second type confinement layer 208, a second type current spreading layer 209, and a second type ohmic contact layer 210.
The polarities of the first type semiconductor layer and the second type semiconductor layer are opposite, for example, if the first type semiconductor layer is an n-type semiconductor layer, the corresponding second type semiconductor layer is a p-type semiconductor layer. Correspondingly, the n-type semiconductor layer comprises an n-type ohmic contact layer, an n-type current expansion layer and an n-type limiting layer which are sequentially stacked. The p-type semiconductor layer comprises a p-type limiting layer, a p-type current spreading layer and a p-type ohmic contact layer which are sequentially stacked.
The preparation method of the infrared light-emitting diode epitaxial structure specifically comprises the following steps:
step S1: providing a substrate 10;
step S2: sequentially growing a buffer layer 201, an etching stop layer 202, a first type semiconductor layer, an active layer 206 and a stress release layer 207 on the substrate 10, wherein the stress release layer 207 is a structural layer with gradually changed components;
step S3: a second type semiconductor layer is grown on the stress relief layer 207.
The preparation process of the infrared light-emitting diode epitaxial structure is any one of a metal organic compound chemical vapor deposition (MOCVD) process, a Molecular Beam Epitaxy (MBE) process or ultra-high vacuum chemical vapor deposition (UHVCVD), and is preferably an MOCVD process. The following specific examples will illustrate the MOCVD process.
In step S1, the substrate 10 is preferably a GaAs (gallium arsenide) substrate, but may be a Si (silicon) substrate, but is not limited thereto.
In step S2, a buffer layer 201 is grown on the substrate 10. The buffer layer 201 eliminates the influence of the surface defects of the substrate 10 on the epitaxial structure of the infrared light emitting diode to the maximum extent, reduces the defects and dislocation of the epitaxial structure of the infrared light emitting diode, and provides a flat interface for the next growth. The material of the buffer layer 201 is preferably GaAs, but is not limited thereto. The buffer layer 201 is doped with a first dopant, such as an n-type dopant, and may be at least one of silicon (Si) and tellurium (Te), but is not limited thereto. Further, the first dopant is preferably Si.
The buffer layer 201 is preferably grown in a thickness of 100nm to 300nm in a reaction chamber of an MOCVD growth furnace. Preferably, a buffer layer 201 of 150nm thickness is grown.
After growing the buffer layer 201, an etch stop layer 202 is grown on the buffer layer 201. The material of the etch stop layer 202 is preferably GaInP, but is not limited thereto. The etch stop layer 202 is doped with a first dopant, such as an n-type dopant, and may be at least one of silicon (Si) and tellurium (Te), but is not limited thereto. Further, the first dopant is preferably Si.
The growth of the corrosion stop layer 202 is preferably to grow the corrosion stop layer 202 with the thickness of 100nm to 300nm in a reaction chamber of an MOCVD growth furnace. Preferably, the etch stop layer 202 is grown to a thickness of 150 nm.
After growing the etch stop layer 202, a first type semiconductor layer is grown on the etch stop layer 202. The first-type semiconductor layer sequentially comprises a first-type ohmic contact layer 203, a first-type current spreading layer 204 and a first-type limiting layer 205 from bottom to top.
Accordingly, after the etch stop layer 202 is grown, the first type ohmic contact layer 203 is grown on the etch stop layer 202. The material of the first type ohmic contact layer 203 may be InGaAs or GaAs, preferably GaAs, but is not limited thereto. The first-type ohmic contact layer 201 is doped with a first-type dopant, for example, an n-type dopant, which may be one of silicon (Si) and tellurium (Te), but is not limited thereto. Further, the first dopant is preferably Si.
The first type ohmic contact layer 203 is preferably grown in a reaction chamber of an MOCVD growth furnace to form the first type ohmic contact layer 203 with a thickness of 20nm to 150 nm. Preferably, the first-type ohmic contact layer 203 is grown to a thickness of 50 nm.
After the first-type ohmic contact layer 203 is grown, the first-type current spreading layer 204 is grown on the first-type ohmic contact layer 203. The material of the first-type current spreading layer 204 may be AlGaAs, but is not limited thereto. The first-type current spreading layer 204 is doped with a first-type dopant, such as an n-type dopant, and may be at least one of silicon (Si) and tellurium (Te), but is not limited thereto. Further, the first dopant is preferably Si, and the doping concentration of Si is preferably 0.7E18cm-3~5E18cm-3
The growth of the first-type current spreading layer 204 is preferably to grow the first-type current spreading layer 204 with the thickness of 1.5-8 μm in a reaction chamber of an MOCVD growth furnace. Preferably, the first-type current spreading layer 204 is grown to a thickness of 6 μm.
After growing the first-type current spreading layer 204, the first-type confinement layer 205 is grown on the first-type current spreading layer 204. The material of the first-type confinement layer 205 is preferably AlGaAs, but is not limited thereto. The first-type confinement layer 205 is doped with a first-type dopant, such as an n-type dopant, and may be at least one of silicon (Si) and tellurium (Te), but is not limited thereto. Further, the first dopant is preferably Si.
The growth of the first type confinement layer 205 is preferably performed by growing the first type confinement layer 205 having a thickness of 200nm to 1000nm in a reaction chamber of an MOCVD growth furnace. Preferably, a 500nm thick confinement layer of the first type 205 is grown.
After growing the first type confinement layer 205, an active layer 206 is grown on the first type confinement layer 205. The material of the active layer 206 is preferably InGaAs/AlGaAs, and is preferably a multiple quantum well structure, that is, the active layer 206 is preferably a periodic structure composed of quantum wells and quantum barriers, and the period number of the active layer 206 is preferably 6 to 30, that is, the active layer 206 preferably has 6 to 30 pairs of quantum wells and quantum barriers. The thickness of the active layer 206 is 50nm to 2000nm, preferably 900 nm.
The growth of the active layer 206 is preferably 6 to 30 periods of the active layer 206 grown in a reaction chamber of an MOCVD growth furnace. For example, 12 cycles of the active layer 206 are grown.
After the active layer 206 is grown, a stress relief layer 207 is grown on the active layer 206. The stress release layer 207 includes a first structural layer 2071 and a second structural layer 2072, which are sequentially stacked.
The second confinement layer 208 has an Al component of m, and the first structure layer 2071 is preferably made of AlzGa1- zAs1-yPyWherein y is 0. ltoreq. y.ltoreq.0.15, m.ltoreq.z is m +0.15, and the initial value of the P component in the first structural layer 2071 (i.e., the P component at the position where the first structural layer 2071 is closest to the active layer 206) is preferably in the range of 0.05 to 0.15. The P component in the first structure layer 2071 decreases along the growth direction of the first structure layer 2071 (direction from the active layer 206 to the second type semiconductor layer), for example, the P component in the first structure layer 2071 is gradually changed from 0.05 to 0 along the growth direction of the first structure layer 2071. While the Al composition in the first structural layer 2071 is fixed, the Al composition in the first structural layer 2071 is preferably the same as the initial value of the Al composition in the second structural layer 2072 (i.e., the value of the Al composition at the second structural layer 2072 closest to the first structural layer 2071). For example, the Al composition in the first structural layer 2071 is 0.55, and the Al composition in the second structural layer 2072 is gradually changed from 0.55 to 0.45 in the growth direction of the second structural layer 2072. The thickness of the first structure layer 2071 is preferably 5nm to 25 nm.
The quantum well In the active layer 206 is InGaAs, has a larger lattice (relative to GaAs) and is rich In, and the AlGaAsP of the first structure layer 2071 is rich In Ga, so as to relieve the stress of the active layer 206, improve the polarization electric field of the active layer 206, achieve the purpose of effectively modulating the stress of the active layer 206, improve the surface morphology of the active layer 206, and improve the light emitting efficiency of the light emitting diode.
The thickness of the second structure layer 2072 is preferably 5nm to 25 nm. The material of the second structure layer 2072 is preferably AlxGa1-xAs, wherein m is less than or equal to x is less than or equal to m + 0.15. The Al composition in the second structure layer 2072 decreases along the growth direction of the second structure layer 2072 (from the active layer 206 to the second type semiconductor layer), for example, the Al composition in the second structure layer 2072 is gradually changed from z to m along the growth direction of the second structure layer 2072. For another example, the Al composition in the second structure layer 2072 is gradually changed from z to m +0.1 along the growth direction of the second structure layer 2072. Since the initial value of the Al composition in the second structural layer 2072 is preferably the same as the Al composition in the first structural layer 2071, the Al composition in the second structural layer 2072 is preferably gradually decreased from z along the growth direction of the second structural layer 2072, so that the potential barrier from the stress relief layer 207 (specifically, the second structural layer 2072) to the second type confining layer 208 is gradually decreased, and the voltage can be effectively decreased.
The P composition in the first structure layer 2071 is gradually changed in one or any combination of linear and non-linear gradually changing manners. The gradual change manner of the Al composition in the second structure layer 2072 includes one or any combination of linear gradual change manner and nonlinear gradual change manner. Specifically, the linear grading includes linearly grading from a high P composition to no P composition in a direction from the first structural layer 2071 to the second structural layer 2072; linearly graded from a high Al composition to a low Al composition in a direction from the second structure layer 2072 to the second type confinement layer 208. The non-linear gradual change is, for example, gradual change and then smooth, or a gradual change and then smooth and then gradual change, or a parabolic gradual change, etc. In a preferred embodiment, the P composition of the first structural layer 2071 is linearly graded down to 0, and the Al composition of the second structural layer 2072 is linearly graded down from 0.55 to 0.45 in a direction from the second structural layer 2072 toward the second type confining layer 208.
The stress relieving layer 207 is doped with a second dopant, for example, a p-type dopant, and may be at least one of carbon (C), magnesium (Mg), and zinc (Zn), but is not limited thereto. Further, the second-type dopant is preferably C, and the doping concentration of C is 0.7E18cm-3~5E18cm-3. The growth of the stress release layer 207 is preferably to grow the stress release layer 207 with a thickness of 10nm to 50nm in a reaction chamber of an MOCVD growth furnace. Preferably, a 20nm thickness stress relief layer 207 is grown, comprising a 10nm first structural layer 2071 and a 10nm second structural layer 2072.
A second type confinement layer 208 is grown over the stress relief layer 207. The second-type confinement layer 208 is used to provide holes. The first-type confinement layer 205 and the second-type confinement layer 208 mainly have two functions as confinement layers, on one hand, minority carriers are limited not to overflow the active layer 206, and the recombination light-emitting efficiency is improved; on the other hand, as an important window, photons emitted from the active layer 206 can easily pass through the confinement layer, so as to improve the light emitting efficiency of the light emitting diode.
The second type confinement layer 208 is preferably made of AlmGa1-mAs, but not limited thereto. The Al component of the second type limiting layer 208 is m, wherein m is more than or equal to 0.85 and more than or equal to 0, and the specific m value is set according to the process requirement. The second-type confinement layer 208 is doped with a second dopant, such as a p-type dopant, and may be at least one of carbon (C), magnesium (Mg), and zinc (Zn), but is not limited thereto. Further, the second dopant is preferably Mg.
The second type confinement layer 208 is preferably grown in a reaction chamber of the MOCVD growth furnace to have a thickness of 200nm to 1500 nm. Preferably, a second-type confinement layer 208 is grown to a thickness of 600 nm.
After growing the second-type confinement layer 208, a second-type current spreading layer 209 is grown on the second-type confinement layer 208. The material of the second-type current spreading layer 209 is preferably AlGaAs, but is not limited thereto. The second-type current spreading layer 209 is doped with a second dopant, such as a p-type dopant, and may be at least one of magnesium (Mg) and zinc (Zn), but is not limited thereto. Further, the second dopant is preferably Mg.
The second type current spreading layer 209 is preferably grown in a reaction chamber of the MOCVD growth furnace to have a thickness of 200nm to 3000 nm. Preferably, the second-type current spreading layer 209 is grown to a thickness of 1200 nm.
After growing the second type current spreading layer 209, the second type ohmic contact layer 210 is grown on the second type current spreading layer 209. The second-type ohmic contact layer 210 is used to form an ohmic contact with a metal electrode. The material of the second type ohmic contact layer 210 is preferably GaP, but is not limited thereto. The second-type ohmic contact layer 210 may be doped with carbon (C).
The second type ohmic contact layer 210 is preferably grown in a reaction chamber of the MOCVD growth furnace to form the second type ohmic contact layer 210 with a thickness of 20nm to 100 nm. Preferably, the second-type ohmic contact layer 210 is grown to a thickness of 50 nm.
According to the invention, the stress release layer is additionally arranged between the active layer and the second type semiconductor layer, so that the stress in the active layer can be relieved, the polarization electric field of the active layer can be improved, the surface appearance of the active layer can be improved, and the light emitting efficiency of the light emitting diode can be further improved. Meanwhile, the potential barrier of the stress release layer is gradually reduced, so that the voltage can be effectively reduced.
In addition, it is to be understood that while the present invention has been described in conjunction with the preferred embodiments thereof, it is not intended to limit the invention to those embodiments. It will be apparent to those skilled in the art from this disclosure that many changes and modifications can be made, or equivalents modified, in the embodiments of the invention without departing from the scope of the invention. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention are still within the scope of the protection of the technical solution of the present invention, unless the contents of the technical solution of the present invention are departed.
It is to be further understood that the present invention is not limited to the particular methodology, compounds, materials, manufacturing techniques, uses, and applications described herein, as such may, of course, vary. It is also to be understood that the terminology used herein is for the purpose of describing particular embodiments only, and is not intended to limit the scope of the present invention. It must be noted that, as used herein and in the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to "a step" means a reference to one or more steps and may include sub-steps. All conjunctions used should be understood in the broadest sense. Thus, the word "or" should be understood to have the definition of a logical "or" rather than the definition of a logical "exclusive or" unless the context clearly dictates otherwise. Structures described herein are to be understood as also referring to functional equivalents of such structures. Language that can be construed as approximate should be understood as such unless the context clearly dictates otherwise.

Claims (25)

1. The utility model provides an infrared emitting diode epitaxial structure which characterized in that, infrared emitting diode epitaxial structure includes from supreme down in proper order: the semiconductor device comprises a buffer layer, a corrosion stop layer, a first type semiconductor layer, an active layer, a stress release layer and a second type semiconductor layer, wherein the buffer layer, the corrosion stop layer, the first type semiconductor layer, the active layer, the stress release layer and the second type semiconductor layer are positioned on a substrate, and the stress release layer is a structural layer with gradually changed components.
2. The infrared light emitting diode epitaxial structure of claim 1, wherein the stress relief layer comprises a first structural layer and a second structural layer sequentially stacked on the active layer, the P composition in the first structural layer being graded, and the Al composition in the second structural layer being graded.
3. The ir-led epitaxial structure of claim 2, wherein the P-component in the first structural layer decreases from the active layer towards the second type semiconductor layer; the Al component in the second structure layer decreases from the active layer to the second type semiconductor layer.
4. The infrared light emitting diode epitaxial structure of claim 2 wherein the Al composition in the first structural layer is constant and the Al composition in the first structural layer has the same value as the Al composition of the second structural layer closest to the first structural layer.
5. The infrared light emitting diode epitaxial structure of claim 2, wherein the second type semiconductor layer comprises a second type confinement layer, a second type current spreading layer and a second type ohmic contact layer, which are sequentially stacked.
6. The IR LED epitaxial structure of claim 5, wherein the second type confinement layer has an Al composition of m, and the first structural layer comprises AlzGa1-zAs1-yPyWherein y is more than or equal to 0 and less than or equal to 0.15, z is more than or equal to m and less than or equal to m +0.15, and the P component of the first structural layer closest to the active layer ranges from 0.05 to 0.15.
7. The IR LED epitaxial structure of claim 5, wherein the second type confinement layer has an Al composition of m and the second structure layer is AlxGa1-xAs, wherein m is less than or equal to x is less than or equal to m + 0.15.
8. The infrared light emitting diode epitaxial structure of claim 2 wherein the first structural layer has a thickness of 5nm to 25 nm; the thickness of the second structural layer is 5 nm-25 nm.
9. The infrared light emitting diode epitaxial structure of claim 1, wherein the stress relief layer has a thickness of 10nm to 50 nm.
10. The infrared light emitting diode epitaxial structure of claim 1, wherein the stress relief layer is doped with C, and the doping concentration of C is 0.7E18cm-3~5E18cm-3
11. The infrared light emitting diode epitaxial structure of claim 1, wherein the first-type semiconductor layer comprises a first-type ohmic contact layer, a first-type current spreading layer, and a first-type confinement layer, which are sequentially stacked.
12. The infrared light emitting diode epitaxial structure of claim 1, wherein the first type semiconductor layer is an n-type semiconductor layer and the second type semiconductor layer is a p-type semiconductor layer.
13. A preparation method of an infrared light emitting diode epitaxial structure is characterized by comprising the following steps:
providing a substrate;
sequentially growing a buffer layer, a corrosion stop layer, a first type semiconductor layer, an active layer and a stress release layer on the substrate, wherein the stress release layer is a structural layer with gradually changed components;
and growing a second type semiconductor layer on the stress release layer.
14. The method according to claim 13, wherein the stress release layer comprises a first structural layer and a second structural layer sequentially stacked on the active layer, the P composition of the first structural layer is graded, and the Al composition of the second structural layer is graded.
15. The method according to claim 14, wherein the P component in the first structure layer decreases from the active layer toward the second type semiconductor layer; the Al component in the second structure layer decreases from the active layer to the second type semiconductor layer.
16. The method according to claim 14, wherein the Al composition in the first structural layer is constant, and the Al composition in the first structural layer has the same value as the Al composition in the second structural layer closest to the first structural layer.
17. The method according to claim 14, wherein the second type semiconductor layer comprises a second type confinement layer, a second type current spreading layer, and a second type ohmic contact layer stacked in sequence.
18. The method of claim 17, wherein the second type confinement layer has an Al composition of m, and the first structural layer comprises AlzGa1-zAs1-yPyWherein y is more than or equal to 0 and less than or equal to 0.15, z is more than or equal to m and less than or equal to m +0.15, and the P component of the first structural layer closest to the active layer ranges from 0.05 to 0.15.
19. The method of claim 17, wherein the second type confinement layer has an Al composition of m, and the second structure layer is AlxGa1-xAs, wherein m is less than or equal to x is less than or equal to m + 0.15.
20. The method for preparing an epitaxial structure for an infrared light emitting diode according to claim 14, wherein the thickness of the first structural layer is 5nm to 25 nm; the thickness of the second structural layer is 5 nm-25 nm.
21. The method for preparing an epitaxial structure for an infrared light emitting diode according to claim 13, wherein the thickness of the stress release layer is 10nm to 50 nm.
22. The method of claim 13, wherein the stress relief layer is doped with C at a concentration of 0.7E18cm-3~5E18cm-3
23. The method for preparing an epitaxial structure for an infrared light emitting diode according to claim 13, wherein the first-type semiconductor layer comprises a first-type ohmic contact layer, a first-type current spreading layer, and a first-type confinement layer, which are sequentially stacked.
24. The method according to claim 13, wherein the first type semiconductor layer is an n-type semiconductor layer and the second type semiconductor layer is a p-type semiconductor layer.
25. The method for preparing an epitaxial structure for an infrared light emitting diode according to claim 13, wherein the preparation process of the epitaxial structure is any one of an MOCVD process, a molecular beam epitaxy process, an HVPE process, a plasma-assisted chemical vapor deposition, and a sputtering method.
CN202210157090.XA 2022-02-21 2022-02-21 Infrared light-emitting diode epitaxial structure and preparation method thereof Pending CN114551670A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210157090.XA CN114551670A (en) 2022-02-21 2022-02-21 Infrared light-emitting diode epitaxial structure and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210157090.XA CN114551670A (en) 2022-02-21 2022-02-21 Infrared light-emitting diode epitaxial structure and preparation method thereof

Publications (1)

Publication Number Publication Date
CN114551670A true CN114551670A (en) 2022-05-27

Family

ID=81675626

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210157090.XA Pending CN114551670A (en) 2022-02-21 2022-02-21 Infrared light-emitting diode epitaxial structure and preparation method thereof

Country Status (1)

Country Link
CN (1) CN114551670A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115498083A (en) * 2022-10-24 2022-12-20 淮安澳洋顺昌光电技术有限公司 Light emitting diode epitaxial structure and light emitting diode

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115498083A (en) * 2022-10-24 2022-12-20 淮安澳洋顺昌光电技术有限公司 Light emitting diode epitaxial structure and light emitting diode

Similar Documents

Publication Publication Date Title
CN113823716B (en) LED epitaxial structure and preparation method thereof
CN102916096B (en) Epitaxial structure for improving luminous efficiency and preparation method thereof
CN105206726A (en) LED structure and growth method thereof
US9543468B2 (en) High bandgap III-V alloys for high efficiency optoelectronics
CN114122212B (en) LED epitaxial structure and preparation method thereof
CN114447165B (en) LED epitaxial structure and preparation method thereof
CN114551670A (en) Infrared light-emitting diode epitaxial structure and preparation method thereof
Jani et al. Design, growth, fabrication and characterization of high-band gap InGaN/GaN solar cells
CN114023857B (en) LED epitaxial structure and preparation method thereof
WO2024066412A1 (en) Infrared light-emitting diode and manufacturing method therefor
CN111786259A (en) Gallium nitride-based laser epitaxial structure for improving carrier injection efficiency and preparation method thereof
CN113594315B (en) LED chip epitaxial structure and preparation method thereof
CN113410345B (en) Ultraviolet semiconductor light emitting element
CN114551671A (en) LED epitaxial structure and preparation method thereof
CN114464709A (en) LED epitaxial wafer, epitaxial growth method and LED chip
CN104241458A (en) Method for preparing gallium-nitride-based LED epitaxial wafer with variable barrier width
CN113224213B (en) Infrared light-emitting diode epitaxial wafer and preparation method thereof
CN113394319B (en) Deep ultraviolet light-emitting element and preparation method thereof
CN114551672A (en) Infrared LED epitaxial structure and preparation method thereof
CN116759499A (en) Tunneling junction and preparation method thereof, double-junction infrared LED epitaxial structure and preparation method thereof
CN117012867A (en) Red light LED epitaxial structure and preparation method thereof
CN115692561A (en) Tunneling junction and preparation method thereof, multi-junction infrared LED epitaxial structure and preparation method thereof
CN116314501A (en) LED epitaxial structure and preparation method thereof
CN117059716A (en) Infrared LED epitaxial structure and preparation method thereof
KR20220107307A (en) Epitaxial structure and manufacturing method thereof, LED device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination