WO2024060393A1 - 一种碳化硅器件电流源型逆变器桥臂串扰尖峰预测方法 - Google Patents

一种碳化硅器件电流源型逆变器桥臂串扰尖峰预测方法 Download PDF

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WO2024060393A1
WO2024060393A1 PCT/CN2022/133851 CN2022133851W WO2024060393A1 WO 2024060393 A1 WO2024060393 A1 WO 2024060393A1 CN 2022133851 W CN2022133851 W CN 2022133851W WO 2024060393 A1 WO2024060393 A1 WO 2024060393A1
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crosstalk
current source
voltage
switch tube
bridge arm
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PCT/CN2022/133851
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French (fr)
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王政
沈寅禛
徐阳
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东南大学
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/327—Testing of circuit interrupters, switches or circuit-breakers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • the invention relates to the fields of power electronics technology and electrical engineering technology, and specifically relates to a method for predicting bridge arm crosstalk peaks of a silicon carbide device current source inverter.
  • the bridge arm crosstalk caused by di/dt in current source inverters is usually caused by common source inductance.
  • some discrete devices are currently packaged with Kelvin pins, the source of the device itself Removing parasitic inductance from the driving loop can effectively suppress crosstalk caused by di/dt.
  • due to factors such as PCB wiring and discrete device pins it is difficult to reduce the common source inductance to zero. Therefore, the research on bridge arm crosstalk of current source inverter is still of great significance.
  • the purpose of the present invention is to provide a method for predicting the bridge arm crosstalk peak of a silicon carbide device current source inverter.
  • the current source type inverter is analyzed.
  • the crosstalk caused by di/dt and common source inductance coupling is analyzed, and a prediction model of crosstalk voltage spike is established through theoretical calculation, which expands the optimization design criteria of current source inverter drive circuit based on wide bandgap devices.
  • a method for predicting crosstalk peaks on the bridge arm of a silicon carbide device current source type inverter which is characterized in that the prediction method includes a current source type double pulse test circuit, calculation of crosstalk voltage spikes, and the influence of each parameter on the size of the crosstalk spikes. analyze.
  • the capacitor is a three-phase current source type inverter.
  • the filter capacitor on the AC side is equivalent and forms a bridge arm of the current source inverter, which is used to simulate the switching process of the three-phase current source inverter.
  • the maximum value of the crosstalk voltage peak of the bridge arm of the current source inverter is calculated as:
  • t is the time for the current to rise and fall during the switching process, which is expressed as:
  • I 0 is the load current flowing through the device
  • C gs is the gate-source junction capacitance of the device affected by crosstalk
  • g m is the transconductance of the device
  • V th is the device threshold voltage
  • V miller is the Miller plateau voltage
  • V cc is the driving positive voltage
  • R g and L g are respectively the current source type double pulse test equivalent circuit in the crosstalk generation stage.
  • C iss is the input capacitance of the device affected by crosstalk, which is the sum of the gate-drain junction capacitance and the gate-source junction capacitance.
  • L s is the internal common source inductance of the device affected by crosstalk and the PCB. The sum of stray inductances.
  • gate resistance common source inductance and series diode junction capacitance are the main influencing factors.
  • the gate resistance of the third switching tube the smaller the device.
  • the current source type double-pulse test circuit fully considers the parasitic and stray parameters in the device and circuit, including the junction capacitance, stray inductance and driving loop stray inductance of the device, where R g1 and R g3 are the driving The sum of the resistance and the internal resistance of the device gate, L d1 and L d3 are the sum of the device drain parasitic inductance and the printed circuit board (PCB) stray inductance, L s1 and L s3 are the device common source parasitic inductance and PCB stray inductance Sum. .
  • PCB printed circuit board
  • the third switch tube of the current source type double pulse test circuit is in a long-on state, and is divided into two modes according to the on-off state of the first switch tube; when the first switch tube is turned off, the current source passes through the third switch tube.
  • the three switching tubes charge the capacitor, simulating the active vector of the three-phase current source inverter; when the first switching tube is turned on, the current switches from the third switching tube to the first switching tube. In this process, the voltage across the capacitor does not change. change, simulating the zero vector of a three-phase current source inverter.
  • the long-on state of the third switch emulates the overlapping conduction time during switch switching of a three-phase current source inverter to avoid open-circuit faults.
  • crosstalk conduction direction of the bridge arm of the current source type inverter is transverse, while the crosstalk conduction direction of the voltage source type inverter bridge arm is longitudinal.
  • the bridge arm crosstalk of the current source type inverter is subjected to forward crosstalk when the complementary device is turned on and reverse crosstalk when the complementary device is turned off, which is the same as the bridge arm caused by di/dt in the voltage source inverter.
  • Crosstalk is in the opposite direction.
  • the arm crosstalk of the current source inverter only occurs when the gate-source voltage of the device is the forward conduction voltage, while the arm crosstalk of the voltage source inverter only occurs during the negative voltage turn-off phase.
  • the di/dt caused by the switching of the first switch tube is used as the excitation.
  • the MOSFET of the third switch tube is equivalent to a resistor, and its value is the on-resistance value of the device.
  • the gate-drain junction capacitance value is the value when the drain-source voltage is close to 0, and there is no need to consider the impact of nonlinear changes with the device operating conditions.
  • the prediction method of the present invention adopts a current source type double-pulse test circuit structure analysis that considers parasitic parameters such as wide bandgap device junction capacitance, parasitic inductance and power, drive loop stray inductance, etc., simplifying the prediction of three-phase current source inverters. topology, and realizes the simulation of active vector and zero vector switching, which is conducive to the analysis of switching trajectories when wide bandgap devices are used in current source inverters, and simplifies the optimization design of the inverter. Reduces analysis complexity;
  • the prediction method of the present invention forms a duality with the bridge arm crosstalk of traditional voltage source inverters, filling the gap in research on crosstalk suppression of different types of two-level power inverters;
  • the prediction method of the present invention accurately predicts the crosstalk peak voltage based on device and loop parasitic parameters, which is conducive to analyzing the impact of various parameters of the drive loop and power loop on the crosstalk voltage spike through the prediction model;
  • the prediction method of the present invention has guiding significance for the optimal design of the current source inverter drive circuit and the selection of device parameters.
  • Figure 1 is a topology diagram of a three-phase current source inverter
  • Figure 2 is the topology diagram of the current source double pulse test circuit
  • Figure 3 is the theoretical working waveform diagram of the current source type double pulse test
  • Figure 4 is the voltage waveform of the first switch MOSFET when the first switch is turned on
  • Figure 5 shows the current waveforms flowing through the first and third switching tubes when the first switching tube is turned on
  • Figure 6 is the Schottky diode voltage waveform of the third switch when the first switch is turned on
  • Figure 7 shows the gate-source voltage waveforms of the first and third switch MOSFETs when the first switch is turned on
  • Figure 8 is the voltage waveform of the first switch MOSFET when the first switch is turned off
  • Figure 9 shows the current waveforms flowing through the first and third switching tubes when the first switching tube is turned off
  • Figure 10 is the Schottky diode voltage waveform of the third switch when the first switch is turned off
  • Figure 11 shows the gate-source voltage waveforms of the first and third switch MOSFETs when the first switch is turned off
  • Figure 12 is the equivalent circuit diagram of the current source type double-pulse test when crosstalk occurs
  • FIG13 is a comparison diagram of the crosstalk voltage spike prediction model and the simulation waveform
  • Figure 14 is a diagram showing the relationship between the bridge arm crosstalk peak value and the gate resistance of the current source inverter when the first switch is turned off;
  • Figure 15 is a diagram showing the relationship between the bridge arm crosstalk peak value and the gate resistance of the current source inverter when the first switch tube is turned on;
  • Figure 16 is a diagram showing the relationship between the current source inverter bridge arm crosstalk peak value and the common source inductance and drive loop stray inductance when the first switch is turned off;
  • Figure 17 is a diagram showing the relationship between the crosstalk peak value of the bridge arm of the current source inverter and the common source inductance and drive loop stray inductance when the first switch tube is turned on;
  • FIG18 is an experimentally extracted waveform and a theoretically predicted waveform of a crosstalk voltage spike of the third switch tube when the gate resistance of the first switch tube is 20 ⁇ and the gate resistance is 5 ⁇ ;
  • Figure 19 is the experimentally extracted waveform and theoretically predicted waveform of the crosstalk voltage peak of the third switching tube under a gate resistance of 10 ⁇ when the first switch tube is turned on with a gate resistance of 20 ⁇ ;
  • Figure 20 is the experimentally extracted waveform and theoretically predicted waveform of the crosstalk voltage peak of the third switching tube under the gate resistance of 20 ⁇ when the first switch tube is turned on with a gate resistance of 20 ⁇ ;
  • Figure 21 shows the experimentally extracted waveform and theoretically predicted waveform of the crosstalk voltage peak of the third switching tube when the gate resistance of the first switch is 20 ⁇ and the gate resistance is 30 ⁇ .
  • a method for predicting the crosstalk peak of the bridge arm of a silicon carbide device current source inverter includes a current source double pulse test circuit, calculation of the crosstalk voltage peak, and analysis of the influence of each parameter on the size of the crosstalk peak.
  • the prediction method is based on the current source type double pulse test as the analysis object.
  • the switch switching bridge arm is first extracted in the three-phase current source inverter.
  • the typical modulation strategy of the three-phase current source inverter there are 6 active vectors and 3 zero vectors.
  • the corresponding sector in the three-phase current source inverter is the fifth sector.
  • S4 is in a long-on state, so it can be equivalent to a section of wire, thereby extracting S1 and S3 as a bridge arm of the three-phase current source inverter, thereby obtaining the circuit topology of the current source type double pulse test, as shown in Figure 2, where capacitor C is the equivalent of the AC side filter capacitor in the three-phase current source inverter.
  • the current source double pulse test circuit in Figure 2 fully considers the parasitic and stray parameters in the device and circuit, including the junction capacitance, stray inductance and drive loop stray inductance of the device, where Rg1 and Rg3 are the sum of the drive resistance and the internal resistance of the device gate, Ld1 and Ld3 are the sum of the device drain parasitic inductance and the PCB stray inductance, and Ls1 and Ls3 are the sum of the device common source parasitic inductance and the PCB stray inductance.
  • the simulation model of the mechanism analysis method of current source inverter bridge arm crosstalk uses SiC MOSFET as CREE C3M0045120D and SiC Schottky diode as onsemi FFSH5065A.
  • SiC MOSFET as CREE C3M0045120D
  • SiC Schottky diode as onsemi FFSH5065A.
  • the current flowing through the third switch tube drops from I dc to zero, and the common source inductance coupling with the third switch tube MOSFET causes an induced voltage with negative upper and positive lower, which charges the gate-source junction capacitance forward, causing forward crosstalk.
  • I dc passes zero, the voltage across the Schottky diode of the third switch tube drops suddenly from the conduction voltage drop to -V c , and the voltage change is coupled with the junction capacitance of the diode to generate a reverse recovery current. Since the MOSFET and the diode are connected in series, the peak value of the forward crosstalk voltage will be further increased.
  • the current flowing through the third switch tube increases from zero to I dc , and couples with the common source inductance of the third switch tube MOSFET to form an induced voltage with positive voltage at the top and negative voltage at the bottom, thereby charging the gate-source junction capacitance and causing reverse crosstalk.
  • the equivalent circuit of the current source type double-pulse test during the crosstalk generation stage uses di/dt as the main crosstalk excitation source and considers S 3 long-pass, which is equivalent to an on-resistance. From this, the crosstalk voltage spike is analyzed In order to further simplify the calculation steps, the on-resistance is approximately equal to 0, and its equivalent circuit is shown in Figure 12.
  • t is the time for the current to rise and fall during the switching process. It is obtained by solving the differential equation of the driving circuit when the driving voltage rises from the threshold voltage to the Miller plateau voltage. It can be expressed as,
  • I 0 is the load current flowing through the device
  • C gs is the gate-source junction capacitance of the device affected by crosstalk
  • g m is the transconductance of the device
  • V th is the device threshold voltage
  • V miller is the Miller plateau voltage
  • V cc is the driving positive voltage
  • R g and L g are respectively the current source type double pulse test equivalent circuit in the crosstalk generation stage.
  • C iss is the input capacitance of the device affected by crosstalk, which is the sum of the gate-drain junction capacitance and the gate-source junction capacitance.
  • L s is the internal common source inductance of the device affected by crosstalk and the PCB. The sum of stray inductances.
  • the rising and falling time of the current during the switching process is corrected based on the traditional formula.
  • I 0 g m (V gs -V th ) approximate expression.
  • g m k 1 ⁇ x(V gs -V th ) x-1 . If substituted back into the approximate expression, it will cause a deviation of x times, Causes inaccuracy in theoretical calculation.
  • the calculation correction of Miller platform voltage is
  • Figure 13 shows the predicted waveform and simulation using the above theoretical model when the current source is 50A, the driving positive voltage is 18V, and the gate resistance is 10 ⁇ . Comparing the waveforms, it can be seen from the figure that the predicted waveform can accurately follow the simulated waveform.
  • Figure 16 and Figure 17 show the relationship between the current source inverter bridge arm crosstalk peak value and the common source inductance and drive loop stray inductance when the first switch is turned off and on. From the figure, it can be seen that the drive loop The stray inductance of the current source type inverter has a small impact on the bridge arm crosstalk phenomenon, and among all factors, the common source parasitic inductance has a dominant influence on the bridge arm crosstalk phenomenon of the current source type inverter.
  • Figures 18 to 21 respectively show the experimental waveforms and theoretically predicted waveforms of the crosstalk voltage peak experienced by the third switch under different gate resistances when the first switch is turned on.
  • the driving positive voltage was 15.5V.
  • the load current of the switch tube is 40A
  • the gate resistance of the first switch tube is set to 20 ⁇
  • the driving resistance of the third switch tube is set to 5 ⁇ , 10 ⁇ , 20 ⁇ , and 30 ⁇ respectively.
  • Both the experimental waveform and the theoretically predicted waveform reflect that the crosstalk voltage spike increases with the gate.
  • the resistance decreases with the increase, which is consistent with the change trend analyzed in Figure 14.
  • the error between the crosstalk peak in the experimental waveform and the predicted peak mainly comes from the measurement error and the discrete data calculation error when eliminating the induced voltage on the common source stray inductance L s .

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Abstract

本发明公开一种碳化硅器件电流源型逆变器桥臂串扰尖峰预测方法，其特征在于，所述预测方法包括电流源型双脉冲测试电路、串扰电压尖峰的计算以及各参数对串扰尖峰大小影响程度的分析。本发明预测方法通过分析碳化硅(SiC)MOSFET和与之串联的SiC肖特基二极管高频开关动作造成的MOSFET栅源极之间的横向传导扰动机理，基于电流源型双脉冲测试等效电路和串扰诱发机理，推导碳化硅器件电流源型逆变器桥臂串扰电压尖峰的预测模型，准确预测了串扰尖峰电压的最大值，有利于通过预测模型分析驱动回路、功率回路各参数对串扰电压尖峰的影响。

Description

一种碳化硅器件电流源型逆变器桥臂串扰尖峰预测方法 技术领域
本发明涉及电力电子技术和电工技术领域，具体是一种碳化硅器件电流源型逆变器桥臂串扰尖峰预测方法。
背景技术
近年来，电动汽车、风力发电、多电飞机等领域快速发展，对功率变换器的运行效率、功率密度和可靠性提出了更高的要求。同时，以SiC、GaN为代表的宽禁带器件制造技术不断成熟，宽禁带器件相比于硅基器件有着更快的开关速度、更低的导通损耗、更高的开关频率等优势，这些优势的不断体现也使得功率变换器进一步向着更高的运行效率更高的功率密度发展成为可能。
然而，宽禁带器件直接应用于常见的两电平电压源型逆变器中时，器件过快的开关速度将导致dv/dt和di/dt过大，引起电磁干扰和桥臂串扰等问题。针对电磁干扰问题，目前在功率电路中主要是围绕滤波器的设计、软开关技术的应用、电路拓扑的优化等技术手段来缓解；而针对桥臂串扰问题，目前主要围绕宽禁带器件驱动电路的优化设计来抑制串扰。
但是，逆变器目前在很多场合运行空间受限，常见的电压源型逆变器还存在所使用的电解电容体积大且工作温度受限等问题，因此，近几年一些国内外学者将目光转移到电流源型逆变器上来。相比电压源型逆变器，电流源型逆变器具有抗短路能力强、电流可靠性高、交流侧输出波形对电机友好等优势，但也存在直流侧电感体积大、直流侧dv/dt较大等问题。
此外，根据电压源型逆变器和电流源型逆变器的对偶性可知，电压源型逆变器输出为电压斩波，因此逆变器中器件开关的dv/dt会和互补器件栅漏结电容耦合造成桥臂串扰问题，而电流源型逆变器输出为电流斩波，因此其di/dt 将成为影响桥臂串扰的主要因素。但是，目前针对桥臂串扰的研究仍仅局限于电压源型逆变器中，针对电流源型逆变器桥臂串扰的相关问题还未进行研究。
另一方面，电流源型逆变器中由di/dt引起的桥臂串扰通常是和共源电感导致的，尽管目前一部分分立器件的封装带有开尔文管脚，使得器件自身所带的源极寄生电感从驱动回路剔除，能够有效抑制由di/dt造成的串扰，但是，由于PCB布线和分立器件引脚等因素存在，共源电感很难降至为零。因此，针对电流源型逆变器桥臂串扰的研究仍有重大意义。
发明内容
本发明的目的在于提供一种碳化硅器件电流源型逆变器桥臂串扰尖峰预测方法，通过电流源型逆变器桥臂串扰的机理分析和尖峰预测方法，分析了电流源型逆变器中由di/dt和共源电感耦合造成的串扰，并通过理论计算建立了串扰电压尖峰的预测模型，扩充了基于宽禁带器件的电流源型逆变器驱动电路的优化设计准则。
本发明的目的可以通过以下技术方案实现：
一种碳化硅器件电流源型逆变器桥臂串扰尖峰预测方法，其特征在于，所述预测方法包括电流源型双脉冲测试电路、串扰电压尖峰的计算以及各参数对串扰尖峰大小影响程度的分析。
所述的电流源型双脉冲测试电路中，由MOSFET和肖特基二极管串联组成的两组反向电压阻断合成器件分别接于电容两端；所述电容为三相电流源型逆变器交流侧的滤波电容等效而来，构成电流源型逆变器的一个桥臂，用于模拟三相电流源型逆变器的开关切换过程。
所述的串扰电压尖峰的计算中，计算电流源型逆变器桥臂串扰电压尖峰的最大值为：
Figure PCTCN2022133851-appb-000001
其中，t为电流在开关切换过程中上升、下降的时间，表示为：
Figure PCTCN2022133851-appb-000002
Figure PCTCN2022133851-appb-000003
Figure PCTCN2022133851-appb-000004
I 0为流过器件的负载电流，C gs为受串扰影响器件栅源极结电容，g m为器件跨导，x为器件转移特性曲线i ch＝k 1(V gs-V th) x+k 2中的拟合系数，V th为器件阈值电压，V miller为米勒平台电压，V cc为驱动正压，R g、L g分别为串扰发生阶段电流源型双脉冲测试等效电路中受干扰器件栅极电阻和驱动回路杂散电感，C iss为受串扰影响器件的输入电容，是栅漏结电容和栅源结电容之和，L s为受串扰影响器件内部共源电感和PCB杂散电感之和。
所述串扰电压尖峰影响因素中，栅极电阻、共源电感和串联二极管结电容大小为主要影响因素，具体表现为，在di/dt一定时，第三开关管的栅极电阻越小，器件承受的串扰尖峰越大；共源电感越大，第三开关管承受的串扰尖峰越大；串联二极管结电容越大，第一开关管的开通导致第三开关管中二极管两端电压出现突变，与结电容耦合产生的反向恢复电流越大，使得流过第三开关管的电流反向过零数值越大，二极管的反向恢复过程越明显，从而导致第三开关管承受的正向串扰尖峰越大。
进一步的，所述电流源型双脉冲测试电路充分考虑器件和电路中的寄生、杂散参数，包括器件的结电容、杂散电感和驱动回路杂散电感，其中，R g1、R g3 为驱动电阻和器件栅极内部电阻之和，L d1、L d3为器件漏极寄生电感和印刷电路板(PCB)杂散电感之和，L s1、L s3为器件共源寄生电感和PCB杂散电感之和。。
进一步的，所述电流源型双脉冲测试电路的第三开关管为长通状态，根据第一开关管的通断分为两种模态；当第一开关管关断时，电流源通过第三开关管给电容充电，模拟了三相电流源型逆变器的有源矢量；当第一开关管开通时，电流从第三开关管切换至第一开关管，此过程电容两端电压不变，模拟了三相电流源型逆变器的零矢量。
第三开关管的长通状态模拟了三相电流源型逆变器开关切换时的交叠导通时间，以避免开路故障。
进一步的，所述电流源型逆变器桥臂串扰传导方向为横向，而电压源型逆变器桥臂串扰传导方向为纵向。
所述电流源型逆变器桥臂串扰在互补器件导通时承受正向串扰，在互补器件关断时承受反向串扰，与电压源型逆变器中同样由di/dt引起的桥臂串扰方向相反。
所述电流源型逆变器桥臂串扰仅发生在器件栅源极电压为正向导通电压阶段，而电压源型逆变器桥臂串扰仅发生在负压关断阶段。
进一步的，所述以第一开关管切换导致的di/dt作为激励，考虑到器件的交叠导通，将第三开关管的MOSFET等效为一个电阻，其值为器件的导通电阻值，栅漏结电容值为漏源电压接近为0时的值，无需考虑随器件工况非线性变化带来的影响。
进一步的，所述米勒平台电压的计算在传统计算方法的基础上校正为
Figure PCTCN2022133851-appb-000005
本发明的有益效果：
1、本发明预测方法采用考虑宽禁带器件结电容、寄生电感和功率、驱动回路杂散电感等寄生参数的电流源型双脉冲测试电路结构分析，简化了三相电流 源型逆变器的拓扑结构，且实现了有源矢量和零矢量切换的模拟，有利于对宽禁带器件用于电流源型逆变器中时的开关轨迹进行分析，在实现逆变器的优化设计的同时简化了分析复杂度；
2、本发明预测方法与传统电压源型逆变器的桥臂串扰形成对偶，弥补了不同类型两电平功率逆变器串扰抑制研究方面的空缺；
3、本发明预测方法基于器件和回路寄生参数准确预测串扰尖峰电压，有利于通过预测模型分析驱动回路、功率回路各参数对串扰电压尖峰的影响；
4、本发明预测方法对电流源型逆变器驱动电路的优化设计和器件参数选择具有指导意义。
附图说明
下面结合附图对本发明作进一步的说明。
图1是三相电流源型逆变器拓扑图；
图2是电流源型双脉冲测试电路拓扑图；
图3是电流源型双脉冲测试的理论工作波形图；
图4是第一开关管开通时，第一开关管MOSFET电压波形；
图5是第一开关管开通时，第一和第三开关管流过电流波形；
图6是第一开关管开通时，第三开关管肖特基二极管电压波形；
图7是第一开关管开通时，第一和第三开关管MOSFET栅源电压波形；
图8是第一开关管关断时，第一开关管MOSFET电压波形；
图9是第一开关管关断时，第一和第三开关管流过电流波形；
图10是第一开关管关断时，第三开关管肖特基二极管电压波形；
图11是第一开关管关断时，第一和第三开关管MOSFET栅源电压波形；
图12是电流源型双脉冲测试在串扰发生时的等效电路图；
图13是串扰电压尖峰预测模型与仿真波形的比较图；
图14是第一开关管关断时，电流源型逆变器桥臂串扰尖峰极值与栅极电阻的关系图；
图15是第一开关管开通时，电流源型逆变器桥臂串扰尖峰极值与栅极电阻的关系图；
图16是第一开关管关断时，电流源型逆变器桥臂串扰尖峰极值与共源电感、驱动回路杂散电感的关系图；
图17是第一开关管开通时，电流源型逆变器桥臂串扰尖峰极值与共源电感、驱动回路杂散电感的关系图；
图18是第一开关管栅极电阻为20Ω开通时，第三开关管在栅极电阻5Ω下串扰电压尖峰的实验提取波形和理论预测波形；
图19是第一开关管栅极电阻为20Ω开通时，第三开关管在栅极电阻10Ω下串扰电压尖峰的实验提取波形和理论预测波形；
图20是第一开关管栅极电阻为20Ω开通时，第三开关管在栅极电阻20Ω下串扰电压尖峰的实验提取波形和理论预测波形；
图21是第一开关管栅极电阻为20Ω开通时，第三开关管在栅极电阻30Ω下串扰电压尖峰的实验提取波形和理论预测波形。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。
一种碳化硅器件电流源型逆变器桥臂串扰尖峰预测方法，预测方法包括电流 源型双脉冲测试电路、串扰电压尖峰的计算以及各参数对串扰尖峰大小影响程度的分析。
预测方法基于电流源型双脉冲测试为分析对象，如图1所示，先在三相电流源型逆变器中提取开关切换桥臂。根据三相电流源型逆变器的典型调制策略，其有源矢量有6个，零矢量有3个。遵循开关横向切换的特点，以第一开关管S 1和第三开关管S 3为例，若S 1和S 3来回切换，则在三相电流源型逆变器中对应的是第五扇区，此时，S 4处于长通状态，故可将其等效为一段导线，由此提取S 1和S 3作为三相电流源型逆变器的一个桥臂，从而得到电流源型双脉冲测试的电路拓扑，如图2所示，其中电容C为三相电流源型逆变器中交流侧滤波电容的等效。图2中的电流源型双脉冲测试电路充分考虑器件和电路中的寄生、杂散参数，包括器件的结电容、杂散电感和驱动回路杂散电感，其中，R g1、R g3为驱动电阻和器件栅极内部电阻之和，L d1、L d3为器件漏极寄生电感和PCB杂散电感之和，L s1、L s3为器件共源寄生电感和PCB杂散电感之和。
电流源型双脉冲测试电路：如图3所示电流源型双脉冲测试的理论工作波形，电流源型逆变器中设置开关重叠时间，以避免开路故障，且S 1导通时S 3的导通与否不会对整个双脉冲测试造成影响，因此出于简化目的将S 3长通。由此可分成五个阶段进行分析：
(1)t 0--t 0：此阶段S 1和S 3均处于导通状态，电流I dc直接流过第一开关管，电容C两端电压为0；
(2)t 0-t 1：此阶段S 1关断，电流I dc流过第三开关管给电容C充电，电容两端电压可通过安秒平衡原理计算，即公式(1)
Figure PCTCN2022133851-appb-000006
(3)t 1-t 2：此阶段S 1开通，电流I dc从第三开关管切换至第一开关管，电容C两端电压维持不变，模拟了三相电流源型逆变器从有源矢量切换至零矢量，由于S 3长通，故肖特基二极管D 3两端电压由导通压降突变至-V c；
(4)t 2-t 3：此阶段S 1关断，电流I dc流过第三开关管，继续给电容C充电，模拟了三相电流源型逆变器从零矢量切换至有源矢量；
(5)t 3-t 4：此阶段S 1再一次开通，电容C停止充电。
在上述基础上，电流源型逆变器桥臂串扰的机理分析方法的仿真模型中采用SiC MOSFET为CREE C3M0045120D、SiC肖特基二极管为onsemi FFSH5065A，第一开关管开通时，第一开关管MOSFET电压波形、第一和第三开关管流过电流波形、第三开关管肖特基二极管电压波形、第一和第三开关管MOSFET栅源电压波形分别如图4-图7所示。
在此过程中，流过第三开关管的电流由I dc降至零，与第三开关管MOSFET的共源电感耦合造成上负下正的感应电压，使栅源极结电容正向充电，造成正向串扰。I dc过零后，第三开关管的肖特基二极管两端电压由导通压降突降至-V c，电压的变化与二极管的结电容耦合，产生反向恢复电流，由于MOSFET和二极管串联，因此会进一步提升正向串扰电压的峰值。当第一开关管关断时，第一开关管MOSFET电压波形、第一和第三开关管流过电流波形、第三开关管肖特基二极管电压波形、第一和第三开关管MOSFET栅源电压波形分别如图8-图11所示。
在此过程中，流过第三开关管的电流由零上升至I dc，与第三开关管MOSFET的共源电感耦合造成上正下负的感应电压，从而给栅源极结电容方向充电，造成反向串扰。
串扰发生阶段电流源型双脉冲测试的等效电路，通过将di/dt作为主要的串扰激励源，考虑到S 3长通，等效为一导通电阻，由此，对串扰电压尖峰进行分析计算，为了进一步简化计算步骤，故将导通电阻近似等于0，其等效电路图12所示。
在此基础上，对等效电路进行复频域分析，di/dt的作用可简单视为一个斜坡函数，即此阶段I dc(t)＝kt，其中k＝di/dt,结电容C iss在串扰发生阶段带电，两端电压初始状态可近似认为驱动正压V cc，因此根据Laplace变换，MOSFET栅源极在串扰发生阶段的电压变化量ΔV gs(s)可表示为：
Figure PCTCN2022133851-appb-000007
式中，t为电流在开关切换过程中上升、下降的时间，通过求解驱动电压由阈值电压上升至米勒平台电压过程中驱动回路的微分方程获得，可表示为，
Figure PCTCN2022133851-appb-000008
Figure PCTCN2022133851-appb-000009
Figure PCTCN2022133851-appb-000010
I 0为流过器件的负载电流，C gs为受串扰影响器件栅源极结电容，g m为器件跨导，x为器件转移特性曲线i ch＝k 1(V gs-V th) x+k 2中的拟合系数，V th为器件阈值电压，V miller为米勒平台电压，V cc为驱动正压，R g、L g分别为串扰发生阶段电流源型双脉冲测试等效电路中受干扰器件栅极电阻和驱动回路杂散电感，C iss为受串扰影响器件的输入电容，是栅漏结电容和栅源结电容之和，L s为受串扰影响器件内部共源电感和PCB杂散电感之和。
电流在开关切换过程中上升、下降的时间是在传统公式的基础上校正而来，通常把SiC MOSFET电流上升和下降看成是线性变化的过程，用I 0＝g m(V gs-V th)近似表示，根据器件转移特性的拟合表达式求导可知，g m＝k 1·x(V gs-V th) x-1，若回代入近似表达式，会造成一个x倍的偏差，造成理论计算的不准确，同理，米勒平台电压的计算校正为
Figure PCTCN2022133851-appb-000011
MOSFET栅源极在串扰发生阶段的电压变化量的时域表达式ΔV gs(t)为：
Figure PCTCN2022133851-appb-000012
根据上述推导，预测系统采用CREE C3M0045120D的相关参数进行理论的分析计算，图13为采用上述理论模型，在电流源为50A、驱动正压为18V、栅极电阻均为10Ω时的预测波形和仿真波形的比较，从图中可知预测波形能够很准确地跟随仿真波形。
如图14和图15所示为第一开关管关断、开通时，电流源型逆变器桥臂串扰尖峰极值与栅极电阻的关系图。从图中可知，栅极电阻越大，正反向串扰尖峰的值越小；但是栅极电阻的增大将使得器件开关过程变慢，从而导致开关损耗增大，因此在驱动电阻值的选取过程中需做出一个权衡。
图16、图17所示为第一开关管关断、开通时，电流源型逆变器桥臂串扰尖峰极值与共源电感、驱动回路杂散电感的关系图，从图中可知，驱动回路的杂散电感对电流源型逆变器桥臂串扰现象的影响较小，而所有因素中共源寄生电感对电流源型逆变器桥臂串扰现象的影响占据主导。
图18至图21分别为第一开关管导通时，第三开关管在不同栅极电阻下受到的串扰电压尖峰的实验波形和理论预测波形，实验中驱动正压为15.5V，开关切换时开关管负载电流为40A，第一开关管栅极电阻设置为20Ω，第三开关管驱动电阻分别设置为5Ω、10Ω、20Ω、30Ω，实验波形和理论预测波形均反映出串扰电压尖峰随栅极电阻的增大而减小，与图14所分析的变化趋势相符。实验波形中的串扰尖峰与预测尖峰的误差主要来自测量误差以及剔除共源杂散电感L s上感应电压时的离散数据计算误差。
在di/dt一定时，第三开关管的栅极电阻越小，器件承受的串扰尖峰越大； 共源电感越大，第三开关管承受的串扰尖峰越大；串联二极管结电容越大，第一开关管的开通导致第三开关管中二极管两端电压出现突变，与结电容耦合产生的反向恢复电流越大，使得流过第三开关管的电流反向过零数值越大，二极管的反向恢复过程越明显，从而导致第三开关管承受的正向串扰尖峰越大。
在本说明书的描述中，参考术语“一个实施例”、“示例”、“具体示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本发明的至少一个实施例或示例中。在本说明书中，对上述术语的示意性表述不一定指的是相同的实施例或示例。而且，描述的具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
以上显示和描述了本发明的基本原理、主要特征和本发明的优点。本行业的技术人员应该了解，本发明不受上述实施例的限制，上述实施例和说明书中描述的只是说明本发明的原理，在不脱离本发明精神和范围的前提下，本发明还会有各种变化和改进，这些变化和改进都落入要求保护的本发明范围内。

Claims (6)

  1. 一种碳化硅器件电流源型逆变器桥臂串扰尖峰预测方法，其特征在于，所述预测方法包括电流源型双脉冲测试电路、串扰电压尖峰的计算以及各参数对串扰尖峰大小影响程度的分析；
    所述的电流源型双脉冲测试电路中，由MOSFET和肖特基二极管串联组成的两组反向电压阻断合成器件分别接于电容两端；所述电容为三相电流源型逆变器交流侧的滤波电容等效而来，构成电流源型逆变器的一个桥臂，用于模拟三相电流源型逆变器的开关切换过程；
    所述的串扰电压尖峰的计算中，计算电流源型逆变器桥臂串扰电压尖峰的最大值为：
    Figure PCTCN2022133851-appb-100001
    其中，t为电流在开关切换过程中上升、下降的时间，表示为：
    Figure PCTCN2022133851-appb-100002
    Figure PCTCN2022133851-appb-100003
    Figure PCTCN2022133851-appb-100004
    I 0为流过器件的负载电流，C gs为受串扰影响器件栅源极结电容，g m为器件跨导，x为器件转移特性曲线i ch＝k 1(V gs-V th) x+k 2中的拟合系数，V th为器件阈值电压，V miller为米勒平台电压，V cc为驱动正压，R g、L g分别为串扰发生阶段电流源型双脉冲测试等效电路中受干扰器件栅极电阻和驱动回路杂散电感，C iss为受串扰影响器件的输入电容，是栅漏结电容和栅源结电容之和，L s为受串扰影响器件内部共源电感和PCB杂散电感之和；
    所述串扰电压尖峰影响因素中，栅极电阻、共源电感和串联二极管结电容大小为主要影响因素，具体表现为，在di/dt一定时，第三开关管的栅极电阻越小，器件承受的串扰尖峰越大；共源电感越大，第三开关管承受的串扰尖峰越大；串联二极管结电容越大，第一开关管的开通导致第三开关管中二极管两端电压出现突变，与结电容耦合产生的反向恢复电流越大，使得流过第三开关管的电流反向过零数值越大，二极管的反向恢复过程越明显，从而导致第三开关管承受的正向串扰尖峰越大。
  2. 根据权利要求1所述的一种碳化硅器件电流源型逆变器桥臂串扰尖峰预测方法，其特征在于，所述电流源型双脉冲测试电路充分考虑器件和电路中的寄生、杂散参数，包括器件的结电容、杂散电感和驱动回路杂散电感，其中，R g1、R g3为驱动电阻和器件栅极内部电阻之和，L d1、L d3为器件漏极寄生电感和印刷电路板(PCB)杂散电感之和，L s1、L s3为器件共源寄生电感和PCB杂散电感之和。
  3. 根据权利要求2所述的一种碳化硅器件电流源型逆变器桥臂串扰尖峰预测方法，其特征在于，所述电流源型双脉冲测试电路的第三开关管为长通状态，根据第一开关管的通断分为两种模态；当第一开关管关断时，电流源通过第三开关管给电容充电，模拟了三相电流源型逆变器的有源矢量；当第一开关管开通时，电流从第三开关管切换至第一开关管，此过程电容两端电压不变，模拟了三相电流源型逆变器的零矢量；
    第三开关管的长通状态模拟了三相电流源型逆变器开关切换时的交叠导通时间，以避免开路故障。
  4. 根据权利要求3所述的一种碳化硅器件电流源型逆变器桥臂串扰尖峰预测方法，其特征在于，所述电流源型逆变器桥臂串扰传导方向为横向，而电压源型逆变器桥臂串扰传导方向为纵向；
    所述电流源型逆变器桥臂串扰在互补器件导通时承受正向串扰，在互补器件关断时承受反向串扰，与电压源型逆变器中同样由di/dt引起的桥臂串扰方向相反；
    所述电流源型逆变器桥臂串扰仅发生在器件栅源极电压为正向导通电压阶段，而电压源型逆变器桥臂串扰仅发生在负压关断阶段。
  5. 根据权利要求4所述的一种碳化硅器件电流源型逆变器桥臂串扰尖峰预测方法，其特征在于，所述以第一开关管切换导致的di/dt作为激励，考虑到器件的交叠导通，将第三开关管的MOSFET等效为一个电阻，其值为器件的导通电阻值，栅漏结电容值为漏源电压接近为0时的值，无需考虑随器件工况非线性变化带来的影响。
  6. 根据权利要求1所述的一种碳化硅器件电流源型逆变器桥臂串扰尖峰预测方法，其特征在于，所述米勒平台电压的计算在传统计算方法的基础上校正为
    Figure PCTCN2022133851-appb-100005
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009026298A (ja) * 2007-06-20 2009-02-05 Central Res Inst Of Electric Power Ind インバータシミュレーション装置、インバータシミュレーションプログラムおよびインバータ設計方法
CN112491253A (zh) * 2020-12-08 2021-03-12 华中科技大学 SiC MOSFET串扰电压的计算、寄生参数提取和驱动参数整定方法
CN113076712A (zh) * 2021-04-06 2021-07-06 武汉羿变电气有限公司 一种基于双脉冲测试的碳化硅mosfet关断过程建模方法
CN114362491A (zh) * 2022-01-11 2022-04-15 华北电力大学 阻性负载碳化硅mosfet半桥串扰电压峰值计算方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009026298A (ja) * 2007-06-20 2009-02-05 Central Res Inst Of Electric Power Ind インバータシミュレーション装置、インバータシミュレーションプログラムおよびインバータ設計方法
CN112491253A (zh) * 2020-12-08 2021-03-12 华中科技大学 SiC MOSFET串扰电压的计算、寄生参数提取和驱动参数整定方法
CN113076712A (zh) * 2021-04-06 2021-07-06 武汉羿变电气有限公司 一种基于双脉冲测试的碳化硅mosfet关断过程建模方法
CN114362491A (zh) * 2022-01-11 2022-04-15 华北电力大学 阻性负载碳化硅mosfet半桥串扰电压峰值计算方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
XIONG QIAOPO; LONG GEN; TU JUNYAO; GAO HUIDA; KONG WUBIN: "Crosstalk Analysis and Suppression of Silicon Carbide MOSFET based Three-level Neutral-Point-Clamped Inverter", 2021 IEEE 2ND CHINA INTERNATIONAL YOUTH CONFERENCE ON ELECTRICAL ENGINEERING (CIYCEE), IEEE, 15 December 2021 (2021-12-15), pages 1 - 6, XP034070927, DOI: 10.1109/CIYCEE53554.2021.9676918 *

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