WO2024057672A1 - Cible de pulvérisation pour la formation d'un film mince d'oxyde semi-conducteur, procédé de production d'une cible de pulvérisation pour la formation d'un film mince d'oxyde semi-conducteur, film mince d'oxyde semi-conducteur, dispositif semi-conducteur à film mince et leur procédé de production - Google Patents

Cible de pulvérisation pour la formation d'un film mince d'oxyde semi-conducteur, procédé de production d'une cible de pulvérisation pour la formation d'un film mince d'oxyde semi-conducteur, film mince d'oxyde semi-conducteur, dispositif semi-conducteur à film mince et leur procédé de production Download PDF

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WO2024057672A1
WO2024057672A1 PCT/JP2023/024260 JP2023024260W WO2024057672A1 WO 2024057672 A1 WO2024057672 A1 WO 2024057672A1 JP 2023024260 W JP2023024260 W JP 2023024260W WO 2024057672 A1 WO2024057672 A1 WO 2024057672A1
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thin film
oxide semiconductor
semiconductor thin
forming
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PCT/JP2023/024260
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English (en)
Japanese (ja)
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健太 谷野
拓 半那
将人 竹内
尚人 手塚
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株式会社アルバック
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Priority to JP2023568635A priority Critical patent/JP7493688B1/ja
Publication of WO2024057672A1 publication Critical patent/WO2024057672A1/fr

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    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B35/00—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
    • C04B35/01—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B35/00—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
    • C04B35/01—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics
    • C04B35/453—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics based on zinc, tin, or bismuth oxides or solid solutions thereof with other oxides, e.g. zincates, stannates or bismuthates
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/08—Oxides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film

Definitions

  • the present invention relates to a sputtering target for forming an oxide semiconductor thin film, a method for manufacturing a sputtering target for forming an oxide semiconductor thin film, an oxide semiconductor thin film, a thin film semiconductor device, and a method for manufacturing the same.
  • TFTs Thin-film transistors that use In-Ga-Zn-O-based oxide semiconductor thin films (IGZO) for their active layers have higher performance compared to conventional TFTs that use amorphous silicon films for their active layers. Since it is possible to obtain high mobility, it has been widely applied to various displays in recent years (see, for example, Patent Documents 1 to 3).
  • IGZO In-Ga-Zn-O-based oxide semiconductor thin films
  • Patent Document 1 discloses an organic EL display device in which the active layer of a TFT that drives an organic EL element is made of IGZO.
  • Patent Document 2 discloses a thin film transistor whose channel layer (active layer) is made of a-IGZO and whose mobility is 5 cm 2 /Vs or more.
  • Patent Document 3 discloses a thin film transistor whose active layer is made of IGZO and whose on/off current ratio is five orders of magnitude or more.
  • ZTO Zn-Sn-O
  • ITZO In-Sn-Zn-O
  • ITZO has a large coefficient of thermal expansion and low thermal conductivity among materials used for oxide semiconductors, making it unsuitable for sputtering targets. Therefore, ITZO contains In+Sn+Zn+X elements and oxygen, and the atomic ratio of each element is
  • a sputtering target has been proposed that includes an oxide sintered body that satisfies the following formula (1) and further includes a spinel structure compound represented by Zn 2 SnO 4 (Patent Document 6). 0.001 ⁇ X/(In+Sn+Zn+X) ⁇ 0.05...(1) (At least one element of X is selected from Ge, Si, Y, Zr, Al, Mg, Yb, and Ga.)
  • the etching rate with respect to the etchant is also an important point.
  • an object of the present invention is to provide a sputtering target for forming an oxide semiconductor thin film, which can form an oxide semiconductor thin film suitable for an active layer that achieves both high mobility and a high bandgap. It is an object of the present invention to provide a method for manufacturing a sputtering target for forming a thin film, an oxide semiconductor thin film, a thin film semiconductor device, and a method for manufacturing the same.
  • the first aspect of the present invention is A sputtering target for forming an oxide semiconductor thin film, the sputtering target forming an oxide semiconductor thin film, Consisting of an oxide sintered body containing a predetermined oxide,
  • Oxidation A sputtering target for forming semiconductor thin films.
  • the second aspect of the invention is in the sputtering target for forming an oxide semiconductor thin film according to the first aspect,
  • the oxide sintered body is a sputtering target for forming an oxide semiconductor thin film, which further contains a group A element that is at least one element selected from Ti, Ta, Zr, Y, Al, Mg, and Sb.
  • the third aspect of the present invention is in the sputtering target for forming an oxide semiconductor thin film according to the second aspect, Ti is 2 at% or less, Ta is 2 at% or less, Zr is 3 at% or less, Y is 4 at% or less, Al is 5 at% or less, Mg is 5 at% or less, Sb is 9 at% or less,
  • the sputtering target for forming an oxide semiconductor thin film has a content of the Group A element of less than 10 at%.
  • the fourth aspect of the present invention is In the sputtering target for forming an oxide semiconductor thin film according to any one of the first to third aspects, A sputtering target for forming an oxide semiconductor thin film has a relative density of 90% or more.
  • the fifth aspect of the present invention is A method for manufacturing a sputtering target for forming an oxide semiconductor thin film, the method comprising: Indium oxide powder, tin oxide powder, zinc oxide powder, gallium oxide, and germanium oxide powder are mixed to form a molded body, and the molded body is fired at a temperature of 1100°C or more and 1650°C or less, and any one of the first to fourth Manufacturing a sputtering target for forming an oxide semiconductor thin film having the oxide sintered body according to one embodiment A method for manufacturing a sputtering target for forming an oxide semiconductor thin film.
  • the sixth aspect of the present invention is A method of manufacturing a sputtering target for forming an oxide semiconductor thin film, the method comprising: Precursor powder is mixed with oxides, hydroxides or carbonates of indium, tin, zinc, gallium and germanium and calcined at 600°C to 1500°C to form a molded body.
  • the seventh aspect of the present invention is Comprised of an oxide semiconductor containing a predetermined oxide,
  • the eighth aspect of the present invention is In the oxide semiconductor thin film according to the seventh aspect,
  • the oxide semiconductor thin film has a mobility of 15 to 30 cm 2 /V ⁇ s and a band gap of 2.75 eV or more.
  • the ninth aspect of the present invention is in the oxide semiconductor thin film according to the seventh or eighth aspect,
  • the oxide semiconductor thin film has an etching rate of 1 nm/sec or more when etched with a phosphoric acid/acetic acid etchant.
  • the tenth aspect of the present invention is in the oxide semiconductor thin film according to any one of the seventh to ninth aspects,
  • the oxide semiconductor thin film further contains a group A element, which is at least one element selected from Ti, Ta, Zr, Y, Al, Mg, and Sb.
  • the eleventh aspect of the present invention is in the oxide semiconductor thin film according to the tenth aspect, Ti is 2 at% or less, Ta is 2 at% or less, Zr is 3 at% or less, Y is 4 at% or less, Al is 5 at% or less, Mg is 5 at% or less, Sb is 9 at% or less, The content of the Group A element in the oxide semiconductor thin film is less than 10 at%.
  • the twelfth aspect of the present invention is a gate electrode; a gate insulating film provided on the gate electrode; an active layer formed of a high-mobility oxide semiconductor thin film provided on the gate insulating film; a source electrode and a drain electrode connected to the active layer; Equipped with In the thin film semiconductor device, the active layer is made of the oxide semiconductor thin film according to any one of the seventh to eleventh aspects.
  • the thirteenth aspect of the present invention is in the thin film semiconductor device according to the twelfth aspect,
  • the thin film semiconductor device includes a cap layer provided to cover the active layer.
  • the fourteenth aspect of the present invention is in the thin film semiconductor device according to the thirteenth aspect,
  • the cap layer has a suitable etching ratio when patterned together with the active layer in the thin film semiconductor device.
  • the fifteenth aspect of the present invention is A method for manufacturing a thin film semiconductor device according to the twelfth aspect, comprising: Forming a gate insulating film on the gate electrode, forming an active layer made of a high-mobility oxide semiconductor thin film on the gate insulating film by sputtering; patterning the active layer; forming a metal layer using the patterned active layer as a base film;
  • a method of manufacturing a thin film semiconductor device includes forming a source electrode and a drain electrode by patterning the metal layer using a wet etching method.
  • the sixteenth aspect of the present invention is A method for manufacturing a thin film semiconductor device according to the thirteenth or fourteenth aspect, comprising: Forming a gate insulating film on the gate electrode, forming an active layer made of a high-mobility oxide semiconductor thin film on the gate insulating film by sputtering; forming the cap layer on the active layer by a sputtering method; patterning the laminated film of the active layer and the cap layer; forming a metal layer using the patterned active layer and the cap layer as a base film;
  • a method of manufacturing a thin film semiconductor device includes forming a source electrode and a drain electrode by patterning the metal layer using a wet etching method.
  • the present invention provides an oxide semiconductor that can achieve a good balance between high mobility and large bandgap, and has a good etching rate with respect to a predetermined etchant, which is optimal as an active layer of a TFT for a high-performance display.
  • a sputtering target for forming an oxide semiconductor thin film that can form a thin film can be realized, thereby improving the light resistance of a display and achieving high reliability.
  • FIG. 3 is a diagram showing the range of mobility of 15 to 30 cm 2 /V ⁇ s by measuring the mobility of a ternary composite oxide thin film of In, Sn, and Zn.
  • FIG. 3 is a diagram showing a range in which the band gap of a ternary composite oxide thin film of In, Sn, and Zn is 2.75 eV or more.
  • FIG. 3 is a diagram showing a range in which the etching rate of a ternary composite oxide thin film of In, Sn, and Zn with a phosphoric acid/acetic acid etchant is 1 nm/sec or more.
  • FIG. 4 is a diagram showing a combined range of FIGS. 1 to 3.
  • FIG. 1 is a diagram showing a schematic configuration of an example of a thin film transistor according to the present invention.
  • FIG. 3 is a diagram showing a schematic configuration of another example of a thin film transistor according to the present invention.
  • 1 is a diagram showing a schematic configuration of an example of a manufacturing process of a thin film transistor according to the present invention.
  • 1 is a diagram showing a schematic configuration of an example of a manufacturing process of a thin film transistor according to the present invention.
  • 3 is a diagram comparing the initial characteristics of thin film transistors of Examples 21 and 22 of the thin film transistor according to the present invention and Comparative Example 21, in which (a) is Example 21, (b) is Example 22, and (c) is Comparative Example 21.
  • 3 is a diagram comparing the PBTS of thin film transistors of Examples 21 and 22 of the thin film transistor according to the present invention and Comparative Example 21, in which (a) is Example 21, (b) is Example 22, and (c) is Comparative Example 21.
  • handle. 3 is a diagram comparing the NBTS of thin film transistors of Examples 21 and 22 of the thin film transistor according to the present invention and Comparative Example 21, in which (a) is Example 21, (b) is Example 22, and (c) is Comparative Example 21. handle. 3 is a diagram comparing NBITS of thin film transistors of Examples 21 and 22 of the thin film transistor according to the present invention and Comparative Example 21, in which (a) is Example 21, (b) is Example 22, and (c) is Comparative Example 21. handle.
  • FIG. 2 is a diagram comparing initial characteristics of thin film transistors according to the present invention, Examples 23 and 24, and Comparative Example 22, where (a) corresponds to Example 23, (b) corresponds to Example 24, and (c) corresponds to Comparative Example 22.
  • 3 is a diagram comparing the PBTS of thin film transistors of Examples 23 and 24 of the thin film transistor according to the present invention and Comparative Example 22, in which (a) is Example 23, (b) is Example 24, and (c) is Comparative Example 22.
  • handle. 3 is a diagram comparing the NBTS of thin film transistors of Examples 23 and 24 of the thin film transistor according to the present invention and Comparative Example 22, in which (a) is Example 23, (b) is Example 24, and (c) is Comparative Example 22.
  • handle. 3 is a diagram comparing the NBITS of thin film transistors of Examples 23 and 24 of the thin film transistor according to the present invention and Comparative Example 22, in which (a) is Example 23, (b) is Example 24, and (c) is Comparative Example 22. handle.
  • Oxide semiconductor thin films are used, for example, as high-mobility active layers (inversion layers) in thin film transistors such as so-called bottom-gate field effect transistors.
  • the active layer with high mobility refers to an active layer with a mobility of 15 to 30 cm 2 /V ⁇ s and a band gap of 2.75 eV or more.
  • In is used as a carrier generator, Sn has an etching control function and mobility control function, Zn is used as an etching control function, and Ge is added as a carrier killer.
  • the composition is such that It is a three-element system of In-Sn-Zn that has high mobility and a high band gap, and a range with a high etching rate for a given etchant is defined, and an element with a carrier killer function is added in an amount that is A predetermined amount of Ge is added, which causes a small decrease in the band gap and has a small effect on the etching rate even when the amount is increased, and a predetermined amount of Ga, which has a mobility control function and an etching control function for phosphoric acid/acetic acid etchants, is added. That's what I do.
  • This five-element composition was based on the relationship between the amount of addition and the degree of decrease in mobility when various elements were added to a system in which In and Zn were mixed at a ratio of 1:1.
  • the findings were obtained by measuring the relationship between the amount of addition of various elements and the degree of increase in band gap.
  • Ge was added to In and Zn based on measurements of the relationship between the amount of addition and the degree of mobility reduction when various elements were added to a 1:1 mixed system of In and Zn. It was found that the system exhibits a small percentage decrease in mobility and a large percentage increase in bandgap.
  • the elements whose etching rate decreases little even when added are Ge and Ga, and it has been found that Ga has a particularly small rate of decrease.
  • high mobility and high bandgap are achieved in a five-element composition of In, Zn, Sn, Ga, and Ge, and the composition range with a high etching rate for a predetermined etchant is determined as follows. did.
  • the etchant is a phosphoric acid/acetic acid based etchant, that is, PAN, which is a mixed liquid containing less than 80% of phosphoric acid: H 3 PO 4 , less than 5% of nitric acid: HNO 3 , and less than 10% of acetic acid: CH 3 COOH. And so.
  • the mobility of a ternary composite oxide thin film of In, Sn, and Zn was measured, and a mobility range of 15 to 30 cm 2 /V ⁇ s was defined. Note that the mobility was measured as follows. A metal for making contact is applied to the vicinity of the four vertices of a 10 mm square semiconductor sample to prepare a sample.
  • This Hall electromotive force has the property of being proportional to the current and magnetic field, and the proportionality coefficient is a physical quantity unique to the sample.
  • Figure 1 shows the results.
  • the range of mobility of 15 to 30 cm 2 /V ⁇ s was 0.4 ⁇ X ⁇ 0.8, 0 ⁇ Y ⁇ 0.6, and 0 ⁇ Z ⁇ 0.6. This range is preferable because it is a condition under which the desired high mobility can be achieved.
  • band gap of the ternary composite oxide thin film of In, Sn, and Zn was measured.
  • Figure 2 shows the results.
  • the range in which the band gap was 2.75 eV or more was 0 ⁇ X ⁇ 0.8, 0 ⁇ Y ⁇ 0.8, and 0.2 ⁇ Z ⁇ 1.
  • the reason why the band gap is preferably 2.75 eV or more is because it is a condition for realizing high mobility and a high band gap.
  • a range in which the etching rate with respect to a phosphoric acid/acetic acid etchant was 1 nm/sec or more was measured.
  • the etchant PAN, which is a mixed liquid containing less than 80% of phosphoric acid: H 3 PO 4 , less than 5% of nitric acid: HNO 3 , and less than 10% of acetic acid: CH 3 COOH, was used.
  • a Dip method was employed in which the single cap layer of the oxide semiconductor thin film immediately after deposition was immersed in an etchant controlled at 40°C.
  • FIG. 3 shows the results.
  • the range in which the etching rate was 1 nm/sec or more was 0 ⁇ X ⁇ 0.8, 0 ⁇ Y ⁇ 0.1, and 0.2 ⁇ Z ⁇ 1. This is because it is a condition for achieving high mobility, a high band gap, and a high etching rate with respect to phosphoric acid/acetic acid-based etchants.
  • FIG. 4 shows the result of combining the ranges of FIGS. 1 to 3.
  • This range is selected because when Ge is added to this, it is possible to achieve the target high mobility and high band gap, as well as a high etching rate with respect to sulfuric acid and nitric acid-based etchants.
  • the oxide semiconductor thin film of the present invention can further contain a group A element, which is at least one element selected from Ti, Ta, Zr, Y, Al, Mg, and Sb.
  • group A elements which is at least one element selected from Ti, Ta, Zr, Y, Al, Mg, and Sb.
  • the amounts of these group A elements added are as follows: Ti is 2 at% or less, Ta is 2 at% or less, Zr is 3 at% or less, Y is 4 at% or less, Al is 5 at% or less, Mg is 5 at% or less, and Sb is 9 at%. or less, the content of group A elements is less than 10 at%, the oxide semiconductor thin film has a high mobility of 10 cm 2 /V ⁇ s or more, and a high band gap of 2.75 eV or more. It is preferable that it be within a range that can be realized.
  • the sputtering target may be a planar target or a cylindrical rotary target.
  • the sputtering target is made of an oxide sintered body containing In, Sn, Ga, Ge, and Zn, and the composition ratio is the same as that of the oxide semiconductor thin film described above, and the preferable composition ratio is also the same, so there is no need to repeat the explanation. is omitted.
  • the composition range of the oxide sintered body of the sputtering target of the present invention is composed of an oxide sintered body containing indium, tin, and zinc and an oxide containing gallium and germanium, and includes In X Sn Y Ga V
  • X is 0.4 to 0.8
  • Y is 0 to 0.1
  • Z is 0.2 to 0.6
  • X+Y+Z 1
  • V/(V+W+X+Y+Z) is 0.01 or more and 0.22 or less
  • W/(V+W+X+Y+Z) is 0.01 or more and 0.06 or less.
  • the oxide sintered body constituting the sputtering target of the present invention can further contain a group A element, which is at least one element selected from Ti, Ta, Zr, Y, Al, Mg, and Sb.
  • the amounts of these group A elements added are as follows: Ti is 2 at% or less, Ta is 2 at% or less, Zr is 3 at% or less, Y is 4 at% or less, Al is 5 at% or less, Mg is 5 at% or less, and Sb is 9 at%. or less, the total content of group A elements is less than 10 at%, the oxide semiconductor thin film has a high mobility of 10 cm 2 /V ⁇ s or more, and a high band gap of 2.75 eV or more. It is preferable that the gap be within a feasible range.
  • the oxide semiconductor thin film sputtered using the oxide sintered body has a high mobility of 15 to 30 cm 2 /V ⁇ s, and the band gap is within the range where a high band gap of 2.75 eV or more can be achieved. It is preferable.
  • the oxide semiconductor thin film formed using such a sputtering target of the present invention has a high mobility of 15 to 30 cm 2 /V ⁇ s, and can realize a high band gap of 2.75 eV or more. Further, an etching rate of 1 nm/sec or more can be achieved with a phosphoric acid/acetic acid etchant.
  • the method for producing the sputtering target of the present invention is not particularly limited as long as it produces an oxide sintered body having the above composition, but the following two production methods can be exemplified, for example.
  • the first method is to form a molded body by mixing indium oxide powder, tin oxide powder, zinc oxide powder, gallium oxide powder, and germanium oxide powder, and to sinter the molded body at a temperature of 1100° C. or more and 1650° C. or less, This is a method of manufacturing a sputtering target having an oxide sintered body.
  • the weight ratio of the raw material powder is determined so as to match the element ratio of the desired oxide sintered body.
  • the second method is to mold a precursor powder that is mixed with oxides, hydroxides, or carbonates of indium, tin, zinc, gallium, and germanium and calcined at 600°C to 1500°C to form a compact.
  • the raw material powder is granulated using a spray drying method that allows drying and granulation to be performed at the same time.
  • Addition of a binder eliminates the need for a pulverizing operation with poor pulverizability, and the use of spherical powder with good fluidity makes it easier to make the composition distribution of the sputtering target uniform.
  • the raw material powder contains at least an oxide, hydroxide, or carbonate of indium, tin, zinc, gallium, and germanium.
  • one or more powders selected from oxides of group A elements may be mixed.
  • a dispersant or the like may be added to the mixing of the raw material powders.
  • a ball mill may be used as a method for pulverizing and mixing the raw material powder, but other than ball mills, other media stirring mills such as bead mills and rod mills can also be used.
  • a resin coating or the like may be applied to the surface of the balls or beads serving as the stirring medium. This effectively suppresses contamination of impurities into the powder.
  • the mixed granular powder is pre-fired at a temperature of 600°C or higher and 1500°C or lower. If the firing temperature is less than 600°C, the calcination will be insufficient and the composite oxide will not be completely formed, and if it exceeds 1500°C, sintering will progress during the calcination and the particle shape of the primary particles will become larger. The sintered density does not increase in the subsequent main firing.
  • the pre-calcined powder is wet-pulverized again with a dispersant, a binder, etc. using a ball mill, etc., and then granulated by spray drying.
  • the average particle diameter of the granulated powder is 500 ⁇ m or less.
  • the average particle diameter of the granulated powder exceeds 500 ⁇ m, cracks and cracks in the molded body become noticeable, and granular dots appear on the surface of the fired body. If such a fired body is used as a sputtering target, it may cause abnormal discharge or particle generation.
  • a more preferable average particle diameter of the granulated powder is 20 ⁇ m or more and 100 ⁇ m or less.
  • the change in volume (compressibility) before and after CIP (Cold Isostatic Press) molding is small, the occurrence of cracks in the molded body is suppressed, and a long molded body can be stably produced.
  • the average particle diameter is less than 20 ⁇ m, the powder tends to fly up, making handling difficult.
  • the "average particle diameter” means a value at which the cumulative percentage of the particle size distribution measured with a sieving type particle size distribution analyzer is 50%. Further, as the value of the average particle diameter, a value measured by "Robot Sifter RPS-105M” manufactured by Seishin Enterprise Co., Ltd. is used.
  • the granulated powder is molded at a pressure of 100 MPa/cm 2 or more.
  • a sintered body having a relative density of 97% or more can be obtained.
  • the compacting pressure is less than 100 MPa, the compact is easily broken and difficult to handle, and the relative density of the sintered compact is reduced.
  • the CIP method is adopted as the molding method.
  • the form of the CIP may be a typical vertical load type vertical type, and preferably a horizontal load type horizontal type. This is because when a long plate-shaped molded product is manufactured by vertical CIP, the thickness may vary due to the displacement of powder in the mold, and the product may crack under its own weight during handling.
  • the molded body is fired at 1100° C. to 1650° C. to form a sintered body. If the firing temperature is less than 1100° C., the conductivity and relative density will be low, making it unsuitable for target use. On the other hand, if the firing temperature exceeds 1,650° C., evaporation of some components may occur, resulting in a compositional shift in the fired body, or the strength of the fired body may decrease due to coarsening of crystal grains.
  • the molded body is fired in air or an oxidizing atmosphere. As a result, the desired oxide sintered body can be stably produced.
  • powder whose primary particles have an average particle diameter of 0.3 ⁇ m or more and 1.5 ⁇ m or less is used. This makes it possible to shorten the mixing/pulverizing time and improve the dispersibility of the raw material powder within the granulated powder.
  • the angle of repose of the granulated powder is preferably 32° or less. This increases the fluidity of the granulated powder and improves the moldability and sinterability.
  • the sintered body produced as described above is machined into a plate shape with a desired shape, size, and thickness, thereby forming a sputtering target made of an In-Sn-Ga-Ge-Zn-O-based sintered body. is produced.
  • a sputtering target is soldered to a backing plate.
  • a long sputtering target having a longitudinal length exceeding 1000 mm can be produced.
  • This allows the creation of a large sputtering target that does not have a split structure, which prevents deterioration of film properties that may occur due to sputtering of bonding material (brazing material) that has entered the gap (seam) between the split parts, resulting in stable growth. membrane becomes possible. Furthermore, particles caused by redeposition of sputtered particles deposited in the gap are less likely to be generated.
  • the density of the sintered body was determined by the mercury Archimedes method or by direct calculation from the dimensions and weight.
  • X-ray diffraction device RINT manufactured by Rigaku Co., Ltd.
  • Scanning method 2 ⁇ / ⁇ method Target: Cu Tube voltage: 40kV Tube current: 20mA
  • composition The composition of the oxide sintered body was confirmed using SEM-EDX: energy dispersive X-ray spectroscopy.
  • FIG. 5 shows a schematic configuration of an example of a thin film transistor according to the present invention.
  • the thin film transistor 100 of this embodiment includes a gate electrode 11, a gate insulating film 12, an active layer 13, a cap layer 14, a source electrode 15S, a drain electrode 15D, and a protective film 16 on a base material 10.
  • the gate electrode 11 is made of a conductive film formed on the surface of the base material 10.
  • Base material 10 is typically a transparent glass substrate.
  • the gate electrode 11 is typically composed of a metal single layer film or a metal multilayer film of molybdenum (Mo), titanium (Ti), aluminum (Al), copper (Cu), etc., and is formed by, for example, a sputtering method. .
  • the gate electrode 11 is made of molybdenum.
  • the thickness of the gate electrode 11 is not particularly limited, and is, for example, 200 nm.
  • the gate electrode 11 is formed by, for example, a sputtering method, a vacuum evaporation method, or the like.
  • the active layer 13 functions as a channel layer of the thin film transistor 100.
  • the thickness of the active layer 13 is, for example, 10 nm to 200 nm.
  • the active layer 13 is composed of the oxide semiconductor thin film of the present invention.
  • the active layer 13 is formed by, for example, a sputtering method.
  • the cap layer 14 can be a known cap layer that is most suitable for the high-mobility, high-bandgap oxide semiconductor thin film of the present invention, and can suppress the effects of hydrogen caused by etching damage and the CVD process. can be used.
  • This cap layer 14 and active layer 13 are patterned together.
  • the etchant those mentioned above can be used.
  • the gate insulating film 12 is formed between the gate electrode 11 and the active layer 13.
  • the gate insulating film 12 is composed of, for example, a silicon oxide film (SiOx), a silicon nitride film (SiNx), or a laminated film thereof.
  • the film forming method is not particularly limited, and may be a CVD method, a sputtering method, a vapor deposition method, or the like.
  • the thickness of the gate insulating film 12 is not particularly limited, and is, for example, 200 nm to 400 nm.
  • the source electrode 15S and the drain electrode 15D are formed on the active layer 13 and the cap layer 14 at a distance from each other.
  • the source electrode 15S and the drain electrode 15D can be made of, for example, a single layer film of metal such as aluminum, molybdenum, copper, titanium, etc. or a multilayer film of these metals. As described later, the source electrode 15S and the drain electrode 15D can be formed simultaneously by patterning a metal film. The thickness of the metal film is, for example, 100 nm to 200 nm.
  • the source electrode 15S and the drain electrode 15D are formed by, for example, a sputtering method, a vacuum evaporation method, or the like.
  • the source electrode 15S and the drain electrode 15D are covered with a protective film 16.
  • the protective film 16 is made of an electrically insulating material such as a silicon oxide film, a silicon nitride film, or a laminated film thereof.
  • the protective film 16 is for shielding the element portion including the active layer 13 and the cap layer 14 from the outside air.
  • the thickness of the protective film 16 is not particularly limited, and is, for example, 100 nm to 300 nm.
  • the protective film 16 is formed by, for example, a CVD method.
  • an annealing treatment is performed.
  • the active layer 13 is activated.
  • Annealing conditions are not particularly limited, and in this embodiment, annealing is performed at about 30° C. for 1 hour in the atmosphere.
  • the cap layer 14 is considered to have the function of suppressing the diffusion of hydrogen from the protective film 16 to the active layer 13 due to heat.
  • the protective film 16 is provided with interlayer connection holes 16S and 16D at appropriate positions for connecting the source 15S and drain electrodes 15D to a wiring layer (not shown).
  • the wiring layer is for connecting the thin film transistor 100 to a peripheral circuit (not shown), and is made of a transparent conductive film such as ITO.
  • FIG. 6 shows a schematic configuration of another example of a thin film transistor according to the present invention. This example is the same as FIG. 8 except that it does not include the cap layer 14 of the thin film transistor of FIG. 5, and therefore, repeated explanation will be omitted.
  • the thin film semiconductor transistor having the oxide semiconductor thin film of the present invention as an active layer can be used as a TFT for a high-performance display, regardless of the structure shown in FIG. 5 or 6. Improves light resistance and achieves high reliability.
  • FIG. 7(a) An example of the method for manufacturing a thin film transistor of the present invention will be described with reference to FIGS. 7 and 8.
  • a gate electrode material layer 11a is formed on the base material 10 by sputtering at room temperature, and then, as shown in FIG. 7(b), by wet patterning, Gate electrode 11 is formed.
  • a gate insulating film 12 is formed by CVD.
  • a laminate of SiO x /SiN x was used.
  • an active layer material layer 13a and a cap layer material layer 14a are sequentially formed by sputtering at a temperature of the base material 10 of 100.degree. Then, as shown in FIG. 8A, the active layer material layer 13a and the cap layer material layer 14a are patterned by etching to form the active layer 13 and the cap layer 14. Etching is performed using, for example, a sulfuric acid/nitric acid-based etchant as an etchant, and then annealing is performed at, for example, air at 400° C. for one hour. Next, as shown in FIG. 8(b), a source/drain metal material layer 15a is formed by sputtering at room temperature, and as shown in FIG.
  • a source electrode 15S and a drain electrode 15D are formed by patterning. .
  • a protective film material layer 16a is formed by CVD.
  • the protective film material layer 16a is made of, for example, SiOx with a thickness of 300 nm.
  • the protective film material layer 16a is annealed at 300° C. in the atmosphere and then patterned by dry etching to form interlayer connection holes 16S and 16D to the source electrode 15S and drain electrode 15D.
  • the cap layer 14 when the above-described oxide thin film containing indium, magnesium, and tin is used as the cap layer 14, the material of the high-mobility active layer 13, which tends to have a small band gap Eg, can be used.
  • no shift in V th of the TFT occurs when stacking with the cap layer 14, which has the effect of suppressing external factors during TFT fabrication.
  • the cap layer 14 of the present invention has a function of suppressing damage to the active layer 13 during a hydrogen process during TFT fabrication and during patterning of the source electrode 15S and drain electrode 15D.
  • the thin film semiconductor transistor shown in FIG. 6 without the cap layer 14 can also be manufactured in the same manner except that the cap layer 14 is not formed.
  • the thin film semiconductor transistor having the oxide semiconductor thin film of the present invention as an active layer can be used as a TFT for a high-performance display, regardless of the structure shown in FIG. 5 or 6. , the light resistance of the display is improved and high reliability is achieved.
  • Table 2 shows the results of measuring the relative density and specific resistance value of the sintered body. Furthermore, the results of confirming by EDX the presence or absence of compositional deviation between the mixed granular powder and the oxide sintered body before and after sintering are also shown. Note that the production of composite oxides of each composition was confirmed by XRD.
  • sintered bodies with a relative density of 90% or more were obtained by using indium oxide, gallium oxide, germanium oxide, zinc oxide, and in some cases tin oxide as raw materials and sintering them in the atmosphere.
  • this sintered body had a relative density of 97% or more and a specific resistance of 10 m ⁇ cm or less when sintered at 1300° C. or higher.
  • Oxide semiconductor thin film Examples 11 and 12 Sputtering target An oxide semiconductor thin film was manufactured using the sputtering targets of Examples 1 and 2, and the mobility, band gap, and etching rate with respect to a predetermined etchant were measured as described above. The results are shown in Table 3.
  • Oxide semiconductor thin film comparative example 11-13 Oxide semiconductor thin films having the compositions shown in Table 3 were manufactured using a plurality of sputtering targets, and the mobility, band gap, and etching rate with respect to a predetermined etchant were measured as described above. In addition, it was confirmed by XRD whether it was amorphous or not. The results are shown in Table 3.
  • the oxide semiconductor thin films of Examples 11 and 12 had the desired characteristics in all of the mobility, band gap, and etching rate, but in Comparative Examples 11-13, the desired characteristics were obtained in all. I could't.
  • Thin film transistor examples 21 and 22 Thin film transistors of Examples 21 and 22 without the cap layer 14 as in the structure shown in FIG. 6 were manufactured. As the active layer 13, In--Sn--Ga--Ge--O as shown in Table 3 in Examples 11 and 12 was used, and the film thickness was 50 nm.
  • the active layer 13 was the same as Example 21 except that commercially available ITGZO was used and the film thickness was 50 nm.
  • a comparative example is a thin film transistor using the existing material ITGZO as an active layer, and the TFT characteristics were measured.
  • Thin film transistor examples 23 and 24 Thin film transistors of Examples 23 and 24 having the cap layer 14 as in the structure shown in FIG. 5 were manufactured.
  • As the active layer 13 In--Sn--Ga--Ge--O as shown in Table 3 in Examples 11 and 12 was used, and the film thickness was 50 nm.
  • As the cap layer commercially available IGZO136 was used, and the film thickness was 15 nm.
  • This is a thin film transistor having an active layer and a cap layer provided on the upper layer, and the TFT characteristics were measured.
  • the active layer 13 was made in the same manner as in Example 23, except that commercially available IGZO was used and the film thickness was 50 nm.
  • a comparative example is a thin film transistor in which the existing material ITGZO is used as an active layer and a cap layer is provided on the upper layer, and the TFT characteristics are measured.
  • FIGS. 9 to 12 The results of measuring initial characteristics, PBTS (Positive Bias Temperature Stress), NBTS (Negative Bias Temperature Stress), and NBITS (Negative Bias Illustration Temperature Stress) for the thin film transistors of Examples 21 and 22 and Comparative Example 21 are shown in FIGS. It is shown in FIG. 9 to 12, (a) corresponds to Example 21, (b) corresponds to Example 22, and (c) corresponds to Comparative Example 21.
  • the example had the same or higher mobility and the same or higher light resistance (NBITS) than the comparative example. This revealed that the material concept of the present invention can improve properties against stress tests.
  • FIGS. 13 to 16 The results of measuring the initial characteristics, PBTS (Positive Bias Temperature Stress), NBTS (Negative Bias Temperature Stress), and NBITS (Negative Bias Illustration Temperature Stress) for the thin film transistors of Examples 23 and 24 and Comparative Example 22 are shown in FIGS. It is shown in FIG. 13 to 16, (a) corresponds to Example 23, (b) corresponds to Example 24, and (c) corresponds to Comparative Example 22.
  • the example had the same or higher mobility as the comparative example, and also had good characteristics in terms of reliability (PBTS, NBTS).

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Abstract

La présente invention permet d'obtenir : une cible de pulvérisation pour la formation d'un film mince d'oxyde semi-conducteur, la cible de pulvérisation étant apte à former un film mince d'oxyde semi-conducteur qui est approprié pour une couche active permettant un bon équilibre entre une grande mobilité et une largeur de bande interdite élevée; un procédé de production de cette cible de pulvérisation; un film mince d'oxyde semi-conducteur; un dispositif semi-conducteur à film mince; et un procédé de production d'un dispositif semi-conducteur à film mince. Cette cible de pulvérisation pour la formation d'un film mince d'oxyde semi-conducteur forme un film mince d'oxyde semi-conducteur, tout en étant conçue à partir d'un corps fritté d'oxyde qui contient un oxyde spécifique; et si le rapport entre éléments de l'oxyde spécifique est exprimé de la façon suivante : InXSnYGaVGaWZnZ, X se situe dans la plage de 0,4 à 0,8, Y dans la plage de 0 à 0,1 et Z dans la plage de 0,2 à 0,6, tandis que X + Y + Z = 1, V/(V + W + X + Y + Z) varie de 0,01 à 0,22 et W/(V + W + X + Y + Z) varie de 0,01 à 0,06.
PCT/JP2023/024260 2022-09-16 2023-06-29 Cible de pulvérisation pour la formation d'un film mince d'oxyde semi-conducteur, procédé de production d'une cible de pulvérisation pour la formation d'un film mince d'oxyde semi-conducteur, film mince d'oxyde semi-conducteur, dispositif semi-conducteur à film mince et leur procédé de production WO2024057672A1 (fr)

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WO2008117810A1 (fr) * 2007-03-26 2008-10-02 Idemitsu Kosan Co., Ltd. Film mince semi-conducteur d'oxyde non cristallin, procédé de production de ce film, procédé de production d'un transistor à couches minces, transistor à effet de champ, dispositif émettant de la lumière, dispositif d'affichage et cible de pulvérisation
WO2011126093A1 (fr) * 2010-04-07 2011-10-13 株式会社神戸製鋼所 Oxyde destiné à une couche semi-conductrice de transistor à couches minces, cible de pulvérisation et transistor à couches minces
JP2013070010A (ja) * 2010-11-26 2013-04-18 Kobe Steel Ltd 薄膜トランジスタの半導体層用酸化物およびスパッタリングターゲット、並びに薄膜トランジスタ
WO2013179676A1 (fr) * 2012-05-31 2013-12-05 出光興産株式会社 Cible de pulvérisation
JP2016132609A (ja) * 2015-01-22 2016-07-25 Ｊｘ金属株式会社 酸化物焼結体、スパッタリングターゲット及び酸化物薄膜
JP2017160103A (ja) * 2016-03-11 2017-09-14 住友金属鉱山株式会社 Ｓｎ−Ｚｎ−Ｏ系酸化物焼結体とその製造方法

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JPWO2009075281A1 (ja) 2007-12-13 2011-04-28 出光興産株式会社 酸化物半導体を用いた電界効果型トランジスタ及びその製造方法
JP2010070409A (ja) 2008-09-17 2010-04-02 Idemitsu Kosan Co Ltd 酸化物焼結体の製造方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008117810A1 (fr) * 2007-03-26 2008-10-02 Idemitsu Kosan Co., Ltd. Film mince semi-conducteur d'oxyde non cristallin, procédé de production de ce film, procédé de production d'un transistor à couches minces, transistor à effet de champ, dispositif émettant de la lumière, dispositif d'affichage et cible de pulvérisation
WO2011126093A1 (fr) * 2010-04-07 2011-10-13 株式会社神戸製鋼所 Oxyde destiné à une couche semi-conductrice de transistor à couches minces, cible de pulvérisation et transistor à couches minces
JP2013070010A (ja) * 2010-11-26 2013-04-18 Kobe Steel Ltd 薄膜トランジスタの半導体層用酸化物およびスパッタリングターゲット、並びに薄膜トランジスタ
WO2013179676A1 (fr) * 2012-05-31 2013-12-05 出光興産株式会社 Cible de pulvérisation
JP2016132609A (ja) * 2015-01-22 2016-07-25 Ｊｘ金属株式会社 酸化物焼結体、スパッタリングターゲット及び酸化物薄膜
JP2017160103A (ja) * 2016-03-11 2017-09-14 住友金属鉱山株式会社 Ｓｎ−Ｚｎ−Ｏ系酸化物焼結体とその製造方法

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