WO2024009900A1 - 積層セラミックコンデンサの製造方法 - Google Patents

積層セラミックコンデンサの製造方法 Download PDF

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Publication number
WO2024009900A1
WO2024009900A1 PCT/JP2023/024336 JP2023024336W WO2024009900A1 WO 2024009900 A1 WO2024009900 A1 WO 2024009900A1 JP 2023024336 W JP2023024336 W JP 2023024336W WO 2024009900 A1 WO2024009900 A1 WO 2024009900A1
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Prior art keywords
material layer
via conductor
multilayer ceramic
forming
manufacturing
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Ceased
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PCT/JP2023/024336
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English (en)
French (fr)
Japanese (ja)
Inventor
幸宏 藤田
龍太郎 大和
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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Priority to CN202380042722.0A priority Critical patent/CN119256380A/zh
Priority to KR1020247040793A priority patent/KR20250007007A/ko
Priority to JP2024532093A priority patent/JP7736192B2/ja
Publication of WO2024009900A1 publication Critical patent/WO2024009900A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/228Terminals
    • H01G4/232Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • H01G4/2325Terminals electrically connecting two or more layers of a stacked or rolled capacitor characterised by the material of the terminals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G13/00Apparatus specially adapted for manufacturing capacitors; Processes specially adapted for manufacturing capacitors not provided for in groups H01G4/00 - H01G11/00
    • H01G13/006Apparatus or processes for applying terminals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/005Electrodes
    • H01G4/012Form of non-self-supporting electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/30Stacked capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/38Multiple capacitors, i.e. structural combinations of fixed capacitors
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/13Energy storage using capacitors

Definitions

  • the present disclosure relates to a method for manufacturing a multilayer ceramic capacitor.
  • Multilayer capacitors are known in which the ESL (equivalent series inductance) is reduced by making the current flow route thicker, the current flow route shorter, or the magnetic fields generated by currents with different polarities canceling each other out.
  • Patent Document 1 Japanese Unexamined Patent Publication No. 2006-135333 discloses an example of a multilayer capacitor with a reduced ESL.
  • the multilayer capacitor disclosed in Patent Document 1 includes a capacitor body in which a plurality of dielectric layers, a plurality of first internal electrodes, and a plurality of second internal electrodes are stacked.
  • the capacitor body includes a plurality of first via conductors that are electrically connected to the plurality of first internal electrodes and extend to one main surface of the capacitor body, and a plurality of first via conductors that are electrically connected to the plurality of second internal electrodes.
  • a plurality of second via conductors are connected to the capacitor body and extend to one main surface of the capacitor body.
  • One main surface of the capacitor body includes a plurality of first external electrodes each electrically connected to a plurality of first via conductors, and a plurality of first external electrodes each electrically connected to a plurality of second via conductors.
  • a plurality of second external electrodes are provided.
  • the multilayer capacitor disclosed in Patent Document 1 is manufactured through a step of manufacturing a capacitor body and then forming a first external electrode and a second external electrode on the surface of the capacitor body. Therefore, if the size of the multilayer capacitor is fixed, it is necessary to reduce the thickness of the capacitor body by the thickness of the external electrode. For this reason, there is a restriction on the number of stacked internal electrodes, making it impossible to increase the capacitance.
  • the present disclosure aims to solve the above problems, and to provide a method for manufacturing a multilayer ceramic capacitor with large capacitance.
  • a method for manufacturing a multilayer ceramic capacitor according to the present disclosure includes a capacitor body in which a plurality of dielectric layers, a plurality of first internal electrodes, and a plurality of second internal electrodes are laminated, and a first via conductor provided inside the capacitor body and electrically connected to the plurality of first internal electrodes; and a second via conductor provided inside the capacitor body and electrically connected to the plurality of second internal electrodes.
  • a method for manufacturing a multilayer ceramic capacitor comprising a via conductor, forming a first material layer made of a first material in order to form the first via conductor and the second via conductor; A material located at at least one end and different from the first material, which is any one of Sn, Sn-Ag, Sn-Bi, Sn-In, Sn-Ag-Cu, and Au. forming a second material layer made of a second material containing as a main component.
  • a second material layer is formed of the material. Since the second material has excellent oxidation resistance, oxidation can be suppressed even when the surface is exposed, and it is possible to connect with an external electrode etc. with high reliability.
  • the size of the capacitor body can be increased.
  • the number of laminated layers of the first internal electrode and the second internal electrode can be increased, so that the capacitance can be increased.
  • FIG. 1 is a plan view of a multilayer ceramic capacitor manufactured by the method for manufacturing a multilayer ceramic capacitor of the present disclosure.
  • FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor shown in FIG. 1 taken along line II-II.
  • FIG. 3 is a cross-sectional view schematically showing a multilayer ceramic capacitor in which the second material layer is not exposed on the main surface of the capacitor body.
  • FIG. 3 is a cross-sectional view schematically showing a multilayer ceramic capacitor in which a second material layer protrudes outward from the main surface of the capacitor body.
  • 1 is a flowchart for explaining a method for manufacturing a multilayer ceramic capacitor according to a first embodiment of the present disclosure.
  • FIG. 3 is a cross-sectional view schematically showing a state in which a capacitor body and a first via conductor are formed. It is a flowchart for explaining the manufacturing method of the multilayer ceramic capacitor in the 3rd embodiment of this indication. It is a flowchart for explaining the manufacturing method of the multilayer ceramic capacitor in the 4th embodiment of this indication. It is a flowchart for explaining the manufacturing method of the multilayer ceramic capacitor in the 5th embodiment of this indication.
  • FIG. 3 is a cross-sectional view schematically showing a state in which a portion of the surface of the capacitor main body other than a position where a second material layer is formed is covered with a mask. It is a flowchart for explaining the manufacturing method of the multilayer ceramic capacitor in the 6th embodiment of this indication.
  • FIG. 1 is a plan view of a multilayer ceramic capacitor 100 manufactured by the method for manufacturing a multilayer ceramic capacitor of the present disclosure.
  • FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor 100 shown in FIG. 1 taken along line II-II.
  • the multilayer ceramic capacitor 100 includes a capacitor body 1, a first via conductor 5, and a second via conductor 6.
  • the capacitor body 1 has a structure in which a plurality of dielectric layers 2, a plurality of first internal electrodes 3, and a plurality of second internal electrodes 4 are laminated. More specifically, the capacitor body 1 has a structure in which a plurality of first internal electrodes 3 and second internal electrodes 4 are alternately stacked with dielectric layers 2 in between.
  • the material of the dielectric layer 2 is arbitrary, and is made of, for example, a ceramic material whose main component is BaTiO 3 , CaTiO 3 , SrTiO 3 , SrZrO 3 , or CaZrO 3 .
  • These main components may contain subcomponents whose content is smaller than that of the main components, such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds.
  • the shape of the capacitor body 1 is arbitrary.
  • the capacitor main body 1 has a rectangular parallelepiped shape as a whole.
  • the shape of a rectangular parallelepiped as a whole is not a perfect rectangular parallelepiped, such as a rectangular parallelepiped with rounded corners and ridges, but it has six surfaces and can be considered a rectangular parallelepiped as a whole. It is a shape that can be made.
  • the dimensions of the capacitor body 1 are arbitrary, but for example, the vertical dimension of the rectangle in plan view is 0.3 mm or more and 3.0 mm or less, the horizontal dimension is 0.3 mm or more and 3.0 mm or less, and the dielectric layer 2 , the dimensions of the first internal electrode 3 and the second internal electrode 4 in the lamination direction T (hereinafter simply referred to as the lamination direction T) can be set to 50 ⁇ m or more and 200 ⁇ m or less.
  • the dimension of the capacitor body 1 in the stacking direction T refers to the thickness of the capacitor body 1.
  • the first internal electrode 3 and the second internal electrode 4 may be made of any material, for example, metals such as Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au, or those metals. Contains alloys etc. as main components.
  • the first internal electrode 3 and the second internal electrode 4 may contain the same ceramic material as the dielectric ceramic contained in the dielectric layer 2 as a common material. In that case, the proportion of the common material contained in the first internal electrode 3 and the second internal electrode 4 is, for example, 20 vol% or less.
  • the thickness of the first internal electrode 3 and the second internal electrode 4 is arbitrary, and can be, for example, about 0.3 ⁇ m or more and 1.0 ⁇ m or less. Although the number of layers of the first internal electrode 3 and the second internal electrode 4 is arbitrary, the total number of both can be, for example, approximately 10 to 150 layers.
  • a plurality of first through holes 3a are formed in the first internal electrode 3 in order to insert a plurality of second via conductors 6, which will be described later.
  • a plurality of second through holes 4a are formed in the second internal electrode 4 in order to allow a plurality of first via conductors 5, which will be described later, to be inserted therethrough.
  • capacitance is formed by the first internal electrode 3 and the second internal electrode 4 facing each other with the dielectric layer 2 interposed therebetween.
  • the first via conductor 5 is provided inside the capacitor body 1 and electrically connected to the plurality of first internal electrodes 3.
  • the first via conductor 5 passes through a second through hole 4a formed in the second internal electrode 4, and is insulated from the second internal electrode 4.
  • the second via conductor 6 is provided inside the capacitor body 1 and electrically connected to the plurality of second internal electrodes 4.
  • the second via conductor 6 passes through a first through hole 3a formed in the first internal electrode 3, and is insulated from the first internal electrode 3.
  • the first via conductor 5 and the second via conductor 6 each have a first material layer 11 made of a first material and a material different from the first material, such as Sn, Sn-Ag, Sn- and a second material layer 12 made of a second material containing any one of Bi, Sn-In, Sn-Ag-Cu, and Au as a main component.
  • the principal component means the component that is the most abundant on a mass basis.
  • the second material layer 12 is provided at least one open end of the first via conductor 5 and the second via conductor 6 in the stacking direction T, the surface of which is not covered. In the example shown in FIG. 2, the second material layer 12 is provided on the first main surface 1a side of the capacitor body 1.
  • the first via conductor 5 and the second via conductor 6 are each provided inside the capacitor body 1 in a manner extending in the stacking direction T.
  • the first via conductor 5 and the second via conductor 6 are each exposed on the first main surface 1a of the capacitor body 1, but are not exposed on the second main surface 1b.
  • the second material layer 12 of the first via conductor 5 and the second via conductor 6 is exposed on the first main surface 1a of the capacitor body 1, but the first material layer 11 is , is not exposed on the second main surface 1b.
  • the first main surface 1a and the second main surface 1b of the capacitor body 1 are electrically connected to the first via conductor 5 and are made of a material different from that of the first via conductor 5.
  • An external electrode electrically connected to the second via conductor 6 and made of a material different from that of the second via conductor 6 is not provided. Therefore, in the stacking direction T, the dimensions of the multilayer ceramic capacitor 100 are the same as the dimensions of the capacitor body 1. Note that the dimensions of the multilayer ceramic capacitor 100 in the stacking direction T are the outermost part on the first main surface 1a side and the second main surface in the stacking direction T among the constituent parts of the multilayer ceramic capacitor 100. It means the distance between the outermost part on the 1b side.
  • the first material contains Ni as a main component, for example.
  • the second material contains any one of Sn, Sn-Ag, Sn-Bi, Sn-In, Sn-Ag-Cu, and Au as a main component.
  • Sn-Ag is an alloy of Sn and Ag
  • Sn-Bi is an alloy of Sn and Bi
  • Sn-In is an alloy of Sn and In
  • Sn-Ag-Cu is an alloy of Sn and Bi. It is an alloy of Ag and Cu.
  • Ni is a metal that is easily oxidized, but Sn, Sn--Ag, Sn--Bi, Sn--In, Sn--Ag--Cu, and Au are metals that have excellent oxidation resistance. Therefore, any one of Sn, Sn-Ag, Sn-Bi, Sn-In, Sn-Ag-Cu, and Au is applied to the open end of at least one of the first via conductor 5 and the second via conductor 6.
  • the second material layer 12 containing one of the above as a main component oxidation can be suppressed even when the surface of the second material layer 12 is exposed, and connection with external electrodes etc. can be made with high reliability. It becomes possible to do so. For example, when mounting the multilayer ceramic capacitor 100 on a land on a mounting board, the second material layer 12 of the first via conductor 5 and the second via conductor 6 is connected to the land via solder or the like.
  • the main component of the first material is not limited to Ni, and may be metals such as Cu, Ag, Pd, Pt, Fe, Ti, Cr, or Au, or alloys containing these metals. good. That is, the first material may contain at least one of Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, and Au as a main component.
  • the outer surface of the capacitor body 1 is electrically connected to the first via conductor 5 and the second via conductor 6, respectively, and is made of a material different from that of the first via conductor 5 and the second via conductor 6. Since there is no need to separately provide an electrode, the size of the capacitor body 1 in the stacking direction T can be increased compared to a conventional multilayer ceramic capacitor provided with external electrodes. Thereby, the number of laminated layers of the first internal electrode 3 and the second internal electrode 4 can be increased, so that the capacitance can be increased.
  • the first via conductor 5 and the second via conductor 6 can be provided at any position.
  • a plurality of first via conductors 5 and a plurality of second via conductors 6 are provided in a matrix.
  • the number of first via conductors 5 and second via conductors 6 can be any number.
  • the shapes of the first via conductor 5 and the second via conductor 6 are arbitrary, and may be cylindrical, for example.
  • the diameters of the first via conductor 5 and the second via conductor 6 are, for example, about 30 ⁇ m or more and 150 ⁇ m or less.
  • the distance between the first via conductor 5 and the second via conductor 6 adjacent to each other, more specifically, the distance L1 between the center of the first via conductor 5 and the center of the second via conductor 6 (See FIG. 2) is, for example, about 50 ⁇ m or more and 500 ⁇ m or less.
  • the second material layer 12 does not need to be exposed on the first main surface 1a of the capacitor body 1, as shown in FIG. Even with such a configuration, it is possible to connect to an external electrode or the like using a bonding material such as solder.
  • the second material layer 12 may protrude further outward in the stacking direction T than the first main surface 1a of the capacitor body 1, as shown in FIG.
  • the dimension of the portion of the second material layer 12 that protrudes outward from the first main surface 1a in the stacking direction T is preferably 5 ⁇ m or less.
  • the first material layer 11 may be exposed on the second main surface 1b of the capacitor body 1. Further, the second material layer 12 may be provided not only on the first main surface 1a side of the capacitor body 1 but also on the second main surface 1b side.
  • a method of manufacturing a multilayer ceramic capacitor according to the present disclosure includes a capacitor body 1 in which a plurality of dielectric layers 2, a plurality of first internal electrodes 3, and a plurality of second internal electrodes 4 are laminated; A first via conductor 5 provided inside the capacitor body 1 and electrically connected to the plurality of first internal electrodes 3; and a first via conductor 5 provided inside the capacitor body 1 and electrically connected to the plurality of second internal electrodes 4.
  • This method of manufacturing a multilayer ceramic capacitor includes a step of forming a first material layer 11 made of a first material in order to form a first via conductor 5 and a second via conductor 6; It is located at at least one end of the conductor 5 and the second via conductor 6 and is made of a material different from the first material, such as Sn, Sn-Ag, Sn-Bi, Sn-In, or Sn-Ag-Cu. and a step of forming a second material layer 12 made of a second material containing any one of Au as a main component.
  • a multilayer ceramic capacitor 100 with a large capacitance can be manufactured.
  • the second material constituting the second material layer 12 has excellent oxidation resistance, it can suppress oxidation even when the surface is exposed, and can connect with external electrodes etc. with high reliability. It becomes possible to do so. Therefore, there is no need to separately provide external electrodes electrically connected to the first via conductor 5 and the second via conductor 6, so when the size of the multilayer ceramic capacitor 100 is determined, the capacitor body 1 The dimensions of can be increased. Thereby, the number of stacked layers of the first internal electrode 3 and the second internal electrode 4 can be increased, so that the capacitance can be increased.
  • FIG. 5 is a flowchart for explaining a method for manufacturing a multilayer ceramic capacitor according to the first embodiment of the present disclosure.
  • a plurality of ceramic green sheets on which internal electrode patterns are formed are laminated to produce a laminate.
  • a known ceramic green sheet can be used, and can be obtained, for example, by applying a ceramic slurry containing ceramic powder, a resin component, and a solvent onto a base material and drying it. .
  • the internal electrode pattern can be formed by applying a conductive paste for internal electrodes to a ceramic green sheet by a method such as printing.
  • An internal electrode pattern that allows a plurality of multilayer ceramic capacitors 100 to be manufactured at once may be formed.
  • a laminate produced by laminating a plurality of ceramic green sheets on which internal electrode patterns are formed is a mother laminate.
  • the conductive paste for internal electrodes is a conductive paste for forming the first internal electrode 3 and the second internal electrode 4, and a known paste can be used.
  • the conductive paste for internal electrodes includes, for example, particles made of a metal such as Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au or a precursor thereof, and a solvent.
  • the conductive paste for internal electrodes may further contain a dispersant and a resin component serving as a binder.
  • the produced laminate is preferably pressed by a method such as rigid press or isostatic press.
  • step S2 following step S1 holes for forming the first via conductor 5 and the second via conductor 6 are formed in the laminate.
  • the holes can be formed by any method, for example, by irradiating with a laser beam.
  • the holes formed are non-through holes.
  • a non-through hole may be formed by adjusting the depth of the hole to be formed, or a through hole may be formed and then a ceramic green sheet is pasted on one end side of the laminate in the stacking direction T. You can do it like this.
  • the hole to be formed may be a through hole depending on the shapes of the first via conductor 5 and the second via conductor 6 to be formed.
  • step S3 following step S2, the formed hole is filled with a conductive paste for via conductor containing a first material and a second material having a lower melting point than the first material.
  • the first material contains Ni as a main component, for example.
  • the second material contains any one of Sn, Sn-Ag, Sn-Bi, Sn-In, Sn-Ag-Cu, and Au as a main component.
  • the amounts of the first material and the second material contained in the conductive paste for via conductors are such that the amount of the first material layer 11 and the second material layer of the first via conductor 5 and second via conductor 6 to be formed is The ratio between the material layer 12 and the material layer 12 is adjusted as shown in FIG.
  • the conductive paste for via conductors may contain a dispersant, a resin component serving as a binder, and the like.
  • the mother laminate whose holes are filled with conductive paste for via conductors is cut into pieces to a predetermined size.
  • the mother laminate can be cut by a cutting method such as push cutting, dicing, laser cutting, or the like.
  • step S4 following step S3, the first material layer 11 and the second material layer 12 are formed together with the capacitor body 1 by firing the laminate whose holes are filled with conductive paste for via conductors. . That is, by firing, the second material having a lower melting point than the first material appears on the surface side, so that the via conductor as shown in FIG. A first via conductor 5 and a second via conductor 6 including a second material layer 12 located closer to the surface of the capacitor body 1 than the first via conductor 5 and the second material layer 12 are formed. That is, in this embodiment, the process of step S4 is a process of forming the first material layer 11 and a process of forming the second material layer 12.
  • the multilayer ceramic capacitor 100 is manufactured through the steps described above.
  • the first material layer 11 and the second material layer 12 do not form two neat layers as shown in FIG. 2, but mainly contain Ni inside.
  • the first material layer 11 and the second material layer 12 are formed in such a manner that Sn exists on the outside.
  • the method for manufacturing a multilayer ceramic capacitor in this embodiment does not include the step of separately providing external electrodes electrically connected to the first via conductor 5 and the second via conductor 6, respectively.
  • a multilayer ceramic capacitor 100 with a large capacitance can be manufactured.
  • by firing the laminate in which the holes are filled with a conductive paste for via conductors containing a first material and a second material having a melting point lower than that of the first material Since the first material layer 11 and the second material layer 12 can be formed at the same time, the manufacturing process is simplified compared to a method in which the first material layer 11 and the second material layer 12 are formed separately. It can be simplified.
  • the first material layer 11 and the second material layer 12 are simultaneously formed by firing an unfired laminate.
  • the second material layer 12 is formed after the first material layer 11 is formed.
  • FIG. 6 is a flowchart for explaining a method for manufacturing a multilayer ceramic capacitor according to the second embodiment of the present disclosure. Among the processes in the flowchart shown in FIG. 6, the same processes as those in the flowchart shown in FIG. 5 are given the same reference numerals and detailed explanations are omitted.
  • step S1 of FIG. 6 a plurality of ceramic green sheets on which internal electrode patterns are formed are laminated to produce a laminate.
  • step S2 holes for forming the first via conductor 5 and the second via conductor 6 are formed in the laminate.
  • step S11 following step S2 the formed hole is filled with a conductive paste for via conductor containing the first material.
  • the first material contains Ni as a main component, for example.
  • the conductive paste for via conductors may be filled up to the surface of the laminate, or may be filled up to a position inside the surface of the laminate in the stacking direction T.
  • a space for forming the second material layer 12 may be provided by filling the hole with conductive paste for via conductor and then pressing it.
  • step S12 the laminate whose holes are filled with conductive paste for via conductors is fired.
  • the first material layer 11 is formed together with the capacitor body 1. That is, in this embodiment, the process of step S12 is a process of forming the first material layer 11.
  • the conductive paste for via conductor when the conductive paste for via conductor is filled up to the surface of the laminate, and when it is filled to a position inside the surface of the laminate in the stacking direction T, the conductive paste is formed by firing.
  • the end of the first material layer 11 is located inside the surface of the capacitor body 1 in the stacking direction T.
  • the ends of the first material layer 11 formed are inside the surface of the capacitor body 1 due to shrinkage due to firing.
  • the amount of components that disappear during firing may be increased by increasing the content of the resin component contained in the conductive paste for via conductors.
  • the second material layer 12 is formed at the end of the first material layer 11.
  • the second material layer 12 is formed by placing the second material at the end of the first material layer 11 and heating it.
  • a recess 20 is formed that is recessed inward from the surface of the capacitor body 1 (see FIG. 7).
  • a second material is placed in this recess 20 and heated and melted to form a second material layer 12 connected to the first material layer 11 .
  • the multilayer ceramic capacitor 100 is manufactured through the steps described above.
  • the first material is removed together with the capacitor body 1. Since the second material layer 12 is formed at the end of the first material layer 11 after forming the layer 11, the second material layer 12 can be formed more reliably after forming the first material layer 11. can do. In addition, since the second material layer 12 is formed by placing the second material at the end of the first material layer 11 and heating it, a strong second material layer connected to the first material layer 11 is formed. Two material layers 12 can be formed.
  • ⁇ Third embodiment> In the method for manufacturing a multilayer ceramic capacitor in the third embodiment, similarly to the method for manufacturing a multilayer ceramic capacitor in the second embodiment, after forming the first material layer 11, the second material layer 12 is formed. .
  • the method for manufacturing a multilayer ceramic capacitor in the third embodiment differs from the method for manufacturing a multilayer ceramic capacitor in the second embodiment in the step of forming the second material layer 12.
  • FIG. 8 is a flowchart for explaining a method for manufacturing a multilayer ceramic capacitor according to the third embodiment of the present disclosure. Among the processes in the flowchart shown in FIG. 8, the same processes as those in the flowchart shown in FIG. 6 are given the same reference numerals and detailed explanations will be omitted.
  • step S21 following step S12, a second material layer 12 is formed at the end of the first material layer 11.
  • the paste containing the second material is sprayed onto the surface of the capacitor body 1 in the form of a mist, and the paste adhering to the end of the first material layer 11 is heated, thereby forming the second material layer 12. form.
  • the paste containing the second material is, for example, a paste containing Sn.
  • a paste containing Sn For example, it is possible to apply a voltage to a spray gun or the like to atomize and spray the paste containing the second material.
  • the paste containing the second material is atomized and sprayed onto the capacitor body 1, the charged paste particles adhere to the ends of the first material layer 11 due to static electricity. Thereafter, the paste attached to the end of the first material layer 11 is heated and melted to form a second material layer 12 connected to the first material layer 11 .
  • the method for manufacturing a multilayer ceramic capacitor in the third embodiment also ensures that the second material layer 12 is formed after forming the first material layer 11. can be formed. Further, the second material layer 12 is formed by spraying a mist of paste containing the second material onto the surface of the capacitor body 1 and heating the paste attached to the end of the first material layer 11. Therefore, a strong second material layer 12 connected to the first material layer 11 can be formed.
  • ⁇ Fourth embodiment> In the method for manufacturing a multilayer ceramic capacitor in the fourth embodiment, similarly to the method for manufacturing a multilayer ceramic capacitor in the second embodiment, after forming the first material layer 11, the second material layer 12 is formed. .
  • the method for manufacturing a multilayer ceramic capacitor in the fourth embodiment differs from the method for manufacturing a multilayer ceramic capacitor in the second embodiment in the step of forming the second material layer 12.
  • FIG. 9 is a flowchart for explaining a method for manufacturing a multilayer ceramic capacitor in the fourth embodiment of the present disclosure.
  • the same processes as those in the flowchart shown in FIG. 6 are given the same reference numerals and detailed explanations are omitted.
  • step S31 a second material layer 12 is formed at the end of the first material layer 11.
  • the second material layer 12 is formed by attaching the second material to the end of the first material layer 11 by immersing the capacitor body 1 in a melting tank in which the second material is melted. do.
  • a melting tank in which the second material is melted is prepared, and the capacitor body 1 is immersed in the melting tank.
  • the molten second material adheres only to the ends of the first material layer 11, which is a conductor.
  • a second material layer 12 connected to the first material layer 11 is formed.
  • the method for manufacturing a multilayer ceramic capacitor in the fourth embodiment also ensures that the second material layer 12 is formed after forming the first material layer 11. can be formed.
  • the second material layer 12 is formed by attaching the second material to the end of the first material layer 11 by immersing the capacitor body 1 in a melting tank in which the second material is melted. A strong second material layer 12 connected to the first material layer 11 can be formed.
  • ⁇ Fifth embodiment> In the method for manufacturing a multilayer ceramic capacitor in the fifth embodiment, similarly to the method for manufacturing a multilayer ceramic capacitor in the second embodiment, after forming the first material layer 11, the second material layer 12 is formed. .
  • the method for manufacturing a multilayer ceramic capacitor in the fifth embodiment differs from the method for manufacturing a multilayer ceramic capacitor in the second embodiment in the step of forming the second material layer 12.
  • step S41 a second material layer 12 is formed at the end of the first material layer 11.
  • the second material layer 12 is formed by attaching the second material to the end of the first material layer 11 by vapor deposition.
  • a portion of the surface of the capacitor body 1 other than the position where the second material layer 12 is to be formed is covered with a mask 30.
  • the second main surface 1b of the capacitor body 1 is not covered with the mask 30 because it is the surface in contact with the mounting table on which the capacitor body 1 is placed, but it is covered with the mask 30. Good too.
  • a second material layer 12 is formed by evaporating the second material in a vacuum furnace and depositing the second material on the ends of the first material layer 11 that are not covered by the mask 30. Form. Thereafter, mask 30 is removed.
  • the method for manufacturing a multilayer ceramic capacitor in the fifth embodiment also ensures that the second material layer 12 is formed after forming the first material layer 11. can be formed. Furthermore, since the second material layer 12 is formed by attaching the second material to the end of the first material layer 11 by vapor deposition, the second material layer 12 has uniform dimensions in the stacking direction T. can be formed.
  • ⁇ Sixth embodiment> In the method for manufacturing a multilayer ceramic capacitor in the sixth embodiment, similarly to the method for manufacturing a multilayer ceramic capacitor in the second embodiment, after forming the first material layer 11, the second material layer 12 is formed. .
  • the method for manufacturing a multilayer ceramic capacitor in the sixth embodiment differs from the method for manufacturing a multilayer ceramic capacitor in the second embodiment in the step of forming the second material layer 12.
  • step S51 a second material layer 12 is formed at the end of the first material layer 11.
  • the second material layer 12 is formed by performing electroless plating. That is, the second material layer 12 is formed by immersing the capacitor body 1 in a plating solution in which the second material is dissolved and depositing the second material on the end of the first material layer 11. .
  • the method for manufacturing a multilayer ceramic capacitor in the sixth embodiment also ensures that the second material layer 12 is formed after forming the first material layer 11. can be formed. Furthermore, since the second material layer 12 is formed by electroless plating, the second material layer 12 can be easily formed by simply immersing the capacitor body 1 in a plating solution containing the second material. can be formed.
  • the present disclosure is not limited to the above embodiments, and various applications and modifications can be made within the scope of the present disclosure.
  • the method for forming the second material layer 12 at the end of the first material layer 11 is not limited to the methods described in the second to sixth embodiments, and may be formed by other methods. It is also possible to do so.
  • the steps of the second to sixth embodiments are further performed.
  • a step of forming the second material layer 12 in the embodiment may also be performed.
  • the manufacturing method of the multilayer ceramic capacitor in this application is as follows. ⁇ 1> a capacitor body in which a plurality of dielectric layers, a plurality of first internal electrodes, and a plurality of second internal electrodes are stacked; A multilayer ceramic capacitor comprising a first via conductor electrically connected to the capacitor body and a second via conductor provided inside the capacitor body and electrically connected to the plurality of second internal electrodes. A manufacturing method, forming a first material layer made of a first material in order to form the first via conductor and the second via conductor; A second material located at at least one end and made of a material different from the first material and containing any one of Sn, Sn-Ag, Sn-Ag-Cu, and Au as a main component.
  • a method for manufacturing a multilayer ceramic capacitor comprising: forming a second material layer made of the same material. ⁇ 2> a step of laminating a plurality of ceramic green sheets on which internal electrode patterns are formed to produce a laminate; forming holes for forming the first via conductor and the second via conductor in the laminate; filling the hole with a conductive paste for via conductor containing the first material and the second material having a lower melting point than the first material; Equipped with In the step of forming the first material layer and the step of forming the second material layer, the via conductor conductive paste is baked together with the capacitor body by firing the laminate in which the holes are filled.
  • the method for manufacturing a multilayer ceramic capacitor according to ⁇ 1> wherein the first material layer and the second material layer are formed.
  • ⁇ 3> a step of laminating a plurality of ceramic green sheets on which internal electrode patterns are formed to produce a laminate; forming holes for forming the first via conductor and the second via conductor in the laminate; filling the hole with a conductive paste for via conductor containing the first material; Equipped with In the step of forming the first material layer, the first material layer is formed together with the capacitor body by firing the laminate in which the holes are filled with the conductive paste for via conductors; The method for manufacturing a multilayer ceramic capacitor according to ⁇ 1>, wherein in the step of forming the second material layer, the second material layer is formed at an end of the first material layer.
  • the second material layer is formed by disposing and heating the second material.
  • a method for manufacturing multilayer ceramic capacitors In the step of forming the second material layer, a paste containing the second material is sprayed onto the surface of the capacitor body, and the adhered paste is heated to form the second material layer.
  • ⁇ 6> In the step of forming the second material layer, the capacitor body is immersed in a molten layer of the second material, thereby adhering the second material to form the second material layer.
  • the method for manufacturing a multilayer ceramic capacitor according to any one of ⁇ 1> to ⁇ 3> is any one of ⁇ 1> to ⁇ 3>.
  • the second material layer is formed by depositing the second material by vapor deposition, according to any one of ⁇ 1> to ⁇ 3>.
  • Manufacturing method of multilayer ceramic capacitor is a predefined step of forming the second material layer.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Ceramic Capacitors (AREA)
PCT/JP2023/024336 2022-07-04 2023-06-30 積層セラミックコンデンサの製造方法 Ceased WO2024009900A1 (ja)

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CN202380042722.0A CN119256380A (zh) 2022-07-04 2023-06-30 层叠陶瓷电容器的制造方法
KR1020247040793A KR20250007007A (ko) 2022-07-04 2023-06-30 적층 세라믹 콘덴서의 제조 방법
JP2024532093A JP7736192B2 (ja) 2022-07-04 2023-06-30 積層セラミックコンデンサの製造方法

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003188048A (ja) * 2001-12-20 2003-07-04 Kyocera Corp コンデンサ素子およびコンデンサ素子内蔵多層配線基板
JP2004153041A (ja) * 2002-10-31 2004-05-27 Ngk Spark Plug Co Ltd 積層コンデンサ
JP2007095756A (ja) * 2005-09-27 2007-04-12 Kyocera Corp 積層コンデンサ
JP2010045212A (ja) * 2008-08-13 2010-02-25 Tdk Corp 積層セラミック電子部品及びその製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7149072B2 (en) 2004-11-04 2006-12-12 Samsung Electro-Mechanics Co., Ltd. Multilayered chip capacitor array

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003188048A (ja) * 2001-12-20 2003-07-04 Kyocera Corp コンデンサ素子およびコンデンサ素子内蔵多層配線基板
JP2004153041A (ja) * 2002-10-31 2004-05-27 Ngk Spark Plug Co Ltd 積層コンデンサ
JP2007095756A (ja) * 2005-09-27 2007-04-12 Kyocera Corp 積層コンデンサ
JP2010045212A (ja) * 2008-08-13 2010-02-25 Tdk Corp 積層セラミック電子部品及びその製造方法

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