WO2023280990A1 - Verfahren zur herstellung eines strahlungsemittierenden halbleiterchips und strahlungsemittierender halbleiterchip - Google Patents
Verfahren zur herstellung eines strahlungsemittierenden halbleiterchips und strahlungsemittierender halbleiterchip Download PDFInfo
- Publication number
- WO2023280990A1 WO2023280990A1 PCT/EP2022/068939 EP2022068939W WO2023280990A1 WO 2023280990 A1 WO2023280990 A1 WO 2023280990A1 EP 2022068939 W EP2022068939 W EP 2022068939W WO 2023280990 A1 WO2023280990 A1 WO 2023280990A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- radiation
- semiconductor
- emitting semiconductor
- substrate
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 249
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 64
- 238000000034 method Methods 0.000 claims description 86
- 230000005670 electromagnetic radiation Effects 0.000 claims description 25
- 238000005530 etching Methods 0.000 claims description 18
- 229910052582 BN Inorganic materials 0.000 claims description 8
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 claims description 8
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052738 indium Inorganic materials 0.000 claims description 5
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 5
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 4
- XLSXPYPILRMNKF-UHFFFAOYSA-J [W+4].[O-][Se]([O-])=O.[O-][Se]([O-])=O Chemical compound [W+4].[O-][Se]([O-])=O.[O-][Se]([O-])=O XLSXPYPILRMNKF-UHFFFAOYSA-J 0.000 claims description 4
- 229910021389 graphene Inorganic materials 0.000 claims description 4
- INHWXZFVSTUXPN-UHFFFAOYSA-J molybdenum(4+) disulfite Chemical compound [Mo+4].[O-]S([O-])=O.[O-]S([O-])=O INHWXZFVSTUXPN-UHFFFAOYSA-J 0.000 claims description 4
- 238000000151 deposition Methods 0.000 abstract 4
- 239000010410 layer Substances 0.000 description 242
- 239000000463 material Substances 0.000 description 34
- 239000002019 doping agent Substances 0.000 description 17
- 230000005855 radiation Effects 0.000 description 10
- 229910002601 GaN Inorganic materials 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 230000006798 recombination Effects 0.000 description 5
- 238000005215 recombination Methods 0.000 description 5
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 150000001875 compounds Chemical class 0.000 description 4
- 230000007547 defect Effects 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 4
- 238000003631 wet chemical etching Methods 0.000 description 4
- 238000003486 chemical etching Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 239000011777 magnesium Substances 0.000 description 3
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 3
- 238000001451 molecular beam epitaxy Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 230000000087 stabilizing effect Effects 0.000 description 3
- 229910002704 AlGaN Inorganic materials 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical group [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 210000001654 germ layer Anatomy 0.000 description 2
- 229910052749 magnesium Inorganic materials 0.000 description 2
- -1 nitride compound Chemical class 0.000 description 2
- 150000004767 nitrides Chemical group 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 208000012868 Overgrowth Diseases 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- NWAIGJYBQQYSPW-UHFFFAOYSA-N azanylidyneindigane Chemical compound [In]#N NWAIGJYBQQYSPW-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- CXKCTMHTOKXKQT-UHFFFAOYSA-N cadmium oxide Inorganic materials [Cd]=O CXKCTMHTOKXKQT-UHFFFAOYSA-N 0.000 description 1
- CFEAAQFZALKQPA-UHFFFAOYSA-N cadmium(2+);oxygen(2-) Chemical compound [O-2].[Cd+2] CFEAAQFZALKQPA-UHFFFAOYSA-N 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000004581 coalescence Methods 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/54—Encapsulations having a particular shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
Definitions
- a method for producing a radiation-emitting semiconductor chip is specified. Furthermore, a radiation-emitting semiconductor chip is specified.
- One problem to be solved is to specify a method for producing a radiation-emitting semiconductor chip that is particularly easy to control.
- a further problem to be solved consists in specifying such a radiation-emitting semiconductor chip.
- the radiation-emitting semiconductor chip is, for example, a light-emitting diode, LED for short, in particular a micro-LED.
- a micro-LED has, for example, a maximum extent, in particular in lateral directions, of at least 1 gm, in particular at least 50 gm and at most 1000 gm, in particular approximately 200 gm.
- a substrate comprising, for example, a crystalline solid having a main surface.
- the main surface has a crystalline surface, for example.
- the crystalline surface is formed with, for example, a (111) plane of the crystalline solid.
- the substrate includes or consists of sapphire, gallium nitride, silicon carbide or silicon, for example.
- the substrate has a main extension plane, for example. Lateral directions are aligned parallel to the main plane of extension and a vertical direction is aligned perpendicular to the main plane of extension. For example, the main surface of the substrate extends in lateral directions.
- an intermediate layer is applied to the substrate.
- the intermediate layer comprises or consists of a two-dimensional material system, for example. Possible materials for a two-dimensional material are, for example, hexagonal boron nitride, graphene, molybdenum sulfite,
- the intermediate layer includes multiple sub-layers.
- each partial layer is formed from a single monolayer of the two-dimensional material system.
- the intermediate layer has, for example, a thickness of at least 0.5 nm to at most 100 nm, for example approximately 3 nm, in the vertical direction.
- the intermediate layer is applied to the substrate, for example, by means of chemical vapor deposition (CVD for short).
- chemical vapor deposition is metal-organic vapor phase epitaxy (MOVPE for short).
- MOVPE metal-organic vapor phase epitaxy
- the intermediate layer can be applied using an MBE method (molecular beam epitaxy).
- a semiconducting layer sequence is applied to the intermediate layer.
- the semiconducting layer sequence comprises a III-V compound semiconductor material, for example.
- the III-V compound semiconductor material is, for example, a nitride compound semiconductor material.
- the compound semiconductor material comprises gallium nitride.
- the semiconducting layer sequence is applied epitaxially to the intermediate layer, for example.
- the semiconducting layer sequence is applied to the intermediate layer by means of a CVD process, in particular a MOVPE process, or an MBE process.
- an etching stop layer is applied to the semiconducting layer sequence.
- the etch stop layer is formed with an etch resistant layer, for example.
- the etch stop layer is a predetermined layer with a predetermined material composition. If, for example, the predetermined material composition of the etch stop layer is detected during an etching process, the etching process is stopped.
- the etch stop layer includes or consists of indium nitride, aluminum nitride and/or gallium nitride, for example.
- the etch stop layer has a thickness of at least 10 nm and at most 100 nm, for example approximately 50 nm, in the vertical direction.
- the etch stop layer comprises or consists of the material of Intermediate layer or another two-dimensional material system.
- a semiconductor body having a sloping side face is applied epitaxially to the etch stop layer.
- the sloping side surface can be grown by an epitaxial process similar to ELOG (epitaxial lateral overgrowth), but without coalescence of neighboring structures.
- An angle of the sloping side face to the main plane of extent can be specified via an interaction of structure dimensions, which are defined for example by a mask, and of growth parameters, such as pressure, temperature, chemical composition, etc.
- the semiconductor body is applied epitaxially to the etch stop layer, for example.
- the semiconductor body is applied to the intermediate layer by means of the CVD process, in particular the MOVPE process.
- the semiconductor body is designed, for example, to emit electromagnetic radiation.
- the electromagnetic radiation is, for example, near-ultraviolet radiation, visible radiation and/or near-infrared radiation.
- the visible radiation is, for example, light of a blue, green, yellow or red color.
- the semiconductor body has, for example, the III-V compound semiconductor material of the semiconducting layer sequence.
- the semiconductor body includes the Semiconductor body a nitride compound semiconductor material, in particular gallium nitride.
- the side surface of the semiconductor body includes, for example, an angle of at least 30° and at most 80° with the main plane of extension.
- the angle between the side surface of the semiconductor body and the main plane of extent is approximately 50°.
- the semiconductor body is grown, for example, on a stack comprising the substrate, the intermediate layer, the semiconducting layer sequence and the etching stop layer.
- the stack is designed, for example, to generate particularly few strains in the semiconductor body during the growth of the semiconductor body.
- a semiconductor body grown in this way therefore advantageously has particularly few defects.
- the substrate, the intermediate layer and the semiconducting layer sequence are removed down to the etch stop layer.
- the elements to be removed are removed by means of an etching process.
- the etching process is, for example, a wet-chemical etching process and/or a dry-chemical etching process.
- the etch stop layer which is still arranged on the semiconducting layer sequence, for example, is then removed.
- the removal of the etching stop layer exposes the semiconductor body, in particular the first semiconductor layer.
- the etch stop layer is removed, for example, by means of a further dry or wet chemical etching process and/or by means of mechanical grinding and/or by means of polishing removed.
- the polishing is, for example, a chemical-mechanical polishing process.
- the uncovered first semiconductor layer of the semiconductor body which was covered by the etch stop layer, is roughened, for example.
- the method for producing a radiation-emitting semiconductor chip comprises providing a substrate, applying an intermediate layer to the substrate, applying a semiconducting layer sequence to the intermediate layer, applying an etch stop layer to the semiconducting layer sequence, epitaxially applying a semiconductor body with a inclined side surface on the etch stop layer and the removal of the substrate, the intermediate layer and the semiconducting layer sequence up to the etch stop layer.
- One idea of the method described here for producing a radiation-emitting semiconductor chip is, inter alia, that the semiconductor body is produced on an intermediate layer, which is in particular a two-dimensional material system.
- Two-dimensional material systems when they are stacked one on top of the other in the vertical direction, have, for example, a binding force in the vertical direction that is many times smaller than a binding force in lateral directions.
- the substrate can thus advantageously be detached from the semiconductor body in a particularly simple manner.
- a detached substrate is advantageously reusable.
- Such a method is therefore advantageously particularly cost-effective.
- an etch stop layer is arranged between the semiconductor body and the semiconducting layer sequence.
- the semiconductor body is advantageously produced in a particularly simple manner by removing the elements down to the etching stop layer.
- the semiconductor body has a first semiconductor layer of a first doping type, a second semiconductor layer of a second doping type that differs from the first doping type, and an active region.
- the active region has, for example, a pn junction, a double heterostructure, a single quantum well structure or a multiple quantum well structure.
- the first semiconductor layer faces the substrate.
- the first semiconductor layer includes, for example, first dopants of an n-type.
- the first doping type is thus an n-doped type, for example.
- the second semiconductor layer faces away from the substrate, for example.
- the second semiconductor layer comprises second dopants of a p-type, for example.
- the first doping type is thus a p-doped type, for example.
- the active region is arranged between the first semiconductor layer and the second semiconductor layer.
- the active area is designed, for example, to generate electromagnetic radiation.
- Semiconductor body and the vertical direction can be predetermined as a function of at least one growth parameter.
- the growth parameter is, for example, a growth pressure, a growth temperature and/or a dopant concentration.
- the dopants are, for example, magnesium and/or silicon.
- the first semiconductor layer includes, for example, silicon as a dopant and the second semiconductor layer includes, for example, magnesium as a dopant.
- a dopant concentration of the dopants is, for example, at least 5-IO 17 cm -3 and at most 5-IO 18 cm -3 .
- Such an epitaxially produced sloping side surface of the semiconductor body does not have to be further structured subsequently, for example.
- the slope is advantageously not produced by an etching process.
- an etching process for example, defects are induced in the area of the inclined side surface, which act as non-radiating recombination centers. The etching process thus increases, for example, non-radiative recombination on the sloping side surface.
- the sloping side surface of the semiconductor body is produced epitaxially, so that the semiconductor body has a lower defect density in the region of the sloping side surface than in the region of a sloping side surface that is produced by means of an etching process.
- a radiation-emitting generated in this way The semiconductor chip is advantageously particularly effective and emits electromagnetic radiation particularly homogeneously over its entire radiation exit area.
- a mask with at least one opening is applied to the substrate.
- the substrate is freely accessible in the opening, for example.
- the mask includes or consists of silicon nitride or silicon dioxide, for example.
- the intermediate layer is applied to the freely accessible substrate and the mask.
- the intermediate layer can be applied directly to the entire surface of the substrate and the mask can then be applied to the intermediate layer and then structured.
- a material of the mask is applied to the substrate over the entire area, for example.
- the material of the mask is applied to the substrate, for example, by means of plasma-enhanced chemical vapor deposition (PECVD for short).
- PECVD plasma-enhanced chemical vapor deposition
- the opening is produced, for example, by means of a photolithographic process.
- the mask has, for example, a thickness in the vertical direction of at least 100 nm and at most 1000 nm, in particular approximately 400 nm.
- a shape of the semiconductor body in lateral directions is specified, for example, by a shape of the opening in lateral directions.
- the opening is, for example, round, oval, triangular, square or hexagonal in plan view.
- a shape of the semiconductor body is thus advantageously also embodied as round, oval, triangular, quadrangular or hexagonal, for example in a plan view.
- Different semiconductor bodies can, for example, be structured in different sizes, in particular also in the combination of different sizes and shapes on one substrate.
- the semiconducting layer sequence comprises a seed layer and a further semiconductor layer of the first doping type.
- the seed layer comprises AlGaN, for example.
- the aluminum has, for example, a mole fraction in the seed layer of at least 10% and at most 20%, in particular approximately 14%.
- the seed layer has, for example, a thickness in the vertical direction of at least 50 nm and at most 500 nm, in particular approximately 200 nm.
- the further semiconductor layer comprises (Al;In;Ga)N, for example.
- the further semiconductor layer is formed from the same material as the first semiconductor layer, for example. That is to say that the further semiconductor layer comprises the first dopant, for example.
- the seed layer is applied to the intermediate layer, which is arranged in the opening on the substrate.
- the intermediate layer which is arranged on the substrate, has a crystalline crystal structure, for example.
- the seed layer for example, is grown on such a crystalline crystal structure.
- the intermediate layer, which is arranged on the mask has, for example, an amorphous crystal structure on which the seed layer does not grow and/or does not grow in a crystalline manner.
- the material of the seed layer which is applied, for example, to the mask, in particular to a top surface and to a side surface of the mask, does not have a crystalline form, for example. That is, on top of the mask, particularly between the mask and the seed layer, is a residue layer formed with amorphous residues of the seed layer material.
- the further semiconductor layer is applied to the seed layer.
- the seed layer is designed, for example, to act as a buffer layer between the epitaxially grown further semiconductor layer and the intermediate layer. Such a nucleus layer thus advantageously promotes nucleation of the further semiconductor layer.
- a further semiconductor layer applied in this way also preferably has a particularly low defect density.
- the semiconductor body is thus also advantageously designed to be particularly defect-free.
- the further semiconductor layer grows over the mask in lateral directions. This means that the further semiconductor layer protrudes beyond the opening in lateral directions.
- the grown first semiconductor layer grows over the mask in lateral directions on the further semiconductor layer. This means that the first semiconductor layer protrudes beyond the opening in lateral directions.
- the further semiconductor layer widens in a direction facing away from the substrate. This direction runs parallel to the vertical direction, for example.
- the semiconductor body tapers in a direction facing away from the substrate.
- the intermediate layer comprises hexagonal boron nitride, graphene, molybdenum sulfite, tungsten selenite or fluorographene.
- the intermediate layer disposed in the opening on the substrate is covered with multiple sub-layers of hexagonal boron nitride, graphene, molybdenum sulfite,
- a thickness of a partial layer of hexagonal boron nitride along the vertical direction is about 0.33 nm, for example.
- the intermediate layer which is arranged on the mask, for example, comprises, for example, boron and nitride atoms arranged in an irregular manner.
- the semiconductor chip is designed to generate electromagnetic radiation during operation.
- a peak wavelength of the electromagnetic radiation can be specified as a function of an indium and/or aluminum content of the semiconductor body.
- the peak wavelength of the electromagnetic radiation can be predetermined as a function of the indium and/or aluminum content of the active region.
- various radiation-emitting semiconductor chips can advantageously be produced, with the indium and/or aluminum content being able to be specified particularly easily during the growth of the active region.
- the method specified here can thus advantageously be used to produce radiation-emitting semiconductor chips which have peak wavelengths that differ from one another, without significantly changing the method.
- a first electrode layer is applied to a first main surface of the semiconductor body that is remote from the substrate.
- the first electrode layer comprises or consists of a metal, for example.
- the first electrode layer is designed, for example, to be contacted from the outside.
- the semiconductor body is prior to the removal of the substrate, the intermediate layer, the seed layer and the other Semiconductor layer arranged on a temporary carrier.
- the temporary carrier forms a mechanically stabilizing component of the radiation-emitting semiconductor chip.
- the substrate is removed along the intermediate layer.
- the intermediate layer has binding forces in the vertical direction that are many times lower than binding forces in the lateral directions.
- the substrate can thus be separated particularly easily.
- such a substrate can be reusable.
- the seed layer is removed after the removal of the substrate. Furthermore, when removing the germ layer, for example, the residue layer is also removed. The removal is carried out, for example, using a wet-chemical etching process and/or a dry-chemical etching process.
- the first semiconductor layer is removed up to the etch stop layer.
- a second electrode layer is applied to a second main area of the semiconductor body that is opposite the first main area.
- the second electrode layer has, for example, electrically conductive metals or transparent, electrically conductive oxides (“transparent conductive oxide”, TCO) or is formed from them.
- transparent conductive oxide TCO
- it is zinc oxide, tin oxide, cadmium oxide, titanium oxide, indium oxide or Indium tin oxide (ITO for short) around TCO.
- the TCOs are provided with a dopant.
- the dopant is designed, for example, to give the TCOs electrically conductive properties.
- a mirror layer is applied to the sloping side surface.
- the mirror layer completely covers the sloping side surface.
- the mirror layer completely covers all side surfaces of the semiconductor body.
- the mirror layer comprises, for example, a number of sub-layers.
- the partial layers each have a dielectric material and/or a metal, for example.
- the mirror layer preferably comprises alternately arranged partial layers of a high-index and a low-index material and, as the outermost layer, a metal.
- the mirror layer is a dielectric mirror such as a Bragg mirror in combination with a metal mirror.
- the mirror layer has, for example, a reflectivity of at least 90%, preferably at least 99%, for the generated electromagnetic radiation.
- a radiation-emitting semiconductor chip is also specified.
- the radiation-emitting semiconductor chip can be produced in particular using the method for producing a radiation-emitting semiconductor chip described here. This means that a radiation-emitting semiconductor chip described here can be produced using the method described or is used with the method described. All features disclosed in connection with the method are therefore also disclosed in connection with the radiation-emitting semiconductor chip and vice versa.
- the radiation-emitting semiconductor chip comprises a semiconductor body which is designed to emit electromagnetic radiation.
- the semiconductor body has an inclined side face.
- the sloping side face is produced epitaxially.
- Such a semiconductor body with such an epitaxially produced oblique side face advantageously has fewer non-radiative recombination centers in the region of the oblique side face than a semiconductor body in which the oblique side face is produced by an etching process.
- Undesired recombination is advantageously suppressed by such an epitaxially produced oblique side face.
- the inclined side face it is possible for the inclined side face to extend over the entire side of the semiconductor body. It is also possible for the semiconductor body to be laterally delimited exclusively by oblique side surfaces is which connect a top surface to a bottom surface of the semiconductor body.
- the semiconductor body has a first main area and an opposite second main area.
- a first electrode layer is arranged on the first main area.
- a second electrode layer is arranged on the second main area.
- the second electrode layer is transparent to the generated electromagnetic radiation.
- the second electrode layer is designed, for example, to absorb at most 4%, in particular at most 2%, of the electromagnetic radiation generated. This means that the second electrode layer transmits at least 96%, in particular at least 98%, of the electromagnetic radiation generated.
- the radiation-emitting semiconductor component comprises a radiation-emitting semiconductor chip described here. All features disclosed in connection with the radiation-emitting semiconductor chip are therefore also in connection with the Radiation-emitting semiconductor component disclosed and vice versa.
- the radiation-emitting semiconductor component comprises an encapsulation body which surrounds the oblique side surface of the semiconductor body in lateral directions.
- the enclosing body completely covers the sloping side surface.
- the encapsulating body includes or consists of silicon dioxide, for example.
- connection element which is in electrically conductive contact with the second electrode layer is arranged on the encapsulating body.
- the connecting element includes or consists of a metal.
- the connecting element is designed, for example, to be able to be contacted from the outside.
- a connection element which is in electrically conductive contact with the second electrode layer, extends completely through the enclosing body.
- the enclosing body includes a recess that completely breaks through the enclosing body in the vertical direction.
- the connection element is arranged in the recess.
- connection element is arranged on a side face of the enclosing body and extends in the vertical direction over the entire enclosing body, in particular over the entire lateral surface, in the vertical direction.
- a radiation-emitting semiconductor component which comprises at least two radiation-emitting semiconductor chips described here. All features disclosed in connection with the radiation-emitting semiconductor chip are therefore also disclosed in connection with the radiation-emitting semiconductor component and vice versa.
- the radiation-emitting semiconductor component comprises a carrier on which the radiation-emitting semiconductor chips are arranged.
- the carrier is, for example, a mechanically stabilizing component of the radiation-emitting semiconductor chip.
- the carrier can be, for example, a printed circuit board (PCB for short) or a lead frame.
- At least some of the radiation-emitting semiconductor chips are designed to emit electromagnetic radiation with peak wavelengths that differ from one another.
- all of the radiation-emitting semiconductor chips are produced using a method described here.
- each radiation-emitting semiconductor chip has a separate second electrode layer.
- each of the Radiation-emitting semiconductor chip arranged its own separate second electrode layer.
- all of the radiation-emitting semiconductor chips have a common second electrode layer.
- FIGS. 1, 2, 3, 4, 5 and 6 show schematic sectional illustrations of method stages in the production of a radiation-emitting semiconductor chip according to an exemplary embodiment
- FIGS. 7 and 8 show schematic sectional illustrations of method stages in the production of a radiation-emitting semiconductor chip according to one exemplary embodiment in each case
- FIG. 9 shows a schematic sectional illustration of a radiation-emitting semiconductor chip according to an exemplary embodiment
- FIG. 10 shows a schematic sectional illustration of a radiation-emitting semiconductor component in accordance with an exemplary embodiment
- FIGS. 11 and 12 each show a schematic sectional illustration of a radiation-emitting semiconductor component in accordance with an exemplary embodiment.
- a substrate 2 is provided, onto which an intermediate layer 3, a semiconducting layer sequence 4, an etching stop layer 7 and a semiconductor body 8 are applied by means of a mask 13.
- a mask 13 is applied to the substrate 2 .
- the mask 13 includes an opening 14 in which the substrate 2 is freely accessible.
- the mask 13 has a thickness of approximately 400 nm in the vertical direction, for example.
- An intermediate layer 3 is then applied.
- a material of the intermediate layer 3 is applied to the substrate 2 , which is freely accessible in the opening 14 , and to the mask 13 .
- the substrate 2 is heated to a temperature of approximately 1300° C. when the material of the intermediate layer 3 is applied.
- the material of the intermediate layer 3 includes, for example, boron and nitride.
- partial layers of hexagonal boron nitride are produced on the substrate 2 .
- the intermediate layer 3 produced has a thickness of 3 nm in the vertical direction. Such a thickness corresponds in particular to ten partial layers of hexagonal boron nitride.
- the partial layers have a binding force in the vertical direction that is many times smaller than a binding force of the atoms within the partial layers in lateral directions.
- the material of the intermediate layer 3 applied to the mask 13 does not change into a crystalline state.
- it is an amorphous boron nitride layer.
- the semiconducting layer sequence 4 is then applied to the intermediate layer 3 in the opening 14 .
- the semiconducting layer sequence 4 includes a seed layer 5 and a further semiconductor layer.
- the seed layer 5 is applied directly to the intermediate layer 3 in the opening 14 .
- the substrate 2 and the intermediate layer 3 are heated to a temperature of approximately 1100° C. when the material of the seed layer 5 is applied.
- the material of the seed layer 5 comprises AlGaN, for example, and has a thickness of approximately 200 nm in the vertical direction.
- the intermediate layer 3, in particular the material of the intermediate layer 3, is in an amorphous state on the mask 13, the material of the seed layer 5 does not grow in these regions either in a crystalline manner but in an amorphous manner. Accordingly, the mask 13 is completely surrounded by a residue layer 15 which comprises the material of the seed layer 5 . the Residual material layer 15 is thus arranged between mask 13 and seed layer 5 .
- the further semiconductor layer 6 is then grown on the seed layer 5 .
- the further semiconductor layer 6 comprises GaN, for example, which has first dopants.
- the first dopants are in particular Si.
- the further semiconductor layer 6 also has a thickness in the vertical direction of approximately 150 nm.
- the further semiconductor layer 6 grows over the mask 13 in lateral directions.
- a side surface of the further semiconductor layer 6 is formed obliquely.
- the side face is formed obliquely in such a way that the further semiconductor layer 6 widens in a direction facing away from the substrate 2 .
- the further semiconductor layer 6 thus protrudes beyond the opening 14 in lateral directions.
- An etch stop layer 7 is subsequently applied to the further semiconductor layer 6 .
- the etch stop layer 7 completely covers a main area of the further semiconductor layer 6 that faces away from the substrate 2 .
- the etching stopper layer 7 comprises InN, AlN or GaN and has a thickness of approximately 50 nm in the vertical direction.
- the semiconductor body 8 is then applied to the etch stop layer 7, in particular the first semiconductor layer 10 is then applied to the etch stop layer 7.
- the first semiconductor layer 10 comprises GaN, for example, which has first dopants.
- the first dopants are, in particular, Si.
- the first semiconductor layer 10 further has a thickness in the vertical direction of approximately 150 nm.
- the active region 11 is applied to the first semiconductor layer 10 .
- the active region 11 has a multiple quantum well structure, for example.
- Barrier layers of the multiple quantum well structure include GaN, for example, and quantum well layers include InGaN, for example.
- the In content of the active region 11 can be predetermined.
- a peak wavelength of an electromagnetic radiation to be generated in the active region 11 can be specified in particular as a function of the indium content of the active region 11 .
- the second semiconductor layer 12 is subsequently applied to the active region 11 .
- the second semiconductor layer 12 comprises GaN, for example, which has second dopants.
- the second dopants are, in particular, Mg.
- the second semiconductor layer 12 also has a thickness of approximately 175 nm in the vertical direction.
- the semiconductor body 8 has an inclined side face 9 .
- the inclined side surface 9 is formed in such a way that the semiconductor body 8 tapers in a direction facing away from the substrate 2 .
- An angle between the inclined side surface 9 of the semiconductor body 8 and the vertical direction can be specified as a function of at least one growth parameter.
- the angle between the inclined side surface 9 and the vertical direction in about 60 °.
- a first electrode layer 18 is applied to the semiconductor body 8 .
- the first electrode layer 18 is applied to a first main area 16 of the semiconductor body 8 which faces away from the substrate 2 .
- the first electrode layer 18 is applied to the second semiconductor layer 12 .
- a mirror layer 21 is applied to the inclined side face 9 .
- the mirror layer 21 is also arranged on the first main surface 16 of the semiconductor body 8 which is not covered by the first electrode layer 18 .
- the mirror layer 21 is a Bragg mirror, for example.
- the generated electromagnetic radiation can thus be coupled out particularly effectively via the radiation exit surface 24, as shown in FIG.
- An encapsulation body 22 is then applied to the semiconductor body 8 .
- the encapsulating body 22 completely surrounds the semiconductor body 8 . Furthermore, the enclosing body 22 completely covers the mirror layer 21 .
- the encapsulating body 22 terminates flush with the first electrode layer 18 in the vertical direction.
- a temporary carrier 23 is then arranged on the first electrode layer 18 according to FIG.
- the temporary carrier 23 forms a mechanically stabilizing component for the arrangement for subsequent method steps.
- the substrate 2 with the mask 13 is removed. Since the intermediate layer 3 does not have high bonding forces in the vertical direction, the substrate 2 and the mask 13 can be detached without being destroyed. The substrate 2 with the mask 13 can thus be reused.
- the seed layer 5 and the residue layer 15 are removed.
- the further semiconductor layer 6 is removed down to the etch stop layer 7.
- FIG. 6 the further semiconductor layer 6 is removed up to the etch stop layer 7 by means of an etching process.
- the etching process is, for example, a wet-chemical etching process and/or a dry-chemical etching process.
- the etch stop layer 7 remaining on the semiconductor body 8 is subsequently removed, for example by means of a grinding process, so that a second main area 17 of the semiconductor body 8, in particular the first semiconductor layer 10, is uncovered.
- the inclined side surface 9 it is possible for the inclined side surface 9 to extend over the entire side of the semiconductor body 8 . It is also possible for the semiconductor body 8 to be laterally delimited exclusively by sloping side surfaces which connect a top surface to a bottom surface of the semiconductor body 8 .
- a second electrode layer 19 is on the exposed first semiconductor layer 10 on the second main surface 17 of the semiconductor body 8 is arranged.
- the second electrode layer 19 completely covers the second main surface 17 and is formed from a material that is transparent to electromagnetic radiation.
- connection element 20 is produced which is electrically conductive, in particular in direct contact, with the second electrode layer 19 .
- connection element 20 is arranged on the encapsulating body 22 in FIG. 7 and extends only partially in the vertical direction into the encapsulating body 22. Contact can be made with a radiation-emitting semiconductor chip 1 produced in this way from two opposite sides.
- the connecting element 20 is arranged on a side surface of the enclosing body 22.
- the terminal member 20 fully extends over the side surface of the case body 22 in the vertical direction.
- a radiation-emitting semiconductor chip 1 produced in this way can be contacted from a common side by means of the first electrode layer 18 and the connection element 20 .
- the radiation-emitting semiconductor chip 1 according to the exemplary embodiment in FIG. 9 comprises a semiconductor body 8 which is designed to emit electromagnetic radiation.
- the semiconductor body 8 has a sloping side surface 9, with the sloping side surface 9 being produced epitaxially.
- the Semiconductor body is produced in particular by the method specified here.
- Non-radiative recombination is advantageously suppressed by means of a sloping side face 9 produced in this way, so that such a radiation-emitting semiconductor chip 1 is formed particularly effectively.
- the electromagnetic radiation is transmitted via a
- Radiation exit surface 24 is coupled out, which is arranged opposite the first electrode layer 18 .
- the radiation-emitting semiconductor component 25 in accordance with the exemplary embodiment in FIG. 10 comprises a radiation-emitting semiconductor chip 1 in accordance with FIG. 9 and is arranged in an encapsulating body 22 .
- the encapsulation body 22 is not applied to the semiconductor body 8 during the method.
- the radiation-emitting semiconductor chip 1 is inserted into an encapsulation body 22 which has a cavity and is produced separately.
- the radiation-emitting semiconductor component 25 each includes a plurality of radiation-emitting semiconductor chips 1, here for example three different ones.
- the radiation-emitting semiconductor chips 1 are arranged on a carrier 26, via which the radiation-emitting semiconductor chips 1 are contacted.
- the radiation-emitting semiconductor chips 1 are designed to emit electromagnetic radiation with peak wavelengths that differ from one another.
- the radiation-emitting semiconductor chip la the left area is arranged on the carrier 26 emits, for example, blue light
- the radiation-emitting semiconductor chip lb which is arranged in the central area on the carrier 26, emits, for example, green light
- the radiation-emitting semiconductor chip lc which is arranged in the right-hand area on the carrier 26, emits red light, for example.
- the methods described here can thus be used to produce radiation-emitting semiconductor chips 1 which are used in particular in an RGB display.
- each second electrode layer 19 is electrically conductively connected to an individual connection element 20 .
- a common second electrode layer 19 is arranged on the semiconductor body 8 in the exemplary embodiment in FIG.
- the common second electrode layer 19 covers each of the semiconductor bodies 8 .
- the common second electrode layer 19 is electrically conductively connected to a single common connection element 20 .
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020247003974A KR20240024292A (ko) | 2021-07-09 | 2022-07-07 | 방사선 방출 반도체 칩을 제조하기 위한 방법, 및 방사선 방출 반도체 칩 |
DE112022001462.8T DE112022001462A5 (de) | 2021-07-09 | 2022-07-07 | Verfahren zur herstellung eines strahlungsemittierenden halbleiterchips und strahlungsemittierender halbleiterchip |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102021207298.4 | 2021-07-09 | ||
DE102021207298.4A DE102021207298A1 (de) | 2021-07-09 | 2021-07-09 | Verfahren zur herstellung eines strahlungsemittierenden halbleiterchips und strahlungsemittierender halbleiterchip |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2023280990A1 true WO2023280990A1 (de) | 2023-01-12 |
Family
ID=82748633
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2022/068939 WO2023280990A1 (de) | 2021-07-09 | 2022-07-07 | Verfahren zur herstellung eines strahlungsemittierenden halbleiterchips und strahlungsemittierender halbleiterchip |
Country Status (3)
Country | Link |
---|---|
KR (1) | KR20240024292A (de) |
DE (2) | DE102021207298A1 (de) |
WO (1) | WO2023280990A1 (de) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2249406A2 (de) * | 2009-05-04 | 2010-11-10 | LG Innotek Co., Ltd. | Lichtemittierende Vorrichtung, Verpackung und System |
US20160197232A1 (en) * | 2015-01-06 | 2016-07-07 | Apple Inc. | Led structures for reduced non-radiative sidewall recombination |
WO2019055936A1 (en) * | 2017-09-15 | 2019-03-21 | The Regents Of The University Of California | METHOD OF REMOVING A SUBSTRATE USING A CLEAVAGE TECHNIQUE |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008048704A2 (en) | 2006-03-10 | 2008-04-24 | Stc.Unm | Pulsed growth of gan nanowires and applications in group iii nitride semiconductor substrate materials and devices |
DE102010012711A1 (de) | 2010-03-25 | 2011-09-29 | Osram Opto Semiconductors Gmbh | Strahlungsemittierendes Halbleiterbauelement und Verfahren zur Herstellung eines strahlungsemittierenden Halbleiterbauelements |
KR101710159B1 (ko) | 2010-09-14 | 2017-03-08 | 삼성전자주식회사 | Ⅲ족 질화물 나노로드 발광소자 및 그 제조 방법 |
-
2021
- 2021-07-09 DE DE102021207298.4A patent/DE102021207298A1/de not_active Withdrawn
-
2022
- 2022-07-07 KR KR1020247003974A patent/KR20240024292A/ko active Search and Examination
- 2022-07-07 WO PCT/EP2022/068939 patent/WO2023280990A1/de active Application Filing
- 2022-07-07 DE DE112022001462.8T patent/DE112022001462A5/de active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2249406A2 (de) * | 2009-05-04 | 2010-11-10 | LG Innotek Co., Ltd. | Lichtemittierende Vorrichtung, Verpackung und System |
US20160197232A1 (en) * | 2015-01-06 | 2016-07-07 | Apple Inc. | Led structures for reduced non-radiative sidewall recombination |
WO2019055936A1 (en) * | 2017-09-15 | 2019-03-21 | The Regents Of The University Of California | METHOD OF REMOVING A SUBSTRATE USING A CLEAVAGE TECHNIQUE |
Also Published As
Publication number | Publication date |
---|---|
DE102021207298A1 (de) | 2023-01-12 |
DE112022001462A5 (de) | 2023-12-28 |
KR20240024292A (ko) | 2024-02-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE112014000592B4 (de) | Verfahren zum Herstellen von lichtemittierenden Nanostrukturhalbleitervorrichtungen | |
DE112006001084B4 (de) | Licht emittierende Bauelemente mit aktiven Schichten, die sich in geöffnete Grübchen erstrecken | |
DE102012109460B4 (de) | Verfahren zur Herstellung eines Leuchtdioden-Displays und Leuchtdioden-Display | |
EP2260516B1 (de) | Optoelektronischer halbleiterchip und verfahren zur herstellung eines solchen | |
EP3345225B1 (de) | Optoelektronisches halbleiterbauelement und verfahren zu dessen herstellung | |
DE112004002809B9 (de) | Verfahren zum Herstellen eines strahlungsemittierenden Halbleiterchips und durch dieses Verfahren hergestellter Halbleiterchip | |
EP2289115A1 (de) | Verfahren zur herstellung eines optoelektronischen bauelementes und ein optoelektronisches bauelement | |
DE112013004996T5 (de) | Halbleitervorrichtung und Verfahren zu deren Herstellung | |
WO2012049031A1 (de) | Verfahren zur herstellung einer halbleiterschichtenfolge, strahlungsemittierender halbleiterchip und optoelektronisches bauteil | |
DE112014001423T5 (de) | Halbleiterstrukturen mit InGaN umfassenden Aktivbereichen, Verfahren zum Bilden derartiger Halbleiterstrukturen und aus derartigen Halbleiterstrukturen gebildete Licht emittierende Vorrichtungen | |
EP1299909B1 (de) | LUMINESZENZDIODENCHIP AUF DER BASIS VON InGaN UND VERFAHREN ZU DESSEN HERSTELLUNG | |
DE112014000439B4 (de) | Optoelektronischer Halbleiterchip und Verfahren zum Herstellen eines optoelektronischen Halbleiterchips | |
WO2019206669A1 (de) | Optoelektronischer halbleiterkörper, anordnung von einer vielzahl von optoelektronischen halbleiterkörpern und verfahren zur herstellung eines optoelektronischen halbleiterkörpers | |
WO2011080144A2 (de) | Optoelektronischer halbleiterchip und verwendung einer auf algan basierenden zwischenschicht | |
DE102018123930A1 (de) | Optoelektronischer Halbleiterchip mit erstem und zweitem Kontaktelement und Verfahren zur Herstellung des optoelektronischen Halbleiterchips | |
DE102017105943A1 (de) | Optoelektronischer Halbleiterchip und Verfahren zu dessen Herstellung | |
WO2023280990A1 (de) | Verfahren zur herstellung eines strahlungsemittierenden halbleiterchips und strahlungsemittierender halbleiterchip | |
DE102018119688A1 (de) | Optoelektronisches Halbleiterbauelement mit einem ersten Kontaktelement, welches einen ersten und einen zweiten Abschnitt aufweist sowie Verfahren zur Herstellung des optoelektronischen Halbleiterbauelements | |
WO2020239749A1 (de) | Optoelektronisches halbleiterbauelement mit verbindungsbereichen und verfahren zur herstellung des optoelektronischen halbleiterbauelements | |
WO2020127435A1 (de) | Optoelektronisches halbleiterbauelement und dessen herstellungsverfahren | |
DE102020202613A1 (de) | Verfahren zur herstellung eines halbleiterbauelements, halbleiterbauelement und optoelektronische vorrichtung | |
WO2017021301A1 (de) | Verfahren zur herstellung eines nitrid-halbleiterbauelements und nitrid-halbleiterbauelement | |
WO2024033375A1 (de) | Optoelektronisches halbleiterbauelement mit epitaktisch gewachsener schicht und verfahren zur herstellung des optoelektronischen halbleiterbauelements | |
DE102020106113A1 (de) | Strahlungsemittierender halbleiterkörper, strahlungsemittierender halbleiterchip und verfahren zur herstellung eines strahlungsemittierenden halbleiterkörpers | |
WO2023078912A1 (de) | Oberflächenemittierender halbleiterlaser und verfahren zur herstellung eines oberflächenemittierenden halbleiterlasers |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 22748275 Country of ref document: EP Kind code of ref document: A1 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 112022001462 Country of ref document: DE |
|
REG | Reference to national code |
Ref country code: DE Ref legal event code: R225 Ref document number: 112022001462 Country of ref document: DE |
|
ENP | Entry into the national phase |
Ref document number: 20247003974 Country of ref document: KR Kind code of ref document: A |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1020247003974 Country of ref document: KR |