WO2023231382A1 - Positive-angle lapping gallium oxide schottky diode device and manufacturing method therefor - Google Patents
Positive-angle lapping gallium oxide schottky diode device and manufacturing method therefor Download PDFInfo
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- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 title claims abstract description 147
- 229910001195 gallium oxide Inorganic materials 0.000 title claims abstract description 147
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 7
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- 238000002360 preparation method Methods 0.000 description 11
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- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 4
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- 238000005516 engineering process Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
Definitions
- Gallium oxide is an emerging semiconductor material with a series of excellent properties such as a large bandgap width and high theoretical breakdown field strength. The use of gallium oxide to manufacture power semiconductor devices has gradually become an important development direction. In some specific areas, gallium oxide power devices are expected to replace traditional silicon-based power devices.
- Schottky diode is a power semiconductor device. Schottky diodes made of gallium oxide can be called gallium oxide Schottky diodes. Schottky diodes have the advantages of high switching frequency and forward voltage drop. However, the reduction in Schottky barrier height caused by the image force will limit the advantageous characteristics of gallium oxide Schottky diodes. In order to solve this problem, high-resistance terminals, field plate terminals or ground-angle terminals can be used, all of which are beneficial to improving device characteristics.
- the present application provides a positive grinding angle gallium oxide diode device and a preparation method thereof.
- the preparation method can realize the processing of the positive grinding angle terminal structure of the gallium oxide Schottky diode, thereby effectively improving the device characteristics.
- gallium oxide diode device including:
- the gallium oxide epitaxial layer 2 can be cleaned with acetone, isopropyl alcohol and deionized water.
Abstract
The present application relates to the technical field of semiconductor device manufacturing. Provided are a positive-angle lapping gallium oxide Schottky diode device and a manufacturing method therefor. The manufacturing method comprises: preparing on a gallium oxide epitaxial layer a photoresist layer having a preset pattern, part of the gallium oxide epitaxial layer being not covered by the photoresist layer, and the gallium oxide epitaxial layer being formed on the upper surface of a gallium oxide substrate; preparing a first electrode layer having a preset shape on the gallium oxide epitaxial layer and the photoresist layer; with the horizontal plane as a reference, rotating the gallium oxide substrate by a first inclination angle and a second inclination angle respectively in two opposite directions, and etching the gallium oxide epitaxial layer covered by an anode metal layer having a preset shape, the first inclination angle and the second inclination angle being both less than 90°; and forming a second electrode layer on the lower surface of the gallium oxide substrate. In the present application, a positive-angle lapping termination structure of a gallium oxide Schottky diode can be easily processed, therefore effectively improving the voltage resistance of the diode device.
Description
本专利申请要求于2022年5月31日提交的中国专利申请No.CN 202210612243.5的优先权。在先申请的公开内容通过整体引用并入本申请。This patent application claims priority from Chinese Patent Application No. CN 202210612243.5 filed on May 31, 2022. The disclosures of the prior applications are incorporated by reference in their entirety.
本申请属于半导体器件制造技术领域，尤其涉及一种正磨角氧化镓肖特基二极管器件及其制备方法。The present application belongs to the technical field of semiconductor device manufacturing, and in particular relates to a positive grinding angle gallium oxide Schottky diode device and a preparation method thereof.
氧化镓是一种新兴的半导体材料，其具有很大的禁带宽度、较高的理论击穿场强等一系列优良性能。使用氧化镓制造功率半导体器件，逐渐成为重要的发展方向。在某些特定领域，氧化镓功率器件有望取代传统的硅基功率器件。肖特基二极管是一种功率半导体器件，使用氧化镓制备的肖特基二极管可以称为氧化镓肖特基二极管。肖特基二极管具有开关频率高和正向压降低等优势特性。然而，镜像力导致的肖特基势垒高度的降低，会限制氧化镓肖特基二极管的优势特性。为了解决这一问题，可以采用高阻终端、场板终端或磨角终端，它们均有利于改善器件特性。Gallium oxide is an emerging semiconductor material with a series of excellent properties such as a large bandgap width and high theoretical breakdown field strength. The use of gallium oxide to manufacture power semiconductor devices has gradually become an important development direction. In some specific areas, gallium oxide power devices are expected to replace traditional silicon-based power devices. Schottky diode is a power semiconductor device. Schottky diodes made of gallium oxide can be called gallium oxide Schottky diodes. Schottky diodes have the advantages of high switching frequency and forward voltage drop. However, the reduction in Schottky barrier height caused by the image force will limit the advantageous characteristics of gallium oxide Schottky diodes. In order to solve this problem, high-resistance terminals, field plate terminals or ground-angle terminals can be used, all of which are beneficial to improving device characteristics.
磨角终端是一种利用刻蚀等手段在肖特基二极管上形成的斜角结构。磨角终端分为正磨角终端和负磨角终端。如图6所示，一个肖特基二极管的基础结构一般包括阴极61、衬底62、外延层63和阳极64。图7示出了一个具有负磨角终端的肖特基二极管，它是在图6所示的肖特基二极管的基础上形成的，其外延层631附带有负磨角终端65。图8示出了一个具有正磨角终端的肖特基二极管，它是在图6所示的肖特基二极管的基础上形成的，其外延层632附带有正磨角终端66。The ground angle terminal is a bevel structure formed on the Schottky diode by etching and other means. Grinding angle terminals are divided into positive grinding angle terminals and negative grinding angle terminals. As shown in FIG. 6 , the basic structure of a Schottky diode generally includes a cathode 61 , a substrate 62 , an epitaxial layer 63 and an anode 64 . FIG. 7 shows a Schottky diode with a negative ground angle terminal, which is formed on the basis of the Schottky diode shown in FIG. 6 and whose epitaxial layer 631 is provided with a negative ground angle terminal 65 . FIG. 8 shows a Schottky diode with positive ground angle terminations, which is formed based on the Schottky diode shown in FIG. 6 and whose epitaxial layer 632 is provided with positive ground angle terminations 66 .
相比负磨角终端，正磨角终端更具有优势，其表面电场调控能力更强，并且更节省面积。但是如图8所示，对于正磨角终端66，其大部分隐藏于阳极64的下方。常规的刻蚀方法难以去除隐藏在阳极64下方的材料，以形成正磨角终端66。即，常规的刻蚀方法难以加工出正磨角终端。Compared with negative grinding angle terminals, positive grinding angle terminals have more advantages. They have stronger surface electric field control capabilities and save more area. However, as shown in FIG. 8 , for the positive ground angle terminal 66 , most of it is hidden under the anode 64 . Conventional etching methods are difficult to remove the material hidden under the anode 64 to form the positive ground angle terminal 66 . That is, it is difficult to process positive grinding angle terminals using conventional etching methods.
本申请提供了一种正磨角氧化镓二极管器件及其制备方法，该制备方法能够实现氧化镓肖特基二极管正磨角终端结构的加工，从而有效改善器件特性。The present application provides a positive grinding angle gallium oxide diode device and a preparation method thereof. The preparation method can realize the processing of the positive grinding angle terminal structure of the gallium oxide Schottky diode, thereby effectively improving the device characteristics.
本申请是通过如下技术方案实现的：This application is realized through the following technical solutions:
第一方面，本申请提供了一种正磨角氧化镓肖特基二极管器件的制备方法，该方法包括：In a first aspect, this application provides a method for preparing a positive ground angle gallium oxide Schottky diode device, which method includes:
在氧化镓外延层上制备预设图案的光刻胶层；其中，部分所述氧化镓外延层未被所述光刻胶层覆盖，所述氧化镓外延层形成于氧化镓衬底的上表面；Preparing a photoresist layer with a preset pattern on the gallium oxide epitaxial layer; wherein part of the gallium oxide epitaxial layer is not covered by the photoresist layer, and the gallium oxide epitaxial layer is formed on the upper surface of the gallium oxide substrate ;
在所述氧化镓外延层和所述光刻胶层上制备预设形状的第一电极层；Prepare a first electrode layer of a predetermined shape on the gallium oxide epitaxial layer and the photoresist layer;
以水平面为基准，将所述氧化镓衬底分别向两个相反的方向旋转第一倾斜角度和第二倾斜角度，并分别对被所述预设形状的阳极金属层覆盖的氧化镓外延层进行刻蚀；其中，所述第一倾斜角度和所述第二倾斜角度均小于90°；Using the horizontal plane as a reference, the gallium oxide substrate is rotated by a first tilt angle and a second tilt angle in two opposite directions, and the gallium oxide epitaxial layer covered by the preset-shaped anode metal layer is subjected to Etching; wherein, the first tilt angle and the second tilt angle are both less than 90°;
在所述氧化镓衬底下表面形成第二电极层。A second electrode layer is formed on the lower surface of the gallium oxide substrate.
在第一方面的一种可能的实现方式中，所述在所述氧化镓外延层上制备预设图案的光刻胶层，包括：In a possible implementation of the first aspect, preparing a photoresist layer with a preset pattern on the gallium oxide epitaxial layer includes:
在所述氧化镓外延层上制备光刻胶层；Preparing a photoresist layer on the gallium oxide epitaxial layer;
对所述光刻胶层进行刻蚀，露出部分所述氧化镓外延层，形成所述预设图案的光刻胶层。The photoresist layer is etched to expose part of the gallium oxide epitaxial layer to form the photoresist layer of the preset pattern.
在第一方面的一种可能的实现方式中，在所述氧化镓外延层和所述光刻胶层上制备预设形状的第一电极层，包括：In a possible implementation of the first aspect, preparing a first electrode layer of a predetermined shape on the gallium oxide epitaxial layer and the photoresist layer includes:
在所述预设图案的光刻胶层和露出的所述氧化镓外延层上制备所述第一电极层；Prepare the first electrode layer on the photoresist layer of the preset pattern and the exposed gallium oxide epitaxial layer;
去除所述预设图案的光刻胶层上的部分第一电极层，并去除所述预设图案的光刻胶层，形成所述预设形状的第一电极层。Part of the first electrode layer on the photoresist layer of the preset pattern is removed, and the photoresist layer of the preset pattern is removed to form the first electrode layer of the preset shape.
在第一方面的一种可能的实现方式中，所述第一倾斜角度与所述第二倾斜角度范围均为：30°至60°。In a possible implementation of the first aspect, the first tilt angle and the second tilt angle range are both: 30° to 60°.
在第一方面的一种可能的实现方式中，所述第一倾斜角度与所述第二倾斜角度相等。In a possible implementation of the first aspect, the first tilt angle is equal to the second tilt angle.
在第一方面的一种可能的实现方式中，所述对被所述预设形状的第一电极层覆盖的氧化镓外延层进行刻蚀时，刻蚀次数为多次；以保证刻蚀完成后的精度满足预设精度要求。In a possible implementation of the first aspect, when etching the gallium oxide epitaxial layer covered by the first electrode layer of the preset shape, the number of etching times is multiple times; to ensure that the etching is completed. The final accuracy meets the preset accuracy requirements.
在第一方面的一种可能的实现方式中，所述第一电极层通过电子束蒸发或者溅射金属得到；所述第二电极层通过电子束蒸发得到。In a possible implementation of the first aspect, the first electrode layer is obtained by electron beam evaporation or metal sputtering; the second electrode layer is obtained by electron beam evaporation.
在第一方面的一种可能的实现方式中，所述氧化镓衬底为N型高掺杂氧化镓衬底；In a possible implementation of the first aspect, the gallium oxide substrate is an N-type highly doped gallium oxide substrate;
所述氧化镓外延层为N型低掺杂氧化镓外延层。The gallium oxide epitaxial layer is an N-type low-doped gallium oxide epitaxial layer.
第二方面，本申请实施例提供了一种氧化镓二极管器件，包括：In a second aspect, embodiments of the present application provide a gallium oxide diode device, including:
氧化镓衬底；Gallium oxide substrate;
氧化镓外延层，形成于所述氧化镓衬底上表面，所述氧化镓外延层上部为一个凸台结构；所述凸台结构的宽度从所述氧化镓外延层到所述氧化镓衬底方向逐渐减小；A gallium oxide epitaxial layer is formed on the upper surface of the gallium oxide substrate. The upper part of the gallium oxide epitaxial layer is a boss structure; the width of the boss structure extends from the gallium oxide epitaxial layer to the gallium oxide substrate. The direction gradually decreases;
第一电极，形成于所述氧化镓外延层上；A first electrode formed on the gallium oxide epitaxial layer;
第二电极，形成于所述氧化镓衬底下表面。A second electrode is formed on the lower surface of the gallium oxide substrate.
在第二方面的一种可能的实现方式中，所述氧化镓二极管器件使用如第一方面任一项可能的实现方式所述的方法制备得到。In a possible implementation of the second aspect, the gallium oxide diode device is prepared using the method described in any possible implementation of the first aspect.
可以理解的是，上述第二方面的有益效果可以参见上述第一方面中的相关描述，在此不再赘述。It can be understood that the beneficial effects of the above-mentioned second aspect can be referred to the relevant descriptions in the above-mentioned first aspect, and will not be described again here.
本申请实施例与现有技术相比存在的有益效果是：Compared with the prior art, the beneficial effects of the embodiments of the present application are:
本申请提供的制备方法，通过将氧化镓衬底分别向两个相反的方向旋转一定角度，能够使第一电极层下方的氧化镓外延层暴露于刻蚀范围内，从而实现正磨角终端的加工，解决了常规刻蚀方法难以加工出正磨角终端的技术问题。上述制备方法还采用多次非垂直角度互相补充，阳极自对准填充和氧化镓刻蚀等手段，最终得到了具有正磨角终端的氧化镓二极管器件；该器件具有良好的耐压特性。The preparation method provided by this application can expose the gallium oxide epitaxial layer under the first electrode layer to the etching range by rotating the gallium oxide substrate at a certain angle in two opposite directions, thereby realizing the positive grinding angle terminal. processing, which solves the technical problem that it is difficult to process positive grinding angle terminals by conventional etching methods. The above preparation method also uses multiple non-vertical angles to complement each other, anode self-aligned filling and gallium oxide etching, etc., and finally obtains a gallium oxide diode device with a positive grinding angle terminal; the device has good withstand voltage characteristics.
应当理解的是，以上的一般描述和后文的细节描述仅是示例性和解释性的，并不能限制本申请。It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and do not limit the present application.
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or description of the prior art will be briefly introduced below. Obviously, the drawings in the following description are only for the purpose of the present application. For some embodiments, for those of ordinary skill in the art, other drawings can be obtained based on these drawings without exerting creative efforts.
图1是本申请一实方式例提供的氧化镓二极管器件的制备方法流程示意图；Figure 1 is a schematic flow chart of a method for preparing a gallium oxide diode device provided in an embodiment of the present application;
图2是本申请一实施方式提供的制备预设图案的光刻胶层的结构示意图；Figure 2 is a schematic structural diagram of preparing a photoresist layer with a preset pattern according to an embodiment of the present application;
图3是本申请一实施方式提供的制备预设形状的第一电极层的结构示意图；Figure 3 is a schematic structural diagram of preparing a first electrode layer with a predetermined shape according to an embodiment of the present application;
图4是本申请一实施方式提供的制备刻蚀后的氧化镓外延层的结构示意图；Figure 4 is a schematic structural diagram of preparing an etched gallium oxide epitaxial layer according to an embodiment of the present application;
图5是本申请一实施方式提供的氧化镓二极管器件的结构示意图；Figure 5 is a schematic structural diagram of a gallium oxide diode device provided by an embodiment of the present application;
图6是现有技术中肖特基二极管的结构组成示意图；Figure 6 is a schematic diagram of the structure and composition of a Schottky diode in the prior art;
图7是具有负磨角终端的肖特基二极管的结构组成示意图；Figure 7 is a schematic diagram of the structure of a Schottky diode with a negative grinding angle terminal;
图8是具有正磨角终端的肖特基二极管的结构组成示意图。Figure 8 is a schematic diagram of the structure of a Schottky diode with a positive grinding angle terminal.
以下描述中，为了说明而不是为了限定，提出了诸如特定系统结构、技术之类的具体细节，以便透彻理解本申请实施例。然而，本领域的技术人员应当清楚，在没有这些具体细节的其它实施例中也可以实现本申请。在其它情况中，省略对众所周知的系统、装置、电路以及方法的详细说明，以免不必要的细节妨碍本申请的描述。In the following description, for the purpose of explanation rather than limitation, specific details such as specific system structures and technologies are provided to provide a thorough understanding of the embodiments of the present application. However, it will be apparent to those skilled in the art that the present application may be practiced in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
应当理解，当在本申请说明书和所附权利要求书中使用时，术语“包括”指示所描述特征、整体、步骤、操作、元素和/或组件的存在，但并不排除一个或多个其它特征、整体、步骤、操作、元素、组件和/或其集合的存在或添加。It will be understood that, when used in this specification and the appended claims, the term "comprising" indicates the presence of the described features, integers, steps, operations, elements and/or components but does not exclude one or more other The presence or addition of features, integers, steps, operations, elements, components and/or collections thereof.
还应当理解，在本申请说明书和所附权利要求书中使用的术语“和/或”是指相关联列出的项中的一个或多个的任何组合以及所有可能组合，并且包括这些组合。It will also be understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
如在本申请说明书和所附权利要求书中所使用的那样，术语“如果”可以依据上下文被解释为“当...时”或“一旦”或“响应于确定”或“响应于检测到”。类似地，短语“如果确定”或“如果检测到[所描述条件或事件]”可以依据上下文被解释为意指“一旦确定”或“响应于确定”或“一旦检测到[所描述条件或事件]”或“响应于检测到[所描述条件或事件]”。As used in this specification and the appended claims, the term "if" may be interpreted as "when" or "once" or "in response to determining" or "in response to detecting" depending on the context. ". Similarly, the phrase "if determined" or "if [the described condition or event] is detected" may be interpreted, depending on the context, to mean "once determined" or "in response to a determination" or "once the [described condition or event] is detected ]" or "in response to detection of [the described condition or event]".
另外，在本申请说明书和所附权利要求书的描述中，术语“第一”、“第二”、“第三”等仅用于区分描述，而不能理解为指示或暗示相对重要性。In addition, in the description of this application and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.
在本申请说明书中描述的参考“一个实施例”或“一些实施例”等意味着在本申请的一个或多个实施例中包括结合该实施例描述的特定特征、结构或特点。由此，在本说明书中的不同之处出现的语句“在一个实施例中”、“在一些实施例中”、“在其他一些实施例中”、“在另外一些实施例中”等不是必然都参考相同的实施例，而是意味着“一个或多个但不是所有的实施例”，除非是以其他方式另外特别强调。术语“包括”、“包含”、“具有”及它们的变形都意味着“包括但不限于”，除非是以其他方式另外特别强调。Reference in this specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Therefore, the phrases "in one embodiment", "in some embodiments", "in other embodiments", "in other embodiments", etc. appearing in different places in this specification are not necessarily References are made to the same embodiment, but rather to "one or more but not all embodiments" unless specifically stated otherwise. The terms “including,” “includes,” “having,” and variations thereof all mean “including but not limited to,” unless otherwise specifically emphasized.
磨角终端是提升功率二极管性能的重要的终端结构之一。其中，正磨角终端比负磨角终端的表面电场调控能力更强，且更节省面积。然而，目前常规的刻蚀方法难以加工出正磨角终端结构；因此，亟需开发新的制备技术。Ground angle terminal is one of the important terminal structures to improve the performance of power diodes. Among them, positive grinding angle terminals have stronger surface electric field control capabilities than negative grinding angle terminals and are more area-saving. However, current conventional etching methods are difficult to process positive grinding angle terminal structures; therefore, there is an urgent need to develop new preparation technologies.
为了解决上述问题，本申请提供了一种正磨角氧化镓肖特基二极管器件的制备方法。该方法通过以下步骤制备具有正磨角终端的氧化镓肖特基二极管：在氧化镓外延层上制备预设图案的光刻胶层，部分氧化镓外延层未被光刻胶层覆盖；氧化镓外延层形成于氧化镓衬底的上表面；在氧化镓外延层和光刻胶层上制备预设形状的第一电极层；以水平面为基准，将氧化镓衬底分别向两个相反的方向旋转第一倾斜角度和第二倾斜角度，对位于预设形状的阳极金属层覆盖的氧化镓外延层进行刻蚀，第一倾斜角度和第二倾斜角度均小于90°；在所述氧化镓衬底下表面形成第二电极层。In order to solve the above problems, this application provides a method for preparing a positive ground angle gallium oxide Schottky diode device. This method prepares a gallium oxide Schottky diode with a positive grinding angle terminal through the following steps: preparing a photoresist layer with a preset pattern on the gallium oxide epitaxial layer, and part of the gallium oxide epitaxial layer is not covered by the photoresist layer; gallium oxide The epitaxial layer is formed on the upper surface of the gallium oxide substrate; a first electrode layer of a predetermined shape is prepared on the gallium oxide epitaxial layer and the photoresist layer; using the horizontal plane as the reference, the gallium oxide substrate is moved in two opposite directions. Rotating the first tilt angle and the second tilt angle to etch the gallium oxide epitaxial layer covered by the anode metal layer in a preset shape, the first tilt angle and the second tilt angle are both less than 90°; on the gallium oxide liner A second electrode layer is formed on the bottom surface.
以下结合附图和具体实施方式，对上述制备方法加以详细说明。如图1所示，上述制备方法包括步骤101至步骤104四个步骤，分别详述如下。The above preparation method will be described in detail below with reference to the accompanying drawings and specific embodiments. As shown in Figure 1, the above preparation method includes four steps from step 101 to step 104, which are described in detail below.
在步骤101中，在氧化镓外延层2上制备预设图案的光刻胶层3；其中，部分氧化镓外延层2未被光刻胶层3覆盖，氧化镓外延层2形成于氧化镓衬底1的上表面。In step 101, a photoresist layer 3 of a preset pattern is prepared on the gallium oxide epitaxial layer 2; part of the gallium oxide epitaxial layer 2 is not covered by the photoresist layer 3, and the gallium oxide epitaxial layer 2 is formed on the gallium oxide liner. The upper surface of bottom 1.
具体的，在氧化镓外延层2上制备预设图案的光刻胶层3，包括：Specifically, a photoresist layer 3 with a preset pattern is prepared on the gallium oxide epitaxial layer 2, including:
在氧化镓外延层2上制备光刻胶层3，如图2（a）所示；Prepare a photoresist layer 3 on the gallium oxide epitaxial layer 2, as shown in Figure 2(a);
对光刻胶层3进行刻蚀，露出部分氧化镓外延层2，形成预设图案的光刻胶层3，如图2（b）所示；The photoresist layer 3 is etched to expose part of the gallium oxide epitaxial layer 2 to form a photoresist layer 3 with a preset pattern, as shown in Figure 2(b);
其中，在氧化镓外延层2上制备光刻胶层3之前，可以对氧化镓外延层2进行清洗；Wherein, before preparing the photoresist layer 3 on the gallium oxide epitaxial layer 2, the gallium oxide epitaxial layer 2 can be cleaned;
示例性的，可以依次用丙酮、异丙醇和去离子水清洗氧化镓外延层2。For example, the gallium oxide epitaxial layer 2 can be cleaned with acetone, isopropyl alcohol and deionized water in sequence.
其中，对光刻胶层3进行刻蚀包括：对光刻胶层3进行光刻、曝光、显影并露出氧化镓外延层2。Wherein, etching the photoresist layer 3 includes: photolithography, exposure, and development of the photoresist layer 3 and exposing the gallium oxide epitaxial layer 2 .
在步骤102中，在氧化镓外延层2和光刻胶层3上制备预设形状的第一电极层4。In step 102, a first electrode layer 4 of a predetermined shape is prepared on the gallium oxide epitaxial layer 2 and the photoresist layer 3.
具体的,在氧化镓外延层2和光刻胶层3上制备预设形状的第一电极层4，包括：Specifically, a first electrode layer 4 of a preset shape is prepared on the gallium oxide epitaxial layer 2 and the photoresist layer 3, including:
在预设图案的光刻胶层3和露出的氧化镓外延层2上制备第一电极层4，如图3（a）所示；去除预设图案的光刻胶层3上的部分第一电极层4，去除预设图案的光刻胶层3，形成预设形状的第一电极层4，如图3（b）所示。Prepare a first electrode layer 4 on the photoresist layer 3 of the preset pattern and the exposed gallium oxide epitaxial layer 2, as shown in Figure 3(a); remove part of the first electrode layer 3 on the photoresist layer 3 of the preset pattern. For the electrode layer 4, remove the photoresist layer 3 of the preset pattern to form the first electrode layer 4 of the preset shape, as shown in Figure 3(b).
具体的，第一电极层4可以通过电子束蒸发或者溅射金属得到。Specifically, the first electrode layer 4 can be obtained by electron beam evaporation or metal sputtering.
示例性的，当以自对准方式溅射阳极金属形成第一电极层4时，靶材纯度可以为99.99%，溅射功率可以为150W。For example, when the anode metal is sputtered to form the first electrode layer 4 in a self-aligned manner, the target purity may be 99.99%, and the sputtering power may be 150W.
示例性的，电子束蒸发阳极金属形成第一电极层4后，可以剥离多余金属，再进行清洗。For example, after the anode metal is evaporated by electron beam to form the first electrode layer 4, excess metal can be stripped off and then cleaned.
其中，第一电极层4的厚度与光刻胶层3的厚度可以相等，可以不相等。The thickness of the first electrode layer 4 and the thickness of the photoresist layer 3 may be equal or different.
示例性的，第一电极层4的材质可以为Ni或Au。其中，当第一电极层4的材质为Ni时，第一电极层4的厚度可以为50nm；当第一电极层4的材质为Au时，第一电极层4的厚度可以为400nm。For example, the material of the first electrode layer 4 may be Ni or Au. When the material of the first electrode layer 4 is Ni, the thickness of the first electrode layer 4 may be 50 nm; when the material of the first electrode layer 4 is Au, the thickness of the first electrode layer 4 may be 400 nm.
在步骤103中，参见图4，以水平面为基准，将氧化镓衬底1分别向两个相反的方向旋转第一倾斜角度和第二倾斜角度，并分别对被预设形状的第一电极层4覆盖的氧化镓外延层2进行刻蚀；其中，第一倾斜角度和第二倾斜角度均小于90°。In step 103, refer to Figure 4, using the horizontal plane as a reference, the gallium oxide substrate 1 is rotated to the first tilt angle and the second tilt angle in two opposite directions, and the first electrode layer with the preset shape is rotated. The gallium oxide epitaxial layer 2 covered by 4 is etched; wherein, the first tilt angle and the second tilt angle are both less than 90°.
具体的，第一倾斜角度与第二倾斜角度的范围均为：30°至60°。Specifically, the range of the first tilt angle and the second tilt angle is: 30° to 60°.
具体的，第一倾斜角度与第二倾斜角度相等。Specifically, the first tilt angle is equal to the second tilt angle.
具体的，对被预设形状的第一电极层4覆盖的氧化镓外延层2进行刻蚀时，刻蚀次数可以为多次，以保证刻蚀完成后的精度满足预设精度要求。Specifically, when etching the gallium oxide epitaxial layer 2 covered by the first electrode layer 4 of a preset shape, the etching times may be multiple times to ensure that the accuracy after the etching is completed meets the preset accuracy requirements.
其中，刻蚀完氧化镓外延层2后，可以清洗氧化镓外延层2。After etching the gallium oxide epitaxial layer 2, the gallium oxide epitaxial layer 2 can be cleaned.
示例性的，可以用丙酮、异丙醇和去离子水清洗氧化镓外延层2。For example, the gallium oxide epitaxial layer 2 can be cleaned with acetone, isopropyl alcohol and deionized water.
示例性的，可以采用ICP（Inductively Coupled Plasma，电感耦合等离子体）刻蚀实现氧化镓外延层2的刻蚀；将氧化镓衬底1旋转第一倾斜角度θ，ICP刻蚀沿刻蚀方向A刻蚀氧化镓外延层2，如图4所示；将氧化镓衬底1旋转第二倾斜角度α，ICP刻蚀沿刻蚀方向B刻蚀氧化镓外延层2，如图4所示；刻蚀气体可以为SF6或Ar或BCl
3或其它刻蚀气体；第一倾斜角度θ，90°＞θ＞0°，较优范围60°≥θ≥30°；第二倾斜角度α，90°＞α＞0°，较优范围60°≥θ≥30°；α与θ可以相等，也可以不等；其中，α与θ相等，即角度互相补充时，效果更优。
For example, ICP (Inductively Coupled Plasma) etching can be used to achieve etching of the gallium oxide epitaxial layer 2; the gallium oxide substrate 1 is rotated by the first tilt angle θ, and the ICP etching is along the etching direction A. Etch the gallium oxide epitaxial layer 2, as shown in Figure 4; rotate the gallium oxide substrate 1 by a second tilt angle α, and use ICP etching to etch the gallium oxide epitaxial layer 2 along the etching direction B, as shown in Figure 4; etching The etching gas can be SF6 or Ar or BCl 3 or other etching gases; the first tilt angle θ, 90°>θ>0°, the preferred range is 60°≥θ≥30°; the second tilt angle α, 90°>α>0°, the optimal range is 60°≥θ≥30°; α and θ can be equal or different; among them, α and θ are equal, that is, when the angles complement each other, the effect is better.
在步骤104中，参见图5，在氧化镓衬底下表面形成第二电极层5。In step 104, referring to FIG. 5, a second electrode layer 5 is formed on the lower surface of the gallium oxide substrate.
具体的，第二电极层5可以通过电子束蒸发得到。Specifically, the second electrode layer 5 can be obtained by electron beam evaporation.
示例性的，第二电极层5的材质可以为Ti或Au。其中，当第二电极层5的材质为Ti时，第二电极层5的厚度可以为20nm；当第二电极层5的材质为Au时，第二电极层5的厚度可以为400nm。For example, the material of the second electrode layer 5 may be Ti or Au. Wherein, when the material of the second electrode layer 5 is Ti, the thickness of the second electrode layer 5 may be 20 nm; when the material of the second electrode layer 5 is Au, the thickness of the second electrode layer 5 may be 400 nm.
上述正磨角氧化镓肖特基二极管器件的制备方法，通过将氧化镓衬底分别向两个相反的方向旋转一定角度，能够使第一电极层下方的氧化镓外延层暴露于刻蚀范围内，从而实现正磨角终端的加工，解决了常规刻蚀方法难以加工出正磨角终端的技术问题。上述制备方法还采用了多次非垂直角度互相补充，阳极自对准填充和氧化镓刻蚀等手段，最终得到了具有正磨角终端的氧化镓二极管器件。上述方法提供了一种新的氧化镓二极管器件制备方法。The above-mentioned preparation method of a gallium oxide Schottky diode device with a positive grinding angle can expose the gallium oxide epitaxial layer under the first electrode layer to the etching range by rotating the gallium oxide substrate at a certain angle in two opposite directions. , thereby realizing the processing of positive grinding angle terminals and solving the technical problem that it is difficult to process positive grinding angle terminals by conventional etching methods. The above preparation method also uses multiple non-vertical angles to complement each other, anode self-aligned filling and gallium oxide etching, etc., and finally obtains a gallium oxide diode device with a positive grinding angle terminal. The above method provides a new method for preparing gallium oxide diode devices.
本申请还提供了一种正磨角氧化镓肖特基二极管器件，参见图5，该氧化镓二极管器件，包括：氧化镓衬底1、氧化镓外延层2、第一电极4和第二电极5。氧化镓外延层2形成于氧化镓衬底1上表面；氧化镓外延层2上部为一个凸台结构，该凸台结构的宽度从氧化镓外延层2到氧化镓衬底1方向逐渐减小。第一电极4形成于氧化镓外延层上。第二电极5形成于氧化镓衬底下表面。This application also provides a positive grinding angle gallium oxide Schottky diode device. See Figure 5. The gallium oxide diode device includes: a gallium oxide substrate 1, a gallium oxide epitaxial layer 2, a first electrode 4 and a second electrode. 5. The gallium oxide epitaxial layer 2 is formed on the upper surface of the gallium oxide substrate 1; the upper part of the gallium oxide epitaxial layer 2 is a boss structure, and the width of the boss structure gradually decreases from the gallium oxide epitaxial layer 2 to the gallium oxide substrate 1. The first electrode 4 is formed on the gallium oxide epitaxial layer. The second electrode 5 is formed on the lower surface of the gallium oxide substrate.
其中，台面倾斜角度，相对于与衬底平面垂直方向，为30°至60°。The inclination angle of the mesa is 30° to 60° relative to the direction perpendicular to the substrate plane.
示例性的，该正磨角氧化镓肖特基二极管器件可以通过上述正磨角氧化镓肖特基二极管器件的制备方法制备得到。For example, the positive ground angle gallium oxide Schottky diode device can be prepared by the above preparation method of the positive ground angle gallium oxide Schottky diode device.
应理解，上述实施方式中各步骤的序号的大小并不意味着执行顺序的先后。各过程的执行顺序应以其功能和内在逻辑确定，各步骤的序号不应对本申请的实施过程构成任何限定。It should be understood that the sequence number of each step in the above embodiment does not mean the order of execution. The execution sequence of each process should be determined by its function and internal logic, and the sequence number of each step should not constitute any limitation on the implementation process of this application.
以上所述实施方式仅用以说明本申请的技术方案，而非对其限制；尽管参照前述实施方式对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施方式技术方案的精神和范围，均应包含在本申请的保护范围之内。The above-described embodiments are only used to illustrate the technical solutions of the present application, but not to limit them. Although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still implement the above-mentioned implementations. The technical solutions described in the examples are modified, or some of the technical features are equivalently replaced; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of each embodiment of the application, and should be included in within the protection scope of this application.
Claims (10)
- 一种正磨角氧化镓肖特基二极管器件的制备方法，其特征在于，包括： A method for preparing a positive ground angle gallium oxide Schottky diode device, which is characterized by including:在氧化镓外延层上制备预设图案的光刻胶层；其中，部分所述氧化镓外延层未被所述光刻胶层覆盖，所述氧化镓外延层形成于氧化镓衬底的上表面；Preparing a photoresist layer with a preset pattern on the gallium oxide epitaxial layer; wherein part of the gallium oxide epitaxial layer is not covered by the photoresist layer, and the gallium oxide epitaxial layer is formed on the upper surface of the gallium oxide substrate ;在所述氧化镓外延层和所述光刻胶层上制备预设形状的第一电极层；Prepare a first electrode layer of a predetermined shape on the gallium oxide epitaxial layer and the photoresist layer;以水平面为基准，将所述氧化镓衬底分别向两个相反的方向旋转第一倾斜角度和第二倾斜角度，并分别对被所述预设形状的阳极金属层覆盖的氧化镓外延层进行刻蚀；其中，所述第一倾斜角度和所述第二倾斜角度均小于90°；Using the horizontal plane as a reference, the gallium oxide substrate is rotated by a first tilt angle and a second tilt angle in two opposite directions, and the gallium oxide epitaxial layer covered by the preset-shaped anode metal layer is subjected to Etching; wherein, the first tilt angle and the second tilt angle are both less than 90°;在所述氧化镓衬底下表面形成第二电极层。A second electrode layer is formed on the lower surface of the gallium oxide substrate.
- 如权利要求1所述的正磨角氧化镓肖特基二极管器件的制备方法，其特征在于，所述在所述氧化镓外延层上制备预设图案的光刻胶层，包括： The method for preparing a positive-grinded gallium oxide Schottky diode device according to claim 1, wherein preparing a photoresist layer with a preset pattern on the gallium oxide epitaxial layer includes:在所述氧化镓外延层上制备光刻胶层；Preparing a photoresist layer on the gallium oxide epitaxial layer;对所述光刻胶层进行刻蚀，露出部分所述氧化镓外延层，形成所述预设图案的光刻胶层。The photoresist layer is etched to expose part of the gallium oxide epitaxial layer to form the photoresist layer of the preset pattern.
- 如权利要求1所述的正磨角氧化镓肖特基二极管器件的制备方法，其特征在于，在所述氧化镓外延层和所述光刻胶层上制备预设形状的第一电极层，包括： The method for preparing a positive ground angle gallium oxide Schottky diode device according to claim 1, wherein a first electrode layer of a predetermined shape is prepared on the gallium oxide epitaxial layer and the photoresist layer, include:在所述预设图案的光刻胶层和露出的所述氧化镓外延层上制备所述第一电极层；Prepare the first electrode layer on the photoresist layer of the preset pattern and the exposed gallium oxide epitaxial layer;去除所述预设图案的光刻胶层上的部分第一电极层，并去除所述预设图案的光刻胶层，形成所述预设形状的第一电极层。Part of the first electrode layer on the photoresist layer of the preset pattern is removed, and the photoresist layer of the preset pattern is removed to form the first electrode layer of the preset shape.
- 如权利要求1所述的正磨角氧化镓肖特基二极管器件的制备方法，其特征在于，所述第一倾斜角度与所述第二倾斜角度范围均为：30°至60°。 The method for preparing a positive ground angle gallium oxide Schottky diode device according to claim 1, wherein the first tilt angle and the second tilt angle range are both: 30° to 60°.
- 如权利要求1所述的二极管器件的制备方法，其特征在于，所述第一倾斜角度与所述第二倾斜角度相等。 The method of manufacturing a diode device according to claim 1, wherein the first tilt angle is equal to the second tilt angle.
- 如权利要求1所述的正磨角氧化镓肖特基二极管器件的制备方法，其特征在于，所述对被所述预设形状的第一电极层覆盖的氧化镓外延层进行刻蚀时，刻蚀次数为多次。 The method for preparing a positive-grinded gallium oxide Schottky diode device according to claim 1, wherein when etching the gallium oxide epitaxial layer covered by the first electrode layer of the preset shape, The number of etching times is multiple times.
- 如权利要求1所述的正磨角氧化镓肖特基二极管器件的制备方法，其特征在于，所述第一电极层通过电子束蒸发或者溅射金属得到；所述第二电极层通过电子束蒸发得到。 The method for preparing a forward-ground gallium oxide Schottky diode device according to claim 1, wherein the first electrode layer is obtained by electron beam evaporation or metal sputtering; and the second electrode layer is obtained by electron beam evaporation or metal sputtering. Obtained by evaporation.
- 如权利要求1所述的正磨角氧化镓肖特基二极管器件的制备方法，其特征在于， The method for preparing a positive ground angle gallium oxide Schottky diode device according to claim 1, characterized in that:所述氧化镓衬底为N型高掺杂氧化镓衬底；The gallium oxide substrate is an N-type highly doped gallium oxide substrate;所述氧化镓外延层为N型低掺杂氧化镓外延层。The gallium oxide epitaxial layer is an N-type low-doped gallium oxide epitaxial layer.
- 一种正磨角氧化镓肖特基二极管器件，其特征在于，包括： A positive ground angle gallium oxide Schottky diode device, which is characterized by including:氧化镓衬底；Gallium oxide substrate;氧化镓外延层，形成于所述氧化镓衬底上表面，所述氧化镓外延层上部为一个凸台结构；所述凸台结构的宽度从所述氧化镓外延层到所述氧化镓衬底方向逐渐减小；A gallium oxide epitaxial layer is formed on the upper surface of the gallium oxide substrate. The upper part of the gallium oxide epitaxial layer is a boss structure; the width of the boss structure extends from the gallium oxide epitaxial layer to the gallium oxide substrate. The direction gradually decreases;第一电极，形成于所述氧化镓外延层上；A first electrode formed on the gallium oxide epitaxial layer;第二电极，形成于所述氧化镓衬底下表面。A second electrode is formed on the lower surface of the gallium oxide substrate.
- 一种氧化镓二极管器件，其特征在于，所述氧化镓二极管器件用如权利要求1至8任一项所述的方法制备。 A gallium oxide diode device, characterized in that the gallium oxide diode device is prepared by the method according to any one of claims 1 to 8.
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| JP2001068689A (en) * | 1999-08-26 | 2001-03-16 | Fuji Electric Co Ltd | Manufacture of schottky barrier diode |
| CN101807647A (en) * | 2010-03-19 | 2010-08-18 | 厦门市三安光电科技有限公司 | Process for manufacturing AlGaInP light-emitting diode with inclined side face |
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| CN115083922A (en) * | 2022-05-31 | 2022-09-20 | 中国电子科技集团公司第十三研究所 | Positive-angle-grinding gallium oxide Schottky diode device and preparation method thereof |
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| JP2001068689A (en) * | 1999-08-26 | 2001-03-16 | Fuji Electric Co Ltd | Manufacture of schottky barrier diode |
| CN101807647A (en) * | 2010-03-19 | 2010-08-18 | 厦门市三安光电科技有限公司 | Process for manufacturing AlGaInP light-emitting diode with inclined side face |
| CN102496572A (en) * | 2011-12-29 | 2012-06-13 | 江苏宏微科技有限公司 | Fast recovery epitaxial diode and preparation method thereof |
| CN111755531A (en) * | 2020-06-23 | 2020-10-09 | 无锡市乾野微纳电子有限公司 | Super junction silicon carbide schottky diode |
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