WO2023169090A1 - 信号链路串扰测试装置和方法 - Google Patents

信号链路串扰测试装置和方法 Download PDF

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Publication number
WO2023169090A1
WO2023169090A1 PCT/CN2023/073003 CN2023073003W WO2023169090A1 WO 2023169090 A1 WO2023169090 A1 WO 2023169090A1 CN 2023073003 W CN2023073003 W CN 2023073003W WO 2023169090 A1 WO2023169090 A1 WO 2023169090A1
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WIPO (PCT)
Prior art keywords
signal
crosstalk
pin
link
tested
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PCT/CN2023/073003
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English (en)
French (fr)
Inventor
王开展
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中兴通讯股份有限公司
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Publication of WO2023169090A1 publication Critical patent/WO2023169090A1/zh

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H04B17/30—Monitoring; Testing of propagation channels
    • H04B17/309—Measuring or estimating channel quality parameters
    • H04B17/345—Interference values
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/46—Monitoring; Testing
    • H04B3/487—Testing crosstalk effects

Definitions

  • This application is in the field of communication technology, and in particular relates to a signal link crosstalk testing device and method.
  • crosstalk As the transmission rate of communication signals becomes higher and higher, crosstalk has an increasing impact on high-speed signals, especially for 4-level pulse amplitude modulation (PAM4) signals. Excessive crosstalk will induce occasional bit errors at the signal receiving end. , causing interruption of communication services and affecting the normal operation of communication networks.
  • PAM4 4-level pulse amplitude modulation
  • the high-speed signal test system in the related art can only test the crosstalk between high-speed traces on the bare board of the high-speed backplane. Each crosstalk signal needs to be manually tested, which is inefficient and cannot test the high-speed backplane system simultaneously.
  • Embodiments of the present application provide a signal link crosstalk testing device and method.
  • inventions of the present application provide a signal link crosstalk testing device for performing crosstalk testing on a signal link on a high-speed backplane.
  • the high-speed backplane includes a plurality of first connectors, each of which has a first connector.
  • a connector includes N first pins, where N is an integer greater than 1. The two ends of the signal link correspond to the distal first pin and the proximal first pin.
  • the distal first pin pin and the proximal first pin are distributed in different first connectors
  • the signal link crosstalk test device includes: at least two test boards, each test board is provided with N signal connection terminals and a Two connectors, the second connector includes N second pins connected correspondingly to the N signal connection terminals, and the N second pins of the second connector are configured to be connected to the The N first pins of the first connector are connected correspondingly; a signal transceiver module, the signal transceiver module includes a main control unit, a signal transmitting end and a signal receiving end; the signal transmitting end is configured to send the first signal The connection end sends an attack signal, and the first signal connection end is the signal connection end corresponding to the crosstalk pin.
  • the crosstalk pin is the first remote pin or the near end of the high-speed backplane and the signal link to be tested.
  • embodiments of the present application provide a signal link crosstalk testing method.
  • the method includes: sending an attack signal through a signal sending end to a first signal connection end.
  • the first signal connection end is a test board corresponding to Crosstalk pin connections
  • the signal connection end, the crosstalk pin is a pin on the high-speed backplane adjacent to the near-end first pin or the far-end first pin of the signal link to be tested; it is connected from the second signal through the signal receiving end
  • the terminal obtains the crosstalk feedback signal of the signal link to be tested
  • the second signal connection terminal is a signal connection terminal on the test board corresponding to the near-end first pin of the signal link to be tested; according to the crosstalk feedback signal to determine the crosstalk signal value of the signal link to be tested.
  • Figure 1 is a schematic structural diagram of a high-speed backplane
  • Figure 2 is a schematic structural diagram of a first connector
  • Figure 3 is a schematic structural diagram of another first connector
  • Figure 4 is a crosstalk relationship diagram between signal links for differential high-speed signals
  • Figure 5 is a schematic structural diagram of a signal link crosstalk test device provided by an embodiment of the present application.
  • Figure 6 is a schematic structural diagram of another signal link crosstalk test device provided by an embodiment of the present application.
  • FIG. 7 is a schematic flowchart of a signal link crosstalk testing method provided by an embodiment of the present application.
  • At least one of the following and similar expressions refers to any combination of these items, including any combination of single or plural items.
  • at least one of a, b and c can mean: a, b, c, a and b, a and c, b and c or a and b and c, where a, b, c can be single, also Can be multiple.
  • connection In this application, unless otherwise clearly stated and limited, the terms “installation”, “connection”, “connection”, “fixing” and other terms should be understood in a broad sense. For example, it can be a fixed connection or a detachable connection. , or integrated; it can be mechanical connection, electrical connection or mutual communication; it can be directly connected, or it can be indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction between two elements.
  • connection connection
  • fixing and other terms should be understood in a broad sense. For example, it can be a fixed connection or a detachable connection. , or integrated; it can be mechanical connection, electrical connection or mutual communication; it can be directly connected, or it can be indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction between two elements.
  • a first feature “above” or “below” a second feature may include the first and second features being in direct contact, or may include the first and second features. Not in direct contact but through additional characteristic contact between them.
  • the terms “above”, “above” and “above” a first feature on a second feature include the first feature being directly above and diagonally above the second feature, or simply mean that the first feature is higher in level than the second feature.
  • “Below”, “under” and “under” the first feature is the second feature includes the first feature being directly below and diagonally below the second feature, or simply means that the first feature is less horizontally than the second feature.
  • Embodiments of the present application provide a signal link crosstalk testing device and method for crosstalk testing of signal links on high-speed backplanes.
  • FIG 1 shows a schematic structural diagram of a high-speed backplane.
  • the high-speed backplane 10 shown in Figure 1 is a multi-slot high-speed backplane, and may specifically be a system used in the field of 5G communications to realize service transmission.
  • Each slot of the high-speed backplane 10 is provided with a first connector 11 , and signal links for transmitting high-speed signals are formed between different first connectors 11 .
  • the multi-slot high-speed backplane 10 is a product to be tested in the embodiment of the present application, and may be various types of products on the market that meet the above description.
  • the high-speed signal described in the embodiment of this application may specifically be a PAM4 signal.
  • FIG. 2 shows a schematic structural diagram of a first connector.
  • each first connector 11 on the high-speed backplane 10 includes a plurality of first pins.
  • the number of first pins in the first connector 11 is set to N (N is greater than 1 ), and the N first pins are arranged in I rows and J columns to form a first pin matrix.
  • the first connector shown in Figure 2 is named L1
  • the first pin in the first connector L1 is named X i Y j .
  • the pins in the first pin matrix are paired, and the paired first pins form a set of differential pin pairs for transmitting differential high-speed signals.
  • Figure 3 shows a schematic structural diagram of another first connector.
  • the first connector shown in Figure 3 is named L2
  • the first pin in the first connector L2 is named Xi ' Y j' .
  • first pins between the first connector L1 and the first connector L2 are connected one by one through high-speed signal lines to form multiple sets of differential high-speed signals.
  • a total of nine sets of differential high-speed signals are shown in the examples shown in Figures 2 and 3.
  • the first pin X 3 Y 3 /X 3 Y 4 in the first connector L1 of Figure 2 is used as the remote first pin of the signal link to be tested, and the first connection of Figure 3
  • the first pin X 3' Y 3' /X 3' Y 4' in the device L2 is used as the first proximal pin of the signal link to be tested.
  • Figure 4 shows a diagram of the crosstalk relationship between signal links for differential high-speed signals. Assume that the signal link from _ _ As shown in Figure 4, the noise that SERDES1 and SERDES3 couple to SERDES2 through the high-speed backplane is the crosstalk caused by adjacent signal link traces around the signal link under test on the multi-slot high-speed backplane.
  • the adjacent first The pins constitute the near-end crosstalk pins of the current signal link SERDES2 under test; the adjacent first pins around X 3' Y 3' /X 3' Y 4' in Figure 3 constitute the current pins of the signal link SERDES2 under test.
  • Far end crosstalk pin For the signal link from X 3 Y 3 /X 3 Y 4 to X 3 ' Y 3 ' /X 3 ' Y 4 ' , the adjacent first The pins constitute the near-end crosstalk pins of the current signal link SERDES2 under test; the adjacent first pins around X 3' Y 3' /X 3' Y 4' in Figure 3 constitute the current pins of the signal link SERDES2 under test.
  • Far end crosstalk pin For the signal link from X 3 Y 3 /X 3 Y 4 to X 3 ' Y 3 ' /X 3 ' Y 4 ' .
  • the implementation method of related technology is to collect the waveform of the trigger point in the target high-speed signal (i.e., the signal link to be tested) and the crosstalk high-speed signal.
  • the phase difference between the waveforms of the points identifies the crosstalk signal from at least one waveform, and then determines the amplitude of the crosstalk signal. This method can still meet the crosstalk test between short-distance signal traces in high-speed backplanes.
  • the crosstalk signal is due to the large insertion of long-distance high-speed traces. If the signal is damaged and attenuated seriously, the difficulty of identifying crosstalk signals in this method will be extremely high, which will affect the test efficiency.
  • this system determines the impedance of the matching resistor by collecting the respective reflected signals in the target signal line and the crosstalk signal line. The resistor of this impedance may not be available on the market. Even if it can be obtained, it needs to be judged based on electrical signal testing. Selecting and welding resistors after impedance greatly reduces the efficiency of the test.
  • a signal link crosstalk testing device and method provided by embodiments of the present application solve the above technical problems.
  • FIG. 5 is a schematic structural diagram of a signal link crosstalk testing device provided by an embodiment of the present application.
  • the signal link crosstalk test device includes: a signal transceiver module 20 and at least two test boards 30 .
  • Each test board 30 in the embodiment of the present application is provided with N signal connection terminals 32 and a second connector 31 .
  • the second connector 31 includes N second second connectors 32 connected correspondingly to the N signal connection terminals 32 .
  • the N second pins of the second connector 31 are configured to be connected correspondingly to the N first pins of the first connector 11 .
  • the signal transceiving module 20 in the embodiment of the present application includes a main control unit, a signal transmitting end and a signal receiving end.
  • the signal sending end is configured to send an attack signal to a first signal connection end
  • the first signal connection end is the signal connection end 32 corresponding to the crosstalk pin
  • the crosstalk pin is the high-speed backplane 10
  • the signal receiving end is configured to obtain the crosstalk feedback signal of the signal link to be tested from a second signal connection end, and the second signal connection end is connected to the proximal first pin of the signal link to be tested.
  • the signal connection terminal 32 is configured to obtain the crosstalk feedback signal of the signal link to be tested from a second signal connection end, and the second signal connection end is connected to the proximal first pin of the signal link to be tested.
  • At least two test boards 30 can be connected to the high-speed backplane 10 , and each test board 30 is connected to the corresponding first connector 11 on the high-speed backplane 10 through a second connector 31 respectively.
  • the first connector 11 can be regarded as a straight male connector
  • the second connector 31 can be regarded as an elbow female connector
  • the N first pins of the first connector 11 and the N of the second connector 31 The two second pins have a one-to-one correspondence and can achieve matching connections.
  • the number of signal connection terminals 32 on the test board 30 and the N second pins in the second connector are consistent, so that each first pin on the high-speed backplane 10 can be easily connected through the second pin.
  • the pins are led out to the corresponding signal connection terminals 32, so as to establish a signal transmission link between the first pins and the signal transmitting end/signal receiving end on the signal transceiver module 20, so as to cover the multi-slot high-speed backplane system. purpose of all signals.
  • the high-speed traces connected between the signal connection terminal 32 and the second pin can be designed to have different sizes.
  • the minimum size of the high-speed traces is constrained by the protocol standard, and the maximum size is constrained by the layout space of the test board.
  • the position of the test board 30 on the multi-slot high-speed backplane 10 can be fixed, and then connected to the signal transceiver module 20 by changing the test board 30
  • the position of the signal connection end 32 can meet the test requirements of different high-speed trace size combinations, avoid repeatedly adjusting the position of the test board on the multi-slot high-speed backplane 10 when testing each multi-slot high-speed backplane 10, and improve testing efficiency.
  • the signal transceiver module 20 in the embodiment of the present application is a device capable of generating and receiving high-speed signals.
  • the high-speed signal generated by the signal transceiver module 20 is output from the signal transmitting end.
  • the high-speed signal output from the signal transmitting end in the embodiment of the present application is The signal is used as an attack signal, and the high-speed signal received from the signal receiving end of the signal transceiver module 20 is used as a crosstalk feedback signal.
  • a high-speed attack signal is sent to the crosstalk pin through the signal transmitting end of the signal transceiver module 20, and then the signal link of the signal link to be tested is obtained through the signal receiving end of the signal transceiver module 20.
  • the crosstalk feedback signal is used to detect the degree of crosstalk experienced by the signal link under test when the attack signal is passed through the crosstalk pin.
  • each of the signal transmitting terminals includes a positive differential signal transmitting terminal (Tx+) and a negative differential signal transmitting terminal (Tx-), and each of the signal receiving terminals includes a positive differential signal receiving terminal. terminal (Rx+) and the negative differential signal receiving terminal (Rx-).
  • the signal transceiver module 20 is provided with multiple signal transmitting terminals, and each signal transmitting terminal is connected to a crosstalk pin.
  • the crosstalk pins include a first crosstalk pin and a second crosstalk pin, the first crosstalk pin is a pin adjacent to the remote first pin of the signal link to be tested, and the third crosstalk pin
  • the second crosstalk pin is a pin adjacent to the proximal first pin of the signal link to be tested.
  • the test board includes a first test board and a second test board. The first test board is configured to be connected to the remote first pin and the first crosstalk pin of the signal link to be tested, so The second test board is configured to be connected to the proximal first pin and the second crosstalk pin of the signal link to be tested.
  • multiple test boards 30 are provided on the high-speed backplane 10.
  • link S1 the current signal link to be tested
  • the first connector L1 the starting end of the link S1 (ie, the first remote pin) is located In the first connector L1
  • the end of the link S1 i.e., the proximal first pin
  • the first connector L1 is used as the distal first connector corresponding to the link S1.
  • the first connector L2 is used as the proximal first connector corresponding to the link S1.
  • the test board 30 on the first connector L1 is B1, and the test board 30 on the first connector L2 is B2. Therefore, the test board B1 is used as the first test board, and the test board B2 is used as the second test board.
  • crosstalk pins are based on the first far-end pin and the first near-end pin of the link S1.
  • the crosstalk pins are pins on the high-speed backplane 10 that are adjacent to the first far-end pin or the first near-end pin of the signal link to be tested.
  • the crosstalk pin adjacent to the far-end first pin of the signal link to be tested is regarded as the first crosstalk pin
  • the crosstalk pin adjacent to the near-end first pin of the signal link to be tested is The crosstalk pin acts as the second crosstalk pin.
  • the adjacent first pins around X 3 Y 3 /X 3 Y 4 in Figure 2 can be regarded as the first crosstalk Pin
  • the first proximal pin is X 3' Y 3' /X 3' Y 4' in Figure 3, that is, the adjacent X 3' Y 3' /X 3' Y 4' in Figure 3
  • the first pin acts as the second crosstalk pin.
  • the link S1 After determining which crosstalk pins correspond to the link S1, it can be further determined which signal connection terminal 32 on the test board 30 each crosstalk pin is connected to.
  • the corresponding connected signal connection terminal 32 serves as the first signal connection terminal.
  • the signal transmission end and the first signal connection end can be realized through a high-speed signal cable. connect. After the signal transmitting end is connected to the first signal connection end, the connection between the signal transmitting end and the crosstalk pin is established.
  • the first signal connection terminal in the embodiment of the present application includes a third signal connection terminal and a fourth signal connection terminal
  • the third signal connection terminal is a connection terminal corresponding to the first crosstalk pin on the first test board.
  • a signal connection terminal, the fourth signal connection terminal is a signal connection terminal corresponding to the second crosstalk pin on the second test board.
  • Each signal sending end is connected to one of the third signal connection end or the fourth signal connection end.
  • the signal connection terminals E11 and E21 on the test board B2 are the fourth signal connection terminals corresponding to the second crosstalk pin X 2' Y 1' /X 2' Y 2.
  • the signal connection terminals E12 and E22 on the test board B1 are Corresponding to the third signal connection terminal connected to the first crosstalk pin X 2 Y 1 /X 2 Y 2 , connect TX2+ and TX2- to E12 and E22 correspondingly, so as to communicate with the first crosstalk pin X 2 through TX2+ and TX2- Y 1 /X 2 Y 2 sends a differential attack signal.
  • the signal receiving end of the signal transceiver module 20 is set to collect the crosstalk feedback signal of the near-end first pin of the signal link S1 to be tested. Therefore, before testing the signal link S1 to be tested, first determine Which signal connection terminal on the test board is connected to the proximal first pin of the link S1?
  • the signal connection terminal corresponding to the proximal first pin is used as the second signal connection terminal.
  • the connection between the signal receiving end and the second signal connection end may be achieved through a high-speed signal cable. After the signal receiving end is connected to the second signal connection end, the connection between the signal receiving end and the proximal first pin of the link S1 is established.
  • the signal connection terminals E31 and E41 on the test board B2 are the second signal connections corresponding to the first proximal pin X 3' Y 3' /X 3' Y 4' of the link S1. Therefore, connect RX+ and RX- to E31 and E41 correspondingly to collect the differential crosstalk feedback signal of the first near-end pin X 3' Y 3' /X 3' Y 4' through RX+ and RX-.
  • the main control unit can control each of the signal transmitting terminals to send the attack signal in turn, and obtain the signal to be tested through the signal receiving terminal.
  • the crosstalk feedback signal of the link for each attack signal; the main control unit determines the total value of the crosstalk signal of the signal link to be tested based on the crosstalk feedback signal of the signal link to be tested for each attack signal.
  • the crosstalk feedback signal value of the crosstalk pin is used to evaluate the crosstalk performance of the signal link to be tested based on the crosstalk feedback signal value corresponding to each crosstalk pin.
  • the total crosstalk signal value of the signal link under test can be calculated based on the crosstalk feedback signal value corresponding to each crosstalk pin, and the crosstalk performance of the signal link under test can be evaluated based on the total crosstalk signal value.
  • the signal transceiver module 20 can also be provided with only one signal transmitting end and one signal receiving end, where the signal transmitting end includes a positive differential signal transmitting end Tx+ and a negative differential signal transmitting end Tx-.
  • the signal receiving end includes a positive differential signal receiving end Rx+ and a negative differential signal receiving end Rx-.
  • the amplitude of the crosstalk feedback signal is recorded; then the signal sending terminals Tx+ and Tx- are connected to the next group of first signal connection terminals to send attack signals to the next group of crosstalk pins, and then the slave signal receiving terminals Rx+ and Rx-The amplitude of the collected crosstalk feedback signal is recorded; and so on, until all crosstalk pins are traversed, the crosstalk feedback signal value corresponding to each crosstalk pin is obtained, and then based on the crosstalk feedback signal corresponding to each crosstalk pin value to evaluate the crosstalk performance of the signal link under test.
  • each of the test boards is provided with a plurality of second connectors, and each second connector is of a different type and is used to match different types of first connectors.
  • a suitable second connector can be selected to connect to the first connector according to the type of the first connector, so that the crosstalk test device can be suitable for crosstalk testing of different types of multi-slot high-speed backplanes.
  • the crosstalk test device in the embodiment of the present application also includes at least two high-speed terminals 33 , and the high-speed terminals 33 are arranged on the suspended signal connection end 32 .
  • the signal connection terminals E11/E21 on the test board B2 can be connected to the signal connection terminals E13/E23 on the test board B3 through the high-speed backplane 10.
  • a high-speed terminal 33 needs to be set on the signal connection terminal E13/E23 to avoid reflection caused by this terminal being suspended.
  • the impedance of the high-speed terminal 33 is adjustable, so that the high-speed terminal 33 can be configured with an impedance value of any size.
  • the impedance value of the high-speed terminal 33 can be adjusted according to the impedance of the high-speed wiring on the test board. , so that the impedance value of the high-speed terminal is equal to the impedance value of the high-speed trace on the test board, thereby achieving the purpose of eliminating reflections caused by impedance mismatch, and improving test efficiency by arbitrarily configuring impedance.
  • the embodiment of the present application also provides a signal link crosstalk testing method, which includes but is not limited to the following steps S110, S120 and S130.
  • Step S110 Send an attack signal through the signal sending end to the first signal connection end.
  • the first signal connection end is the signal connection end on the test board corresponding to the crosstalk pin.
  • the crosstalk pin is the high-speed backplane and The first near-end pin of the signal link to be tested or the pin adjacent to the first far-end pin.
  • Step S120 Obtain the crosstalk feedback signal of the signal link to be tested through the signal receiving end from the second signal connection end.
  • the second signal connection end is the proximal first tube on the test board corresponding to the signal link to be tested. Pin connection signal connector.
  • Step S130 Determine the crosstalk signal value of the signal link to be tested based on the crosstalk feedback signal.
  • each signal sending terminal is connected to one of the first signal connection terminals.
  • the attack signal is sent to the first signal connection terminal through the signal sending terminal.
  • Step S111 Control each of the signal sending terminals to send attack signals to the corresponding first signal connection terminal in turn.
  • Step S112 obtaining the crosstalk feedback signal of the signal link to be tested from the second signal connection end through the signal receiving end, including:
  • Step S113 Whenever a signal sending end sends an attack signal to the corresponding first signal connection end, the signal receiving end obtains the crosstalk feedback signal of the signal link under test for the current attack signal from the second signal connection end.
  • the total value of the crosstalk signal of the signal link to be tested is determined based on the crosstalk feedback signal of the signal link to be tested for each attack signal.
  • each test board is connected to the first connector on the high-speed backplane through a second connector.
  • a test board can be set up on the first connector corresponding to the near end and the far end, and then the attack signal is sent to the first signal connection end through the signal sending end of the signal transceiver module, here
  • the first signal connection end is the signal connection end corresponding to the crosstalk pin
  • the crosstalk pin is adjacent to the far-end first pin or the near-end first pin of the signal link to be tested on the high-speed backplane pin; obtain the crosstalk feedback signal of the signal link to be tested from the second signal connection end through the signal receiving end of the signal transceiver module, where the second signal connection end is the proximal third end corresponding to the signal link to be tested.
  • a signal connection for a pin connection In this way, it is possible to detect crosstalk on high-speed signals caused by coupling of surrounding high-speed signals, and improve

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Abstract

本申请提供一种信号链路串扰测试装置和方法，所述装置包括：至少两个测试板(30)，每个测试板(30)均设置有N个信号连接端(32)和第二连接器(31)；信号收发模块(20)，所述信号收发模块(20)包括信号发送端和信号接收端；所述信号发送端被设置为向第一信号连接端发送攻击信号，所述第一信号连接端为对应与串扰管脚连接的信号连接端，所述串扰管脚为高速背板(10)上与待测试信号链路的远端第一管脚或者近端第一管脚相邻的管脚；所述信号接收端被设置为从第二信号连接端获取待测试信号链路的串扰反馈信号，所述第二信号连接端为对应与所述待测试信号链路的近端第一管脚连接的信号连接端。

Description

信号链路串扰测试装置和方法
相关申请的交叉引用
本申请基于申请号为202210223872.9、申请日为2022年3月7日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本申请通信技术领域，特别是涉及一种信号链路串扰测试装置和方法。
背景技术
随着通信信号的传输速率越来越高，串扰对高速信号的影响越来越大，尤其对于4级脉冲幅度调制(4Pulse Amplitude Modulation，PAM4)信号，串扰过大会诱发信号接收端产生偶发误码，导致通信业务中断，影响通信网络的正常运转。为减小串扰对高速信号的影响，有必要对产品的串扰指标进行测试，以确保产品的串扰指标满足通信标准，保证产品的质量。然而，相关技术中的高速信号测试系统仅能测试高速背板裸板上高速走线之间的串扰，需要手动测试每个串扰信号，效率较低，无法同时测试高速背板系统实际应用过程中目标高速信号上因周围高速信号耦合或高速背板上因连接器耦合而产生的串扰，因而无法高效且准确地测试高速背板上的高速信号链路的串扰性能。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
本申请实施例提供一种信号链路串扰测试装置和方法。
第一方面，本申请实施例提供了一种信号链路串扰测试装置，用于对高速背板上的信号链路进行串扰测试，所述高速背板包括多个第一连接器，每个第一连接器包括N个第一管脚，其中N为大于1的整数，所述信号链路的两端对应为远端第一管脚和近端第一管脚，所述远端第一管脚和所述近端第一管脚分布在不同的第一连接器中，所述信号链路串扰测试装置包括：至少两个测试板，每个测试板均设置有N个信号连接端和第二连接器，所述第二连接器包括与所述N个信号连接端对应连接的N个第二管脚，所述第二连接器的所述N个第二管脚被设置为与所述第一连接器的所述N个第一管脚对应连接；信号收发模块，所述信号收发模块包括主控单元、信号发送端和信号接收端；所述信号发送端被设置为向第一信号连接端发送攻击信号，所述第一信号连接端为对应与串扰管脚连接的信号连接端，所述串扰管脚为高速背板上与待测试信号链路的远端第一管脚或者近端第一管脚相邻的管脚；所述信号接收端被设置为从第二信号连接端获取待测试信号链路的串扰反馈信号，所述第二信号连接端为对应与所述待测试信号链路的近端第一管脚连接的信号连接端；所述主控单元被设置为根据所述串扰反馈信号，确定待测试信号链路的串扰信号值。
第二方面，本申请实施例提供一种信号链路串扰测试方法，所述方法包括：通过信号发送端向第一信号连接端发送攻击信号，所述第一信号连接端为测试板上对应与串扰管脚连接 的信号连接端，所述串扰管脚为高速背板上与待测试信号链路的近端第一管脚或者远端第一管脚相邻的管脚；通过信号接收端从第二信号连接端获取待测试信号链路的串扰反馈信号，所述第二信号连接端为测试板上对应与所述待测试信号链路的近端第一管脚连接的信号连接端；根据所述串扰反馈信号，确定待测试信号链路的串扰信号值。
附图说明
附图用来提供对本申请技术方案的进一步理解，并且构成说明书的一部分，与本申请的实施例一起用于解释本申请的技术方案，并不构成对本申请技术方案的限制。
图1是一种高速背板的结构示意图；
图2是一个第一连接器的结构示意图；
图3是另一个第一连接器的结构示意图；
图4是差分高速信号的信号链路之间的串扰关系图；
图5是本申请实施例提供的一种信号链路串扰测试装置的结构示意图；
图6是本申请实施例提供的另一种信号链路串扰测试装置的结构示意图；
图7是本申请实施例提供的一种信号链路串扰测试方法的流程示意图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
应了解，在本申请实施例的描述中，如果有描述到“第一”、“第二”等只是用于区分技术特征为目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量或者隐含指明所指示的技术特征的先后关系。“至少一个”是指一个或者多个，“多个”是指两个或两个以上。“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示单独存在A、同时存在A和B、单独存在B的情况。其中A，B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项”及其类似表达，是指的这些项中的任意组合，包括单项或复数项的任意组合。例如，a，b和c中的至少一项可以表示：a，b，c，a和b，a和c，b和c或a和b和c，其中a，b，c可以是单个，也可以是多个。
在本申请的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。
在本申请中，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”、“固定”等术语应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或成一体；可以是机械连接，也可以是电连接或可以互相通讯；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员 而言，可以根据具体情况理解上述术语在本申请中的具体含义。
在本申请中，除非另有明确的规定和限定，第一特征在第二特征“之上”或“之下”可以包括第一和第二特征直接接触，也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且，第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方，或仅仅表示第一特征水平高度小于第二特征。
还需说明的是，下面所描述的本申请各个实施方式中所涉及到的技术特征只要彼此之间未构成冲突就可以相互组合。
本申请实施例提供一种信号链路串扰测试装置和方法，用于对高速背板上的信号链路进行串扰测试。
为便于理解本申请实施例的技术方案，下面先对高速背板进行介绍。
图1示出了一种高速背板的结构示意图。图1所示的高速背板10为多槽位高速背板，具体可以是应用于5G通信领域、实现业务传输的系统。该高速背板10的每个槽位上设置有一个第一连接器11，不同的第一连接器11之间形成有用于传输高速信号的信号链路。可以理解的是，多槽位高速背板10在本申请实施例中为待测产品，可以是市场上满足上述描述的各种类型的产品。本申请实施例描述的高速信号具体可以是PAM4信号。
图2示出了一个第一连接器的结构示意图。如图2所示，高速背板10上的各个第一连接器11均包括多个第一管脚，这里设定第一连接器11中的第一管脚的数量为N(N为大于1的整数)个，N个第一管脚按照I行J列排布，形成第一管脚矩阵。这里将图2所示的第一连接器命名为L1，第一连接器L1中的第一管脚命名为XiYj。第一管脚矩阵中的管脚两两成对，成对的第一管脚构成一组差分管脚对，用于传输差分的高速信号。
图3示出了另一个第一连接器的结构示意图，这里将图3所示的第一连接器命名为L2，第一连接器L2中的第一管脚命名为Xi’Yj’。
假定第一连接器L1和第一连接器L2之间的第一管脚通过高速信号线逐一对应连接，形成多组差分高速信号。图2和图3所示的示例中总共示出有9组差分高速信号。
在一些实施方式中，将图2的第一连接器L1中的第一管脚X3Y3/X3Y4作为待测试信号链路的远端第一管脚，图3的第一连接器L2中的第一管脚X3’Y3’/X3’Y4’作为待测试信号链路的近端第一管脚。
图4示出了差分高速信号的信号链路之间的串扰关系图。假定X3Y3/X3Y4至X3’Y3’/X3’Y4’的信号链路为图4中的SERDES2，其周围的2组信号链路命名为SERDES1与SERDES3，如图4所示，则SERDES1与SERDES3通过高速背板耦合到SERDES2上的噪声就是多槽位高速背板上待测信号链路周围临近的信号链路走线对其产生的串扰。
对于X3Y3/X3Y4至X3’Y3’/X3’Y4’的信号链路而言，图2中的X3Y3/X3Y4周围相邻的第一管脚构成当前待测试信号链路SERDES2的近端串扰管脚；图3中X3’Y3’/X3’Y4’周围相邻的第一管脚构成当前待测试信号链路SERDES2的远端串扰管脚。
应了解的是，相关技术中，只能实现高速背板裸板上高速信号线之间的串扰测试，无法测试多槽位高速背板系统中目标高速信号上因周围高速信号耦合而产生的串扰。相关技术的实现方法是根据目标高速信号(即待测试信号链路)中触发点的波形与串扰高速信号上采集 点的波形之间的相位差，从至少一个波形中识别出串扰信号，进而判断串扰信号的幅值。此方法尚可满足高速背板中短距离的信号走线之间的串扰测试，但对于多槽位高速背板中长距离的高速走线而言，串扰信号因为长距离高速走线的大插损而衰减严重，此方法中识别串扰信号的难度就会极度上升，会影响测试效率。除此之外，此系统通过目标信号线与串扰信号线中各自反射信号的采集来确定匹配电阻的阻抗，此阻抗的电阻可能无法从市场上获得，即便能够获得，也需要根据电信号测试判断阻抗后再选型与焊接电阻，极大程度上降低了测试的效率。本申请实施例提供的一种信号链路串扰测试装置和方法即为解决上述技术问题。
图5是本申请实施例提供的一种信号链路串扰测试装置的结构示意图。如图5所示，所述信号链路串扰测试装置包括：信号收发模块20和至少两个测试板30。
本申请实施例的每个测试板30均设置有N个信号连接端32和第二连接器31，所述第二连接器31包括与所述N个信号连接端32对应连接的N个第二管脚，所述第二连接器31的所述N个第二管脚被设置为与所述第一连接器11的所述N个第一管脚对应连接。
本申请实施例的信号收发模块20包括主控单元、信号发送端和信号接收端。其中，所述信号发送端被设置为向第一信号连接端发送攻击信号，所述第一信号连接端为对应与串扰管脚连接的信号连接端32，所述串扰管脚为高速背板10上与待测试信号链路的远端第一管脚或者近端第一管脚相邻的管脚。所述信号接收端被设置为从第二信号连接端获取待测试信号链路的串扰反馈信号，所述第二信号连接端为对应与所述待测试信号链路的近端第一管脚连接的信号连接端32。
在一些实施方式中，可以将至少两个测试板30连接在高速背板10上，每个测试板30分别通过第二连接器31与高速背板10上对应的第一连接器11连接。这里，第一连接器11可以看作是直公连接器，第二连接器31可以看作是弯母连接器，第一连接器11的N个第一管脚和第二连接器31的N个第二管脚为一一对应的关系，能够实现匹配连接。
可以理解的是，测试板30上的N个信号连接端32和第二连接器中的N个第二管脚是一一对应的关系。也就是说，测试板30上信号连接端32的数量、第二管脚的数量、第一管脚的数量是一致的，这样可以方便将高速背板10上的各个第一管脚通过第二管脚引出至对应的信号连接端32，以便于在第一管脚与信号收发模块20上的信号发送端/信号接收端之间建立信号传输链路，达到覆盖多槽位高速背板系统中所有信号的目的。
在一些实施方式中，可以将信号连接端32与第二管脚之间连接的高速走线设计成不同尺寸，高速走线的最小尺寸根据协议标准约束，最大尺寸根据测试板的布局空间约束，实现测试板上不同尺寸的组合，以便在测试多槽位高速背板时，可以固定测试板30在多槽位高速背板10上的位置，然后通过变动测试板30上与信号收发模块20连接的信号连接端32的位置，满足不同高速走线尺寸组合的测试需求，避免在测试每种多槽位高速背板10时反复调整测试板在多槽位高速背板10上的位置，提高测试效率。
可以理解的是，本申请实施例的信号收发模块20为能够产生和接收高速信号的装置，信号收发模块20产生的高速信号从信号发送端输出，本申请实施例将从信号发送端输出的高速信号作为攻击信号，将从信号收发模块20的信号接收端接收到的高速信号作为串扰反馈信号。
基于本申请实施例提供的信号链路串扰测试装置，通过信号收发模块20的信号发送端向串扰管脚发送高速的攻击信号，再通过信号收发模块20的信号接收端获取待测试信号链路的 串扰反馈信号，以检测待测试信号链路在串扰管脚通入攻击信号时所受到的串扰程度。
可以理解的是，本申请实施例中，每个所述信号发送端包括正差分信号发送端(Tx+)和负差分信号发送端(Tx-)，每个所述信号接收端包括正差分信号接收端(Rx+)和负差分信号接收端(Rx-)。
在一种可能的实现方式中，信号收发模块20设置有多个信号发送端，每个信号发送端对应连接一个串扰管脚。所述串扰管脚包括第一串扰管脚和第二串扰管脚，所述第一串扰管脚为与所述待测试信号链路的远端第一管脚相邻的管脚，所述第二串扰管脚为与所述待测试信号链路的近端第一管脚相邻的管脚。所述测试板包括第一测试板和第二测试板，所述第一测试板被设置为与所述待测试信号链路的远端第一管脚及所述第一串扰管脚连接，所述第二测试板被设置为与所述待测试信号链路的近端第一管脚及所述第二串扰管脚连接。
如图5所示，高速背板10上设置有多个测试板30(B1、B2、B3等)。假定当前待测试信号链路(下面为便于描述将简称为链路S1)设置在第一连接器L1和第一连接器L2之间，链路S1的始端(即远端第一管脚)位于第一连接器L1中，链路S1的末端(即近端第一管脚)位于第一连接器L2中，因此，将第一连接器L1作为链路S1对应的远端第一连接器，将第一连接器L2作为链路S1对应的近端第一连接器。第一连接器L1上的测试板30为B1,第一连接器L2上的测试板30为B2，因此，将测试板B1作为第一测试板，将测试板B2作为第二测试板。
可以理解的是，在对待测试信号链路S1进行测试之前，先根据链路S1的远端第一管脚和近端第一管脚确定串扰管脚有哪些。串扰管脚为高速背板10上与待测试信号链路的远端第一管脚或者近端第一管脚相邻的管脚。其中，将与所述待测试信号链路的远端第一管脚相邻的串扰管脚作为第一串扰管脚，将与所述待测试信号链路的近端第一管脚相邻的串扰管脚作为第二串扰管脚。例如，远端第一管脚为图2中的X3Y3/X3Y4，即可将图2中X3Y3/X3Y4周围相邻的第一管脚作为第一串扰管脚，近端第一管脚为图3中的X3’Y3’/X3’Y4’，即可将图3中X3’Y3’/X3’Y4’周围相邻的第一管脚作为第二串扰管脚。
可以理解的是，在确定链路S1对应的串扰管脚有哪些之后，可以进一步确定各个串扰管脚是与测试板30上的哪个信号连接端32对应连接，本申请实施例将与串扰管脚对应连接的信号连接端32作为第一信号连接端。在确定第一信号连接端后，将信号收发模块20的信号发送端与该第一信号连接端建立连接，具体地，可以通过高速信号线缆实现信号发送端和第一信号连接端之间的连接。将信号发送端连接至第一信号连接端后，即建立起信号发送端与串扰管脚的连接。
可以理解的是，本申请实施例的第一信号连接端包括第三信号连接端和第四信号连接端，所述第三信号连接端为第一测试板上对应与第一串扰管脚连接的信号连接端，所述第四信号连接端为第二测试板上对应与第二串扰管脚连接的信号连接端。各个信号发送端对应连接一个所述第三信号连接端或者所述第四信号连接端。
例如，图5的示例中，测试板B2上信号连接端E11和E21为对应与第二串扰管脚X2’Y1’/X2’Y2连接的第四信号连接端，将TX1+和TX1-对应与E11和E21连接，以通过TX1+和TX1-向第二串扰管脚X2’Y1’/X2’Y2’发送差分的攻击信号；测试板B1上信号连接端E12和E22为对应与第一串扰管脚X2Y1/X2Y2连接的第三信号连接端，将TX2+和TX2-对应与E12和E22连接，以通过TX2+和TX2-向第一串扰管脚X2Y1/X2Y2发送差分攻击信号。
可以理解的是，信号收发模块20的信号接收端被设置为采集待测试信号链路S1的近端第一管脚的串扰反馈信号，因此，在对待测试信号链路S1进行测试之前，先确定链路S1的近端第一管脚与测试板上的哪个信号连接端对应连接，本申请实施例将与近端第一管脚对应连接的信号连接端作为第二信号连接端。在确定第二信号连接端后，将信号收发模块20的信号接收端与该第二信号连接端建立连接。在一些示例中，可以通过高速信号线缆实现信号接收端和第二信号连接端之间的连接。将信号接收端连接至第二信号连接端后，即建立起信号接收端与链路S1的近端第一管脚的连接。
例如，图5的示例中，测试板B2上信号连接端E31和E41为对应与链路S1的近端第一管脚X3’Y3’/X3’Y4’连接的第二信号连接端，因此，将RX+和RX-对应与E31和E41连接，以通过RX+和RX-采集近端第一管脚X3’Y3’/X3’Y4’的差分串扰反馈信号。
测试时，针对信号收发模块20设置有多个信号发送端的实施例，可以由所述主控单元控制各个所述信号发送端轮流发送所述攻击信号，并通过所述信号接收端获取待测试信号链路针对各个攻击信号的串扰反馈信号；所述主控单元根据待测试信号链路针对各个攻击信号的串扰反馈信号，确定待测试信号链路的串扰信号总值。例如，首先控制信号发送端TX1+和TX1-发送攻击信号，并通过RX+和RX-获取此时近端第一管脚的串扰反馈信号，得到第一个串扰反馈信号值；然后控制发送端TX2+和TX2-发送攻击信号，并通过RX+和RX-获取此时近端第一管脚的串扰反馈信号，得到第二个串扰反馈信号值；如此类推，直至遍历所有的串扰管脚，得到对应于各个串扰管脚的串扰反馈信号值，进而基于对应于各个串扰管脚的串扰反馈信号值，评估待测试信号链路的串扰性能。
作为示例，可以基于对应于各个串扰管脚的串扰反馈信号值，计算待测试信号链路的串扰信号总值，基于串扰信号总值评估待测试信号链路的串扰性能。
请参见图6，在一些其他实施例中，信号收发模块20也可仅设置有一个信号发送端和一个信号接收端，这里信号发送端包括正差分信号发送端Tx+和负差分信号发送端Tx-，信号接收端包括正差分信号接收端Rx+和负差分信号接收端Rx-。在进行串扰测试时，可以先将信号发送端Tx+和Tx-与第一组第一信号连接端连接，以向对应的串扰管脚发送攻击信号，进而把从信号接收端Rx+和Rx-采集到的串扰反馈信号的幅值记录下来；随后将信号发送端Tx+和Tx-与下一组第一信号连接端连接，以向下一组串扰管脚发送攻击信号，进而把从信号接收端Rx+和Rx-采集到的串扰反馈信号的幅值记录下来；如此类推，直至遍历所有的串扰管脚，得到对应于各个串扰管脚的串扰反馈信号值，进而基于对应于各个串扰管脚的串扰反馈信号值，评估待测试信号链路的串扰性能。
可以理解的是，为了提高串扰测试装置的适用范围，各个所述测试板设置有多个第二连接器，各个第二连接器的类型不同，用于匹配不同类型的第一连接器。这样，具体应用时，可以根据第一连接器的类型，选用合适的第二连接器与第一连接器连接，使得串扰测试装置可以适用于不同类型的多槽位高速背板的串扰测试。
可以理解的是，本申请实施例的串扰测试装置还包括至少两个高速端子33，所述高速端子33被设置为设置在悬空的所述信号连接端32上。举例来说，在图5所示的示例中，测试板B2上信号连接端E11/E21可通过高速背板10与测试板B3上的信号连接端E13/E23连接，当信号收发模块20向信号连接端E11/E21施加攻击信号时，信号连接端E13/E23上需要设置高速端子33，以避免这一端因为悬空而导致反射。
可以理解的是，所述高速端子33的阻抗可调，使得高速端子33可以配置为任意大小的阻抗值，在实际测试时可以根据测试板上高速走线的阻抗调整的高速端子33的阻抗值，以使所述所述高速端子的阻抗值与所述测试板上的高速走线的阻抗值相等，从而达到消除阻抗不匹配引起的反射的目的，通过任意配置阻抗提高了测试效率。
请参见图7，本申请实施例还提供了一种信号链路串扰测试方法，所述方法包括但不限于如下步骤S110、S120和S130.
步骤S110，通过信号发送端向第一信号连接端发送攻击信号，所述第一信号连接端为测试板上对应与串扰管脚连接的信号连接端，所述串扰管脚为高速背板上与待测试信号链路的近端第一管脚或者远端第一管脚相邻的管脚。
步骤S120，通过信号接收端从第二信号连接端获取待测试信号链路的串扰反馈信号，所述第二信号连接端为测试板上对应与所述待测试信号链路的近端第一管脚连接的信号连接端。
步骤S130，根据所述串扰反馈信号，确定待测试信号链路的串扰信号值。
在一些实施方式中，所述信号发送端设置有多个，各个信号发送端对应连接一个所述第一信号连接端；步骤S110中，通过信号发送端向第一信号连接端发送攻击信号，可以包括以下步骤。
步骤S111，控制各个所述信号发送端轮流向对应的第一信号连接端发送攻击信号。
步骤S112，所述通过信号接收端从第二信号连接端获取待测试信号链路的串扰反馈信号，包括：
步骤S113，每当一个信号发送端向对应的第一信号连接端发送攻击信号，通过信号接收端从第二信号连接端获取待测试信号链路针对当前攻击信号的串扰反馈信号。
在一些实施方式中，根据待测试信号链路针对各个攻击信号的串扰反馈信号，确定待测试信号链路的串扰信号总值。
需说明的是，在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述或记载的部分，可以参见其它实施例的相关描述。
基于本申请实施例提供的信号链路串扰测试装置和方法，各个测试板分别通过第二连接器与高速背板上的第一连接器连接。针对当前待测试的信号链路，可以在其近端和远端对应的第一连接器上分别设置一个测试板，然后通过信号收发模块的信号发送端向第一信号连接端发送攻击信号，这里的第一信号连接端为对应与串扰管脚连接的信号连接端，所述串扰管脚为高速背板上与待测试信号链路的远端第一管脚或者近端第一管脚相邻的管脚；通过信号收发模块的信号接收端从第二信号连接端获取待测试信号链路的串扰反馈信号，这里的第二信号连接端为对应与所述待测试信号链路的近端第一管脚连接的信号连接端。如此，即能够实现检测高速信号上因周围高速信号耦合而产生的串扰，提高高速背板的信号链路的串扰性能测试准确性。
以上是对本申请的一些实施例进行了具体说明，但本申请并不局限于上述实施方式，熟悉本领域的技术人员在不违背本申请范围的共享条件下还可作出种种等同的变形或替换，这些等同的变形或替换均包括在本申请权利要求所限定的范围内。

Claims (10)

  1. 一种信号链路串扰测试装置，用于对高速背板上的信号链路进行串扰测试，所述高速背板包括多个第一连接器，每个第一连接器包括N个第一管脚，其中N为大于1的整数，所述信号链路的两端对应为远端第一管脚和近端第一管脚，所述远端第一管脚和所述近端第一管脚分布在不同的第一连接器中，其中，所述信号链路串扰测试装置包括：
    至少两个测试板，每个测试板均设置有N个信号连接端和第二连接器，所述第二连接器包括与所述N个信号连接端对应连接的N个第二管脚，所述第二连接器的所述N个第二管脚被设置为与所述第一连接器的所述N个第一管脚对应连接；
    信号收发模块，所述信号收发模块包括主控单元、信号发送端和信号接收端；
    所述信号发送端被设置为向第一信号连接端发送攻击信号，所述第一信号连接端为对应与串扰管脚连接的信号连接端，所述串扰管脚为高速背板上与待测试信号链路的远端第一管脚或者近端第一管脚相邻的管脚；
    所述信号接收端被设置为从第二信号连接端获取待测试信号链路的串扰反馈信号，所述第二信号连接端为对应与所述待测试信号链路的近端第一管脚连接的信号连接端；
    所述主控单元被设置为根据所述串扰反馈信号，确定待测试信号链路的串扰信号值。
  2. 根据权利要求1所述的信号链路串扰测试装置，其中，所述串扰管脚包括第一串扰管脚和第二串扰管脚，所述第一串扰管脚为与所述待测试信号链路的远端第一管脚相邻的管脚，所述第二串扰管脚为与所述待测试信号链路的近端第一管脚相邻的管脚；
    所述测试板包括第一测试板和第二测试板，所述第一测试板被设置为与所述待测试信号链路的远端第一管脚及所述第一串扰管脚连接，所述第二测试板被设置为与所述待测试信号链路的近端第一管脚及所述第二串扰管脚连接；
    所述第一信号连接端包括第三信号连接端和第四信号连接端，所述第三信号连接端为第一测试板上对应与第一串扰管脚连接的信号连接端，所述第四信号连接端为第二测试板上对应与第二串扰管脚连接的信号连接端；
    所述信号收发模块上设置有多个所述信号发送端，各个信号发送端对应连接一个所述第三信号连接端或者所述第四信号连接端。
  3. 根据权利要求2所述的信号链路串扰测试装置，其中，所述主控单元还被设置为控制各个所述信号发送端轮流发送所述攻击信号，并通过所述信号接收端获取待测试信号链路针对各个攻击信号的串扰反馈信号。
  4. 根据权利要求3所述的信号链路串扰测试装置，其中，所述主控单元还被设置为根据待测试信号链路针对各个攻击信号的串扰反馈信号，确定待测试信号链路的串扰信号总值。
  5. 根据权利要求1所述的信号链路串扰测试装置，还包括至少两个高速端子，所述高速端子被设置为设置在悬空的所述信号连接端上；所述高速端子的阻抗可调，以使所述所述高速端子的阻抗值与所述测试板上的高速走线的阻抗值相等。
  6. 根据权利要求1所述的信号链路串扰测试装置，其中，各个所述测试板设置有多个所述第二连接器，各个所述第二连接器被设置为匹配不同类型的所述第一连接器。
  7. 根据权利要求1所述的串扰测试装置，其中，每个所述信号发送端包括正差分信号发送端和负差分信号发送端；每个所述信号接收端包括正差分信号接收端和负差分信号接收端。
  8. 一种信号链路串扰测试方法，包括：
    通过信号发送端向第一信号连接端发送攻击信号，所述第一信号连接端为测试板上对应与串扰管脚连接的信号连接端，所述串扰管脚为高速背板上与待测试信号链路的远端第一管脚或者近端第一管脚相邻的管脚；
    通过信号接收端从第二信号连接端获取待测试信号链路的串扰反馈信号，所述第二信号连接端为对应与所述待测试信号链路的近端第一管脚连接的信号连接端；
    根据所述串扰反馈信号，确定待测试信号链路的串扰信号值。
  9. 根据权利要求8所述的方法，其中，所述信号发送端设置有多个，各个信号发送端对应连接一个所述第一信号连接端；
    所述通过信号发送端向第一信号连接端发送攻击信号，包括：
    控制各个所述信号发送端轮流向对应的第一信号连接端发送攻击信号；
    所述通过信号接收端从第二信号连接端获取待测试信号链路的串扰反馈信号，包括：
    每当一个信号发送端向对应的第一信号连接端发送攻击信号，通过信号接收端从第二信号连接端获取待测试信号链路针对当前攻击信号的串扰反馈信号。
  10. 根据权利要求9所述的方法，还包括：根据待测试信号链路针对各个攻击信号的串扰反馈信号，确定待测试信号链路的串扰信号总值。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7794290B1 (en) * 2009-07-21 2010-09-14 Adtran, Inc. Communications connector configured for low crosstalk
CN108254652A (zh) * 2017-12-25 2018-07-06 曙光信息产业(北京)有限公司 一种背板连接器的测试装置
CN110531180A (zh) * 2018-05-23 2019-12-03 上海电缆研究所有限公司 一种测试大对数线缆缆间串扰的方法及装置
US20220044605A1 (en) * 2020-02-28 2022-02-10 Fuzhou Boe Optoelectronics Technology Co., Ltd. Detection structure, display panel, detection device and detection system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7794290B1 (en) * 2009-07-21 2010-09-14 Adtran, Inc. Communications connector configured for low crosstalk
CN108254652A (zh) * 2017-12-25 2018-07-06 曙光信息产业(北京)有限公司 一种背板连接器的测试装置
CN110531180A (zh) * 2018-05-23 2019-12-03 上海电缆研究所有限公司 一种测试大对数线缆缆间串扰的方法及装置
US20220044605A1 (en) * 2020-02-28 2022-02-10 Fuzhou Boe Optoelectronics Technology Co., Ltd. Detection structure, display panel, detection device and detection system

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