WO2023168927A1 - 光模块 - Google Patents

光模块 Download PDF

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Publication number
WO2023168927A1
WO2023168927A1 PCT/CN2022/121485 CN2022121485W WO2023168927A1 WO 2023168927 A1 WO2023168927 A1 WO 2023168927A1 CN 2022121485 W CN2022121485 W CN 2022121485W WO 2023168927 A1 WO2023168927 A1 WO 2023168927A1
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WO
WIPO (PCT)
Prior art keywords
circuit board
optical
light
chip
signal
Prior art date
Application number
PCT/CN2022/121485
Other languages
English (en)
French (fr)
Inventor
张加傲
王欣南
于琳
慕建伟
Original Assignee
青岛海信宽带多媒体技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CN202220481403.2U external-priority patent/CN216772051U/zh
Priority claimed from CN202210217109.5A external-priority patent/CN114488439B/zh
Priority claimed from CN202220482540.8U external-priority patent/CN216772052U/zh
Priority claimed from CN202210216302.7A external-priority patent/CN114488438B/zh
Application filed by 青岛海信宽带多媒体技术有限公司 filed Critical 青岛海信宽带多媒体技术有限公司
Priority to CN202280077072.9A priority Critical patent/CN118284835A/zh
Publication of WO2023168927A1 publication Critical patent/WO2023168927A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/40—Transceivers

Definitions

  • the present disclosure relates to the technical field of optical fiber communication, and in particular, to an optical module.
  • optical communication technology With the development of new business and application models such as cloud computing, mobile Internet, and video conferencing, optical communication technology has become increasingly important.
  • optical modules are tools to realize the mutual conversion of optical signals and electrical signals, and are one of the key components in optical communication equipment.
  • the transmission rate of optical modules continues to increase.
  • An optical module which includes a housing, a circuit board and a first optical transceiver component.
  • the circuit board is arranged in the housing.
  • the first optical transceiver component is electrically connected to the circuit board and is configured to generate an optical signal or receive an optical signal from outside the optical module.
  • the first optical transceiver component includes a first base, a first silicon optical chip, a first light source, a first circuit board and a first digital signal processing chip.
  • the first base is disposed on the circuit board.
  • the first silicon optical chip is disposed on the first base and is configured to receive and modulate light that does not carry a signal to output light that carries a signal, or to receive an optical signal from outside the optical module. .
  • the first light source is disposed on the first base and is configured to provide the light carrying no signal to the first silicon photonic chip.
  • the first circuit board is disposed on the circuit board and is electrically connected to the circuit board. One end of the first circuit board facing the first silicon photonic chip is open to form a first gap. The first notch is adapted to the shape of the first silicon photonic chip.
  • the first silicon photonic chip is disposed in the first gap and is electrically connected to the first circuit board.
  • the first digital signal processing chip is disposed on the primary circuit board and is electrically connected to the first silicon photonic chip through the primary circuit board to drive the first silicon photonic chip.
  • Figure 1 is a connection diagram of an optical communication system according to some embodiments.
  • Figure 2 is a structural diagram of an optical network terminal according to some embodiments.
  • Figure 3 is a structural diagram of an optical module according to some embodiments.
  • Figure 4 is an exploded view of an optical module according to some embodiments.
  • Figure 5 is a perspective view of a first optical transceiver component and a circuit board of an optical module according to some embodiments
  • Figure 6 is a structural diagram of the first optical transceiver component, the second optical transceiver component and the circuit board of another optical module according to some embodiments;
  • Figure 7 is an exploded view of the first optical transceiver component and circuit board of an optical module according to some embodiments.
  • Figure 8 is a perspective view of the first optical transceiver component and the circuit board of an optical module from another perspective according to some embodiments;
  • Figure 9 is an exploded view of the first optical transceiver component and circuit board of an optical module from another perspective according to some embodiments.
  • Figure 10 is an exploded view of the first optical transceiver component, the second optical transceiver component and the circuit board of another optical module according to some embodiments;
  • Figure 11 is a structural diagram of the first optical transceiver component, the second optical transceiver component and the circuit board of another optical module according to some embodiments from another perspective (such as looking down);
  • Figure 12 is a structural diagram of a first optical transceiver component of an optical module according to some embodiments.
  • Figure 13 is a perspective view of a first optical transceiver component of an optical module according to some embodiments.
  • Figure 14 is an exploded view of a first optical transceiver component of an optical module according to some embodiments.
  • Figure 15 is a perspective view of the first optical transceiver component of an optical module from another perspective according to some embodiments.
  • Figure 16 is a structural diagram of a base of an optical module according to some embodiments.
  • Figure 17 is an exploded view of the base, light source, silicon photonic chip, etc. of an optical module according to some embodiments;
  • Figure 18 is a perspective view of the base of an optical module according to some embodiments.
  • Figure 19 is an exploded view of the first optical transceiver component and protective cover of an optical module according to some embodiments.
  • Figure 20 is an exploded view of the first optical transceiver component and protective cover of an optical module from another perspective according to some embodiments;
  • Figure 21 is a perspective view of a protective cover of an optical module according to some embodiments.
  • Figure 22 is a structural diagram of the top surface of a secondary circuit board of an optical module according to some embodiments.
  • Figure 23 is another structural diagram of the top surface of the secondary circuit board of an optical module according to some embodiments.
  • Figure 24 is a structural diagram of the bottom surface of a secondary circuit board of an optical module according to some embodiments.
  • Figure 25 is a structural diagram of a third-layer sub-circuit board of a secondary circuit board of an optical module according to some embodiments.
  • Figure 26 is a structural diagram of a sixth-layer sub-circuit board of a sub-circuit board of an optical module according to some embodiments.
  • Figure 27 is a structural diagram of a second-layer sub-circuit board of a secondary circuit board of an optical module according to some embodiments.
  • Figure 28 is a structural diagram of a seventh-layer sub-circuit board of a sub-circuit board of an optical module according to some embodiments.
  • connection should be understood in a broad sense.
  • connection can be a fixed connection, a detachable connection, or an integrated connection; it can be a direct connection or an indirect connection through an intermediate medium.
  • coupled indicates that two or more components are in direct physical or electrical contact.
  • coupled or “communicatively coupled” may also refer to two or more components that are not in direct contact with each other but still cooperate or interact with each other.
  • the embodiments disclosed herein are not necessarily limited by the content herein.
  • Optical modules realize the mutual conversion function of optical signals and electrical signals in the field of optical fiber communication technology.
  • the optical module includes an optical port and an electrical port.
  • the optical module realizes optical communication with information transmission equipment such as optical fiber or optical waveguide through the optical port, and realizes the electrical connection with the optical network terminal (for example, optical modem) through the electrical port.
  • the electrical connection It is mainly used to realize power supply, two-wire synchronous serial (iner-Integrated Circuit, I2C) signal transmission, data signal transmission and grounding; the optical network terminal transmits electrical signals to the computer through network cables or wireless fidelity technology (Wi-Fi) and other information processing equipment.
  • I2C in-Integrated Circuit
  • Wi-Fi wireless fidelity technology
  • Figure 1 is a connection diagram of an optical communication system according to some embodiments.
  • the optical communication system mainly includes a remote server 1000, a local information processing device 2000, an optical network terminal 100, an optical module 200, an optical fiber 101 and a network cable 103.
  • the optical fiber 101 is connected to the remote server 1000, and the other end is connected to the optical network terminal 100 through the optical module 200.
  • the optical fiber itself can support long-distance signal transmission, such as signal transmission of thousands of meters (6 kilometers to 8 kilometers). On this basis, if repeaters are used, ultra-long-distance transmission can theoretically be achieved. Therefore, in a common optical communication system, the distance between the remote server 1000 and the optical network terminal 100 can usually reach several kilometers, tens of kilometers, or hundreds of kilometers.
  • the local information processing device 2000 can be any one or more of the following devices: router, switch, computer, mobile phone, tablet computer, television, etc.
  • the physical distance between the remote server 1000 and the optical network terminal 100 is greater than the physical distance between the local information processing device 2000 and the optical network terminal 100 .
  • the connection between the local information processing device 2000 and the remote server 1000 is completed by the optical fiber 101 and the network cable 103; and the connection between the optical fiber 101 and the network cable 103 is completed by the optical module 200 and the optical network terminal 100.
  • the optical network terminal 100 includes a substantially rectangular parallelepiped housing, and an optical module interface 102 and a network cable interface 104 provided on the housing.
  • the optical module interface 102 is configured to access the optical module 200 so that the optical network terminal 100 and the optical module 200 establish a bidirectional electrical signal connection.
  • the network cable interface 104 is configured to access the network cable 103, so that the optical network terminal 100 and the network cable 103 establish a bidirectional electrical signal connection.
  • the optical module 200 and the network cable 103 are connected through the optical network terminal 100 .
  • the optical network terminal 100 transmits the electrical signal from the optical module 200 to the network cable 103, and transmits the electrical signal from the network cable 103 to the optical module 200. Therefore, the optical network terminal 100 serves as the host computer of the optical module 200 and can monitor the optical module. 200 job.
  • the host computer of the optical module 200 may also include an optical line terminal (Optical Line Terminal, OLT), etc.
  • the optical module 200 includes an optical port and an electrical port.
  • the optical port is configured to be connected to the optical fiber 101, so that the optical module 200 and the optical fiber 101 establish a bidirectional optical signal connection;
  • the electrical port is configured to be connected to the optical network terminal 100, so that the optical module 200 and the optical network terminal 100 establish a bidirectional connection. electrical signal connection.
  • the optical module 200 realizes mutual conversion between optical signals and electrical signals, thereby establishing a connection between the optical fiber 101 and the optical network terminal 100 .
  • the optical signal from the optical fiber 101 is converted into an electrical signal by the optical module 200 and then input into the optical network terminal 100.
  • the electrical signal from the optical network terminal 100 is converted into an optical signal by the optical module 200 and input into the optical fiber 101.
  • the remote server 1000 establishes a bidirectional signal transmission channel with the local information processing device 2000 through the optical fiber 101, the optical module 200, the optical network terminal 100 and the network cable 103.
  • FIG. 2 is a structural diagram of an optical network terminal according to some embodiments.
  • the optical network terminal 100 also includes a PCB circuit board 105 provided in the housing, a cage 106 provided on the surface of the PCB circuit board 105, a heat sink 107 provided on the cage 106, and a cage 106 provided on the cage 106.
  • Internal electrical connector The electrical connector is configured to be connected to the electrical port of the optical module 200; the heat sink 107 has fins and other protrusions that increase the heat dissipation area.
  • the optical module 200 is inserted into the cage 106 of the optical network terminal 100, and the optical module 200 is fixed by the cage 106.
  • the heat generated by the optical module 200 is conducted to the cage 106, and then diffused through the heat sink 107.
  • the electrical port of the optical module 200 is connected to the electrical connector inside the cage 106, so that the optical module 200 establishes a bidirectional electrical signal connection with the optical network terminal 100.
  • the optical port of the optical module 200 is connected to the optical fiber 101, so that the optical module 200 and the optical fiber 101 establish a bidirectional optical signal connection.
  • FIG. 3 is a structural diagram of an optical module according to some embodiments
  • FIG. 4 is an exploded view of an optical module according to some embodiments.
  • the optical module 200 includes a shell, a circuit board 300 and an optical transceiver component (such as a first optical transceiver component 500 and/or a second optical transceiver component 600 ) disposed in the shell. .
  • an optical transceiver component such as a first optical transceiver component 500 and/or a second optical transceiver component 600
  • the housing includes an upper housing 201 and a lower housing 202.
  • the upper housing 201 is covered on the lower housing 202 to form the above-mentioned housing with two openings 204 and 205; the outer contour of the housing generally presents a square body.
  • the lower case 202 includes a bottom plate 2021 and two lower side plates 2022 located on both sides of the bottom plate 2021 and perpendicular to the bottom plate 2021; the upper case 201 includes a cover plate 2011, and the cover plate 2011 covers the lower case. on the two lower side plates 2022 of 202 to form the above-mentioned housing.
  • the lower case 202 includes a bottom plate 2021 and two lower side plates 2022 located on both sides of the bottom plate 2021 and perpendicular to the bottom plate 2021;
  • the upper case 201 includes a cover plate 2011, and two lower side plates 2022 located on both sides of the cover plate 2011.
  • the two upper side plates arranged perpendicularly to the cover plate 2011 are combined with the two lower side plates 2022 to realize that the upper housing 201 is covered on the lower housing 202 .
  • the direction of the connection line between the two openings 204 and 205 may be consistent with the length direction of the optical module 200 , or may be inconsistent with the length direction of the optical module 200 .
  • the opening 204 is located at the end of the optical module 200 (the right end of FIG. 3 ), and the opening 205 is also located at the end of the optical module 200 (the left end of FIG. 3 ).
  • the opening 204 is located at an end of the optical module 200 and the opening 205 is located at a side of the optical module 200 .
  • the opening 204 is an electrical port, and the circuit board 300 extends from the electrical port and is inserted into the host computer (such as the optical network terminal 100); the opening 205 is an optical port, and is configured to access the external optical fiber 101, so that the optical fiber 101 is connected to the optical fiber 101.
  • the optical transceiver component inside the module 200 is an electrical port, and the circuit board 300 extends from the electrical port and is inserted into the host computer (such as the optical network terminal 100); the opening 205 is an optical port, and is configured to access the external optical fiber 101, so that the optical fiber 101 is connected to the optical fiber 101.
  • the optical transceiver component inside the module 200 is an electrical port, and the circuit board 300 extends from the electrical port and is inserted into the host computer (such as the optical network terminal 100); the opening 205 is an optical port, and is configured to access the external optical fiber 101, so that the optical fiber 101 is connected to the optical fiber 101.
  • the optical transceiver component inside the module 200 is an electrical port, and the circuit board 300
  • the assembly method of combining the upper housing 201 and the lower housing 202 is used to facilitate the installation of the circuit board 300, the optical transceiver assembly and other devices into the above-mentioned housing, and the upper housing 201 and the lower housing 202 form a package for these devices.
  • when assembling the circuit board 300 and the optical transceiver assembly and other devices it is convenient to deploy the positioning components, heat dissipation components and electromagnetic shielding components of these devices, which is conducive to automated production.
  • the upper housing 201 and the lower housing 202 are made of metal materials, which facilitates electromagnetic shielding and heat dissipation.
  • the optical module 200 also includes an unlocking component 203 located outside its housing.
  • the unlocking component 203 is configured to achieve a fixed connection between the optical module 200 and the host computer, or to release the connection between the optical module 200 and the host computer. fixed connection.
  • the unlocking component 203 is located outside the two lower side plates 2022 of the lower housing 202 and has a snap component that matches the cage 106 of the host computer; when the optical module 200 is inserted into the cage 106, the unlocking component 203 is unlocked by the locking component 203.
  • the locking component fixes the optical module 200 in the cage 106; when the unlocking component 203 is pulled, the snapping component of the unlocking component 203 moves accordingly, thereby changing the connection relationship between the snapping component and the host computer to release the connection between the optical module 200 and the host computer.
  • the optical module 200 can be pulled out of the cage 106 due to the snapping relationship.
  • the circuit board 300 includes circuit traces, electronic components, chips, etc.
  • the electronic components and chips are connected together according to the circuit design through the circuit traces to realize functions such as power supply, electrical signal transmission, and grounding.
  • Electronic components may include, for example, capacitors, resistors, transistors, and Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET).
  • the chip may include, for example, a Microcontroller Unit (MCU), a laser driver chip, a Limiting Amplifier (Limiting Amplifier), a Trans-impedance Amplifier (TIA), and a Clock and Data Recovery chip (Clock and Data Recovery, CDR). , power management chip, digital signal processing (Digital Signal Processing, DSP) chip.
  • MCU Microcontroller Unit
  • TIA Trans-impedance Amplifier
  • CDR Clock and Data Recovery
  • the circuit board 300 is generally a rigid circuit board. Due to its relatively hard material, the rigid circuit board can also perform a load-bearing function. For example, the rigid circuit board can smoothly carry the above-mentioned electronic components and chips; the rigid circuit board can also be inserted into the cage 106 of the host computer. in the electrical connector.
  • the circuit board 300 also includes a board body 302 and a gold finger 301 formed on an end surface of the board body 302.
  • the gold finger 301 is composed of a plurality of mutually independent pins.
  • the circuit board 300 is inserted into the cage 106 and is electrically connected to the electrical connector in the cage 106 by the gold finger 301 .
  • the gold finger 301 can be disposed only on one side of the circuit board 300 (for example, the upper surface shown in FIG. 4 ), or can be disposed on the upper and lower surfaces of the circuit board 300 to adapt to situations where a large number of pins are required.
  • the golden finger 301 is configured to establish an electrical connection with the host computer to realize power supply, grounding, I2C signal transmission, data signal transmission, etc.
  • flexible circuit boards are also used in some optical modules.
  • Flexible circuit boards are generally used in conjunction with rigid circuit boards as a supplement to rigid circuit boards.
  • the optical module 200 also includes an optical fiber connector 400.
  • the optical fiber connector 400 is provided at the optical port.
  • the optical fiber connector 400 is used to realize the optical connection between the optical fiber 101 and the optical port, and then the optical signal generated by the optical transceiver component. It is transmitted to the optical fiber 101 through the optical fiber connector 400, and the optical signal output by the optical fiber 101 is transmitted to the optical transceiver component through the optical fiber connector 400.
  • the optical transceiver component is electrically connected to the circuit board 300 and is configured to generate optical signals and receive optical signals output by the optical fiber 101 .
  • the optical module 200 further includes an optical fiber ribbon, and the optical transceiver assembly is connected to the optical fiber connector 400 through the optical fiber ribbon.
  • the optical signal generated by the optical transceiver component is transmitted to the optical fiber connector 400 through the optical fiber ribbon.
  • the optical signal output by the optical fiber 101 is transmitted to the optical fiber ribbon through the optical fiber connector 400, and then transmitted to the optical transceiver component through the optical fiber ribbon.
  • the optical module 200 includes one or two optical transceiver components, the one or two optical transceiver components are disposed on the circuit board 300 and are electrically connected to the circuit board 300 .
  • the optical module 200 may also include more than two optical transceiving components.
  • the optical module 200 includes a first optical transceiver component 500, and the first optical transceiver component 500 is disposed on the circuit board 300, or the optical module 200 includes a first optical transceiver component 500 and a second optical transceiver component 600 (see figure 10), and the first optical transceiver component 500 and the second optical transceiver component 600 are disposed on the circuit board 300 .
  • Figure 5 is a perspective view of the first optical transceiver component and the circuit board of an optical module according to some embodiments, showing the assembly of the first optical transceiver component 500 and the circuit board 300 of the optical module 200 provided by some embodiments of the present disclosure. relation.
  • the optical module 200 includes a first optical transceiver component 500 , and the first optical transceiver component 500 is disposed on the circuit board 300 .
  • the first optical transceiver component 500 is disposed in the middle of the circuit board 300 .
  • the position of the first optical transceiver component 500 is not limited to this, and can also be adjusted as needed.
  • the first optical transceiver assembly 500 includes a first base 510 , a first light source 520 , a first silicon photonic chip 530 , a first circuit board 540 and a first digital signal processing chip 550 .
  • the first base 510 is provided on the circuit board 300 .
  • the first light source 520 and the first silicon photonic chip 530 are disposed on the top of the first base 510 , and the first light source 520 is located on one side of the first silicon photonic chip 530 .
  • the first base 510 may be used as a heat sink for the first light source 520 and the first silicon photonic chip 530 .
  • the first base 510 is made of copper, which has good thermal conductivity and is helpful in assisting the first light source 520 and the first silicon photonic chip 530 in dissipating heat.
  • the first light source 520 is located on a side of the first silicon photonic chip 530 away from the golden finger 301 , that is, the first light source 520 is closer to the optical port than the first silicon photonic chip 530 .
  • the first base 510, the first light source 520, the first silicon optical chip 530, etc. are called first silicon optical components, and the first silicon optical components are configured to generate optical signals and receive optical signals from the outside. light signal.
  • the first light source 520 is configured to provide light carrying no signal to the first silicon photonic chip 530 .
  • the first silicon optical chip 530 is configured to receive and modulate the light that does not carry signals to output light that carries signals; the light that carries signals is transmitted to the optical fiber connector 400 through the optical fiber ribbon inside the optical module 200 .
  • the optical signal transmitted by the optical fiber 101 is transmitted to the optical fiber ribbon inside the optical module 200 through the optical fiber connector 400, and is transmitted to the first silicon optical chip 530 through the optical fiber ribbon.
  • the first silicon optical chip 530 is also configured as The optical signal is received and converted into an electrical signal.
  • the optical fiber ribbons inside the optical module 200 include a first transmitting optical fiber ribbon and a first receiving optical fiber ribbon.
  • the first silicon photonic chip 530 includes a first light output connector (ie, light output connector 570) and a first light input connector (ie, light input connector 580).
  • the first light output connector is disposed at the optical signal output port of the first silicon photonic chip 530.
  • the first light-incoming connector is disposed at the optical signal light-inlet of the first silicon optical chip 530 .
  • One end of the first transmitting optical fiber ribbon is connected to the optical fiber connector 400, and the other end is connected to the first light outlet connector; one end of the first receiving optical fiber ribbon is connected to the optical fiber connector 400, and the other end is connected to the first light input connector, thereby facilitating the first silicon
  • the optical signal generated by the optical chip 530 is coupled to the optical fiber ribbon, and the externally input optical signal that facilitates transmission in the optical fiber ribbon is coupled to the first silicon optical chip 530 .
  • the first circuit board 540 facing the first silicon photonic chip 530 is open to define a first gap 541 for accommodating the first silicon photonic chip 530 (see FIG. 14 ).
  • the first notch 541 matches the shape of the first silicon photonic chip 530
  • the first silicon photonic chip 530 is disposed in the first notch 541 .
  • the first circuit board 540 is disposed on the circuit board 300 and is parallel to the circuit board 300 .
  • the side surface of the first circuit board 540 close to the circuit board 300 is attached to the circuit board 300 and is electrically connected to the circuit board 300 .
  • the side surface (i.e., the top surface) of the first circuit board 540 away from the circuit board 300 is configured to carry the first digital signal processing chip 550 and other devices, and is connected to the first silicon photonic chip 530 and other devices through a wiring process. This allows the first digital signal processing chip 550 to drive the first silicon photonic chip 530 .
  • the first silicon photonic chip 530 is not limited to being driven by the first digital signal processing chip 550 .
  • disposing the first circuit board 540 in the first optical transceiver assembly 500 can provide accommodation space for the arrangement and routing of devices such as the first digital signal processing chip 550.
  • the first digital signal processing chip 550 is disposed on the primary circuit board 540 , and part of the traces (such as power lines) related to the first digital signal processing chip 550 is disposed in the primary circuit board 540 .
  • the first digital signal processing chip 550 can transmit signals through the first circuit board 540 and the first silicon photonic chip 530, thereby reducing the cost of the first digital signal processing chip 550 and the first silicon photonic chip.
  • the density of high-speed signal lines for signal transmission between 530 reduces crosstalk between high-speed signal lines; on the other hand, the power lines related to the first digital signal processing chip 550 are arranged in the first circuit board 540, It can effectively prevent electrostatic discharge (ESD) and power rail collapse, and can reduce ground bounce.
  • ESD electrostatic discharge
  • the above arrangement is conducive to improving the coordination between the optical performance, high frequency performance and thermal performance of the optical module 200, and is conducive to increasing the speed of the optical module 200.
  • the first digital signal processing chip 550 includes a first solder ball array, which is disposed on a side surface of the first digital signal processing chip 550 facing the first circuit board 540 .
  • a pad matrix is provided on the first circuit board 540 at a position corresponding to the first solder ball array.
  • solder balls in the first solder ball array are Ball Grid Array Package (BGA) solder balls.
  • BGA Ball Grid Array Package
  • Figure 6 is a structural diagram of the first optical transceiver component, the second optical transceiver component and the circuit board of another optical module according to some embodiments, showing the first optical transceiver component 500, the second optical transceiver component 600 and the circuit. Assembly relationship of board 300.
  • the optical module 200 further includes a second optical transceiver component 600 , and the first optical transceiver component 500 and the second optical transceiver component 600 are disposed on the circuit board 300 .
  • the second optical transceiver component 600 is disposed on the left side of the first optical transceiver component 500 .
  • the relative positions of the first optical transceiver component 500 and the second optical transceiver component 600 are different. Limiting this, for example, the second optical transceiver component 600 may also be disposed on the right side of the first optical transceiver component 500 or the like.
  • the second optical transceiver assembly 600 includes a second base 610 , a second light source 620 , a second silicon photonic chip 630 , a second circuit board 640 and a second digital signal processing chip 650 .
  • the second base 610 is provided on the circuit board 300 .
  • the second light source 620 and the second silicon photonic chip 630 are disposed on the top of the second base 610 , and the second light source 620 is disposed on one side of the second silicon photonic chip 630 .
  • the second base 610 may be used as a heat sink for the second light source 620 and the second silicon photonic chip 630 .
  • the second base 610 is made of copper, which has good thermal conductivity and is helpful for assisting the second light source 620 and the second silicon photonic chip 630 in dissipating heat.
  • the second light source 620 is located on a side of the second silicon photonic chip 630 away from the golden finger 301 , that is, the second light source 620 is closer to the optical port than the second silicon photonic chip 630 .
  • the second base 610, the second light source 620, the second silicon optical chip 630, etc. are called second silicon optical components, and the second silicon optical components are configured to generate optical signals and directly receive light signals from external light signal.
  • the second light source 620 is configured to provide light carrying no signal to the second silicon photonic chip 630 .
  • the second silicon optical chip 630 is configured to receive and modulate the light that does not carry signals to output light that carries signals; the light that carries signals is transmitted to the optical fiber connector 400 through the optical fiber ribbon inside the optical module 200 .
  • the optical signal transmitted by the optical fiber 101 is transmitted to the optical fiber ribbon inside the optical module 200 through the optical fiber connector 400, and is transmitted to the second silicon optical chip 630 through the optical fiber ribbon.
  • the second silicon optical chip 630 is also configured. The optical signal is received and converted into an electrical signal.
  • the optical fiber ribbon inside the optical module 200 includes a second transmit optical fiber ribbon and a second receive optical fiber ribbon.
  • the second silicon photonic chip 630 includes a second light output connector and a second light input connector.
  • the second light output connector is provided at the optical signal light output port of the second silicon photonic chip 630
  • the second light input connector is provided at the second silicon photonic chip.
  • the optical signal of 630 enters the optical port.
  • One end of the second transmitting optical fiber ribbon is connected to the optical fiber connector 400, and the other end is connected to the second light output connector; one end of the second receiving optical fiber ribbon is connected to the optical fiber connector 400, and the other end is connected to the second light input connector, thereby facilitating the second silicon
  • the optical signal generated by the optical chip 630 is coupled to the optical fiber ribbon, and the externally input optical signal that facilitates transmission in the optical fiber ribbon is coupled to the second silicon optical chip 630 .
  • One end of the second circuit board 640 facing the second silicon photonic chip 630 is open to define a second gap for receiving the second silicon photonic chip 630 , and the second gap matches the shape of the second silicon photonic chip 630 , and the second circuit board 640 is disposed in the second gap.
  • the second circuit board 640 is disposed on the circuit board 300 and is parallel to the circuit board 300 .
  • the side surface of the second circuit board 640 close to the circuit board 300 is attached to the circuit board 300 and is electrically connected to the circuit board 300 .
  • the side surface of the second circuit board 640 away from the circuit board 300 is configured to carry the second digital signal processing chip 650 and other devices, and is connected to the second silicon photonic chip 630 and the like through a wiring process, so that the second digital signal processing chip 650 can drive the second silicon photonic chip 630.
  • the second circuit board 640 and the first circuit board 540 are located on the same side of the circuit board 300 .
  • the second circuit board 640 and the first circuit board 540 are located on the side of the circuit board 300 where the golden finger 301 is provided.
  • disposing the second circuit board 640 in the second optical transceiver assembly 600 can provide accommodation space for the arrangement and routing of devices such as the second digital signal processing chip 650.
  • the second digital signal processing chip 650 is disposed on the second circuit board 640 , and part of the traces (such as power lines) related to the second digital signal processing chip 650 is disposed in the second circuit board 640 .
  • the second digital signal processing chip 650 can transmit signals through the second circuit board 640 and the second silicon photonic chip 630, thereby reducing the cost of the second digital signal processing chip 650 and the second silicon photonic chip.
  • the density of high-speed signal lines for signal transmission between 630 reduces crosstalk between high-speed signal lines; on the other hand, the power lines related to the second digital signal processing chip 650 are arranged in the second circuit board 640, It can effectively prevent electrostatic discharge (ESD) and power rail collapse, and can reduce ground bounce.
  • ESD electrostatic discharge
  • the second optical transceiver component 600 and the first optical transceiver component 500 are both provided with relatively independent secondary circuit boards. (i.e., the first circuit board 540 and the second circuit board 640), thereby further providing accommodation space for the devices and wiring inside the optical module 200, reducing crosstalk between high-speed signal lines, and conducive to further improving The coordination between the optical performance, high frequency performance and thermal performance of the optical module 200.
  • first optical transceiver assembly 500 and the second optical transceiver assembly 600 include a relatively independent secondary circuit board and a relatively independent digital signal processing chip disposed on the secondary circuit board, so that the first digital signal in the first optical transceiver assembly 500
  • the signal processing chip 550 is dedicated to the first optical transceiver component 500
  • the second digital signal processing chip 650 in the second optical transceiver component 600 is dedicated to the second optical transceiver component 600. This not only helps to further increase the speed of the optical module 200, but also It is beneficial to improve the industrial production efficiency of the optical module 200, so that the optical module 200 has higher yield and reliability.
  • Figure 7 is an exploded view of a first optical transceiver component and a circuit board of an optical module according to some embodiments.
  • the circuit board 300 further includes a first sink 310 .
  • the first sinking groove 310 corresponds to the position of the first base 510 and is provided on a side surface of the board body 302 close to the first base 510 .
  • the first sinking groove 310 matches the shape of the first base 510 , and the first base 510 can be disposed in the first sinking groove 310 to facilitate assembling the first optical transceiver assembly 500 on the circuit board 300 .
  • the relative height between the plane where the pins on the first silicon photonic chip 530 are located and the top surface of the first circuit board 540 can be easily adjusted.
  • Figure 8 is a perspective view of the first optical transceiver component and the circuit board of an optical module from another perspective according to some embodiments.
  • the circuit board 300 further includes a first through hole 320 .
  • the first through hole 320 is provided at the bottom of the first sinking groove 310 and penetrates the bottom of the first sinking groove 310 along the thickness direction of the circuit board 300 .
  • Figure 9 is an exploded view of the first optical transceiver component and the circuit board of an optical module from another perspective according to some embodiments.
  • the first base 510 includes a first base body 5110 and a first step 511 provided on a side surface of the first base body 5110 away from the first silicon photonic chip 530.
  • the first step 511 matches the shape of the first through hole 320.
  • the lower housing 202 further includes a first heat dissipation boss 2023 .
  • the first heat dissipation boss 2023 is provided on a side of the bottom plate 2021 close to the upper housing 201 and corresponds to the position of the first step 511 .
  • the first heat dissipation boss 2023 is in contact with the first step 511 to dissipate heat of the first optical transceiver component 500 .
  • the orthographic projection of the first silicon photonic chip 530 on the first reference plane is located on the first step 511 on the first reference plane.
  • the first step 511 corresponds to the position of the first silicon photonic chip 530 .
  • the first silicon photonic chip 530 is the main heat-generating device in the first optical transceiver assembly 500. Therefore, by placing the first step 511 close to the first silicon photonic chip 530, and placing the first step 511 against Being connected to the first heat dissipation boss 2023 is conducive to shortening the heat dissipation path of the first silicon photonic chip 530, so that the heat generated by the first silicon photonic chip 530 can be efficiently conducted to the light through the first step 511 and the first heat dissipation boss 2023.
  • the casing of the module 200 and the outside of the optical module 200 are beneficial to improving the heat dissipation effect of the first silicon optical chip 530 .
  • the first circuit board 540 further includes a second solder ball array 5400 , and the second solder ball array 5400 is disposed on a side of the first circuit board 540 close to the circuit board 300 .
  • the circuit board 300 further includes a first pad group, the first pad group corresponds to the position of the second solder ball array 5400, and the second solder ball array 5400 is connected to the first pad group by soldering.
  • the first circuit board 540 is fitted and fixed on the circuit board 300 and the electrical connection between the first circuit board 540 and the circuit board 300 is realized.
  • the solder balls in the second solder ball array 5400 are ball grid array package solder balls.
  • Figure 10 is an exploded view of the first optical transceiver component, the second optical transceiver component and the circuit board of another optical module according to some embodiments.
  • the circuit board 300 further includes a second sink 330 .
  • the second sinking groove 330 corresponds to the position of the second base 610 and is provided on a side surface of the board body 302 close to the second base 610 .
  • the second sinking groove 330 matches the shape of the second base 610 , and the second base 610 can be disposed in the second sinking groove 330 to facilitate assembling the second optical transceiver assembly 600 on the circuit board 300 .
  • the relative height between the plane where the pins on the second silicon photonic chip 630 are located and the top surface of the second circuit board 640 can be easily adjusted.
  • the first sinking grooves 310 and the second sinking grooves 330 are spaced apart along the length direction of the circuit board 300 (ie, the left-right direction in FIG. 10 ).
  • Figure 11 is a structural diagram of the first optical transceiver component, the second optical transceiver component and the circuit board of another optical module according to some embodiments from another viewing angle (such as looking down).
  • the circuit board 300 further includes a second through hole 340 .
  • the second through hole 340 is provided at the bottom of the second sinking groove 330 and penetrates the bottom of the second sinking groove 330 along the thickness direction of the circuit board 300 .
  • the second base 610 further includes a second base body 612 and a second step 611 provided on a side surface of the second base body 612 away from the second silicon photonic chip 630 .
  • the second step 611 is adapted to the shape of the second through hole 340.
  • the lower housing 202 further includes a second heat dissipation boss 2024 .
  • the second heat dissipation boss 2024 is provided on a side of the bottom plate 2021 close to the upper housing 201 and corresponds to the position of the second step.
  • the second heat dissipation boss 2024 is in contact with the second step to dissipate heat of the second optical transceiver assembly 600 .
  • the orthographic projection of the second silicon photonic chip 630 on the second reference plane is located on the second step on the second reference plane.
  • the second step corresponds to the position of the second silicon photonic chip 630 .
  • the second silicon photonic chip 630 is the main heat-generating device in the second optical transceiver assembly 600. Therefore, by placing the second step close to the second silicon photonic chip 630 and abutting the second step against The second heat dissipation boss 2024 is conducive to shortening the heat dissipation path of the second silicon photonic chip 630, so that the heat generated by the second silicon photonic chip 630 can be efficiently conducted to the optical module 200 through the second step and the second heat dissipation boss 2024.
  • the casing and the outside of the optical module 200 are beneficial to improving the heat dissipation effect of the second silicon optical chip 630 .
  • Figure 12 is a structural diagram of the first optical transceiver component of an optical module according to some embodiments;
  • Figure 13 is a perspective view of the first optical transceiver component of an optical module according to some embodiments;
  • Figure 14 is a perspective view of the first optical transceiver component of an optical module according to some embodiments;
  • FIG. 15 is a perspective view of the first optical transceiver component of an optical module from another perspective according to some embodiments.
  • the structure of the first optical transceiver component 500 will be described in detail with reference to FIGS. 12 to 15 . It can be understood that the structure and function of the second optical transceiver component 600 and the first optical transceiver component 500 are basically the same, and this disclosure will not be repeated again.
  • the first optical transceiver assembly 500 further includes a light output connector 570 and a light input connector 580 .
  • the light output connector 570 is optically connected to the optical signal output port of the first silicon optical chip 530
  • the light input connector 580 is optically connected to the optical signal input port of the first silicon optical chip 530 .
  • the optical signal input port and the optical signal output port of the first silicon photonic chip 530 both face the optical port of the optical module 200 . That is to say, the light output connector 570 and the light input connector 580 are both disposed close to the first silicon photonic chip 530 .
  • One side of the optical port of the module 200 ie, the left side as shown in Figure 12
  • Reducing the bending degree of the optical fiber ribbon is beneficial to reducing the loss of optical signals during transmission.
  • the primary circuit board 540 includes a plurality of pads (see FIG. 22 ) located on the top surface of the primary circuit board 540 .
  • the plurality of bonding pads are arranged around the first notch 541 and close to the first notch 541 .
  • the first silicon photonic chip 530 includes a plurality of first pins 531 .
  • the plurality of bonding pads are connected to the plurality of first pins 531 through a wiring process, so that the first silicon photonic chip 530 and the first circuit board 540 can be electrically connected.
  • the plane where the plurality of first pins 531 of the first silicon photonic chip 530 are located and the plane where the plurality of pads on the first circuit board 540 are located are located at or approximately at the same height, so that the length can be shortened.
  • the length of the connecting wire used for the wiring connection between the first silicon photonic chip 530 and the first circuit board 540 is beneficial to improving the performance and stability of the optical module 200 when transmitting high-speed signals, and improving port reflection at the interconnection .
  • a portion of the first circuit board 540 covers a portion of the first base 510 .
  • the portion of the first circuit board 540 close to the three inner walls covers above the edge portion of the first base 510, so that the size of the first circuit board 540 can be further reduced.
  • the light output connector 570 is disposed on one side of the first light source 520
  • the light input connector 580 is disposed on the other side of the first light source 520
  • the distance between the light output connector 570 and the input light connector 580 is The arrangement direction is substantially perpendicular to the arrangement direction of the first light source 520 to the first silicon photonic chip 530 .
  • the first silicon photonic chip 530 further includes a plurality of second pins 532. The plurality of second pins 532 are disposed on the top surface of the first silicon photonic chip 530 and are located close to the first silicon photonic chip 530. One end of the optical port.
  • the first optical transceiver assembly 500 also includes a bridge 560 .
  • the circuit board 300 also includes a plurality of third pins.
  • the plurality of second pins 532 are wire-connected to the plurality of third pins through bridges 560 , thereby achieving electrical connection between the first silicon photonic chip 530 and the circuit board 300 .
  • the bridge 560 includes a substrate and a plurality of metal traces disposed on the substrate. Each metal trace corresponds to a second pin 532 and a third pin.
  • the plurality of metal traces are then connected.
  • the wiring is connected to the plurality of third pins by wire bonding, so that the electrical connection between the first silicon photonic chip 530 and the circuit board 300 can be realized, and the distance between the second pin 532 and the third pin can be reduced. The length of the connecting line between.
  • the substrate may be a ceramic piece, thereby having good heat dissipation and insulation properties.
  • Figure 16 is a structural diagram of a base of an optical module according to some embodiments.
  • the first base 510 also includes a first mounting platform 512 and a second mounting platform 513 .
  • the first mounting platform 512 and the second mounting platform 513 are disposed on the top of the first base body 5110 .
  • the first mounting station 512 is configured to carry the first light source 520
  • the second mounting station 513 is configured to carry the first silicon photonic chip 530 .
  • first mounting platform 512 and the second mounting platform 513 can be adjusted according to the assembly needs of the first light source 520 and the first silicon photonic chip 530 .
  • the relative height between the top surface of the first mounting platform 512 and the top surface of the second mounting platform 513 can also be adjusted according to the assembly needs of the first light source 520 and the first silicon photonic chip 530 , which is not done in this disclosure. limited.
  • the first base 510 can be divided into different functional areas, thereby facilitating the installation of the first light source 520 and the first
  • the silicon photonic chip 530 is assembled on the first base 510, and is beneficial to improving the accuracy of assembling the first light source 520 and the first silicon photonic chip 530.
  • the heights of the first mounting platform 512 and the second mounting platform 513 can be adjusted according to the assembly needs of the first light source 520 and the first silicon photonic chip 530, the first light source 520, the bridge 560, and the light outlet connector 570 can be realized. Adaptation to the assembly height of the light incident connector 580.
  • the first step 511 is disposed obliquely on a side surface of the first base 5110 away from the first mounting platform 512 , that is, the extension direction of the first step 511 (i.e., the first direction S1 ) and the extending direction of the circuit board 300 (ie, the second direction S2) form a first preset included angle, and the first preset included angle is between 6° and 8°.
  • the first preset included angle is 6°, 7° or 8°.
  • the first through hole 320 is adapted to the shape of the first step 511 so that the first step 511 can be disposed in the first through hole 320 .
  • the first base 510 further includes a third mounting platform 514 , a fourth mounting platform 515 and a fifth mounting platform 516 .
  • the third mounting platform 514 , the fourth mounting platform 515 and the fifth mounting platform 516 are provided on the top of the first base 5110 .
  • the third mounting platform 514 , the fourth mounting platform 515 and the fifth mounting platform 516 and the first mounting platform 512 are located on one side of the second mounting platform 513 .
  • the third installation platform 514 and the fourth installation platform 515 are located on one side of the first installation platform 512 , and the fourth installation platform 515 is located between the third installation platform 514 and the first installation platform 512 .
  • the fifth mounting platform 516 is located on the other side of the first mounting platform 512 .
  • the third mounting platform 514 is configured to carry the outgoing optical connector 570
  • the fourth mounting platform 515 is configured to carry the bridge 560
  • the fifth mounting platform 516 is configured to carry the incoming optical connector 580 .
  • the relative height between the top surface of the third mounting platform 514 , the fourth mounting platform 515 and the fifth mounting platform 516 and the top surface of the second mounting platform 513 can be determined according to the assembly of the light output connector 570 , the bridge 560 and the light input connector 580 A choice needs to be made.
  • first mounting platform 512 and the fourth mounting platform 515 are spaced apart to define a first gap 517
  • first mounting platform 512 and the fifth mounting platform 516 are spaced apart to define a second gap. 518
  • third mounting platform 514 and the fourth mounting platform 515 are set apart to define a third interval 519.
  • first light source 520, the bridge 560, the light outlet connector 570 and the light input connector 580 on the first base 510 will generate heat when working. Therefore, by connecting the first installation platform 512 and the fourth installation platform 515, between the first installation platform 512 and the fifth installation platform 516, and between the third installation platform 514 and the fourth installation platform 515, a first interval 517, a second interval 518 and a third interval 519 are respectively provided, which can be achieved.
  • the thermal isolation between the first light source 520, the bridge 560, the light output connector 570 and the light input connector 580 prevents the light output connector 570 and the light input connector 580 from being deformed due to overheating, and causing the light output connector 570, the light input connector 580 to be separated from the first light connector 570 and the light input connector 580.
  • the optical coupling efficiency between silicon photonic chips 530 is reduced.
  • FIG. 17 is an exploded view of the base, light source, silicon photonic chip, etc. of an optical module according to some embodiments.
  • FIG. 18 is a perspective view of the base of an optical module according to some embodiments.
  • the first light source 520, the first silicon photonic chip 530, the light output connector 570, the bridge 560 and the light input connector 580 are respectively assembled on the first mounting platform 512, the second mounting platform 513, and the third mounting platform 512.
  • On the installation platform 514, the fourth installation platform 515, and the fifth installation platform 516 it is beneficial to improve the positioning of the first light source 520, the first silicon photonic chip 530, the bridge 560, the light output connector 570 and the light input connector 580 on the first base. 510, and the matching accuracy between the first light source 520, the first silicon photonic chip 530, the bridge 560, the light output connector 570 and the light input connector 580.
  • Figure 19 is an exploded view of the first optical transceiver component and protective cover of an optical module according to some embodiments.
  • Figure 20 is an exploded view of the first optical transceiver component and protective cover of an optical module according to some embodiments from another perspective. The exploded view below.
  • the first light source 520 includes a laser 521 , a collimating lens 522 and an isolator 523 .
  • the laser 521, the collimating lens 522 and the isolator 523 are arranged on the first base 5110.
  • the light emitting direction of the laser 521 faces the first silicon photonic chip 530 , and the collimating lens 522 and the isolator 523 are spaced apart along the light emitting direction of the laser 521 .
  • the optical axes of the collimating lens 522 and the isolator 523 are collinear.
  • the collimating lens 522 and the isolator 523 are located on the light output path of the laser 521.
  • the laser 521 is connected to the circuit board 300 through wiring, and the circuit board 300 supplies power to the laser 521 to cause the laser 521 to emit light.
  • the beam emitted by the laser 521 is converted into a collimated beam after being collimated by the collimating lens 522.
  • the collimated beam is transmitted to the first silicon photonic chip 530 through the isolator 523, and is electro-optically modulated in the first silicon photonic chip 530.
  • the first silicon photonic chip 530 is disposed obliquely on the first base 5110 , that is, the extension direction of the first silicon photonic chip 530 (that is, as shown in FIG. 6 A second preset included angle A (ie, the included angle A of the preset angle as shown in FIG. 6 ) is formed between the third direction S3 shown in FIG.
  • the axis of the optical signal input port of the first silicon optical chip 530 and the light emission direction of the first light source 520 that is, the direction in which the collimated light beam emerges from the isolator 523) are approximately at a second preset angle.
  • the second preset included angle is between 6° and 8°, for example, the second preset included angle is 6°, 7° or 8°.
  • the light output connector 570 and the light input connector 580 are used to fix the ends of the optical fiber ribbon, and the optical fiber end face of the optical fiber ribbon is used to couple input or output optical signals.
  • the optical fiber end face of the optical fiber ribbon is inclined to the extension direction of the optical fiber ribbon, so that the light incident or emitted from the optical fiber end face will not be reflected by the light end face and return along the original path.
  • the light output connector 570 and the light input connector 580 form a certain angle with the first silicon photonic chip 530, so that the optical fibers of the optical fiber ribbon
  • the end face can be set perpendicular to the extension direction of the optical fiber ribbon, thereby simplifying the production process of the optical fiber ribbon and reducing the processing difficulty of the optical fiber ribbon.
  • the first base 5110 includes a first portion 5111 and a second portion 5112.
  • the first part 5111 is connected to the second part 5112, the first light source 520 is assembled on the first part 5111, and the first silicon photonic chip 530 is assembled on the second part 5112.
  • the extending direction of the first portion 5111 ie, the fourth direction S4
  • the extension direction of the first part 5111 and the extension direction of the second part 5112 form a third preset included angle.
  • the laser 521 is disposed on the first base 5110, which facilitates the heat generated by the laser 521 to be directly transmitted to the first base 5110 with good thermal conductivity, which is beneficial to improving the heat dissipation effect of the laser 521.
  • the collimating lens 522 and the isolator 523 are arranged on the first base 5110, so that the collimating lens 522 and the isolator 523 are similarly affected by the heat emitted by the laser 521, which is beneficial to improving the efficiency of the collimating lens 522 and the isolator 523. stability.
  • a portion of the upper surface of the first mounting platform 512 is configured as a step surface 5121 to adjust the relative height of each portion of the upper surface of the first mounting platform 512 .
  • the step surface 5121 can be located in the middle of the upper surface of the first mounting platform 512 and convex upward, or it can be located at a position close to the first silicon photonic chip 530 on the upper surface of the first mounting platform 512 and recessed downward.
  • the step surface 5121 can also be located at other positions on the upper surface of the first mounting platform 512, and can also be in other shapes, which is not limited by this disclosure.
  • the laser 521 , the collimating lens 522 and the isolator 523 are disposed on the first mounting platform 512 .
  • the straight lens 522 and the isolator 523 are arranged on the step surface 5121, so that the optical axis of the collimating lens 522 and the isolator 523 is at the same height as the light output optical axis of the laser 521, which is beneficial to improving the light output of the first light source 520. stability and reduce energy loss.
  • the first mounting platform 512 is provided on the first part 5111 and the second mounting platform 513 is provided on the second part 5112. Since the extension direction of the first part 5111 and the extension direction of the second part 5112 form a third predetermined included angle, the extension direction of the second mounting platform 513 and the extending direction of the first mounting platform 512 form a fourth predetermined angle. The included angle is set.
  • the axis of the optical signal entrance of the first silicon optical chip 530 is The second preset angle is formed with the light emission direction of the first light source 520 , thereby reducing the difficulty of optical coupling from the first light source 520 to the first silicon photonic chip 530 .
  • the second preset included angle, the third preset included angle and the fourth preset included angle have substantially the same angle.
  • the extension direction of the third mounting platform 514 and the extension direction of the second mounting platform 513 form a fifth preset included angle, and the angle between the fifth preset included angle and the fourth preset included angle is approximately same. Therefore, when the light-emitting connector 570 is disposed on the third mounting platform 514, the extending direction of the light-emitting connector 570 and the extending direction of the first silicon photonic chip 530 form a preset angle.
  • the extension direction of the fifth mounting platform 516 and the extension direction of the second mounting platform 513 form a sixth preset included angle, and the angle between the sixth preset included angle and the fourth preset included angle is approximately same. Therefore, when the light-incident connector 580 is disposed on the fifth mounting platform 516 , the extension direction of the light-incident connector 580 and the extension direction of the first silicon photonic chip 530 form a preset angle.
  • the primary circuit board 540 further includes a first board body 5401 , a second board body 5402 and a third board body 5403 .
  • the second plate body 5402 and the third plate body 5403 are connected to the first plate body 5401 and are located on both sides of the first notch 541 respectively. That is to say, the first plate body 5401, the second plate body 5402 and the third plate body 5403 The fit defines a first gap 541 .
  • the opening direction of the first notch 541 i.e., the sixth direction S6
  • the direction opposite to the extension direction of the circuit board 300 i.e., the seventh direction S7
  • the angle between the seventh preset included angle and the second preset included angle is approximately the same. In this way, it is convenient to dispose the first silicon photonic chip 530 in the first notch 541 .
  • Figure 21 is a perspective view of a protective cover of an optical module according to some embodiments.
  • the first light source 520 further includes a protective cover 524 .
  • the protective cover 524 is generally a hollow square body. A side of the protective cover 524 close to the first base 510 is open.
  • the protective cover 524 is connected to the first base 510 and cooperates with the first base 510 to define an accommodation cavity for accommodating the laser 521, the collimating lens 522 and the isolator 523.
  • a side of the protective cover 524 facing the first silicon photonic chip 530 is open to form an opening 5241 .
  • the end surface of the opening 5241 is substantially parallel to the side surface of the first silicon photonic chip 530 close to the protective cover 524 , thereby facilitating the assembly and mating of the protective cover 524 and the first silicon photonic chip 530 .
  • the end of the protective cover 524 away from the first silicon optical chip 530 is further away from the first silicon optical chip 530 than the end of the first mounting platform 512 away from the first silicon optical chip 530 , so that the protective cover 524 can The bonding lines between the laser 521 and the circuit board 300 are covered.
  • the protective cover 524 is made of metal, for example, the protective cover 524 is made of copper, so that the protective cover 524 has good thermal conductivity and can shield electromagnetic waves.
  • two side walls of the protective cover 524 are respectively disposed in the first interval 517 and the second interval 518 , thereby facilitating the positioning and installation of the protective cover 524 .
  • the upper housing 201 further includes a thermal conductive column, which is connected to a side surface of the cover plate 2011 close to the bottom plate 2021 and abuts against the top of the protective cover 524, thereby helping to improve the performance of the protective cover 524. heat radiation.
  • the first light source 520 further includes an optical glass block 525 .
  • the optical glass block 525 is disposed on the first base 510 .
  • the optical glass block 525 is close to the optical signal entrance of the first silicon optical chip 530 and is located in the opening 5241 of the protective cover 524 .
  • the optical glass block 525 is configured to transmit light and seal the end of the protective cover 524 close to the first silicon photonic chip 530 .
  • the optical glass block 525 is a wedge-shaped block.
  • the optical axis of the collimating lens 522 is substantially perpendicular to the light incident surface of the optical glass block 525, and the axis of the optical signal input port of the first silicon optical chip 530 is substantially perpendicular to the light exit surface of the optical glass block 525, so that the light beam can The optical signal is transmitted to the light entrance of the first silicon optical chip 530 through the optical glass block 525 .
  • the first circuit board 540 includes pads disposed on its surface and multi-layer circuit traces disposed on its inner layer. These pads and multiple circuit traces are used to implement the first circuit board 540 and the circuit board 300, the first circuit board 540 and the first digital signal processing chip 550, and the first circuit board 540 and the first silicon photonic chip. 530 etc. electrical connection. Below, some embodiments of the present disclosure will introduce the structure of the first circuit board 540 in detail.
  • Figure 22 is a structural diagram of a secondary circuit board of an optical module according to some embodiments, showing the structure of the top surface of the primary circuit board 540.
  • the first circuit board 540 includes a first pad matrix 542 .
  • the first pad matrix 542 is disposed on the top surface of the first circuit board 540 and is opposite to the position of the first digital signal processing chip 550 . correspond.
  • the first pad matrix 542 is configured to be electrically connected to the first digital signal processing chip 550 .
  • the first pad matrix 542 is connected to the solder balls of the first digital signal processing chip 550 to realize the first electrical connection between the circuit board 540 and the first digital signal processing chip 550 .
  • a plurality of pads 5411 of the first circuit board 540 are disposed on the top surface of the first circuit board 540 and close to the first notch 541 .
  • the plurality of bonding pads 5411 are configured to be electrically connected to the plurality of first pins 531 of the first silicon photonic chip 530 through a wiring process, thereby achieving electrical connection between the first circuit board 540 and the first silicon photonic chip 530 .
  • the first part of the plurality of soldering pads 5411 is located at the edge of the first plate body 5401 close to the first notch 541
  • the second part of the plurality of soldering pads 5411 is located at the edge of the second plate body 5402 close to the first notch 541
  • the third portion of the plurality of pads 5411 is located at the edge of the third plate 5403 close to the first notch 541 .
  • the first notch 541 includes a first side 5413 , a second side 5414 and a third side 5415 .
  • the second side 5414 is the side of the first notch 541 perpendicular to the extension direction of the circuit board 300 .
  • the first side 5413 is parallel to the third side 5415, and the first side 5413 and the third side 5415 are connected to the second side 5414.
  • the plurality of pads 5411 includes a high frequency connection pad group 5412.
  • the high-frequency connection pad group 5412 is configured to connect a part of the plurality of first pins 531 through a wire bonding process to achieve electrical connection between the first circuit board 540 and the first silicon photonic chip 530, so that the first High-frequency signals can be transmitted between a digital signal processing chip 550 and the first silicon photonic chip 530 .
  • the plurality of pads 5411 also include pads for other purposes, which will not be described again in this disclosure.
  • the plurality of pads 5411 includes pads for powering the first silicon photonic chip 530 .
  • the high-frequency connection pad group 5412 is provided on the first board 5401 and is located at an edge of the first board 5401 close to the first notch 541 .
  • the high-frequency connection pad group 5412 is located on the top surface of the first circuit board 540 close to the second side 5414 of the first notch 541 .
  • the first silicon photonic chip 530 is disposed in the first gap 541 and contacts the first plate 5401, the second plate 5402 and the third plate 5403 respectively, thereby reducing the risk of the first circuit.
  • the first circuit board 540 also includes other pads for mounting resistors, capacitors and other devices, which will not be described again in this disclosure.
  • Figure 23 is another structural diagram of the top surface of the secondary circuit board of an optical module according to some embodiments.
  • the first pad matrix 542 includes a first high-frequency signal input pad group 5421, a first high-frequency signal output pad group 5422, and a second high-frequency signal input pad group. 5423 and the second high-frequency signal output pad group 5424.
  • the first high-frequency signal input pad group 5421 is configured to transmit the first high-frequency signal emitted by the circuit board 300, so that the first high-frequency signal enters the first circuit board through the first high-frequency signal input pad group 5421. 540, and then transmitted from the first circuit board 540 to the first digital signal processing chip 550.
  • the first high-frequency signal output pad group 5422 is configured to transmit a second high-frequency signal emitted by the first digital signal processing chip 550.
  • the second high-frequency signal is emitted by the first digital signal processing chip 550 and transmitted to the first
  • the secondary circuit board 540 is then transmitted from the primary circuit board 540 to the circuit board 300 via the first high-frequency signal output pad group 5422 .
  • the second high-frequency signal input pad group 5423 is configured to transmit the third high-frequency signal emitted by the first silicon photonic chip 530, so that the third high-frequency signal enters the first high-frequency signal through the second high-frequency signal input pad group 5423.
  • the secondary circuit board 540 is then transported to the first digital signal processing chip 550 from the primary circuit board 540 .
  • the second high-frequency signal output pad group 5424 is configured to transmit the fourth high-frequency signal emitted by the first digital signal processing chip 550.
  • the fourth high-frequency signal is emitted by the first digital signal processing chip 550 and transmitted to the first
  • the secondary circuit board 540 is then transmitted from the primary circuit board 540 to the first silicon photonic chip 530 via the second high-frequency signal output pad group 5424.
  • Figure 24 is a structural diagram of the bottom surface of the secondary circuit board of an optical module according to some embodiments, showing the bottom surface of the primary circuit board 540 (ie, the side surface of the primary circuit board 540 close to the circuit board 300) structure.
  • the primary circuit board 540 further includes a second pad matrix 543 , and the second pad matrix 543 is disposed on the bottom surface of the primary circuit board 540 .
  • the second pad matrix 543 is configured to connect the first pad group on the circuit board 300 through the solder ball array 5400, thereby realizing the first electrical connection between the circuit board 540 and the circuit board 300.
  • the second pad matrix 543 includes a third high-frequency signal input pad group 5431 , a third high-frequency signal output pad group 5432 , and a power supply pad group 5433 .
  • the third high-frequency signal input pad group 5431 is used to input high-frequency signals to the first digital signal processing chip 550
  • the third high-frequency signal output pad group 5432 is used to receive the high-frequency signal output by the first digital signal processing chip 550
  • the power pad group 5433 is used to supply power to the first digital signal processing chip 550 and other devices.
  • the second pad matrix 543 includes a plurality of third high-frequency signal input pad groups 5431 and a plurality of third high-frequency signal output pad groups 5432 .
  • the second pad matrix 543 includes four third high-frequency signal input pad groups 5431 and four third high-frequency signal output pad groups 5432 .
  • the four third high-frequency signal input pad groups 5431 are relatively concentrated, and the four third high-frequency signal output pad groups 5432 are relatively concentrated.
  • the power pad group 5433 is located in the middle of the width direction of the primary circuit board 540, four groups of third high-frequency signal input pad groups 5431 are located on one side of the power pad group 5433, and four groups of third high-frequency signal input pads 5431 are located on one side of the power pad group 5433.
  • Output pad set 5432 is located on the other side of power pad set 5433.
  • the second pad matrix 543 also includes a first group of ground pads and a second group of ground pads.
  • the first ground pad group is located between the third high-frequency signal input pad group 5431 and the power supply pad group 5433
  • the second ground pad group is located between the third high-frequency signal output pad group 5432 and the power supply. between pad groups 5433. It can be understood that the first ground pad group and the second ground pad group can connect the high-frequency signal pad group (including the third high-frequency signal input pad group 5431 and the third high-frequency signal output pad group 5431).
  • the pad group 5432) is separated from the power pad group 5433, thereby reducing crosstalk between the power supply and high-frequency signals.
  • the second pad matrix 543 also includes third and fourth ground pad groups.
  • One or more ground pads in the third ground pad group are provided between every two adjacent third high-frequency signal input pad groups 5431, and every two adjacent third high-frequency signal output
  • One or more ground pads in the fourth ground pad group are disposed between the pad groups 5432, thereby reducing crosstalk between high-frequency signal pad groups.
  • the pad groups mentioned in some embodiments of the present disclosure may be composed of one or more with the same function. of solder pads.
  • a pad group includes one, two, three, or more pads.
  • the present disclosure does not limit the arrangement of the multiple pads as long as the function of the pad group can be achieved.
  • the primary circuit board 540 includes a multi-layer sub-circuit board, and circuit board traces disposed on the multi-layer sub-circuit boards.
  • the multi-layer sub-circuit board includes an upper-layer sub-circuit board, a lower-layer sub-circuit board, and one or more intermediate-layer sub-circuit boards located between the upper-layer sub-circuit board and the lower-layer sub-circuit board.
  • the first circuit board 540 also includes light emitting signal traces and light receiving signal traces.
  • the light emitting signal traces and the light receiving signal traces are used for the first circuit board 540 to electrically connect the first silicon light Chip 530.
  • the light emitting signal trace and the light receiving signal trace are connected to a high frequency connection pad group 5412 used to electrically connect the first digital signal processing chip 550 and the first silicon photonic chip 530 .
  • the light-emitting signal traces and the light-receiving signal traces are located on different layers in the multi-layer middle layer sub-circuit board, so that the light-emitting signal traces and the light-receiving signal traces can be reduced.
  • the external radiation received by the light receiving signal trace is not limited to, but not limited to, but not limited to, but not limited to, but not limited to, but not limited to, but not limited to, but not limited to the light-emitting signal traces and the light-receiving signal traces.
  • the light-emitting signal traces and the light-receiving signal traces are respectively located on two non-adjacent layers of the multi-layer middle layer sub-circuit board, which is beneficial to reducing the light-emitting signal. Interference between traces and the optical receiving signal traces.
  • the multi-layer intermediate layer sub-circuit board includes a first intermediate layer sub-circuit board and a second intermediate layer sub-circuit board, and the first intermediate layer sub-circuit board and the second intermediate layer sub-circuit board are Two non-adjacent middle layer sub-circuit boards.
  • the light-emitting signal traces are provided on the first intermediate layer sub-circuit board, and the light-receiving signal traces are provided on the second interlayer sub-circuit board.
  • the first circuit board 540 also includes high-frequency input signal traces and high-frequency output signal traces.
  • the high-frequency input signal wiring is used to realize the electrical connection between the third high-frequency signal input pad group 5431 and the first digital signal processing chip 550, and the high-frequency output signal wiring is used to realize the third high-frequency signal output.
  • the high-frequency input signal traces and the high-frequency output signal traces are located on different layers in the multi-layer intermediate layer sub-circuit board, so that the high-frequency input signal traces can be reduced and the external radiation received by the high-frequency output signal wiring.
  • the high-frequency input signal traces and the high-frequency output signal traces are respectively located on two non-adjacent layers of the multi-layer middle layer sub-circuit board, thereby helping to reduce the high-frequency interference between the high-frequency input signal trace and the high-frequency output signal trace.
  • the light transmitting signal trace and the high frequency input signal trace are located on the same middle layer sub-circuit board of the first circuit board 540, and the light receiving signal trace and the high frequency output signal trace are located on The same intermediate layer sub-circuit board of the first circuit board 540 can make full use of the first circuit board 540, which is beneficial to reducing the size of the first circuit board 540.
  • the high-frequency input signal traces are located on the first intermediate layer sub-circuit board, and the high-frequency output signal traces are located on the second intermediate layer sub-circuit board.
  • the multi-layer interlayer sub-circuit board further includes a third interlayer sub-circuit board, the third interlayer sub-circuit board is provided with a first hollow, and the first hollow is located on the third interlayer sub-circuit board.
  • the orthographic projection on the first intermediate layer sub-circuit board covers the light emission signal trace.
  • the third intermediate layer sub-circuit board is adjacent to the first intermediate layer sub-circuit board.
  • the multi-layer interlayer sub-circuit board further includes a fourth interlayer sub-circuit board, and a second hollow is provided on the fourth interlayer sub-circuit board.
  • the second hollow is controlled on the fourth interlayer sub-circuit board.
  • the orthographic projection on the second intermediate layer sub-circuit board covers the light receiving signal trace.
  • the fourth intermediate layer sub-circuit board is adjacent to the second intermediate layer sub-circuit board.
  • a third hollow is also provided on the third middle layer sub-circuit board, and the orthographic projection of the third hollow on the first middle layer sub-circuit board covers the high-frequency input signal path. Wire.
  • the fourth intermediate layer sub-circuit board is further provided with a fourth hollow, and the orthographic projection of the fourth hollow on the second intermediate layer sub-circuit board covers the high-frequency output signal trace.
  • the first intermediate layer sub-circuit board and the second intermediate layer sub-circuit board are located between the third intermediate layer sub-circuit board and the fourth intermediate layer sub-circuit board.
  • the first circuit board 540 includes multiple pairs of optical transmit signal traces, multiple pairs of optical receive signal traces, multiple pairs of high frequency input signal traces, and multiple pairs of high frequency output signal traces.
  • At least one via hole is provided between every two pairs of the light emitting signal traces to isolate the two pairs of the light emitting signal traces, thereby reducing crosstalk between the two pairs of the light emitting signal traces.
  • At least one via hole is provided between every two pairs of the light receiving signal traces to isolate the two pairs of the light receiving signal traces, thereby reducing crosstalk between the two pairs of the light receiving signal traces.
  • At least one via is provided between every two pairs of high-frequency input signal traces to isolate the two pairs of high-frequency input signal traces, thereby reducing crosstalk between the two pairs of high-frequency input signal traces.
  • At least one via is provided between every two pairs of high-frequency output signal traces to isolate the two pairs of high-frequency output signal traces, thereby reducing crosstalk between the two pairs of high-frequency output signal traces.
  • the structure of the first circuit board 540 will be described in detail, taking the first circuit board 540 including ten-layer sub-circuit boards as an example. It can be understood that the first circuit board provided by some embodiments of the present disclosure 540 is not limited to including a ten-layer sub-circuit board. In some embodiments, the first circuit board 540 is a six-layer, eight-layer or other number of sub-circuit boards, and this disclosure is not limited to this.
  • Figure 25 is a structural diagram of a third-layer sub-circuit board of a secondary circuit board of an optical module according to some embodiments.
  • the first circuit board 540 includes four pairs of light emission signal traces 544 and four pairs of high frequency input signal traces 545.
  • Four pairs of light emission signal traces 544 and four pairs of high-frequency input signal traces 545 are provided on the third-layer sub-circuit board of the primary circuit board 540 .
  • each light emission signal trace 544 is connected to a pad in the second high-frequency signal output pad group 5424 through a via hole, and the other end is connected to a pad in the high-frequency connection pad group 5412 through a via hole.
  • each high-frequency input signal trace 545 is connected to one pad in the first high-frequency signal input pad group 5421 through a via hole, and the other end is connected to one of the third high-frequency signal input pad group 5431 through a via hole. pad.
  • At least one via hole is provided between every two pairs of light emission signal traces 544 , and at least one via hole is provided between every two pairs of high frequency input signal traces 545 .
  • Figure 26 is a structural diagram of a sixth-layer sub-circuit board of a sub-circuit board of an optical module according to some embodiments.
  • the first circuit board 540 includes four pairs of light receiving signal traces 546 and four pairs of high frequency output signal traces 547, and four pairs of light receiving signal traces 546 and four pairs of high frequency output signal traces 547 is provided on the sixth layer sub-circuit board of the first circuit board 540.
  • each light receiving signal trace 546 is connected to a pad in the second high-frequency signal input pad group 5423 through a via hole, and the other end is connected to a pad in the high-frequency connection pad group 5412 through a via hole.
  • One end of each high-frequency output signal trace 547 is connected to one pad in the first high-frequency signal output pad group 5422 through a via hole, and the other end is connected to one of the third high-frequency signal output pad group 5432 through a via hole. pad.
  • At least one via hole is provided between every two pairs of light receiving signal traces 546 , and at least one via hole is provided between every two pairs of high frequency output signal traces 547 .
  • the orthographic projections of the four pairs of light-emitting signal traces 544 on the first-layer sub-circuit board and the orthogonal projections of the four pairs of light-receiving signal traces 546 on the first-layer sub-circuit board are generally distributed crosswise;
  • the orthographic projections of the four pairs of high-frequency input signal traces 545 on the first-layer sub-circuit board and the orthographic projections of the four pairs of high-frequency output signal traces 547 on the first-layer sub-circuit board are generally distributed in a crosswise manner.
  • the electromagnetic fields of the four pairs of light transmitting signal traces 544 and the four pairs of light receiving signal traces 546 are perpendicular, and the electromagnetic fields of the four pairs of high frequency input signal traces 545 and the four pairs of high frequency output signal traces 547 are perpendicular, so that Helps reduce crosstalk coupling between traces.
  • Figure 27 is a structural diagram of a second-layer sub-circuit board of a secondary circuit board of an optical module according to some embodiments.
  • a first hollow 5481 and a third hollow 5482 are provided on the second layer sub-circuit board of the primary circuit board 540.
  • the front projection of the first hollow 5481 on the third layer sub-circuit board of the first circuit board 540 covers the light emission signal trace 544, and the third hollow 5482 is on the third layer sub-circuit board of the first circuit board 540.
  • the front projection covers the high frequency input signal trace 545.
  • Figure 28 is a structural diagram of a seventh-layer sub-circuit board of a sub-circuit board of an optical module according to some embodiments.
  • a second hollow 5491 and a fourth hollow 5492 are provided on the seventh-layer sub-circuit board of the primary circuit board 540.
  • the front projection of the second hollow 5491 on the sixth layer sub-circuit board of the first circuit board 540 covers the light receiving signal trace 546, and the fourth hollow 5492 is on the sixth layer sub-circuit board of the first circuit board 540
  • the front projection covers the high frequency output signal trace 547.
  • a reference ground is set on the first-layer sub-circuit board, the fourth-layer sub-circuit board, the fifth-layer sub-circuit board and the eighth-layer sub-circuit board of the primary circuit board 540 .
  • the first-layer sub-circuit board and the fourth-layer sub-circuit board are used as the reference ground of the third-layer sub-circuit board
  • the fifth-layer sub-circuit board and the eighth-layer sub-circuit board are used as the reference ground of the sixth-layer sub-circuit board.
  • the detailed structure of the second optical transceiver component 600 may refer to the structure of the first optical transceiver component 500.
  • the structure of the second optical transceiver component 600 may be the same as that of the first optical transceiver component 500, but is not limited to same.
  • the second optical transceiver component 600 may be slightly adjusted or modified based on the structure of the first optical transceiver component 500 .

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Abstract

一种光模块（200），光模块（200）包括壳体、电路板（300）和第一光收发组件（500）。电路板（300）设置在壳体内。第一光收发组件（500）包括第一基座（510）、第一硅光芯片（530）、第一光源（520）、第一次电路板（540）和第一数字信号处理芯片（550）。第一硅光芯片（530）被配置为接收并调制不携带信号的光，以输出携带信号的光，或者，接收来自光模块（200）的外部的光信号。第一光源（520）被配置为向第一硅光芯片（530）提供不携带信号的光。第一次电路板（540）的朝向第一硅光芯片（530）的一端敞开以形成第一缺口（541）。第一硅光芯片（530）设置在第一缺口（541）中。第一数字信号处理芯片（550）设置在第一次电路板（540）上，通过第一次电路板（540）与第一硅光芯片（530）电连接，以驱动第一硅光芯片（530）。

Description

光模块
本申请要求于2022年3月7日提交的、申请号为202210216302.7的中国专利申请的优先权，于2022年3月7日提交的、申请号为202220481403.2的中国专利申请的优先权，于2022年3月7日提交的、申请号为202210217109.5的中国专利申请的优先权，以及于2022年3月7日提交的、申请号为202220482540.8的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及光纤通信技术领域，尤其涉及一种光模块。
背景技术
随着云计算、移动互联网、视频会议等新型业务和应用模式的发展，光通信技术愈加重要。而在光通信技术中，光模块是实现光信号和电信号相互转换的工具，是光通信设备中的关键器件之一。并且，随着光通信技术发展的需求，光模块的传输速率不断提高。
发明内容
提供一种光模块，所述光模块包括壳体、电路板和第一光收发组件。所述电路板设置在所述壳体内。所述第一光收发组件与所述电路板电连接，且被配置为产生光信号或接收来自所述光模块的外部的光信号。所述第一光收发组件包括第一基座、第一硅光芯片、第一光源、第一次电路板和第一数字信号处理芯片。所述第一基座设置在所述电路板上。所述第一硅光芯片设置在所述第一基座上，且被配置为接收并调制不携带信号的光，以输出携带信号的光，或者，接收来自所述光模块的外部的光信号。所述第一光源设置在所述第一基座上，且被配置为向所述第一硅光芯片提供所述不携带信号的光。所述第一次电路板设置在所述电路板上，且与所述电路板电连接。所述第一次电路板的朝向所述第一硅光芯片的一端敞开以形成第一缺口。所述第一缺口与所述第一硅光芯片的形状适配。所述第一硅光芯片设置在所述第一缺口中，且与所述第一次电路板电连接。所述第一数字信号处理芯片设置在所述第一次电路板上，通过所述第一次电路板与所述第一硅光芯片电连接，以驱动所述第一硅光芯片。
附图说明
图1为根据一些实施例的一种光通信系统的连接关系图；
图2为根据一些实施例的一种光网络终端的结构图；
图3为根据一些实施例的一种光模块的结构图；
图4为根据一些实施例的一种光模块的爆炸图；
图5为根据一些实施例的一种光模块的第一光收发组件与电路板的立体图；
图6为根据一些实施例的另一种光模块的第一光收发组件、第二光收发组件与电路板的结构图；
图7为根据一些实施例的一种光模块的第一光收发组件与电路板的爆炸图；
图8为根据一些实施例的一种光模块的第一光收发组件与电路板在另一视角下的立体图；
图9为根据一些实施例的一种光模块的第一光收发组件与电路板在另一视角下的爆炸图；
图10为根据一些实施例的另一种光模块的第一光收发组件、第二光收发组件与电路板的爆炸图；
图11为根据一些实施例的另一种光模块的第一光收发组件、第二光收发组件与电路板在另一视角下(如仰视)的结构图；
图12为根据一些实施例的一种光模块的第一光收发组件的结构图；
图13为根据一些实施例的一种光模块的第一光收发组件的立体图；
图14为根据一些实施例的一种光模块的第一光收发组件的爆炸图；
图15为根据一些实施例的一种光模块的第一光收发组件在另一视角下的立体图；
图16为根据一些实施例的一种光模块的基座的结构图；
图17为根据一些实施例的一种光模块的基座与光源、硅光芯片等的爆炸图；
图18为根据一些实施例的一种光模块的基座立体图；
图19为根据一些实施例的一种光模块的第一光收发组件与保护罩的爆炸图；
图20为根据一些实施例的一种光模块的第一光收发组件与保护罩在另一视角下的爆炸图；
图21为根据一些实施例的一种光模块的保护罩的立体图；
图22为根据一些实施例的一种光模块的次电路板的顶面的结构图；
图23为根据一些实施例的一种光模块的次电路板的顶面的另一种结构图；
图24为根据一些实施例的一种光模块的次电路板的底面的结构图；
图25为根据一些实施例的一种光模块的次电路板的第三层子电路板的结构图；
图26为根据一些实施例的一种光模块的次电路板的第六层子电路板的结构图；
图27为根据一些实施例的一种光模块的次电路板的第二层子电路板的结构图；
图28为根据一些实施例的一种光模块的次电路板的第七层子电路板的结构图。
具体实施方式
下面将结合附图，对本公开一些实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。
在描述一些实施例时，可能使用了“耦接”和“连接”及其衍伸的表达。术语“连接”应做广义理解，例如，“连接”可以是固定连接，也可以是可拆卸连接，或成一体；可以是直接相连，也可以通过中间媒介间接相连。术语“耦接”表明两个或两个以上部件有直接物理接触或电接触。术语“耦接”或“通信耦合(communicatively coupled)”也可能指两个或两个以上部件彼此间并无直接接触，但仍彼此协作或相互作用。这里所公开的实施例并不必然限制于本文内容。
本文中“适用于”或“被配置为”的使用意味着开放和包容性的语言，其不排除适用于或被配置为执行额外任务或步骤的设备。
如本文所使用的那样，“约”、“大致”或“近似”包括所阐述的值以及处于特定值的可接受偏差范围内的平均值，其中所述可接受偏差范围如由本领域普通技术人员考虑到正在讨论的测量以及与特定量的测量相关的误差(即，测量系统的局限性)所确定。
光模块在光纤通信技术领域中实现光信号与电信号的相互转换功能。光模块包括光口和电口，光模块通过光口实现与光纤或光波导等信息传输设备的光通信，通过电口实现与光网络终端(例如，光猫)之间的电连接，电连接主要用于实现供电、二线制同步串行(iner-Integrated Circuit，I2C)信号传输、数据信号传输以及接地等；光网络终端通过网线或无线保真技术(Wi-Fi)将电信号传输给计算机等信息处理设备。
图1为根据一些实施例的一种光通信系统的连接关系图。如图1所示，光通信系统主要包括远端服务器1000、本地信息处理设备2000、光网络终端100、光模块200、光纤101及网线103。
光纤101的一端连接远端服务器1000，另一端通过光模块200与光网络终端100连接。光纤本身可支持远距离信号传输，例如数千米(6千米至8千米)的信号传输，在此基础上如果使用中继器，则理论上可以实现超长距离传输。因此在通常的光通信系统中，远端服务器1000与光网络终端100之间的距离通常可达到数千米、数十千米或数百千米。
网线103的一端连接本地信息处理设备2000，另一端连接光网络终端100。本地信息处理设备2000可以为以下设备中的任一种或几种：路由器、交换机、计算机、手机、平板电脑、电视机等。
远端服务器1000与光网络终端100之间的物理距离大于本地信息处理设备2000与光网络终端100之间的物理距离。本地信息处理设备2000与远端服务器1000的连接由光纤101与网线103完成；而光纤101与网线103之间的连接由光模块200和光网络终端100完成。
光网络终端100包括大致呈长方体的壳体(housing)，以及设置于壳体上的光模块接口102和网线接口104。光模块接口102被配置为接入光模块200，从而使得光网络终端100与光模块200建立双向的电信号连接。网线接口104被配置为接入网线103，从而使得光网络终端100与网线103建立双向的电信号连接。光模块200与网线103之间通过光网络终端100建立连接。示例地，光网络终端100将来自光模块200的电信号传递给网线103，将来自网线103的电信号传递给光模块200，因此光网络终端100作为光模块200的上位机，可以监控光模块200的工作。光模块200的上位机除光网络终端100之外还可以包括光线路终端(Optical Line Terminal，OLT)等。
光模块200包括光口和电口。光口被配置为与光纤101连接，从而使得光模块200与 光纤101建立双向的光信号连接；电口被配置为接入光网络终端100中，从而使得光模块200与光网络终端100建立双向的电信号连接。光模块200实现光信号与电信号的相互转换，从而使得光纤101与光网络终端100之间建立连接。示例地，来自光纤101的光信号由光模块200转换为电信号后输入至光网络终端100中，来自光网络终端100的电信号由光模块200转换为光信号输入至光纤101中。由于光模块200是实现光电信号相互转换的工具，不具有处理数据的功能，在上述光电转换过程中，信息并未发生变化。远端服务器1000通过光纤101、光模块200、光网络终端100及网线103，与本地信息处理设备2000之间建立了双向的信号传递通道。
图2为根据一些实施例的一种光网络终端的结构图。为了清楚地显示光模块200与光网络终端100的连接关系，图2仅示出了光网络终端100的与光模块200相关的结构。如图2所示，光网络终端100中还包括设置于壳体内的PCB电路板105，设置于PCB电路板105的表面的笼子106，设置于笼子106上的散热器107，以及设置于笼子106内部的电连接器。电连接器被配置为接入光模块200的电口；散热器107具有增大散热面积的翅片等凸起部。
光模块200插入光网络终端100的笼子106中，由笼子106固定光模块200，光模块200产生的热量传导给笼子106，然后通过散热器107进行扩散。光模块200插入笼子106中后，光模块200的电口与笼子106内部的电连接器连接，从而光模块200与光网络终端100建立双向的电信号连接。此外，光模块200的光口与光纤101连接，从而使光模块200与光纤101建立双向的光信号连接。
图3为根据一些实施例的一种光模块的结构图，图4为根据一些实施例的一种光模块的爆炸图。如图3和图4所示，光模块200包括壳体(shell)以及设置于壳体中的电路板300和光收发组件(如，第一光收发组件500和/或第二光收发组件600)。
壳体包括上壳体201和下壳体202，上壳体201盖合在下壳体202上，以形成具有两个开口204和205的上述壳体；壳体的外轮廓一般呈现方形体。
在一些实施例中，下壳体202包括底板2021以及位于底板2021两侧、与底板2021垂直设置的两个下侧板2022；上壳体201包括盖板2011，盖板2011盖合在下壳体202的两个下侧板2022上，以形成上述壳体。
在一些实施例中，下壳体202包括底板2021以及位于底板2021两侧、与底板2021垂直设置的两个下侧板2022；上壳体201包括盖板2011，以及位于盖板2011两侧、与盖板2011垂直设置的两个上侧板，由两个上侧板与两个下侧板2022结合，以实现上壳体201盖合在下壳体202上。
两个开口204和205的连线所在的方向可以与光模块200的长度方向一致，也可以与光模块200的长度方向不一致。示例地，开口204位于光模块200的端部(图3的右端)，开口205也位于光模块200的端部(图3的左端)。或者，开口204位于光模块200的端部，而开口205则位于光模块200的侧部。开口204为电口，电路板300从电口伸出，插入上位机(如光网络终端100)中；开口205为光口，且被配置为接入外部的光纤101，以使光纤101连接光模块200内部的所述光收发组件。
采用上壳体201、下壳体202结合的装配方式，便于将电路板300、所述光收发组件等器件安装到上述壳体中，由上壳体201、下壳体202对这些器件形成封装保护。此外，在装配电路板300和所述光收发组件等器件时，便于这些器件的定位部件、散热部件以及电磁屏蔽部件的部署，有利于自动化的实施生产。
在一些实施例中，上壳体201及下壳体202采用金属材料制成，利于实现电磁屏蔽以及散热。
在一些实施例中，光模块200还包括位于其壳体外部的解锁部件203，解锁部件203被配置为实现光模块200与上位机之间的固定连接，或解除光模块200与上位机之间的固定连接。
示例地，解锁部件203位于下壳体202的两个下侧板2022的外侧，具有与上位机的笼子106匹配的卡合部件；当光模块200插入笼子106里时，由解锁部件203的卡合部件将光模块200固定在笼子106里；拉动解锁部件203时，解锁部件203的卡合部件随之移动，进而改变卡合部件与上位机的连接关系，以解除光模块200与上位机的卡合关系，从而可以将光模块200从笼子106里抽出。
电路板300包括电路走线、电子元件及芯片等，通过电路走线将电子元件和芯片按照 电路设计连接在一起，以实现供电、电信号传输及接地等功能。电子元件例如可以包括电容、电阻、三极管、金属氧化物半导体场效应管(Metal-Oxide-Semiconductor Field-Effect Transistor，MOSFET)。芯片例如可以包括微控制单元(Microcontroller Unit，MCU)、激光驱动芯片、限幅放大器(Limiting Amplifier)、跨阻放大器(Trans-impedance Amplifier，TIA)、时钟数据恢复芯片(Clock and Data Recovery，CDR)、电源管理芯片、数字信号处理(Digital Signal Processing，DSP)芯片。
电路板300一般为硬性电路板，硬性电路板由于其相对坚硬的材质，还可以实现承载作用，如硬性电路板可以平稳地承载上述电子元件和芯片；硬性电路板还可以插入上位机的笼子106中的电连接器中。
电路板300还包括板本体302以及形成在板本体302的端部表面的金手指301，金手指301由相互独立的多个引脚组成。电路板300插入笼子106中，由金手指301与笼子106内的电连接器导通连接。金手指301可以仅设置于电路板300一侧的表面(例如图4所示的上表面)，也可以设置于电路板300上下两侧的表面，以适应引脚数量需求大的场合。金手指301被配置为与上位机建立电连接，以实现供电、接地、I2C信号传递、数据信号传递等。
当然，部分光模块中也会使用柔性电路板。柔性电路板一般与硬性电路板配合使用，以作为硬性电路板的补充。
在一些实施例中，光模块200中还包括光纤连接器400，光纤连接器400设置在光口，光纤连接器400用于实现光纤101与光口的光连接，进而光收发组件产生的光信号通过光纤连接器400传输至光纤101，光纤101输出的光信号通过光纤连接器400传输至光收发组件。
光收发组件与电路板300电连接，且被配置为产生光信号以及接收光纤101输出的光信号。在一些实施例中，光模块200还包括光纤带，光收发组件通过光纤带连接光纤连接器400。一方面，光收发组件产生的光信号通过光纤带传输至光纤连接器400，另一方面，光纤101输出的光信号通过光纤连接器400传输至光纤带、再经光纤带传输至光收发组件。
在一些实施例中，光模块200包括一个或两个光收发组件，所述一个或两个光收发组件设置在电路板300上且与电路板300电连接。当然，本公开的一些实施例不局限于光模块200包括一个或两个光接收组件，在所述壳体内的空间足够大时，光模块200还可以包括两个以上的光收发组件。
示例地，光模块200包括第一光收发组件500，且第一光收发组件500设置在电路板300上，或者，光模块200包括第一光收发组件500和第二光收发组件600(见图10)，且第一光收发组件500和第二光收发组件600设置在电路板300上。
图5为根据一些实施例的一种光模块的第一光收发组件与电路板的立体图，示出了本公开一些实施例提供的光模块200的第一光收发组件500与电路板300的装配关系。如图5所示，光模块200包括第一光收发组件500，第一光收发组件500设置在电路板300上。示例地，第一光收发组件500设置在电路板300的中部。当然，在本公开的一些实施例中，第一光收发组件500的位置不局限于此，还可以根据需要进行调整。
如图5所示，第一光收发组件500包括第一基座510、第一光源520、第一硅光芯片530、第一次电路板540和第一数字信号处理芯片550。
第一基座510设置在电路板300上。第一光源520和第一硅光芯片530设置在第一基座510的顶部，且第一光源520位于第一硅光芯片530的一侧。
在一些实施例中，第一基座510可以用做第一光源520和第一硅光芯片530的热沉。示例地，第一基座510为铜制件，其具有良好的导热性能，有利于辅助第一光源520和第一硅光芯片530进行散热。
在一些实施例中，第一光源520位于第一硅光芯片530的远离金手指301的一侧，即第一光源520相较于第一硅光芯片530更靠近光口。
在一些实施例中，第一基座510、第一光源520和第一硅光芯片530等被称为第一硅光组件，所述第一硅光组件被配置为产生光信号和接收来自外部的光信号。
第一光源520被配置为向第一硅光芯片530提供不携带信号的光。第一硅光芯片530被配置为接收并调制所述不携带信号的光，以输出携带信号的光；该携带信号的光通过光模块200内部的光纤带传输至光纤连接器400。另外，光纤101传输的光信号通过光纤连接器400传输至光模块200内部的光纤带，并通过该光纤带传输至第一硅光芯片530，此 时，第一硅光芯片530还被配置为接收该光信号并将该光信号转换为电信号。
在一些实施例中，光模块200内部的光纤带包括第一发射光纤带和第一接收光纤带。第一硅光芯片530包括第一出光接头(即出光接头570)和第一入光接头(即入光接头580)，第一出光接头设置在第一硅光芯片530的光信号出光口处，且第一入光接头设置在第一硅光芯片530的光信号入光口处。第一发射光纤带的一端连接光纤连接器400，另一端连接所述第一出光接头；第一接收光纤带的一端连接光纤连接器400，另一端连接第一入光接头，从而便于第一硅光芯片530产生的光信号耦合至光纤带，且便于光纤带中传输的外部输入的光信号耦合至第一硅光芯片530。
第一次电路板540的朝向第一硅光芯片530的一端敞开以限定出用于容纳第一硅光芯片530的第一缺口541(见图14)。第一缺口541与第一硅光芯片530的形状相配合，且第一硅光芯片530设置在第一缺口541中。第一次电路板540设置在电路板300上，且平行于电路板300。第一次电路板540的靠近电路板300的一侧表面与电路板300相贴合，且与电路板300电连接。第一次电路板540的远离所述电路板300的一侧表面(即顶面)被配置为承载第一数字信号处理芯片550等器件，并通过打线工艺连接第一硅光芯片530等，使得第一数字信号处理芯片550可以驱动第一硅光芯片530。
然而，在本公开的一些实施例中，第一硅光芯片530不局限于被第一数字信号处理芯片550驱动。
可以理解的是，在第一光收发组件500中设置第一次电路板540，可以为第一数字信号处理芯片550等器件的设置和走线提供容纳空间。
例如，第一数字信号处理芯片550设置在第一次电路板540上，且与第一数字信号处理芯片550相关的走线的一部分(如电源线)设置在第一次电路板540中。如此一来，一方面，第一数字信号处理芯片550可以通过第一次电路板540与第一硅光芯片530传递信号，从而可以降低用于第一数字信号处理芯片550与第一硅光芯片530之间的信号传递的高速信号线的密度，减少高速信号线相互之间的串扰；另一方面，将与第一数字信号处理芯片550相关的电源线设置在第一次电路板540中，可以有效防止静电释放(Electro-Static Discharge，ESD)和电源轨道塌陷，且可以减少地弹。
如上设置，有利于提高光模块200的光学性能、高频性能与热性能之间的协调性，有利于提高光模块200的速率。
在一些实施例中，第一数字信号处理芯片550包括第一焊球阵列，所述第一焊球阵列设置在第一数字信号处理芯片550的朝向第一次电路板540的一侧表面。第一次电路板540上与所述第一焊球阵列相对应的位置处设有焊盘矩阵。通过将第一焊球阵列与所述焊盘矩阵电连接，可以实现第一数字信号处理芯片550与第一次电路板540的连接。
示例地，所述第一焊球阵列中的焊球为球栅阵列封装(Ball Grid Array Package，BGA)焊球。
图6为根据一些实施例的另一种光模块的第一光收发组件、第二光收发组件与电路板的结构图，示出了第一光收发组件500、第二光收发组件600与电路板300的装配关系。
如图6所示，光模块200还包括第二光收发组件600，且第一光收发组件500和第二光收发组件600设置在电路板300上。在图6中，第二光收发组件600设置在第一光收发组件500的左侧，然而，在本公开的一些实施例中，第一光收发组件500和第二光收发组件600相对位置不局限于此，例如，还可以将第二光收发组件600设置在第一光收发组件500的右侧等。
如图6所示，第二光收发组件600包括第二基座610、第二光源620、第二硅光芯片630、第二次电路板640和第二数字信号处理芯片650。
第二基座610设置在电路板300上。第二光源620和第二硅光芯片630设置在第二基座610的顶部，且第二光源620设置在第二硅光芯片630的一侧。
在一些实施例中，第二基座610可以用做第二光源620和第二硅光芯片630的热沉。示例地，第二基座610为铜制件，其具有良好的导热性能，有利于辅助第二光源620和第二硅光芯片630进行散热。
在一些实施例中，第二光源620位于第二硅光芯片630的远离金手指301的一侧，即第二光源620相较于第二硅光芯片630更靠近光口。
在一些实施例中，第二基座610、第二光源620和第二硅光芯片630等被称为第二硅光组件，所述第二硅光组件被配置为产生光信号和直接接收来自外部的光信号。
第二光源620被配置为向第二硅光芯片630提供不携带信号的光。第二硅光芯片630被配置为接收并调制所述不携带信号的光，以输出携带信号的光；该携带信号的光通过光模块200内部的光纤带传输至光纤连接器400。另外，光纤101传输的光信号通过光纤连接器400传输至光模块200内部的光纤带，并通过该光纤带传输至第二硅光芯片630，此时，第二硅光芯片630还被配置文件接收该光信号并将该光信号转换为电信号。
在一些实施例中，光模块200内部的光纤带包括第二发射光纤带和第二接收光纤带。第二硅光芯片630包括第二出光接头和第二入光接头，第二出光接头设置在第二硅光芯片630的光信号出光口处，且第二入光接头设置在第二硅光芯片630的光信号入光口处。第二发射光纤带的一端连接光纤连接器400，另一端连接所述第二出光接头；第二接收光纤带的一端连接光纤连接器400，另一端连接第二入光接头，从而便于第二硅光芯片630产生的光信号耦合至光纤带，且便于光纤带中传输的外部输入的光信号耦合至第二硅光芯片630。
第二次电路板640的朝向第二硅光芯片630的一端敞开以限定出用于容纳第二硅光芯片630的第二缺口，所述第二缺口与第二硅光芯片630的形状相配合，且第二次电路板640设置在所述第二缺口中。第二次电路板640设置在电路板300上，且平行于电路板300。第二次电路板640的靠近电路板300的一侧表面与电路板300相贴合，且与电路板300电连接。第二次电路板640的远离电路板300的一侧表面被配置为承载第二数字信号处理芯片650等器件，并通过打线工艺连接第二硅光芯片630等，使得第二数字信号处理芯片650可以驱动第二硅光芯片630。
示例地，第二次电路板640与第一次电路板540位于电路板300的同侧。例如，第二次电路板640与第一次电路板540位于电路板300的设置有金手指301的一侧。
可以理解的是，在第二光收发组件600中设置第二次电路板640，可以为第二数字信号处理芯片650等器件的设置和走线提供容纳空间。
例如，第二数字信号处理芯片650设置在第二次电路板640上，且与第二数字信号处理芯片650相关的走线的一部分(如电源线)设置在第二次电路板640中。如此一来，一方面，第二数字信号处理芯片650可以通过第二次电路板640与第二硅光芯片630传递信号，从而可以降低用于第二数字信号处理芯片650与第二硅光芯片630之间的信号传递的高速信号线的密度，减少高速信号线相互之间的串扰；另一方面，将与第二数字信号处理芯片650相关的电源线设置在第二次电路板640中，可以有效防止静电释放(Electro-Static Discharge，ESD)和电源轨道塌陷，且可以减少地弹。
综上所述，通过在光模块200中同时设置第二光收发组件600和第一光收发组件500，且第二光收发组件600和第一光收发组件500均设置有相对独立的次电路板(即第一次电路板540和第二次电路板640)，从而可以进一步为光模块200内部的器件以及走线提供容纳空间，减少高速信号线相互之间的串扰，且有利于进一步地提高光模块200的光学性能、高频性能以及热性能之间的协调性。
另外，第一光收发组件500和第二光收发组件600包括相对独立的次电路板和设置在次电路板上的相对独立的数字信号处理芯片，使得第一光收发组件500中的第一数字信号处理芯片550专用于第一光收发组件500，第二光收发组件600中的第二数字信号处理芯片650专用于第二光收发组件600，这样不仅有利于进一步提高光模块200的速率，还有利于提高光模块200的工业化生产效率，使光模块200具有更高的良率和可靠性。
图7为根据一些实施例的一种光模块的第一光收发组件与电路板的爆炸图。如图7所示，电路板300还包括第一沉槽310。第一沉槽310与第一基座510的位置相对应，且设置在板本体302的靠近第一基座510的一侧表面。
第一沉槽310与第一基座510的形状相配合，且第一基座510可以设置在第一沉槽310中，以便于将第一光收发组件500装配在电路板300上。另外，通过在电路板300上设置第一沉槽310，还可以便于调整第一硅光芯片530上引脚所在平面与第一次电路板540的顶面之间的相对高度。
图8为根据一些实施例的一种光模块的第一光收发组件与电路板在另一视角下的立体图。如图7和图8所示，电路板300还包括第一通孔320。第一通孔320设置在第一沉槽310的槽底，且沿电路板300的厚度方向贯穿第一沉槽310的槽底。
图9为根据一些实施例的一种光模块的第一光收发组件与电路板在另一视角下的爆炸图。参见图9，第一基座510包括第一座体5110以及设置在第一座体5110的远离第一硅 光芯片530的一侧表面的第一台阶511。第一台阶511与第一通孔320的形状相适配，通过将第一台阶511设置在第一通孔320中，便于实现第一基座510在第一沉槽310上的定位装配，使得电路板300的背面(即靠近下壳体202的一侧表面)具有更充足的空间，以布置器件和走线。
在一些实施例中，如图4所示，下壳体202还包括第一散热凸台2023。第一散热凸台2023设置在底板2021的靠近上壳体201的一侧，且与第一台阶511的位置相对应。第一散热凸台2023与第一台阶511抵接，以对第一光收发组件500进行散热。
以第一基座510的靠近底板2021的一侧表面所在平面为第一参考平面，第一硅光芯片530在所述第一参考平面上的正投影位于第一台阶511在所述第一参考平面上的正投影之内，也就是说，第一台阶511与第一硅光芯片530的位置相对应。
需要说明的是，第一硅光芯片530为第一光收发组件500中的主要产热器件，因此，通过将第一台阶511设置地靠近第一硅光芯片530，并将第一台阶511抵接于第一散热凸台2023，有利于缩短第一硅光芯片530的散热路径，使第一硅光芯片530产生的热量可以通过第一台阶511和第一散热凸台2023高效地传导至光模块200的壳体以及光模块200的外部，有利于提高第一硅光芯片530的散热效果。
在一些实施例中，如图9所示，第一次电路板540还包括第二焊球阵列5400，第二焊球阵列5400设置在第一次电路板540的靠近电路板300的一侧。相应地，电路板300还包括第一焊盘组，所述第一焊盘组与第二焊球阵列5400的位置相对应，通过焊锡将第二焊球阵列5400与所述第一焊盘组贴合固定，以将第一次电路板540贴合设置在电路板300上，并实现第一次电路板540与电路板300的电连接。示例地，第二焊球阵列5400中的焊球为球栅阵列封装焊球。
图10为根据一些实施例的另一种光模块的第一光收发组件、第二光收发组件与电路板的爆炸图。如图10所示，电路板300还包括第二沉槽330。第二沉槽330与第二基座610的位置相对应，且设置在板本体302的靠近第二基座610的一侧表面。
第二沉槽330与第二基座610的形状相配合，且第二基座610可以设置在第二沉槽330中，以便于将第二光收发组件600装配在电路板300上。另外，通过在电路板300上设置第二沉槽330，还可以便于调整第二硅光芯片630上引脚所在平面与第二次电路板640的顶面之间的相对高度。
在一些实施例中，第一沉槽310和第二沉槽330沿电路板300的长度方向(即，如图10中的左右方向)间隔开设置。
图11为根据一些实施例的另一种光模块的第一光收发组件、第二光收发组件与电路板在另一视角下(如仰视)的结构图。如图10和图11所示，电路板300还包括第二通孔340。第二通孔340设置在第二沉槽330的槽底，且沿电路板300的厚度方向贯穿第二沉槽330的槽底。
第二基座610还包括第二座体612以及设置在第二座体612的远离第二硅光芯片630的一侧表面的第二台阶611。第二台阶611与第二通孔340的形状相适配，通过将第二台阶611设置在第二通孔340中，便于实现第二基座610在第二沉槽330上的定位装配，使得电路板300的背面(即靠近下壳体202的一侧表面)具有更充足的空间，以布置器件和走线。
在一些实施例中，如图4所示，下壳体202还包括第二散热凸台2024。第二散热凸台2024设置在底板2021的靠近上壳体201的一侧，且与所述第二台阶的位置相对应。第二散热凸台2024与所述第二台阶抵接，以对第二光收发组件600进行散热。
以第二基座610的靠近底板2021的一侧表面所在平面为第二参考平面，第二硅光芯片630在所述第二参考平面上的正投影位于所述第二台阶在所述第二参考平面上的正投影之内，也就是说，所述第二台阶与第二硅光芯片630的位置相对应。
需要说明的是，第二硅光芯片630为第二光收发组件600中的主要产热器件，因此，通过将第二台阶设置地靠近第二硅光芯片630，并将第二台阶抵接于第二散热凸台2024，有利于缩短第二硅光芯片630的散热路径，使第二硅光芯片630产生的热量可以通过第二台阶和第二散热凸台2024高效地传导至光模块200的壳体以及光模块200的外部，有利于提高第二硅光芯片630的散热效果。
图12为根据一些实施例的一种光模块的第一光收发组件的结构图；图13为根据一些实施例的一种光模块的第一光收发组件的立体图；图14为根据一些实施例的一种光模块 的第一光收发组件的爆炸图；图15为根据一些实施例的一种光模块的第一光收发组件在另一视角下的立体图。以下，将结合图12至图15对第一光收发组件500的结构做详细介绍。可以理解的是，第二光收发组件600与第一光收发组件500的结构与功能基本相同，本公开对此不再重复叙述。
在一些实施例中，如图5和图12所示，第一光收发组件500还包括出光接头570和入光接头580。出光接头570光连接第一硅光芯片530的光信号出光口，入光接头580光连接第一硅光芯片530的光信号入光口。
第一硅光芯片530的光信号入光口以及光信号出光口均朝向光模块200的光口，也就是说，出光接头570和入光接头580均设置在第一硅光芯片530的靠近光模块200的光口的一侧(即，如图12所示的左侧)，从而可以有效减少出光接头570与光纤连接器400以及入光接头580与光纤连接器400之间的光纤带长度，降低所述光纤带的弯折程度，进而有利于降低光信号在传输过程中的损耗。
在一些实施例中，第一次电路板540包括多个焊盘(见图22)，所述多个焊盘位于第一次电路板540的顶面。所述多个焊盘围绕第一缺口541设置，且靠近第一缺口541。第一硅光芯片530包括多个第一引脚531。多个焊盘通过打线工艺连接多个第一引脚531，从而可以实现第一硅光芯片530与第一次电路板540的电连接。
在一些实施例中，第一硅光芯片530的多个第一引脚531所在的平面与第一次电路板540上所述多个焊盘所在的平面位于或近似位于同一高度，从而可以缩短用于第一硅光芯片530与第一次电路板540之间打线连接的连接线的长度，有利于提高光模块200在传递高速信号时的性能和稳定性，改善互连处的端口反射。
在一些实施例中，如图12和图13所示，第一次电路板540的一部分覆盖在第一基座510的一部分上。
例如，第一次电路板540的靠近所述三个内侧壁的部分，覆盖在第一基座510的边缘部分的上方，从而可以进一步降低第一次电路板540的尺寸。
在一些实施例中，如图12所示，出光接头570设置在第一光源520的一侧，入光接头580设置在第一光源520的另一侧，且出光接头570至入光接头580的排列方向大致垂直于第一光源520至第一硅光芯片530的排列方向。在一些实施例中，第一硅光芯片530还包括多个第二引脚532，多个第二引脚532设置在第一硅光芯片530的顶面且位于第一硅光芯片530的靠近所述光口的一端。第一光收发组件500还包括桥接件560。电路板300还包括多个第三引脚。多个第二引脚532通过桥接件560与所述多个第三引脚打线连接，从而可以实现第一硅光芯片530与电路板300之间的电连接。
示例地，桥接件560包括基板，以及设置在所述基板上的多条金属走线。每条金属走线对应于一个第二引脚532和一个第三引脚，这样，通过将多个第二引脚532与所述多条金属走线打线连接，再将所述多条金属走线与所述多个第三引脚打线连接，从而可以实现第一硅光芯片530与电路板300之间的电连接，且可以降低第二引脚532和所述第三引脚之间的连接线的长度。
在一些实施例中，所述基板可以是陶瓷件，从而具有良好的散热性能和绝缘性能。
图16为根据一些实施例的一种光模块的基座的结构图。如图16所示，第一基座510还包括第一安装台512和第二安装台513，第一安装台512和第二安装台513设置在第一座体5110的顶部。第一安装台512被配置为承载第一光源520，且第二安装台513被配置为承载第一硅光芯片530。
需要说明的是，第一安装台512和第二安装台513的位置可以根据第一光源520和第一硅光芯片530装配需要进行调整。同样的，第一安装台512的顶面与第二安装台513的顶面之间的相对高度也可以根据第一光源520和第一硅光芯片530装配需要进行调整，本公开对此不做限定。
可以理解的是，在第一座体5110的顶部设置第一安装台512和第二安装台513，可以将第一基座510划分为不同的功能区域，从而便于将第一光源520和第一硅光芯片530装配在第一基座510，且有利于提高第一光源520和第一硅光芯片530装配的精准度。另外，由于第一安装台512和第二安装台513的高度可以根据第一光源520和第一硅光芯片530的装配需要进行调整，从而可以实现第一光源520、桥接件560、出光接头570和入光接头580的装配高度的适配。
在一些实施例中，如图11所示，第一台阶511倾斜设置在第一座体5110的远离第一 安装台512的一侧表面，即第一台阶511的延伸方向(即第一方向S1)与电路板300的延伸方向(即第二方向S2)之间呈第一预设夹角，所述第一预设夹角的角度在6°至8°之间，例如，所述第一预设夹角为6°、7°或8°。在此情况下，第一通孔320与第一台阶511的形状相适配，以使得第一台阶511可以设置在第一通孔320中。
在一些实施例中，第一基座510还包括第三安装台514、第四安装台515和第五安装台516。第三安装台514、第四安装台515和第五安装台516设置在第一座体5110的顶部。第三安装台514、第四安装台515和第五安装台516与第一安装台512位于第二安装台513的一侧。第三安装台514、第四安装台515位于第一安装台512的一侧，且第四安装台515位于第三安装台514和第一安装台512之间。第五安装台516位于第一安装台512的另一侧。
第三安装台514被配置为承载出光接头570，第四安装台515被配置为承载桥接件560，第五安装台516被配置为承载入光接头580。第三安装台514、第四安装台515和第五安装台516的顶面与第二安装台513的顶面之间的相对高度可以根据出光接头570、桥接件560和入光接头580的装配需要进行选择。
在一些实施例中，第一安装台512与第四安装台515之间间隔开以限定出第一间隔517，第一安装台512与第五安装台516之间间隔开以限定出第二间隔518，且第三安装台514和第四安装台515之间设置开以限定出第三间隔519。
可以理解的是，第一基座510上的第一光源520、桥接件560、出光接头570和入光接头580在工作时会产热，因此，通过在第一安装台512与第四安装台515之间、第一安装台512与第五安装台516之间以及第三安装台514和第四安装台515之间分别设置第一间隔517、第二间隔518和第三间隔519，可以实现第一光源520、桥接件560、出光接头570和入光接头580之间的热隔离，防止出光接头570和入光接头580因过热而发生形变，并导致出光接头570、入光接头580与第一硅光芯片530之间的光耦合效率降低。
图17为根据一些实施例的一种光模块的基座与光源、硅光芯片等的爆炸图，图18为根据一些实施例的一种光模块的基座立体图。如图17和图18所示，第一光源520、第一硅光芯片530、出光接头570、桥接件560和入光接头580分别装配在第一安装台512、第二安装台513、第三安装台514、第四安装台515、第五安装台516上，从而有利于提高第一光源520、第一硅光芯片530、桥接件560、出光接头570和入光接头580在第一基座510上的装配精度，以及第一光源520、第一硅光芯片530、桥接件560、出光接头570和入光接头580之间的配合精度。
图19为根据一些实施例的一种光模块的第一光收发组件与保护罩的爆炸图，图20为根据一些实施例的一种光模块的第一光收发组件与保护罩在另一视角下的爆炸图。
在一些实施例中，如图19和图20所示，第一光源520包括激光器521、准直透镜522和隔离器523。激光器521、准直透镜522和隔离器523设置在第一座体5110上。激光器521的出光方向朝向第一硅光芯片530，准直透镜522和隔离器523沿激光器521的所述出光方向间隔开设置。准直透镜522和隔离器523的光轴共线。准直透镜522和隔离器523位于激光器521的出光路径上。
在一些实施例中，激光器521通过打线连接电路板300，电路板300向激光器521供电，使激光器521发光。激光器521发射的光束经准直透镜522的准直后转换为准直光束，准直光束透过隔离器523传输至第一硅光芯片530，在第一硅光芯片530内进行电光调制。
在一些实施例中，如图19和图20所示，第一硅光芯片530倾斜设置在第一座体5110上，也就是说，第一硅光芯片530的延伸方向(即如图6所示的第三方向S3)与电路板300的延伸方向(即第二方向S2)之间呈第二预设夹角A(即如图6所示的预设角度的夹角A)，以使第一硅光芯片530的光信号入光口的轴线与第一光源520的出光方向(即准直光束从隔离器523中出射的方向)之间大致呈第二预设夹角，如此一来，当第一光源520发出的准直光束在第一硅光芯片530光信号入光口的端面处发生反射时，反射光束中的大部分不会返回激光器521，小部分在射向激光器521时，会被隔离器523阻隔，从而可以避免反射光束影响激光器521的发光性能。
示例地，所述第二预设夹角的角度在6°至8°之间，例如，所述第二预设夹角为6°、7°或8°。
出光接头570和入光接头580用于固定光纤带的端部，光纤带的光纤端面用于耦合输入或输出光信号。
通常情况下，光纤带的光纤端面倾斜于光纤带的延伸方向，以使得从光纤端面入射或出射的光不会被光线端面反射而原路返回。
因此，当第一硅光芯片530倾斜设置在第一基座510上时，出光接头570和入光接头580与第一硅光芯片530之间均呈一定夹角，使得所述光纤带的光纤端面可以设置为垂直于光纤带的延伸方向，从而可以简化光纤带的生产工艺，降低光纤带的加工难度。
在一些实施例中，如图17所示，第一座体5110包括第一部5111和第二部5112。第一部5111连接第二部5112，第一光源520装配在第一部5111上，且第一硅光芯片530装配在第二部5112上。第一部5111的延伸方向(即第四方向S4)与电路板300的延伸方向平行。第一部5111的延伸方向与第二部5112的延伸方向(即第五方向S5)之间呈第三预设夹角。
可以理解的是，激光器521设置在第一座体5110上，便于激光器521产生的热量直接传输至导热性能良好的第一座体5110，有利于提高激光器521的散热效果。另外，将准直透镜522和隔离器523设置在第一座体5110上，使得准直透镜522和隔离器523受到激光器521散发的热量的影响相似，有利于提高准直透镜522和隔离器523的稳定性。
在一些实施例中，第一安装台512的上表面的一部分被构造为台阶面5121，以调整第一安装台512的上表面的各部分的相对高度。例如，台阶面5121可以位于第一安装台512的上表面的中部且向上凸起，也可以是位于第一安装台512的上表面的靠近第一硅光芯片530的位置处，且向下凹陷。当然，台阶面5121还可以位于第一安装台512的上表面的其他位置处，还可以是其他形状，本公开对此不做限定。
在一些实施例中，如图20所示，激光器521、准直透镜522和隔离器523设置在第一安装台512上。
示例地，直透镜522和隔离器523设置在台阶面5121上，以使得准直透镜522和隔离器523的光轴与激光器521出光光轴在同一高度，从而有利于提高第一光源520出光的稳定性，降低能源损耗。
在一些实施例中，第一安装台512设置在第一部5111上，第二安装台513设置在第二部5112上。由于第一部5111的延伸方向与第二部5112的延伸方向之间呈第三预设夹角，使得第二安装台513的延伸方向与第一安装台512的延伸方向之间呈第四预设夹角，因此，当第一光源520装配在第二安装台513上且第一硅光芯片530装配在第一安装台512上时，第一硅光芯片530的光信号入光口的轴线与第一光源520的出光方向之间呈第二预设夹角，从而可以降低第一光源520到第一硅光芯片530的光耦合难度。
在一些实施例中，第二预设夹角、第三预设夹角以及第四预设夹角的角度大致相同。
在一些实施例中，第三安装台514的延伸方向与第二安装台513的延伸方向之间呈第五预设夹角，且第五预设夹角与第四预设夹角的角度大致相同。因此，当出光接头570设置在第三安装台514上时，出光接头570的延伸方向与第一硅光芯片530的延伸方向之间呈预设角度的夹角。
在一些实施例中，第五安装台516的延伸方向与第二安装台513的延伸方向之间呈第六预设夹角，且第六预设夹角与第四预设夹角的角度大致相同。因此，当入光接头580设置在第五安装台516上时，入光接头580的延伸方向与第一硅光芯片530的延伸方向之间呈预设角度的夹角。
在一些实施例中，如图14所示，第一次电路板540还包括第一板体5401、第二板体5402和第三板体5403。第二板体5402和第三板体5403连接第一板体5401，且分别位于第一缺口541的两侧，也就是说，第一板体5401、第二板体5402和第三板体5403配合限定出第一缺口541。
在一些实施例中，如图14所示，第一缺口541的开口方向(即第六方向S6)与电路板300的延伸方向相反的方向(即第七方向S7)之间呈第七预设夹角，且第七预设夹角与第二预设夹角的角度大致相同。这样，便于将第一硅光芯片530设置在第一缺口541中。
图21为根据一些实施例的一种光模块的保护罩的立体图。
在一些实施例中，如图18至图21所示，第一光源520还包括保护罩524。保护罩524大致为中空的方形体。保护罩524的靠近所述第一基座510的一侧敞开。保护罩524连接第一基座510，且与第一基座510配合限定出用于容纳激光器521、准直透镜522和隔离器523的容纳腔。
在一些实施例中，保护罩524的朝向第一硅光芯片530的一侧敞开以形成敞口5241。 敞口5241的端面大致平行于第一硅光芯片530的靠近保护罩524的一侧表面，从而便于保护罩524与第一硅光芯片530的装配配合。
在一些实施例中，保护罩524远离第一硅光芯片530的一端相较于第一安装台512的远离第一硅光芯片530的一端更远离第一硅光芯片530，从而保护罩524可以罩设激光器521与电路板300之间的打线。
在一些实施例中，保护罩524为金属件，例如，保护罩524为铜制件，从而使得保护罩524具有良好的热传导性能，且可以屏蔽电磁波。
在一些实施例中，如图18所示，保护罩524的两个侧壁分别设置在第一间隔517和第二间隔518中，从而便于保护罩524的定位安装。
在一些实施例中，上壳体201还包括导热柱，所述导热柱连接盖板2011的靠近底板2021的一侧表面，且抵接在保护罩524的顶部，从而有利于提高保护罩524的散热效果。
在一些实施例中，如图19和图20所示，第一光源520还包括光学玻璃块525。光学玻璃块525设置在第一基座510上。光学玻璃块525靠近第一硅光芯片530的光信号入光口，且位于保护罩524的敞口5241中。光学玻璃块525被配置为透光以及密封保护罩524的靠近第一硅光芯片530的端部。
示例地，光学玻璃块525为楔形块。准直透镜522的光轴大致垂直于光学玻璃块525的光入射面，且第一硅光芯片530的光信号入光口的轴线大致垂直于光学玻璃块525的光出射面，从而使得光束能够透过光学玻璃块525传输至第一硅光芯片530的光信号入光口。
在一些实施例中，第一次电路板540包括设置在其表面的焊盘，以及设置在其内层的多层电路走线。这些焊盘和多等电路走线用于实现第一次电路板540与电路板300、第一次电路板540与第一数字信号处理芯片550以及第一次电路板540与第一硅光芯片530等的电连接。下面，本公开的一些实施例将对第一次电路板540的结构进行详细介绍。
图22为根据一些实施例的一种光模块的次电路板的结构图，示出了第一次电路板540的顶面的结构。如图22所示，第一次电路板540包括第一焊盘矩阵542，第一焊盘矩阵542设置在第一次电路板540的顶面，且与第一数字信号处理芯片550的位置相对应。第一焊盘矩阵542被配置为与第一数字信号处理芯片550电连接。
示例地，第一焊盘矩阵542与第一数字信号处理芯片550的焊球连接，以实现第一次电路板540与第一数字信号处理芯片550的电连接。
在一些实施例中，如图22所示，第一次电路板540的多个焊盘5411设置在第一次电路板540的顶面上，且靠近第一缺口541。多个焊盘5411被配置为通过打线工艺与第一硅光芯片530的多个第一引脚531电连接，从而实现第一次电路板540与第一硅光芯片530的电连接。
示例地，多个焊盘5411中的第一部分位于第一板体5401的靠近第一缺口541的边缘处，多个焊盘5411中的第二部分位于第二板体5402的靠近第一缺口541的边缘处，多个焊盘5411中的第三部分位于第三板体5403的靠近第一缺口541的边缘处。
在一些实施例中，如图14所示，第一缺口541包括第一侧边5413、第二侧边5414和第三侧边5415。第二侧边5414为第一缺口541的与电路板300的延伸方向垂直的一侧边。第一侧边5413平行于第三侧边5415，且第一侧边5413与第三侧边5415连接第二侧边5414。
在一些实施例中，如图22所示，多个焊盘5411包括高频连接焊盘组5412。高频连接焊盘组5412被配置为通过打线工艺连接多个第一引脚531中的一部分，以实现于第一次电路板540和第一硅光芯片530之间的电连接，使第一数字信号处理芯片550与第一硅光芯片530之间可以传输高频信号。
在一些实施例中，多个焊盘5411还包括其他用途的焊盘，本公开对此不再赘述。例如，多个焊盘5411包括用于为第一硅光芯片530供电的焊盘。
示例地，高频连接焊盘组5412设置在第一板体5401上，且位于第一板体5401的靠近第一缺口541的边缘处。
示例地，高频连接焊盘组5412位于第一次电路板540的顶面的靠近第一缺口541的第二侧边5414的位置处。
在一些实施例中，第一硅光芯片530设置在第一缺口541中，且分别与第一板体5401、第二板体5402和第三板体5403抵接，从而可以降低第一次电路板540的尺寸。
在一些实施例中，第一次电路板540还包括用于贴装电阻、电容等器件的其他焊盘， 本公开对此不再赘述。
图23为根据一些实施例的一种光模块的次电路板的顶面的另一种结构图。在一些实施例中，如图23所示，第一焊盘矩阵542包括第一高频信号输入焊盘组5421、第一高频信号输出焊盘组5422、第二高频信号输入焊盘组5423和第二高频信号输出焊盘组5424。
第一高频信号输入焊盘组5421被配置为传递电路板300发出的第一高频信号，使所述第一高频信号通过第一高频信号输入焊盘组5421进入第一次电路板540，再由第一次电路板540输送至第一数字信号处理芯片550。
第一高频信号输出焊盘组5422被配置为传递第一数字信号处理芯片550发出的第二高频信号，所述第二高频信号由第一数字信号处理芯片550发出并传输至第一次电路板540，再从第一次电路板540经由第一高频信号输出焊盘组5422传输至电路板300。
第二高频信号输入焊盘组5423被配置为传递第一硅光芯片530发出的第三高频信号，使所述第三高频信号通过第二高频信号输入焊盘组5423进入第一次电路板540，再由第一次电路板540输送至第一数字信号处理芯片550。
第二高频信号输出焊盘组5424被配置为传递第一数字信号处理芯片550发出的第四高频信号，所述第四高频信号由第一数字信号处理芯片550发出并传输至第一次电路板540，再从第一次电路板540经由第二高频信号输出焊盘组5424传输至第一硅光芯片530。
图24为根据一些实施例的一种光模块的次电路板的底面的结构图示出了第一次电路板540的底面(即第一次电路板540的靠近电路板300的一侧表面)结构。如图24所示，第一次电路板540还包括第二焊盘矩阵543，第二焊盘矩阵543设置在第一次电路板540的底面。第二焊盘矩阵543被配置为通过焊球阵列5400连接电路板300上的所述第一焊盘组，从而实现第一次电路板540与电路板300的电连接。
在一些实施例中，如图24所示，第二焊盘矩阵543包括第三高频信号输入焊盘组5431、第三高频信号输出焊盘组5432和电源焊盘组5433。第三高频信号输入焊盘组5431用于向第一数字信号处理芯片550输入高频信号，第三高频信号输出焊盘组5432用于接收第一数字信号处理芯片550输出的高频信号，电源焊盘组5433用于向第一数字信号处理芯片550等器件供电。
在一些实施例中，如图24所示，第二焊盘矩阵543包括多组第三高频信号输入焊盘组5431，以及多组第三高频信号输出焊盘组5432。
示例地，如图24所示，第二焊盘矩阵543包括四组第三高频信号输入焊盘组5431，以及四组第三高频信号输出焊盘组5432。四组第三高频信号输入焊盘组5431相对集中设置，且四组第三高频信号输出焊盘组5432相对集中设置。
例如，电源焊盘组5433位于第一次电路板540的宽度方向上的中部，四组第三高频信号输入焊盘组5431位于电源焊盘组5433的一侧，四组第三高频信号输出焊盘组5432位于电源焊盘组5433的另一侧。
在一些实施例中，第二焊盘矩阵543还包括第一接地焊盘组和第二接地焊盘组。所述第一接地焊盘组位于第三高频信号输入焊盘组5431与电源焊盘组5433之间，且所述第二接地焊盘组位于第三高频信号输出焊盘组5432与电源焊盘组5433之间。可以理解的是，所述第一接地焊盘组和所述第二接地焊盘组可以将高频信号焊盘组(包括第三高频信号输入焊盘组5431和第三高频信号输出焊盘组5432)与电源焊盘组5433隔开，从而可以减少电源与高频信号之间的串扰。
在一些实施例中，第二焊盘矩阵543还包括第三接地焊盘组和第四接地焊盘组。
每两个相邻的第三高频信号输入焊盘组5431之间设置有所述第三接地焊盘组中的一个或多个接地焊盘，每两个相邻的第三高频信号输出焊盘组5432之间设置有所述第四接地焊盘组中的一个或多个接地焊盘，从而可以减少高频信号焊盘组之间的串扰。
需要说明的是，本公开的一些实施例中提到的焊盘组(如，高频连接焊盘组5412、第三高频信号输入焊盘组5431等)可以由一个或多个具有相同功能的焊盘组成。例如，一个焊盘组包括一个、两个、三个或更多焊盘。当所述焊盘组包括多个焊盘时，只要能实现所述焊盘组的功能，本公开对所述多个焊盘的排列方式不做限定。
在一些实施例中，第一次电路板540包括多层子电路板，和设置在所述多子电路板上的电路板走线。所述多层子电路板包括上层子电路板、下层子电路板以及位于所述上层子电路板和所述下层子电路板之间的一层或多层中间层子电路板。
例如，第一次电路板540还包括光发射信号走线和光接收信号走线，所述光发射信号 走线和所述光接收信号走线用于第一次电路板540电连接第一硅光芯片530。
示例地，所述光发射信号走线和所述光接收信号走线连接用于电连接第一数字信号处理芯片550和第一硅光芯片530的高频连接焊盘组5412。
在一些实施例中，所述光发射信号走线和所述光接收信号走线位于多层所述中间层子电路板中的不同层上，从而可以降低所述光发射信号走线和所述光接收信号走线受到的外界辐射。
在一些实施例中，所述光发射信号走线和所述光接收信号走线分别位于多层所述中间层子电路板中不相邻的两层上，从而有利于减少所述光发射信号走线与所述光接收信号走线之间的干扰。
示例地，所述多层中间层子电路板包括第一中间层子电路板和第二中间层子电路板，且所述第一中间层子电路板和所述第二中间层子电路板为不相邻的两层中间层子电路板。所述光发射信号走线设置在所述第一中间层子电路板，所述光接收信号走线设置在所述第二中间层子电路板。
在一些实施例中，第一次电路板540还包括高频输入信号走线和高频输出信号走线。所述高频输入信号走线用于实现第三高频信号输入焊盘组5431与第一数字信号处理芯片550的电连接，所述高频输出信号走线用于实现第三高频信号输出焊盘组5432与第一数字信号处理芯片550之间的电连接。
在一些实施例中，所述高频输入信号走线和所述高频输出信号走线位于所述多层中间层子电路板中的不同层上，从而可以降低所述高频输入信号走线和所述高频输出信号走线受到的外界辐射。
在一些实施例中，所述高频输入信号走线和所述高频输出信号走线分别位于多层所述中间层子电路板中不相邻的两层上，从而有利于减少所述高频输入信号走线和所述高频输出信号走线之间的干扰。
在一些实施例中，所述光发射信号走线与所述高频输入信号走线位于第一次电路板540的同一中间层子电路板，光接收信号走线与高频输出信号走线位于第一次电路板540的同一中间层子电路板，从而可以充分利用第一次电路板540，有利于降低第一次电路板540的尺寸。
示例地，所述高频输入信号走线位于所述第一中间层子电路板，所述高频输出信号走线位于所述第二中间层子电路板。
在一些实施例中，所述多层中间层子电路板还包括第三中间层子电路板，所述第三中间层子电路板上设置有第一挖空，所述第一挖空在所述第一中间层子电路板上的正投影覆盖所述光发射信号走线。示例地，所述第三中间层子电路板与所述第一中间层子电路板相邻。
在一些实施例中，所述多层中间层子电路板还包括第四中间层子电路板，所述第四中间层子电路板上设置有第二挖空，所述第二挖控在所述第二中间层子电路板上的正投影覆盖所述光接收信号走线。示例地，所述第四中间层子电路板与所述第二中间层子电路板相邻。
在一些实施例中，所述第三中间层子电路板上还设置有第三挖空，所述第三挖空在第一中间层子电路板上的正投影覆盖所述高频输入信号走线。
所述第四中间层子电路板上还设置有第四挖空，所述第四挖空在所述第二中间层子电路板上的正投影覆盖所述高频输出信号走线。
在一些实施例中，所述第一中间层子电路板和所述第二中间层子电路板位于所述第三中间层子电路板和所述第四中间层子电路板之间。
在一些实施例中，第一次电路板540包括多对光发射信号走线、多对光接收信号走线、多对高频输入信号走线以及多对高频输出信号走线。
每两对所述光发射信号走线之间设置有至少一个过孔，以隔离两对所述光发射信号走线，从而可以减少两对所述光发射信号走线之间的串扰。
每两对所述光接收信号走线之间设置有至少一个过孔，以隔离两对所述光接收信号走线，从而可以减少两对所述光接收信号走线之间的串扰。
每两对所述高频输入信号走线之间设置有至少一个过孔，以隔离两对所述高频输入信号走线，从而可以减少两对所述高频输入信号走线之间的串扰。
每两对所述高频输出信号走线之间设置有至少一个过孔，以隔离两对所述高频输出信 号走线，从而可以减少两对所述高频输出信号走线之间的串扰。
以下，将以第一次电路板540包括十层子电路板为例，对第一次电路板540的结构进行详细描述，可以理解的是，本公开的一些实施例提供的第一次电路板540不局限于包括十层子电路板，在一些实施例中，第一次电路板540六层、八层或其他层数的子电路板，本公开对此不做限定。
图25为根据一些实施例的一种光模块的次电路板的第三层子电路板的结构图。如图25所示，第一次电路板540包括四对光发射信号走线544和四对高频输入信号走线545。四对光发射信号走线544和四对高频输入信号走线545设置在第一次电路板540的第三层子电路板上。
每条光发射信号走线544的一端通过过孔连接第二高频信号输出焊盘组5424中的一个焊盘，另一端通过过孔连接高频连接焊盘组5412中的一个焊盘。
每条高频输入信号走线545的一端通过过孔连接第一高频信号输入焊盘组5421中的一个焊盘，另一端通过过孔连接第三高频信号输入焊盘组5431中的一个焊盘。
每两对光发射信号走线544之间设置有至少一个过孔，每两对高频输入信号走线545之间设置有至少一个过孔。
图26为根据一些实施例的一种光模块的次电路板的第六层子电路板的结构图。如图26所示，第一次电路板540包括四对光接收信号走线546和四对高频输出信号走线547，且四对光接收信号走线546和四对高频输出信号走线547设置在第一次电路板540的第六层子电路板上。
每条光接收信号走线546的一端通过过孔连接第二高频信号输入焊盘组5423中的一个焊盘，另一端通过过孔连接高频连接焊盘组5412中的一个焊盘。每条高频输出信号走线547的一端通过过孔连接第一高频信号输出焊盘组5422中的一个焊盘，另一端通过过孔连接第三高频信号输出焊盘组5432中的一个焊盘。每两对光接收信号走线546之间设置有至少一个过孔，每两对高频输出信号走线547之间设置有至少一个过孔。
在一些实施例中，四对光发射信号走线544在第一层子电路板上的正投影与四对光接收信号走线546在第一层子电路板上的正投影大致呈交叉分布；四对高频输入信号走线545在第一层子电路板上的正投影与四对高频输出信号走线547在第一层子电路板上的正投影大致呈交叉分布。
如此一来，四对光发射信号走线544与四对光接收信号走线546的电磁场垂直、四对高频输入信号走线545与四对高频输出信号走线547的电磁场垂直，从而有利于减少走线与走线之间的串扰耦合。
图27为根据一些实施例的一种光模块的次电路板的第二层子电路板的结构图。如图25和图27所示，第一次电路板540的第二层子电路板上设置有第一挖空5481和第三挖空5482。第一挖空5481在第一次电路板540的第三层子电路板上的正投影覆盖光发射信号走线544，第三挖空5482在第一次电路板540的第三层子电路板上的正投影覆盖高频输入信号走线545。
图28为根据一些实施例的一种光模块的次电路板的第七层子电路板的结构图。如图26和图28所示，第一次电路板540的第七层子电路板上设置有第二挖空5491和第四挖空5492。第二挖空5491在第一次电路板540的第六层子电路板上的正投影覆盖光接收信号走线546，第四挖空5492在第一次电路板540的第六层子电路板上的正投影覆盖高频输出信号走线547。
在一些实施例中，第一次电路板540的第一层子电路板、第四层子电路板、第五层子电路板和第八层子电路板上设置参考地。示例地，第一层子电路板和第四层子电路板作为第三层子电路板的参考地，第五层子电路板和第八层子电路板作为第六层子电路板的参考地。
在一些实施例中，第二光收发组件600的详细结构可参考第一光收发组件500的结构，第二光收发组件600的结构可与第一光收发组件500的结构相同，但不局限于相同。例如，第二光收发组件600可在第一光收发组件500结构的基础上进行稍微调整或改动。
本领域的技术人员将会理解，本发明的公开范围不限于上述具体实施例，并且可以在不脱离本申请的精神的情况下对实施例的某些要素进行修改和替换。本申请的范围受所附权利要求的限制。

Claims (20)

  1. 一种光模块，包括：
    壳体；
    电路板，所述电路板设置在所述壳体内；以及
    第一光收发组件，所述第一光收发组件与所述电路板电连接，且被配置为产生光信号或接收来自所述光模块的外部的光信号；所述第一光收发组件包括：
    第一基座，所述第一基座设置在所述电路板上；
    第一硅光芯片，所述第一硅光芯片设置在所述第一基座上，且被配置为接收并调制不携带信号的光，以输出携带信号的光，和接收来自所述光模块的外部的光信号；
    第一光源，所述第一光源设置在所述第一基座上，且被配置为向所述第一硅光芯片提供所述不携带信号的光；
    第一次电路板，所述第一次电路板设置在所述电路板上，且与所述电路板电连接；所述第一次电路板的朝向所述第一硅光芯片的一端敞开以形成第一缺口；所述第一缺口与所述第一硅光芯片的形状适配；所述第一硅光芯片设置在所述第一缺口中，且与所述第一次电路板电连接；和
    第一数字信号处理芯片，所述第一数字信号处理芯片设置在所述第一次电路板上，通过所述第一次电路板与所述第一硅光芯片电连接，以驱动所述第一硅光芯片。
  2. 根据权利要求1所述的光模块，其中，
    所述第一次电路板包括多个焊盘，所述多个焊盘设置在所述第一次电路板的远离所述电路板的一侧表面，且围绕所述第一缺口设置；
    所述第一硅光芯片包括多个第一引脚，所述多个第一引脚与所述多个焊盘的位置相对应；
    其中，所述多个焊盘与所述多个第一引脚打线连接以使所述第一次电路板与所述第一硅光芯片电连接。
  3. 根据权利要求2所述的光模块，其中，所述第一缺口包括：
    第一侧边；
    第二侧边，所述第二侧边连接所述第一侧边，且所述第二侧边为所述第一缺口的与所述电路板的延伸方向垂直的一侧边；和
    第三侧边，所述第三侧边大致平行于所述第一侧边，且连接所述第二侧边；
    所述多个焊盘包括高频连接焊盘组，所述高频连接焊盘组用于传输所述第一硅光芯片和所述第一数字信号处理芯片发出的高频信号；所述高频连接焊盘组位于所述第一次电路板的远离所述电路板的一侧表面，且靠近所述第二侧边。
  4. 根据权利要求1至3中任一项所述的光模块，其中，所述第一光收发组件还包括桥接件；所述第一硅光芯片通过所述桥接件与所述电路板电连接。
  5. 根据权利要求4所述的光模块，其中，所述第一硅光芯片包括多个第二引脚；所述电路板包括多个第三引脚；
    所述桥接件包括：
    基板；和
    多条金属走线，所述多条金属走线设置在所述基板上；
    其中，每条金属走线的一端与一个第二引脚打线连接，每条金属走线的另一端与一个第三引脚打线连接，以使所述第一硅光芯片与所述电路板电连接。
  6. 根据权利要求5所述的光模块，其中，所述第一光收发组件还包括：
    出光接头；和
    入光接头，所述入光接头和所述出光接头设置在所述第一基座上，且所述入光接头和所述出光接头与所述第一硅光芯片光连接。
  7. 根据权利要求6所述的光模块，其中，所述第一基座包括：
    第一座体；
    第一安装台，所述第一光源设置在所述第一安装台上；
    第二安装台，所述第一硅光芯片设置在所述第二安装台上；
    第三安装台，所述出光接头设置在所述第三安装台上；
    第四安装台，所述桥接件设置在所述第四安装台上；
    第五安装台，所述入光接头设置在所述第五安装台上；所述第一安装台、所述第二安装台、所述第三安装台、所述第四安装台和所述第五安装台间隔开设置在所述第一座体上。
  8. 根据权利要求1至7中任一项所述的光模块，其中，所述电路板还包括：
    板本体；和
    第一沉槽，所述第一沉槽设置在所述板本体上，且与所述第一基座的位置相对应；
    其中，所述第一基座设置在所述第一沉槽中。
  9. 根据权利要求8所述的光模块，其中，所述电路板还包括第一通孔；所述第一通孔设置在所述第一沉槽的槽底，且沿所述电路板的厚度方向贯穿所述槽底；
    所述第一基座包括：
    第一座体；和
    第一台阶，所述第一台阶设置在所述第一座体的远离所述第一硅光芯片的一侧表面，且与所述第一通孔的形状相适配；
    其中，所述第一台阶设置在所述第一通孔中，且与所述壳体接触。
  10. 根据权利要求1至9中任一项所述的光模块，其中，所述第一硅光芯片还包括光信号入光口，所述光信号入光口位于所述第一硅光芯片的靠近所述第一光源的一侧；
    所述第一光源包括：
    激光器，所述激光器的出光方向朝向所述第一硅光芯片的所述光信号入光口，且与所述电路板电连接；
    准直透镜，所述准直透镜位于所述激光器的出光光路上；和
    隔离器，所述隔离器位于所述激光器的出光光路上，且相较于所述准直透镜更远离所述激光器。
  11. 根据权利要求10所述的光模块，其中，所述第一硅光芯片的延伸方向与所述电路板的延伸方向之间呈预设角度的夹角，以使所述激光器的出光方向与所述第一硅光芯片的所述光信号入光口的轴线之间呈所述预设角度的夹角。
  12. 根据权利要求11所述的光模块，其中，所述第一光源还包括保护罩，所述保护罩的朝向所述第一基座的一侧敞开；所述保护罩连接所述第一基座，以罩设所述激光器、所述准直透镜和所述隔离器。
  13. 根据权利要求12所述的光模块，其中，所述保护罩的朝向所述第一硅光芯片的一侧敞开以形成敞口；
    所述第一光源还包括光学玻璃块，所述光学玻璃块位于所述保护罩的所述敞口中，且被配置为透光以及密封所述保护罩的靠近所述第一硅光芯片的端部；所述光学玻璃块包括：
    光入射面，所述准直透镜的光轴大致垂直于所述光入射面；和
    光出射面，所述第一硅光芯片的所述光信号入光口的所述轴线大致垂直于所述光出射面。
  14. 根据权利要求1至13中任一项所述的光模块，其中，所述第一次电路板包括：
    上层子电路板；
    下层子电路板；和
    多层中间层子电路板，所述多层中间层子电路板位于所述上层子电路板和所述下层子电路板之间；
    所述第一次电路板还包括：
    光发射信号走线；和
    光接收信号走线，所述光发射信号走线和所述光接收信号走线用于所述第一次电路板电连接所述第一硅光芯片；
    所述多层中间层子电路板包括：
    第一中间层子电路板，所述光发射信号走线设置在所述第一中间层子电路板上；和
    第二中间层子电路板，所述光接收信号走线设置在所述第二中间层子电路板上；
    其中，所述第一中间层子电路板和所述第二中间层子电路板为所述多层中间层子电路板中的两个不相邻的中间层子电路板，所述光发射信号走线在所述上层子电路板上的正投影与所述光接收信号走线在所述上层子电路板上的正投影大致呈交叉分布。
  15. 根据权利要求14所述的光模块，其中，所述第一次电路板还包括：
    高频输入信号走线，所述高频输入信号走线设置在所述第一中间层子电路板上；和
    高频输出信号走线，所述高频输出信号走线设置在所述第二中间层子电路板上；所述高频输入信号走线和所述高频输出信号走线用于所述第一次电路板电连接所述第一数字信号处理芯片；
    其中，所述高频输入信号走线在所述上层子电路板上的正投影与所述高频输出信号走线在所述上层子电路板上的正投影大致呈交叉分布。
  16. 根据权利要求15所述的光模块，其中，所述多层中间层子电路板还包括：
    第三中间层子电路板，所述第三中间层子电路板包括第一挖空，所述第一挖空在所述第一中间层子电路板上的正投影覆盖所述光发射信号走线；所述第三中间层子电路板与所述第一中间层子电路板相邻；和
    第四中间层子电路板，所述第四中间层子电路板包括第二挖空，所述第二挖空在所述第二中间层子电路板上的正投影覆盖所述光接收信号走线；所述第四中间层子电路板与所述第二中间层子电路板相邻；
    其中，所述第一中间层子电路板和所述第二中间层子电路板位于所述第三中间层子电路板和所述第四中间层子电路板之间。
  17. 根据权利要求16所述的光模块，其中，
    所述第三中间层子电路板还包括第三挖空，所述第三挖空在所述第一中间层子电路板上的正投影覆盖所述高频输入信号走线；
    所述第四中间层子电路板还包括第四挖空，所述第四挖空在所述第二中间层子电路板上的正投影覆盖所述高频输出信号走线。
  18. 根据权利要求17所述的光模块，其中，所述第一次电路板还包括：
    第一焊盘矩阵，所述第一焊盘矩阵设置在所述第一次电路板的远离所述电路板的一侧表面，且与所述第一数字信号处理芯片的位置相对应；所述第一焊盘矩阵被配置为电连接所述第一数字信号处理芯片；和
    第二焊盘矩阵，所述第二焊盘矩阵设置在所述第一次电路板的靠近所述电路板的一侧表面；所述第二焊盘矩阵被配置为电连接所述电路板；所述第二焊盘矩阵包括：
    电源焊盘组；
    高频信号输入焊盘组，所述高频信号输入焊盘组位于所述电源焊盘组的一侧，且被配置为连接所述高频输入信号走线；
    高频信号输出焊盘组，所述高频信号输出焊盘组位于所述电源焊盘组的另一侧，且被配置为连接所述高频输出信号走线；
    第一接地焊盘组，位于所述高频信号输入焊盘组与所述电源焊盘组之间；和
    第二接地焊盘组，位于所述高频信号输出焊盘组与所述电源焊盘组之间。
  19. 根据权利要求18所述的光模块，其中，所述第一数字信号处理芯片包括第一焊球阵列，所述第一焊球阵列设置在所述第一数字信号处理芯片的靠近所述第一次电路板的一侧表面；所述第一焊球阵列与所述第一焊盘矩阵电连接；
    所述第一次电路板还包括第二焊球阵列，所述第二焊球阵列设置在所述第一次电路板的靠近所述电路板的一侧，且与所述第二焊盘矩阵的位置相对应；所述第二焊盘矩阵通过所述第二焊球阵列与所述电路板电连接。
  20. 根据权利要求1至19中任一项所述的光模块，还包括第二光收发组件，所述第二光收发组件位于所述第一光收发组件的沿所述电路板的延伸方向上的一侧；所述第二光收发组件与所述电路板电连接，且被配置为产生光信号或接收来自所述光模块的外部的光信号；所述第二光收发组件包括：
    第二基座，所述第二基座设置在所述电路板上；
    第二硅光芯片，所述第二硅光芯片设置在所述第二基座上，且被配置为接收并调制不携带信号的光，以输出携带信号的光，或者，接收来自所述光模块的外部的光信号；
    第二光源，所述第二光源设置在所述第二基座上，且被配置为向所述第二硅光芯片提供所述不携带信号的光；
    第二次电路板，所述第二次电路板设置在所述电路板上，且与所述电路板电连接；所述第二次电路板的朝向所述第二硅光芯片的一端敞开以形成第二缺口；所述第二缺口与所述第二硅光芯片的形状适配；所述第二硅光芯片设置在所述第二缺口中，且与所述第二次电路板电连接；和
    第二数字信号处理芯片，所述第二数字信号处理芯片设置在所述第二次电路板上，通过所述第二次电路板与所述第二硅光芯片电连接，以驱动所述第二硅光芯片。
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