WO2023159553A1 - 发光基板及显示装置 - Google Patents

发光基板及显示装置 Download PDF

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Publication number
WO2023159553A1
WO2023159553A1 PCT/CN2022/078233 CN2022078233W WO2023159553A1 WO 2023159553 A1 WO2023159553 A1 WO 2023159553A1 CN 2022078233 W CN2022078233 W CN 2022078233W WO 2023159553 A1 WO2023159553 A1 WO 2023159553A1
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WIPO (PCT)
Prior art keywords
light
layer
emitting
conductive
substrate
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Application number
PCT/CN2022/078233
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English (en)
French (fr)
Inventor
张新秀
庞斌
桑华煜
赵雪
吉强
谢晓冬
Original Assignee
京东方科技集团股份有限公司
合肥京东方瑞晟科技有限公司
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Application filed by 京东方科技集团股份有限公司, 合肥京东方瑞晟科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202280000353.4A priority Critical patent/CN117321764A/zh
Priority to PCT/CN2022/078233 priority patent/WO2023159553A1/zh
Publication of WO2023159553A1 publication Critical patent/WO2023159553A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present application relates to the field of display technology, in particular to a light-emitting substrate and a display device.
  • Mini-LED is a new type of LED display technology derived from small-pitch LEDs, also known as submillimeter light-emitting diodes. Its grain size is about 100 ⁇ m to 300 ⁇ m, which is between traditional LED and Micro LED. Due to its good display effect and light and thin experience, as well as its advantages such as high contrast ratio and long life, it has an obvious trend of use in the display field.
  • the bonding area of the existing Mini-LED substrate has the problem that the film layer is easy to peel off, which affects the yield of the product.
  • the application provides a light emitting substrate and a display device.
  • a light emitting substrate includes a binding area and a light-emitting area; the light-emitting substrate includes:
  • the light-emitting region comprising a two-layer conductive structure
  • binding terminal located on the substrate and located in the binding region, the binding region comprising a layer of conductive structure
  • the light-emitting substrate further includes a solder flux layer partially located in the first opening, and the thickness of the solder flux layer is greater than the thickness of the portion of the first insulating layer located in the bonding region. .
  • the first insulating layer includes an inorganic layer located in the bonding region.
  • the light-emitting substrate includes a first conductive layer and a second conductive layer located on a side of the first conductive layer away from the substrate; the pad includes a first conductive structure, and the bonding the terminal includes a second conductive structure;
  • the first conductive structure is located on the second conductive layer, and the second conductive structure is located on the second conductive layer.
  • the light-emitting substrate further includes a transition area between the bonding area and the light-emitting area, and the transition area is provided with connecting wires on the first conductive layer, and the light-emitting The area is provided with a signal line connected to the connecting line;
  • the second conductive layer includes an overlapping portion located in the transition region, the overlapping portion is connected to the second conductive structure, and the overlapping portion is partially located on a side of the connecting trace away from the substrate and Bond with the connection trace.
  • the first insulating layer covers the transition region.
  • the overlapping portion includes an inclined portion, and in a direction away from the substrate, the inclined portion is inclined upward in a direction from the binding area to the light emitting area.
  • the light-emitting substrate further includes a second insulating layer located between the first conductive layer and the second conductive layer, and the second insulating layer is provided with a second insulating layer located in the transition region.
  • the light-emitting substrate further includes a second insulating layer located between the first conductive layer and the second conductive layer, and the second insulating layer covers the binding region.
  • the light-emitting substrate includes a first conductive layer and a second conductive layer located on a side of the first conductive layer away from the substrate, the pad includes a first conductive structure, and the bonding the terminal includes a second conductive structure;
  • the first conductive structure is located on the second conductive layer, and the second conductive structure is located on the first conductive layer.
  • the light-emitting substrate further includes a transition area between the bonding area and the light-emitting area, and the transition area is provided with connecting wires on the first conductive layer, and the light-emitting The area is provided with a signal line connected to the connecting line;
  • connection wiring is connected to the second conductive structure.
  • the light-emitting substrate further includes a second insulating layer located between the first conductive layer and the second conductive layer, and the orthographic projection of the second insulating layer on the substrate is located at A region outside the binding region.
  • the binding terminal includes a second conductive structure, and the second conductive structures adjacent to the binding terminal are arranged at intervals.
  • the binding terminal includes a second conductive structure
  • the light-emitting substrate further includes a plurality of signal lines located in the light-emitting area, and the same signal line is connected to a plurality of the binding terminals; and Among the plurality of binding terminals connected to the same signal line, the third conductive structures of at least two adjacent binding terminals are connected.
  • the third conductive structures of the binding terminals connected to the same signal line are all connected to each other.
  • a display device is provided, and the display device includes the above-mentioned light-emitting substrate.
  • the binding area includes a layer of conductive structure, that is, the bonding pad in the bonding area only includes a layer of conductive film, and there is no conductive film layer below it, which can avoid When there is a conductive film layer, the pad is separated from the conductive film layer below it due to poor adhesion between the pad and the conductive film layer below it; holes, and the orthographic projection of each first opening on the substrate is within the orthographic projection of a binding terminal on the substrate, the first opening will not expose the
  • the insulating layer can avoid the problem of over-etching the part of the insulating layer below the first insulating layer located in the bonding area when etching the conductive structure of the bonding area, thereby preventing the insulating layer located under the first insulating layer from being located in the bonding area.
  • the portion of the defined area is recessed due to over-etching, which causes film layer separation between the insulating layer located under the first insulating layer in the binding area and the conductive structure located in the binding area. It can be seen that the light-emitting substrate provided by the embodiment of the present application can improve the film layer separation problem of the light-emitting substrate and improve the product yield of the light-emitting substrate.
  • Fig. 1 is a top view of a light-emitting substrate provided by an exemplary embodiment of the present application
  • Fig. 2 is a schematic structural view of a light-emitting substrate provided by an exemplary embodiment of the present application
  • Fig. 3 is a partial cross-sectional view of the light-emitting substrate shown in Fig. 2 cut along the section line AA;
  • Fig. 4 is a partial cross-sectional view of the light-emitting substrate shown in Fig. 2 cut along the section line BB;
  • Fig. 5 is a schematic structural view of a light-emitting substrate provided by another exemplary embodiment of the present application.
  • Fig. 6 is a schematic structural view of a light-emitting substrate provided by yet another exemplary embodiment of the present application.
  • Fig. 7 is a partial cross-sectional view of the light-emitting substrate shown in Fig. 6 cut along the section line CC;
  • Fig. 8 is a partial cross-sectional view of the light-emitting substrate shown in Fig. 6 cut along the section line DD;
  • Fig. 9 is a schematic structural view of a light-emitting substrate provided by another exemplary embodiment of the present application.
  • Fig. 10 is a partial cross-sectional view of the light-emitting substrate shown in Fig. 9 cut along the section line MM;
  • FIG. 11 is a partial cross-sectional view of the light-emitting substrate shown in FIG. 9 taken along the section line NN.
  • first, second, third, etc. may be used in this application to describe various information, the information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of the present application, first information may also be called second information, and similarly, second information may also be called first information. Depending on the context, the word “if” as used herein may be interpreted as “at” or “when” or “in response to a determination.”
  • Embodiments of the present application provide a light emitting substrate and a display device.
  • the light-emitting substrate and the display device in the embodiments of the present application will be described in detail below with reference to the accompanying drawings. In the case of no conflict, the features in the following embodiments may complement each other or be combined with each other.
  • the embodiment of the present application provides a light-emitting substrate.
  • an embodiment of the present application provides an array substrate.
  • the array substrate 100 includes a light emitting region 101 and a binding region 102 .
  • the binding area 102 is arranged on one side of the light emitting area 101, and the binding area 102 is provided with a binding terminal for binding with the FPC, and is used to electrically connect the driver chip for driving the light emitting substrate to the FPC.
  • the light-emitting area 101 is provided with a plurality of welding pads, and the welding pads are used for soldering light-emitting diodes.
  • the light-emitting substrate provided in the embodiment of the present application can be used as a display substrate, and can be further applied to a display device as a backlight unit.
  • the light-emitting area can be provided with multiple light-emitting areas, and each light-emitting area can be provided with multiple light-emitting diodes.
  • the multiple light-emitting diodes in each light-emitting area can be connected in series, and the light-emitting substrate can be controlled by partition.
  • each light-emitting diode serves as a sub-pixel.
  • the light-emitting substrate further includes a transition region 103 between the light-emitting region 101 and the binding region 102 .
  • the transition region 103 may be provided with light emitting diodes; alternatively, the transition region 103 may not be provided with light emitting diodes.
  • the light-emitting substrate includes a substrate 10, a pad 20 located on the substrate 10, a binding terminal 30 located on the substrate 10, and
  • the first insulating layer 40 is located on the side of the binding terminal 30 away from the substrate 10 .
  • the bonding pad 20 is located in the light emitting area 101
  • the binding terminal 30 is located in the binding area 102 .
  • the light emitting region 101 includes two layers of conductive structures
  • the bonding region 102 includes one layer of conductive structures.
  • the first insulating layer 40 is provided with a plurality of first openings 401 located in the bonding area 102, and the orthographic projection of each of the first openings 401 on the substrate 10 is located in one of the bonding areas.
  • Terminal 30 is in an orthographic projection on said substrate 10 .
  • the first openings 401 may correspond to the binding terminals 30 one by one, and the orthographic projection of each first opening 401 on the substrate 10 is within the orthographic projection of the corresponding binding terminal 30 on the substrate 10 .
  • the bonding area 102 includes a layer of conductive structure, that is, the pad 20 of the bonding area 102 only includes a layer of conductive film, and there is no conductive film layer below it, which can avoid When there is a conductive film layer, the pad is separated from the conductive film layer below it due to poor adhesion between the pad and the conductive film layer below it; the first insulating layer 40 is provided with a plurality of The first opening 401, and the orthographic projection of each first opening 401 on the substrate 10 is located within the orthographic projection of a binding terminal 30 on the substrate 10, then the first opening 401 will not expose the The insulating layer below the insulating layer 40 and located in the bonding region can avoid the problem of over-etching the part of the insulating layer below the first insulating layer located in the bonding region when etching the conductive structure of the bonding region, thereby avoiding the problem of over-etching in the bonding region.
  • the portion of the insulating layer below the insulating layer 40 located in the bonding region is recessed due to over-etching, which causes film layer separation between the insulating layer located below the first insulating layer 40 and the conductive structure located in the bonding region in the bonding region.
  • the light-emitting substrate provided by the embodiment of the present application can improve the film layer separation problem of the light-emitting substrate and improve the product yield of the light-emitting substrate.
  • the part of the insulating layer below the binding terminal located in the binding area 102 does not need to climb, and the part of the insulating layer located in the binding area 102 can be set to a higher Thin, it is beneficial to save the cost of the light-emitting substrate.
  • the light-emitting substrate 100 includes a first conductive layer 11 and a second conductive layer 12 located on a side of the first conductive layer 11 away from the substrate 10 . At least part of the first conductive layer 11 and the second conductive layer 12 are located in the light emitting region 101 .
  • one layer of conductive structure is located in the first conductive layer 11
  • the other layer of conductive structure is located in the second conductive layer 12 .
  • the conductive structure located in the first conductive layer means that the conductive structure is a part of the first conductive layer; the conductive structure located in the second conductive layer means that the conductive structure is a part of the second conductive layer.
  • the first conductive layer 11 located in the light emitting area 101 is generally used to arrange a plurality of signal lines 1011 , and the plurality of signal lines 1011 include, for example, common voltage signal lines, driving voltage signal lines, power signal lines, address selection signal lines and the like.
  • the thickness of the first conductive layer 11 ranges from 1.5 ⁇ m to 7 ⁇ m, and its material includes copper.
  • a laminated material such as MoNb/Cu/MoNb can be formed by sputtering, and the underlying MoNb is used to improve adhesion , the middle layer Cu is used to transmit electrical signals, and the top layer MoNb is used to prevent oxidation.
  • the first conductive layer 11 can also be formed by electroplating.
  • the seed layer MoNiTi is firstly formed to increase the grain nucleation density, and then the anti-oxidation layer MoNiTi is formed after electroplating.
  • the second conductive layer 12 located in the light emitting area 101 is used to be arranged as pads 20 and leads for connection.
  • the welding pad 20 is used to mount the light emitting diodes, and the lead wires can connect multiple light emitting diodes in the same light emitting unit in series.
  • the thickness of the second conductive layer 12 is about Its material can be, for example, a laminated material of MoNb/Cu/MoNb, the bottom layer MoNb is used to improve adhesion, the middle layer Cu is used to transmit electrical signals, and the top layer MoNb can prevent oxidation.
  • the light-emitting substrate 100 further includes a soldering flux layer 61 partially located in the first opening 401 , and the thickness of the soldering flux layer 61 is greater than that of the first opening 401 .
  • An insulating layer 40 is located at the thickness of the portion of the bonding region 102 .
  • the soldering flux layer 61 can be used to bind the bonding terminal to the FPC during rework, which can solve the problem that the solder pads cannot be soldered again, and help improve the product yield. Moreover, since the bonding region 102 includes a layer of conductive structure, and there is no other conductive film layer below the conductive structure of the bonding region 102, the stress generated by the solder flux layer 61 will not cause the conductive structure of the bonding region 102 and the layer below it to The problem of separation of conductive film layers helps to improve the product yield of light-emitting substrates.
  • the size of the binding terminal in the binding area is not affected by the alignment deviation of other conductive film layers when preparing the conductive structure of the binding area, and the binding
  • the area of the terminal is set to be larger, which helps to reduce the resistance of the signal line connected to the binding terminal, and reduce the voltage drop and generated heat of the signal line of the light-emitting substrate.
  • the thickness of the soldering flux layer 61 ranges from 3.03 ⁇ m to 5.1 ⁇ m. Such setting can avoid the thicker soldering flux layer 61 , resulting in that the soldering flux layer 61 cannot effectively solve the problem that the welding pad cannot be used for secondary soldering, and can also avoid the thicker soldering flux layer 61 and longer preparation time.
  • the process of forming the solder flux layer 61 can be as follows: firstly, a nickel layer can be formed by using a nickel chemical process, and the thickness of the nickel layer is in the range of 3 ⁇ m to 5 ⁇ m; then, a gold layer can be formed on the nickel layer by using a gold chemical process , the thickness of the gold layer ranges from 0.03 ⁇ m to 0.1 ⁇ m. Wherein, before forming the nickel layer, the MoNb material on the top of the second conductive layer 12 can be etched away to expose the Cu underneath, so as to prevent the MoNb material on the top from affecting the growth of the nickel layer and the gold layer.
  • the MoNb material on the top of the second conductive layer 12 can be avoided.
  • the part of the insulating layer below the first insulating layer 40 located in the bonding region is recessed due to over-etching, which in turn leads to the separation of the insulating layer below the first insulating layer 40 from the second conductive layer 12, which helps To improve the product yield of the light-emitting substrate.
  • the first insulating layer 40 includes an inorganic layer 41 located in the bonding region 102 .
  • the inorganic layer can block water vapor, reduce the amount of water vapor intruding into the bonding terminal 30 , and help improve the reliability of the light-emitting substrate.
  • the material of the inorganic layer 41 is, for example, silicon oxide or silicon nitride.
  • the portion of the first insulating layer 40 located in the bonding region 102 may only include inorganic layers.
  • the portion of the first insulating layer 40 located in the light-emitting region 101 is provided with third openings 402 , and the orthographic projection of each of the third openings 402 on the substrate 10 is located at one
  • the bonding pad 20 is in an orthographic projection on the substrate 10 .
  • the third openings 402 may correspond to the pads 20 one by one, and the orthographic projection of each third opening 402 on the substrate 10 is located within the orthographic projection of the corresponding pad 20 on the substrate 10 .
  • the portion of the first insulating layer 40 located in the light emitting region 101 may include an inorganic layer 41 and a first organic layer 42 located on a side of the inorganic layer 41 away from the substrate 10 .
  • the material of the first organic layer may be organic resin.
  • the pad 20 includes a first conductive structure 51
  • the binding terminal 30 includes a second conductive structure 31.
  • the first conductive structure 51 is located on the second conductive layer 12
  • the second conductive structure 31 is located on the second conductive layer 12 . That is, the first conductive layer 11 is not disposed in the bonding area 102 .
  • the time interval between the formation of the binding terminal 30 and the formation of the first insulating layer 40 is relatively short, which helps to prevent the intermediate layer Cu of the binding terminal 30 from being oxidized more severely, and ensures the effectiveness of the binding between the binding terminal 30 and the FPC. .
  • the transition region 103 is provided with a connecting wire 111 located on the first conductive layer 11, and the light emitting region 101 is provided with a signal connected to the connecting wire 111.
  • Line 1011 The second conductive layer 12 includes an overlapping portion 112 located in the transition region 103, the overlapping portion 112 is connected to the second conductive structure 31, and a portion of the overlapping portion 112 is located on the connecting trace 111 away from the One side of the substrate 10 and overlapped with the connection trace 111 .
  • the signal line 1011 of the light emitting area 101 can be electrically connected to the binding terminal 30 through the connecting line 111 and the overlapping portion 112 .
  • the overlapping portion 112 includes an inclined portion 1121, and in a direction away from the substrate 10, the inclined portion 1121 is directed from the binding region 102 to the light emitting
  • the direction of zone 101 is upwardly sloped.
  • the first insulating layer 40 covers the transition region 103 .
  • the first insulating layer 40 can block water vapor, effectively reducing the amount of water vapor intruding into the overlapping portion 112 and the connecting wiring 111 , and helping to improve the reliability of the light-emitting substrate.
  • the portion of the first insulating layer 40 located in the transition region 103 may only include the inorganic layer 41 , and the orthographic projection of the first organic layer 42 on the substrate 10 is located in a region outside the transition region 103 .
  • the light-emitting substrate 100 further includes a second insulating layer 62 located between the first conductive layer 11 and the second conductive layer 12 .
  • the second insulating layer 62 may include a single film layer, or may include multiple film layers.
  • the second insulating layer 62 includes a first inorganic layer 621, a second organic layer 622 located on the side of the first inorganic layer 621 away from the substrate 10, and a second organic layer 622 located on the side away from the substrate.
  • the second inorganic layer 623 on the bottom 10 side.
  • the second insulating layer 62 covers the bonding region 102 .
  • the part of the second insulating layer 62 located in the binding region 102 does not need to be etched, which can prevent the substrate 10 from being damaged during the etching process of the second insulating layer 62, and the second insulating layer 62 can also protect the substrate. 10. Preventing the substrate 10 from being damaged when the film layer above the substrate 10 is etched.
  • the part of the second insulating layer 62 located in the binding region 102 includes the first inorganic layer 621 and the second inorganic layer 623, that is, the positive surface of the second organic layer 622 on the substrate 10 Projecting the region outside the bonding region 102 , the part of the second organic layer 622 located in the bonding region 102 is etched away.
  • the second insulating layer 62 is provided with a second opening 601 located in the transition region 103, and the orthographic projection of the second opening 601 on the substrate 10 falls on the connection In the orthographic projection of the wiring 111 on the substrate 10 , the overlapping portion 112 is overlapped with the connecting wiring 111 through the second opening 601 .
  • the second insulating layer 62 can block water vapor, effectively reducing the amount of water vapor intruding into the overlapping parts and connecting wiring, and helping to improve the reliability of the light-emitting substrate; and setting a second opening in the second insulating layer 62 601 , does not affect the overlap between the overlapping portion 112 and the connecting trace 111 .
  • the portion of the second insulating layer 62 located in the transition region 103 includes the first inorganic layer 621 and the second inorganic layer 623, that is, the orthographic projection of the second organic layer 622 on the substrate 10 is located in the transition region 103.
  • the part of the second organic layer 622 located in the transition region 103 is etched away.
  • the second opening 601 runs through the first inorganic layer 621 and the second inorganic layer 623 .
  • the second insulating layer 62 is provided with a plurality of fourth openings 602 located in the light-emitting region 101 , and the orthographic projection of each fourth opening 602 on the substrate 10 is located on a pad 20 In the orthographic projection on the substrate 10.
  • the fourth openings 602 may correspond to the pads 20 one by one, and the orthographic projection of each fourth opening 602 on the substrate 10 is located within the orthographic projection of the corresponding pad 20 on the substrate 10 .
  • the pad 20 is electrically connected to the part of the first conductive layer 11 located in the light emitting region 101 through the fourth opening 602 .
  • the portion of the second insulating layer 62 located in the light emitting region 101 includes a first inorganic layer 621 , a second organic layer 622 and a second inorganic layer 623 .
  • the fourth opening 602 penetrates through the first inorganic layer 621 , the second organic layer 622 and the second inorganic layer 623 .
  • the array substrate further includes a passivation protection layer 63 located on the side of the substrate 10 facing the first conductive layer 11 , and the passivation protection layer 63 can be in direct contact with the substrate 10 .
  • the passivation protection layer 63 can protect the substrate 10 and prevent the substrate 10 from being damaged when the film layer above the substrate 10 is etched.
  • the material of the passivation protection layer 63 may be an inorganic material, such as silicon nitride or silicon oxide.
  • the second conductive structures 31 adjacent to the binding terminals 30 are arranged at intervals.
  • Multiple binding terminals 30 can be connected to the same bonding portion 112 .
  • each binding terminal 30 can be connected to one overlapping portion 112 respectively.
  • the light-emitting substrate further includes a plurality of signal lines 1011 located in the light-emitting area 101, and the same signal line 1011 is connected to a plurality of binding terminals 30; and Among the plurality of binding terminals 30 connected to the same signal line 1011 , the second conductive structures 31 of at least two adjacent binding terminals 30 are connected.
  • the connection of the second conductive structures 31 of adjacent binding terminals 30 may mean that there is no gap between the second conductive structures 31 of two adjacent binding terminals 30 .
  • the area of the second conductive structure 31 is not affected by the alignment deviation between the second conductive structure 31 and the first opening, and there is no need to set a gap between adjacent binding terminals Therefore, the area of the binding terminal 30 can be set larger, which helps to reduce the resistance of the signal line 1011 connected to the binding terminal 30, and helps to reduce the voltage drop and the generated heat of the signal line of the light-emitting substrate.
  • the third conductive structures 31 of the binding terminals 30 connected to the same signal line 1011 are all connected. In this way, the area of the third conductive structure 31 of each binding terminal 30 connected to the same signal line 1011 can be set larger, which can further reduce the resistance of the signal line 1011 connected to the binding terminal 30, and reduce the light emitting substrate. The voltage drop of the signal line and the heat generated.
  • the embodiment of the present application also provides another display substrate.
  • the light emitting substrate is as shown in FIGS. 6 to 8 . Only the differences between the display substrates shown in FIGS. 6 to 8 and the light emitting substrates shown in FIGS. 2 to 5 will be introduced below, and the similarities will not be repeated here.
  • the second conductive structure 31 is located on the first conductive layer 11 .
  • a protective layer covering the second conductive structure 31 can be formed first, and the protective layer can prevent the second conductive structure 31 from being oxidized during the process of forming the film layer above the first conductive layer 11 .
  • the protective layer is removed before forming the first insulating layer 40.
  • the material of the protection layer may be an inorganic material, so as to better prevent the second conductive structure 31 from being oxidized.
  • the transition region 103 is provided with a connecting wire 111 located on the first conductive layer 11
  • the light emitting region 101 is provided with the connecting wire 111 A connected signal line 1011
  • the connection trace 111 is connected to the second conductive structure 31 .
  • the connecting wiring 111 and the second conductive structure 31 are located on the same layer, and the two can be directly connected without overlapping through an overlapping portion, which helps to simplify the structural complexity of the light emitting structure.
  • the orthographic projection of the second insulating layer 62 on the substrate 10 is located outside the bonding region 102 .
  • the second conductive structure 31 will not be covered by the second insulating layer 62, which can ensure that the second conductive structure 31 is exposed through the first opening 401;
  • the fixed area does not require climbing, and the thickness of the second insulating layer 62 can be set to be small, reducing the cost of the light-emitting substrate.
  • the second insulating layer 62 covers the transition region 103 .
  • the part of the second insulating layer 62 located in the transition region 103 can block water vapor, further preventing water vapor from intruding into the connection traces 111 of the transition region 103 , and further helping to improve the reliability of the light-emitting substrate.
  • the embodiment of the present application also provides a method for preparing a light-emitting substrate.
  • the preparation method of the light-emitting substrate will be introduced below.
  • the embodiment of the present application only uses the light-emitting substrate shown in FIG. 2 to FIG. 4 as an example for introduction.
  • the "patterning process" mentioned in the embodiment of the present application includes deposition of film layer, coating of photoresist, mask exposure, development, etching and stripping of photoresist. Any one or more selected from sputtering, vapor deposition and chemical vapor deposition can be used for deposition, and any one or more selected from dry etching and wet etching can be used for etching.
  • “Film” refers to a layer of film produced by depositing or coating a certain material on a substrate. If the “thin film” does not require a patterning process during the entire manufacturing process, the “thin film” can also be called a “layer”. If the “thin film” still requires a patterning process during the entire production process, it is called a “film” before the patterning process, and it can be called a “layer” after the patterning process. The “layer” after the patterning process contains at least one "pattern”.
  • the preparation method of the light-emitting substrate includes the following processes:
  • a substrate 10 is provided.
  • a passivation protection layer 63 is deposited on the substrate.
  • a first conductive film is deposited on the passivation protection layer 63, and the first conductive film is patterned by a patterning process to obtain the first conductive layer 11, and the signal line 1011 located in the light emitting area 101 and the connecting wiring located in the transition area 103 are obtained. 111.
  • a second organic thin film is deposited, and the second organic thin film is patterned by a patterning process to obtain a second organic layer 622.
  • the second organic layer 622 is located in the light emitting region 101, and the second organic layer 622 is formed with a first sub-layer located in the light emitting region 101. hole.
  • the second inorganic thin film is deposited, and the first inorganic thin film and the second inorganic thin film are patterned simultaneously by using the same mask to obtain the first inorganic layer 621 and the second inorganic layer 623, and the first inorganic layer 621 and the second inorganic layer 622 is located in the light emitting region 101, the binding region 102 and the transition region 103, and the first inorganic layer 621 and the second inorganic layer 622 are formed with the second opening 601 located in the transition region 103 and the second sub-opening located in the light emitting region; Each first sub-opening is opposite to a second sub-opening to form a fourth opening 602 .
  • the second conductive film is deposited, and the second conductive film is patterned by a patterning process to obtain the second conductive layer 12, forming the pad 20 located in the light emitting area 101, the binding terminal 30 located in the binding area 102, and the bonding terminal 30 located in the transition area. 103 of the overlapping portion 112 .
  • the second inorganic thin film is deposited, and the second inorganic thin film is patterned by a patterning process to obtain an inorganic layer 41.
  • the inorganic layer 41 is located in the light-emitting region 101, the binding region 102, and the transition region 103.
  • the inorganic layer 41 is formed with a The third sub-opening and the first opening 401 located in the binding area 102 .
  • the first organic thin film is deposited, and the first organic thin film is patterned by a patterning process to obtain the first organic layer 42.
  • the first organic layer 42 is located in the light emitting region 101, and the first organic layer 42 is formed with a fourth layer located in the light emitting region 101.
  • Each third sub-opening is opposite to a fourth sub-opening, forming a third opening 402 .
  • the embodiment of the present application also provides another light-emitting substrate.
  • the light-emitting substrate is as shown in FIGS. 9 to 11 . Only the differences between the display substrates shown in FIGS. 9 to 11 and the light emitting substrates shown in FIGS. 2 to 5 will be introduced below, and the similarities will not be repeated here.
  • the binding area 102 of the light-emitting substrate 100 includes two layers of conductive structures, which are the part of the first conductive layer 11 located in the binding area 102 and the part of the second conductive layer 12 located in the binding area 102. part, the second conductive structure 31 of the binding terminal 30 is located on the second conductive layer 12 .
  • the same signal line 1011 is connected to multiple binding terminals 30; among the multiple binding terminals 30 connected to the same signal line 1011, the second conductors of at least two adjacent binding terminals 30 Structure 31 is connected.
  • the connection of the second conductive structures 31 of adjacent binding terminals 30 may mean that there is no gap between the second conductive structures 31 of two adjacent binding terminals 30 .
  • Such setting can increase the area of the binding terminal 30, so that the contact area between the part of the second conductive layer 12 located in the binding area 102 and the first conductive layer 11 increases, thereby improving the connection between the first conductive layer 11 and the second conductive layer. 12, improve the problem that the second conductive structure 31 of the binding terminal 30 is easily separated from the second conductive layer 12; and the area of the binding terminal 30 increases, which helps to reduce the signal connected to the binding terminal 30
  • the resistance of the wire 1011 helps to reduce the voltage drop and heat generated on the signal wire of the light-emitting substrate.
  • the third conductive structures 31 of the binding terminals 30 connected to the same signal line 1011 are all connected.
  • the area of the third conductive structure 31 of each binding terminal 30 connected to the same signal line 1011 can be set larger, which can further increase the connection between the part of the second conductive layer 12 located in the bonding area 102 and the first conductive layer 12.
  • the adhesion between the layers 11 can further reduce the resistance of the signal line 1011 connected to the binding terminal 30 , and reduce the voltage drop and generated heat of the signal line of the light-emitting substrate.
  • the second conductive structure 31 of each binding terminal 30 connected to the same signal line 1011 is connected to form the second sub-conductive part 121, and the part of the first conductive layer 11 located in the binding area 102 includes
  • the orthographic projection of each first sub-conductive part 113 on the substrate 10 may substantially coincide with the orthographic projection of one second sub-conductive part 121 on the substrate 10 . In this way, the portion of the first conductive layer 11 located in the bonding area 102 will not cause signal interference to adjacent signal lines 1011 .
  • the orthographic projection of the second insulating layer 62 on the substrate 10 is located outside the bonding region 102, that is, the part of the second insulating layer 62 located in the bonding region 102 is engraved etched away. In this way, the second insulating layer 62 does not need to climb in the binding region 102 , which can reduce the thickness of the second insulating layer 62 and reduce the cost of the light-emitting substrate.
  • the transition area 103 is provided with a connection line 111 located on the first conductive layer 11, and the light emitting area 101 is provided with a signal line 1011 connected to the connection line 111; the connection line 111 is connected to the first sub-conductive portion 113 .
  • the connecting wiring 111 and the first sub-conductive portion 113 are located on the same layer, and the two can be directly connected without overlapping through an overlapping portion, which helps to simplify the structural complexity of the light emitting structure.
  • the second insulating layer 62 covers the transition region 103 .
  • the second insulating layer 62 helps to block the intrusion of water vapor into the connecting wires 111 , which can improve the reliability of the light-emitting substrate.
  • the embodiment of the present application also provides a method for preparing a light-emitting substrate, which is used to prepare the light-emitting substrate as shown in FIGS. 9 to 11 .
  • the preparation method of the light-emitting substrate includes the following processes:
  • a substrate 10 is provided.
  • a passivation protection layer 63 is deposited on the substrate.
  • the first conductive film is deposited on the passivation protection layer 63, and the first conductive film is patterned by a patterning process to obtain the first conductive layer 11, and the signal line 1011 located in the light emitting area and the first sub-wire located in the bonding area 102 are obtained.
  • a second organic thin film is deposited, and the second organic thin film is patterned by a patterning process to obtain a second organic layer 622.
  • the second organic layer 622 is located in the light emitting region 101, and the first organic layer located in the light emitting region 101 is formed on the second organic layer 622. through hole.
  • the second inorganic film is deposited, and the same mask plate is used to pattern the first inorganic film and the second inorganic film simultaneously to obtain the first inorganic layer 621 and the second inorganic layer 623; the first inorganic layer 621 and the second inorganic layer 623 is located in the transition region 103 and the light emitting region 101 , and a second through hole is formed on the first inorganic layer 621 and the second inorganic layer 623 , and the second through hole is opposite to the first through hole to form a fourth opening 602 .
  • the second conductive film is deposited, and the second conductive film is patterned by a patterning process to obtain the second conductive layer 12 , the bonding pad 20 located in the light-emitting area 101 , and the binding terminal 30 located in the binding area 102 .
  • the second inorganic thin film is deposited, and the second inorganic thin film is patterned by a patterning process to obtain an inorganic layer 41.
  • the inorganic layer 41 is located in the light-emitting region 101, the binding region 102, and the transition region 103.
  • the inorganic layer 41 is formed with a The third through hole and the first opening 401 located in the bonding area 102 .
  • the first organic thin film is deposited, and the first organic thin film is patterned by a patterning process to obtain the first organic layer 42;
  • the through hole, the third through hole and the fourth through hole form a third opening 402 .
  • Embodiments of the present application further provide a display device, the display device comprising the light-emitting substrate described in any one of the above-mentioned embodiments. Since the display device includes the above-mentioned light-emitting substrate, it has the same beneficial effects, and the present application will not repeat them here.
  • the display device may be a liquid crystal display device, which includes a liquid crystal panel and a backlight disposed on a non-display side of the liquid crystal panel, and the backlight includes the light-emitting substrate described in any one of the preceding embodiments.
  • the liquid crystal display device can have more uniform backlight brightness and better display contrast.
  • the array substrate in the display device is used as a display substrate.
  • each inorganic light-emitting diode serves as a sub-pixel.
  • This application does not specifically limit the application of display devices, which can be TVs, notebook computers, tablet computers, wearable display devices, mobile phones, vehicle displays, navigation, e-books, digital photo frames, advertising light boxes, etc. product or part.

Abstract

一种发光基板及显示装置，发光基板包括绑定区（102）和发光区（101）；发光基板包括衬底（10）、位于衬底（10）上且位于发光区（101）的焊盘（20）、位于衬底（10）上且位于绑定区（102）的绑定端子（30）及位于绑定端子（30）背离衬底（10）一侧的第一绝缘层（40）；发光区（101）包括两层导电结构，绑定区（102）包括一层导电结构；第一绝缘层（40）设有位于绑定区（102）的多个第一开孔（401），每一第一开孔（401）在衬底（10）上的正投影位于一个绑定端子（30）在衬底（10）上的正投影内，显示装置包括发光基板。由此可改善发光基板的膜层分离问题，提升发光基板的产品良率。

Description

发光基板及显示装置 技术领域
本申请涉及显示技术领域，特别涉及一种发光基板及显示装置。
背景技术
Mini-LED是在小间距LED基础上衍生出来的一种新型LED显示技术，也被称为亚毫米发光二极管。它的晶粒尺寸大约在100μm到300μm间，即介于传统LED和Micro LED之间。由于其具有较好的显示效果以及轻薄体验，同时具有较高的对比度、寿命长等优势，因此在显示领域使用趋势明显。
现有的Mini-LED基板的绑定区存在膜层容易剥离的问题，影响产品的良率。
发明内容
本申请提供了一种发光基板及显示装置。
根据本申请实施例的第一方面，提供了一种发光基板。所述发光基板包括绑定区和发光区；所述发光基板包括：
衬底；
位于所述衬底上且位于所述发光区的焊盘，所述发光区包括两层导电结构；
位于所述衬底上且位于所述绑定区的绑定端子，所述绑定区包括一层导电结构；
位于所述绑定端子背离所述衬底一侧的第一绝缘层，所述第一绝缘层设有位于所述绑定区的多个第一开孔，每一所述第一开孔在所述衬底上的正投影位于一个所述绑定端子在所述衬底上的正投影内。
在一个实施例中，所述发光基板还包括部分位于所述第一开孔内的助 焊层，所述助焊层的厚度大于所述第一绝缘层位于所述绑定区的部分的厚度。
在一个实施例中，所述第一绝缘层包括位于所述绑定区的无机层。
在一个实施例中，所述发光基板包括第一导电层及位于所述第一导电层背离所述衬底一侧的第二导电层；所述焊盘包括第一导电结构，所述绑定端子包括第二导电结构；
所述第一导电结构位于所述第二导电层，所述第二导电结构位于所述第二导电层。
在一个实施例中，所述发光基板还包括位于所述绑定区与所述发光区之间的过渡区，所述过渡区设有位于所述第一导电层的连接走线，所述发光区设有与所述连接走线相连的信号线；
所述第二导电层包括位于过渡区的搭接部，所述搭接部与所述第二导电结构相连，所述搭接部部分位于所述连接走线背离所述衬底的一侧且与所述连接走线搭接。
在一个实施例中，所述第一绝缘层覆盖所述过渡区。
在一个实施例中，所述搭接部包括倾斜部，在背离所述衬底的方向上，所述倾斜部由所述绑定区指向所述发光区的方向向上倾斜。
在一个实施例中，所述发光基板还包括位于所述第一导电层与所述第二导电层之间的第二绝缘层，所述第二绝缘层设有位于所述过渡区的第二开孔，所述第二开孔在所述衬底上的正投影落在所述连接走线在所述衬底上的正投影内，所述搭接部通过所述第二开孔与所述连接走线搭接。
在一个实施例中，所述发光基板还包括位于所述第一导电层与所述第二导电层之间的第二绝缘层，所述第二绝缘层覆盖所述绑定区。
在一个实施例中，所述发光基板包括第一导电层及位于所述第一导电层背离所述衬底一侧的第二导电层，所述焊盘包括第一导电结构，所述绑定端子包括第二导电结构；
所述第一导电结构位于所述第二导电层，所述第二导电结构位于所述 第一导电层。
在一个实施例中，所述发光基板还包括位于所述绑定区与所述发光区之间的过渡区，所述过渡区设有位于所述第一导电层的连接走线，所述发光区设有与所述连接走线相连的信号线；
所述连接走线与所述第二导电结构相连。
在一个实施例中，所述发光基板还包括位于所述第一导电层与所述第二导电层之间的第二绝缘层，所述第二绝缘层在所述衬底上的正投影位于所述绑定区之外的区域。
在一个实施例中，所述绑定端子包括第二导电结构，相邻所述绑定端子的第二导电结构间隔设置。
在一个实施例中，所述绑定端子包括第二导电结构，所述发光基板还包括位于所述发光区的多条信号线，同一所述信号线与多个所述绑定端子相连；与同一所述信号线相连的多个绑定端子中，至少两个相邻的所述绑定端子的第三导电结构相连。
在一个实施例中，与同一所述信号线相连的各绑定端子的第三导电结构均相连。
根据本申请实施例的第二方面，提供了一种显示装置，所述显示装置包括上述的发光基板。
本申请实施例提供的发光基板及显示装置，绑定区包括一层导电结构，也即是绑定区的焊盘仅包括一层导电膜层，其下方无导电膜层，可避免焊盘下方存在导电膜层时，由于焊盘与其下方的导电膜层之间的附着力差而导致焊盘与其下方的导电膜层分离的情况；第一绝缘层设有位于绑定区的多个第一开孔，且每一第一开孔在衬底上的正投影位于一个绑定端子在衬底上的正投影内，则第一开孔不会暴露位于第一绝缘层下方且位于绑定区的绝缘层，可避免刻蚀绑定区的导电结构时使得第一绝缘层下方的绝缘层位于绑定区的部分出现过刻的问题，进而可避免位于第一绝缘层下方的绝缘层位于绑定区的部分由于过刻形成凹陷，而引起绑定区内的位于第一绝 缘层下方的绝缘层与位于绑定区的导电结构出现膜层分离的情况。可知，本申请实施例提供的发光基板，可改善发光基板的膜层分离问题，提升发光基板的产品良率。
附图说明
图1是本申请一示例性实施例提供的发光基板的俯视图；
图2是本申请一示例性实施例提供的发光基板的结构示意图；
图3是图2所示的发光基板沿剖面线AA剖开的一种局部剖视图；
图4是图2所示的发光基板沿剖面线BB剖开的一种局部剖视图；
图5是本申请另一示例性实施例提供的发光基板的结构示意图；
图6是本申请再一示例性实施例提供的发光基板的结构示意图；
图7是图6所示的发光基板沿剖面线CC剖开的一种局部剖视图；
图8是图6所示的发光基板沿剖面线DD剖开的一种局部剖视图；
图9是本申请又一示例性实施例提供的发光基板的结构示意图；
图10是图9所示的发光基板沿剖面线MM剖开的一种局部剖视图；
图11是图9所示的发光基板沿剖面线NN剖开的一种局部剖视图。
具体实施方式
这里将详细地对示例性实施例进行说明，其示例表示在附图中。下面的描述涉及附图时，除非另有表示，不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施例并不代表与本申请相一致的所有实施例。相反，它们仅是与如所附权利要求书中所详述的、本申请的一些方面相一致的装置和方法的例子。
在本申请使用的术语是仅仅出于描述特定实施例的目的，而非旨在限制本申请。在本申请和所附权利要求书中所使用的单数形式的“一种”、“所述”和“该”也旨在包括多数形式，除非上下文清楚地表示其他含义。还应当理解，本文中使用的术语“和/或”是指并包含一个或多个相关联的列出项目 的任何或所有可能组合。
应当理解，尽管在本申请可能采用术语第一、第二、第三等来描述各种信息，但这些信息不应限于这些术语。这些术语仅用来将同一类型的信息彼此区分开。例如，在不脱离本申请范围的情况下，第一信息也可以被称为第二信息，类似地，第二信息也可以被称为第一信息。取决于语境，如在此所使用的词语“如果”可以被解释成为“在……时”或“当……时”或“响应于确定”。
本申请实施例提供了一种发光基板及显示装置。下面结合附图，对本申请实施例中的发光基板及显示装置进行详细说明。在不冲突的情况下，下述的实施例中的特征可以相互补充或相互组合。
本申请实施例提供了一种发光基板。如图1所示，本申请实施例提供一种阵列基板。参见图1，所述阵列基板100包括发光区101及绑定区102。绑定区102设置在发光区101的一侧，绑定区102设有用于与FPC绑定的绑定端子，用于驱动发光基板的驱动芯片与FPC电连接。所述发光区101设有多个焊盘，焊盘用于焊接发光二极管。
本申请实施例提供的发光基板既可以作为显示基板使用，也可以进一步作为背光单元应用到显示装置中。发光基板作为背光单元使用时，发光区可设有多个发光区域，每一发光区域设多个发光二极管，每一发光区域内的多个发光二极管可串联连接，发光基板可以分区进行调控。发光基板作为显示基板使用时，每一发光二极管作为一个子像素。
在一个实施例中，如图1所示，所述发光基板还包括位于发光区101与绑定区102之间的过渡区103。过渡区103可设有发光二极管；或者，过渡区103可不设发光二极管。
在一个实施例中，如图2至图4所示，所述发光基板包括衬底10、位于所述衬底10上的焊盘20、位于所述衬底10上的绑定端子30、以及位于所述绑定端子30背离所述衬底10一侧的第一绝缘层40。所述焊盘20位于所述发光区101，所述绑定端子30位于所述绑定区102。所述发光区101 包括两层导电结构，所述绑定区102包括一层导电结构。所述第一绝缘层40设有位于所述绑定区102的多个第一开孔401，每一所述第一开孔401在所述衬底10上的正投影位于一个所述绑定端子30在所述衬底10上的正投影内。所述第一开孔401与所述绑定端子30可一一对应，各第一开孔401在衬底10上的正投影位于对应的绑定端子30在衬底10上的正投影内。
本申请实施例提供的发光基板，绑定区102包括一层导电结构，也即是绑定区102的焊盘20仅包括一层导电膜层，其下方无导电膜层，可避免焊盘下方存在导电膜层时，由于焊盘与其下方的导电膜层之间的附着力差而导致焊盘与其下方的导电膜层分离的情况；第一绝缘层40设有位于绑定区102的多个第一开孔401，且每一第一开孔401在衬底10上的正投影位于一个绑定端子30在衬底10上的正投影内，则第一开孔401不会暴露位于第一绝缘层40下方且位于绑定区的绝缘层，可避免刻蚀绑定区的导电结构时使得第一绝缘层下方的绝缘层位于绑定区的部分出现过刻的问题，进而可避免位于第一绝缘层40下方的绝缘层位于绑定区的部分由于过刻形成凹陷，而引起绑定区内的位于第一绝缘层40下方的绝缘层与位于绑定区的导电结构出现膜层分离的情况。可知，本申请实施例提供的发光基板，可改善发光基板的膜层分离问题，提升发光基板的产品良率。并且绑定区102的导电结构下方无其他导电膜层，则绑定端子下方的绝缘层位于绑定区102的部分不需要爬坡，可将该绝缘层位于绑定区102的部分设置得较薄，有利于节约发光基板的成本。
在一个实施例中，如图2及图3所示，所述发光基板100包括第一导电层11及位于所述第一导电层11背离所述衬底10一侧的第二导电层12。所述第一导电层11及所述第二导电层12的至少部分位于所述发光区101。所述发光区101的两层导电结构中，其中一层导电结构位于第一导电层11，另一层导电结构位于第二导电层12。导电结构位于第一导电层指的是，导电结构为第一导电层的一部分；导电结构位于第二导电层指的是，导电结构为第二导电层的一部分。
位于发光区101的第一导电层11通常用于布置多条信号线1011，多条信号线1011例如包括公共电压信号线、驱动电压信号线、电源信号线、选址信号线等。可选的，第一导电层11的厚度范围为1.5μm～7μm，其材料包括铜，例如可以通过溅射的方式形成例如MoNb/Cu/MoNb的叠层材料，底层MoNb用于提高粘附力，中间层Cu用于传递电信号，顶层MoNb用于防氧化。第一导电层11也可以通过电镀的方式形成，先形成种子层MoNiTi提高晶粒成核密度，电镀后再制作防氧化层MoNiTi。
位于发光区101的第二导电层12用于布置为焊盘20及起连接作用的引线。焊盘20用于安装发光二极管，引线可将同一发光单元中的多个发光二极管串联的导线。可选的，第二导电层12的厚度约为
Figure PCTCN2022078233-appb-000001
其材料可以为例如MoNb/Cu/MoNb的叠层材料，底层MoNb用于提高粘附力，中间层Cu用于传递电信号，顶层MoNb可防氧化。
在一个实施例中，如图3及图4所示，所述发光基板100还包括部分位于所述第一开孔401内的助焊层61，所述助焊层61的厚度大于所述第一绝缘层40位于所述绑定区102的部分的厚度。在绑定端子与FPC绑定时，绑定端子与FPC上的焊料焊接时会消耗绑定端子的导电材料，若绑定端子与FPC出现焊接不良的情况时，需要进行返工，但此时绑定端子的导电材料已大部分甚至全部被消耗掉，无法进行二次焊接。通过设置助焊层61，助焊层61可用于在返工时将绑定端子与FPC绑定，可解决焊垫无法进行二次焊接的问题，有助于提升产品良率。并且，由于绑定区102包括一层导电结构，绑定区102的导电结构下方无其他导电膜层，则不会出现由于助焊层61产生的应力导致绑定区102的导电结构与其下方的导电膜层分离的问题，有助于提升发光基板的产品良率。并且由于绑定区102的导电结构下方无其他导电膜层，在制备绑定区的导电结构时绑定区的绑定端子的尺寸不受其他导电膜层的对位偏差影响，可将绑定端子的面积设置得较大，有助于减小与绑定端子相连的信号线的电阻，减小发光基板的信号线的压降及产生的热量。
在一个实施例中，所述助焊层61的厚度范围为3.03μm～5.1μm。如此设置，可避免助焊层61的厚度较大，导致助焊层61不能有效解决焊垫无法进行二次焊接的问题，也可避免助焊层61的厚度较大，制备时间较长。
在一个实施例中，形成助焊层61的工艺过程可如下：可先采用化镍工艺形成镍层，镍层的厚度范围为3μm～5μm；之后采用化金工艺在在镍层上形成金层，金层的厚度范围为0.03μm～0.1μm。其中，在形成镍层之前，可先将第二导电层12顶部的MoNb材料刻蚀掉，以露出其下方的Cu，以防止顶部的MoNb材料影响镍层和金层的生长。本申请实施例中通过设置每一第一开孔401在衬底10上的正投影位于一个绑定端子30在衬底10上的正投影内，可避免对第二导电层12顶部的MoNb材料刻蚀时导致第一绝缘层40下方的绝缘层位于绑定区的部分由于过刻形成凹陷，进而导致位于第一绝缘层40下方的绝缘层与第二导电层12发生分离的问题，有助于提升发光基板的产品良率。
在一个实施例中，所述第一绝缘层40包括位于所述绑定区102的无机层41。如此设置，无机层可阻挡水汽，减小水汽入侵至绑定端子30的量，有助于提升发光基板的信赖性。无机层41的材料例如为氧化硅或氮化硅。
在一些实施例中，所述第一绝缘层40位于所述绑定区102的部分可仅包括无机层。
在一个实施例中，所述第一绝缘层40位于所述发光区101的部分设有第三开孔402，每一所述第三开孔402在所述衬底10上的正投影位于一个所述焊盘20在所述衬底10上的正投影内。所述第三开孔402与所述焊盘20可一一对应，各第三开孔402在衬底10上的正投影位于对应的焊盘20在衬底10上的正投影内。
在一些实施例中，所述第一绝缘层40位于所述发光区101的部分可包括无机层41及位于无机层41背离所述衬底10一侧的第一有机层42。第一有机层的材料可为有机树脂。
在一个实施例中，所述焊盘20包括第一导电结构51，所述绑定端子 30包括第二导电结构31。所述第一导电结构51位于所述第二导电层12，所述第二导电结构31位于所述第二导电层12。也即是，所述第一导电层11未设置在绑定区102。如此设置，形成绑定端子30与形成第一绝缘层40的时间间隔较短，有助于避免绑定端子30的中间层Cu被氧化较严重，保证绑定端子30与FPC绑定的有效性。
在一个实施例中，如图4所示，所述过渡区103设有位于所述第一导电层11的连接走线111，所述发光区101设有与所述连接走线111相连的信号线1011。所述第二导电层12包括位于过渡区103的搭接部112，所述搭接部112与所述第二导电结构31相连，所述搭接部112部分位于所述连接走线111背离所述衬底10的一侧且与所述连接走线111搭接。如此设置，所述发光区101的信号线1011可通过连接走线111和搭接部112与绑定端子30电连接。
在一个实施例中，如图4所示，所述搭接部112包括倾斜部1121，在背离所述衬底10的方向上，所述倾斜部1121由所述绑定区102指向所述发光区101的方向向上倾斜。通过设置倾斜部1121由绑定区102指向发光区101的方向向上倾斜，有助于避免搭接部112在爬坡过程中发生断裂。
在一个实施例中，所述第一绝缘层40覆盖所述过渡区103。如此设置，第一绝缘层40可阻挡水汽，有效减小水汽入侵至搭接部112及连接走线111的量，有助于提升发光基板的信赖性。
在一个实施例中，所述第一绝缘层40位于所述过渡区103的部分可仅包括无机层41，第一有机层42在衬底10上的正投影位于过渡区103之外的区域。
在一个实施例中，如图3及图4所示，所述发光基板100还包括位于所述第一导电层11与所述第二导电层12之间的第二绝缘层62。
在一个实施中，所述第二绝缘层62可包括单层膜层，也可包括多层膜层。例如如图3及图4所示，第二绝缘层62包括第一无机层621、位于第一无机层621背离衬底10一侧的第二有机层622、以及位于第二有机层622 背离衬底10一侧的第二无机层623。
在一个实施例中，所述第二绝缘层62覆盖所述绑定区102。如此设置，第二绝缘层62位于绑定区102的部分不需要进行刻蚀，可防止对第二绝缘层62刻蚀的过程中损伤衬底10，也第二绝缘层62也可保护衬底10，防止对衬底10上方的膜层进行刻蚀时损伤衬底10。
在一个实施例中，所述第二绝缘层62位于所述绑定区102的部分包括第一无机层621和第二无机层623，也即是第二有机层622在衬底10上的正投影位于绑定区102之外的区域，第二有机层622位于绑定区102的部分被刻蚀掉。
在一个实施例中，所述第二绝缘层62设有位于所述过渡区103的第二开孔601，所述第二开孔601在所述衬底10上的正投影落在所述连接走线111在所述衬底10上的正投影内，所述搭接部112通过所述第二开孔601与所述连接走线111搭接。如此设置，第二绝缘层62可阻挡水汽，有效减小水汽入侵至搭接部及连接走线的量，有助于提升发光基板的信赖性；并且在第二绝缘层62设置第二开孔601，不影响搭接部112与连接走线111的搭接。
在一个实施例中，所述第二绝缘层62位于过渡区103的部分包括第一无机层621和第二无机层623，也即是第二有机层622在衬底10上的正投影位于过渡区103之外的区域，第二有机层622位于过渡区103的部分被刻蚀掉。第二开孔601贯穿第一无机层621和第二无机层623。
在一个实施例中，所述第二绝缘层62设有多个位于所述发光区101的第四开孔602，每一第四开孔602在衬底10上的正投影位于一个焊盘20在衬底10上的正投影内。所述第四开孔602与焊盘20可一一对应，各第四开孔602在衬底10上的正投影位于对应的焊盘20在衬底10上的正投影内。所述焊盘20通过第四开孔602与第一导电层11位于发光区101的部分电连接。
在一个实施例中，所述第二绝缘层62位于所述发光区101的部分包括 第一无机层621、第二有机层622及第二无机层623。第四开孔602贯穿第一无机层621、第二有机层622及第二无机层623。
在一个实施例中，所述阵列基板还包括位于所述衬底10朝向第一导电层11一侧的钝化保护层63，钝化保护层63可与衬底10直接接触。钝化保护层63可保护衬底10，防止在对衬底10上方的膜层进行刻蚀时损伤衬底10。钝化保护层63的材料可以是无机材料，例如为氮化硅或氧化硅。
在一个实施例中，如图2及图3所示，相邻所述绑定端子30的第二导电结构31间隔设置。多个绑定端子30可与同一搭接部112相连。或者，每一绑定端子30可分别与一个搭接部112相连。
在另一实施例中，如图5所示，所述发光基板还包括位于所述发光区101的多条信号线1011，同一所述信号线1011与多个所述绑定端子30相连；与同一所述信号线1011相连的多个绑定端子30中，至少两个相邻的所述绑定端子30的第二导电结构31相连。其中相邻的绑定端子30的第二导电结构31相连可以是指相邻两个绑定端子30的第二导电结构31之间不设间隙。如此设置，在形成绑定端子的第二导电结构31时，第二导电结构31的面积不受其与第一开孔的对位偏差的影响，且相邻绑定端子之间不需设置间隙，可将绑定端子30的面积设置得较大，有助于减小与绑定端子30相连的信号线1011的电阻，有助于降低发光基板的信号线的压降及产生的热量。
在一个实施例中，与同一所述信号线1011相连的各绑定端子30的第三导电结构31均相连。如此设置，与同一信号线1011相连的各绑定端子30的第三导电结构31的面积均可设置得更大，可进一步减小与绑定端子30相连的信号线1011的电阻，降低发光基板的信号线的压降及产生的热量。
在本申请实施例还提供了另一种显示基板。在该实施例中，发光基板如图6至图8所示。下面仅介绍图6至图8所示的显示基板与图2至图5所示的发光基板的不同之处，相同之处不再进行赘述。
在该实施例中，如图6至图8所示，所述第二导电结构31位于所述第一导电层11。在形成第一导电层11之后，可先形成覆盖第二导电结构31的保护层，保护层可防止在形成位于第一导电层11上方的膜层的过程中第二导电结构31被氧化。在形成第一绝缘层40之前，将保护层去除。保护层的材料可以是无机材料，以更好地避免第二导电结构31被氧化。
在一个实施例中，如图6及图8所示，所述过渡区103设有位于所述第一导电层11的连接走线111，所述发光区101设有与所述连接走线111相连的信号线1011；所述连接走线111与所述第二导电结构31相连。如此设置，连接走线111与第二导电结构31位于同一层，二者可直接相连，不需要通过搭接部来实现搭接，有助于简化发光结构的结构复杂度。
在一个实施例中，如图7及图8所示，所述第二绝缘层62在所述衬底10上的正投影位于所述绑定区102之外的区域。第二导电结构31不会被第二绝缘层62覆盖，可保证第二导电结构31通过第一开孔401露出；并且绑定区102未设置第二绝缘层62，第二绝缘层62在绑定区不需要爬坡，可将第二绝缘层62的厚度设置得较小，降低发光基板的成本。
在一个实施例中，如图8所示，所述第二绝缘层62覆盖所述过渡区103。如此第二绝缘层62位于过渡区103的部分可起到阻挡水汽的作用，进一步防止水汽入侵至过渡区103的连接走线111，更有助于提升发光基板的可靠性。
本申请实施例还提供了一种发光基板的制备方法。下面将对发光基板的制备方法进行介绍。本申请实施例仅以图2至图4所示的发光基板为例进行介绍。本申请实施例所说的“构图工艺”包括沉积膜层、涂覆光刻胶、掩模曝光、显影、刻蚀和剥离光刻胶等处理。沉积可以采用选自溅射、蒸镀和化学气相沉积中的任意一种或多种，刻蚀可以采用选自干刻和湿刻中的任意一种或多种。“薄膜”是指将某一种材料在基底上利用沉积或涂覆工艺制作出的一层薄膜。若在整个制作过程当中该“薄膜”无需构图工艺，则该“薄膜”还可以称为“层”。当在整个制作过程当中该“薄膜”还需构图工艺， 则在构图工艺前称为“薄膜”，构图工艺后可称为“层”。经过构图工艺后的“层”中包含至少一个“图案”。
所述发光基板的制备方法包括如下过程：
首先，提供衬底10。
随后，在衬底上沉积钝化保护层63。
随后，在钝化保护层63上沉积第一导电薄膜，通过构图工艺对第一导电薄膜进行构图得到第一导电层11，得到位于发光区101的信号线1011以及位于过渡区103的连接走线111。
随后，沉积第一无机薄膜。
随后，沉积第二有机薄膜，通过构图工艺对第二有机薄膜进行构图得到第二有机层622，第二有机层622位于发光区101，第二有机层622形成有位于发光区101的第一子开孔。
随后，沉积第二无机薄膜，采用同一掩膜版对第一无机薄膜和第二无机薄膜同时进行构图，得到第一无机层621和第二无机层623，第一无机层621和第二无机层622位于发光区101、绑定区102和过渡区103，第一无机层621和第二无机层622形成有位于过渡区103的第二开孔601、以及位于发光区的第二子开孔；每一第一子开孔和一个第二子开孔相对，形成第四开孔602。
随后，沉积第二导电薄膜，通过构图工艺对第二导电薄膜进行构图，得到第二导电层12，形成位于发光区101的焊盘20、位于绑定区102的绑定端子30及位于过渡区103的搭接部112。
随后，沉积第二无机薄膜，采用构图工艺对第二无机薄膜进行构图，得到无机层41，无机层41位于发光区101、绑定区102及过渡区103，无机层41形成有位于发光区101的第三子开孔、以及位于绑定区102的第一开孔401。
随后，沉积第一有机薄膜，采用构图工艺对第一有机薄膜进行构图，得到第一有机层42，第一有机层42位于发光区101，第一有机层42形成 有位于发光区101的第四子开孔，每一第三子开孔与一个第四子开孔相对，形成第三开孔402。
本申请实施例还提供了又一种发光基板。在该实施例中，发光基板如图9至图11所示。下面仅介绍图9至图11所示的显示基板与图2至图5所示的发光基板的不同之处，相同之处不再进行赘述。
如图9至图11所示，所述发光基板100的绑定区102包括两层导电结构，分别为第一导电层11位于绑定区102的部分和第二导电层12位于绑定区102的部分，所述绑定端子30的第二导电结构31位于第二导电层12。同一所述信号线1011与多个所述绑定端子30相连；与同一所述信号线1011相连的多个绑定端子30中，至少两个相邻的所述绑定端子30的第二导电结构31相连。其中相邻的绑定端子30的第二导电结构31相连可以是指相邻两个绑定端子30的第二导电结构31之间不设间隙。如此设置，可增大绑定端子30的面积，使第二导电层12位于绑定区102的部分与第一导电层11的接触面积增大，从而提升第一导电层11与第二导电层12的附着力，改善绑定端子30的第二导电结构31与第二导电层12易于分离的问题；并且绑定端子30的面积增大，有助于减小与绑定端子30相连的信号线1011的电阻，有助于降低发光基板的信号线的压降及产生的热量。
在一个实施例中，与同一所述信号线1011相连的各绑定端子30的第三导电结构31均相连。如此设置，与同一信号线1011相连的各绑定端子30的第三导电结构31的面积均可设置得更大，可进一步增大第二导电层12位于绑定区102的部分与第一导电层11之间的附着力，且可进一步减小与绑定端子30相连的信号线1011的电阻，降低发光基板的信号线的压降及产生的热量。
在一个实施例中，与同一信号线1011相连的各绑定端子30的第二导电结构31相连形成第二子导电部121，所述第一导电层11位于所述绑定区102的部分包括多个第一子导电部113，每一第一子导电部113在衬底10上的正投影与一个第二子导电部121在衬底10上的正投影可大致重合。 如此设置，第一导电层11位于绑定区102的部分不会造成相邻信号线1011的信号干扰。
在一个实施例中，所述第二绝缘层62在所述衬底10上的正投影位于所述绑定区102之外，也即是第二绝缘层62位于绑定区102的部分被刻蚀掉。如此设置，第二绝缘层62不需要在绑定区102内爬坡，可减小第二绝缘层62的厚度，减小发光基板的成本。
在一个实施例中，过渡区103设有位于所述第一导电层11的连接走线111，所述发光区101设有与所述连接走线111相连的信号线1011；所述连接走线111与所述第一子导电部113相连。如此设置，连接走线111与第一子导电部113位于同一层，二者可直接相连，不需要通过搭接部来实现搭接，有助于简化发光结构的结构复杂度。
在一个实施例中，所述第二绝缘层62覆盖过渡区103。如此设置，第二绝缘层62有助于阻挡水汽向连接走线111的入侵，可提升发光基板的信赖性。
本申请实施例还提供了一种发光基板的制备方法，用于制备如图9至图11所示的发光基板。所述发光基板的制备方法包括如下过程：
首先，提供衬底10。
随后，在衬底上沉积钝化保护层63。
随后，在钝化保护层63上沉积第一导电薄膜，通过构图工艺对第一导电薄膜进行构图得到第一导电层11，得到位于发光区的信号线1011、位于绑定区102的第一子导电部113、以及位于过渡区103的连接走线111。
随后，沉积第一无机薄膜。
随后，沉积第二有机薄膜，通过构图工艺对第二有机薄膜进行构图得到第二有机层622，第二有机层622位于发光区101，第二有机层622上形成有位于发光区101的第一通孔。
随后，沉积第二无机薄膜，采用同一掩膜版对第一无机薄膜和第二无机薄膜同时进行构图，得到第一无机层621和第二无机层623；第一无机 层621和第二无机层623位于过渡区103和发光区101，第一无机层621和第二无机层623上形成有第二通孔，第二通孔与第一通孔相对，形成第四开孔602。
随后，沉积第二导电薄膜，通过构图工艺对第二导电薄膜进行构图，得到第二导电层12，得到位于发光区101的焊盘20、以及位于绑定区102的绑定端子30。
随后，沉积第二无机薄膜，采用构图工艺对第二无机薄膜进行构图，得到无机层41，无机层41位于发光区101、绑定区102及过渡区103，无机层41形成有位于发光区101的第三通孔和位于绑定区102的第一开孔401。
随后，沉积第一有机薄膜，采用构图工艺对第一有机薄膜进行构图，得到第一有机层42；第一有机层42位于发光区101，第一有机层42形成有位于发光区101的第四通孔，第三通孔和第四通孔形成第三开孔402。
本申请实施方式还提供一种显示装置，所述显示装置包括上述任一实施例所述的发光基板。由于该显示装置包括上述的发光基板，因此具有相同的有益效果，本申请在此不再赘述。
在一些实施例中，该显示装置可以为液晶显示装置，其包括液晶面板和设置在该液晶面板的非显示侧的背光源，背光源包括在前面任一个实施例中描述的发光基板。该液晶显示装置可以具有更均匀的背光亮度，具有更好的显示对比度。
在另一实施例中，所述显示装置中的阵列基板作为显示基板使用。发光基板作为显示基板使用时，每一无机发光二极管作为一个子像素。
本申请对于显示装置的适用不做具体限制，其可以是电视机、笔记本电脑、平板电脑、可穿戴显示设备、手机、车载显示、导航、电子书、数码相框、广告灯箱等任何具有显示功能的产品或部件。
需要指出的是，在附图中，为了图示的清晰可能夸大了层和区域的尺寸。而且可以理解，当元件或层被称为在另一元件或层“上”时，它可以直 接在其他元件上，或者可以存在中间的层。另外，可以理解，当元件或层被称为在另一元件或层“下”时，它可以直接在其他元件下，或者可以存在一个以上的中间的层或元件。另外，还可以理解，当层或元件被称为在两层或两个元件“之间”时，它可以为两层或两个元件之间唯一的层，或还可以存在一个以上的中间层或元件。通篇相似的参考标记指示相似的元件。
本领域技术人员在考虑说明书及实践这里公开的内容后，将容易想到本申请的其它实施方案。本申请旨在涵盖本申请的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本申请的一般性原理并包括本申请未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本申请的真正范围和精神由下面的权利要求指出。
应当理解的是，本申请并不局限于上面已经描述并在附图中示出的精确结构，并且可以在不脱离其范围进行各种修改和改变。本申请的范围仅由所附的权利要求来限制。

Claims (16)

  1. 一种发光基板，其特征在于，所述发光基板包括绑定区和发光区；所述发光基板包括：
    衬底；
    位于所述衬底上且位于所述发光区的焊盘，所述发光区包括两层导电结构；
    位于所述衬底上且位于所述绑定区的绑定端子，所述绑定区包括一层导电结构；
    位于所述绑定端子背离所述衬底一侧的第一绝缘层，所述第一绝缘层设有位于所述绑定区的多个第一开孔，每一所述第一开孔在所述衬底上的正投影位于一个所述绑定端子在所述衬底上的正投影内。
  2. 根据权利要求1所述的发光基板，其特征在于，所述发光基板还包括部分位于所述第一开孔内的助焊层，所述助焊层的厚度大于所述第一绝缘层位于所述绑定区的部分的厚度。
  3. 根据权利要求1所述的发光基板，其特征在于，所述第一绝缘层包括位于所述绑定区的无机层。
  4. 根据权利要求1所述的发光基板，其特征在于，所述发光基板包括第一导电层及位于所述第一导电层背离所述衬底一侧的第二导电层；所述焊盘包括第一导电结构，所述绑定端子包括第二导电结构；
    所述第一导电结构位于所述第二导电层，所述第二导电结构位于所述第二导电层。
  5. 根据权利要求4所述的发光基板，其特征在于，所述发光基板还包括位于所述绑定区与所述发光区之间的过渡区，所述过渡区设有位于所述第一导电层的连接走线，所述发光区设有与所述连接走线相连的信号线；
    所述第二导电层包括位于过渡区的搭接部，所述搭接部与所述第二导电结构相连，所述搭接部部分位于所述连接走线背离所述衬底的一侧且与 所述连接走线搭接。
  6. 根据权利要求5所述的发光基板，其特征在于，所述第一绝缘层覆盖所述过渡区。
  7. 根据权利要求5所述的发光基板，其特征在于，所述搭接部包括倾斜部，在背离所述衬底的方向上，所述倾斜部由所述绑定区指向所述发光区的方向向上倾斜。
  8. 根据权利要求5所述的发光基板，其特征在于，所述发光基板还包括位于所述第一导电层与所述第二导电层之间的第二绝缘层，所述第二绝缘层设有位于所述过渡区的第二开孔，所述第二开孔在所述衬底上的正投影落在所述连接走线在所述衬底上的正投影内，所述搭接部通过所述第二开孔与所述连接走线搭接。
  9. 根据权利要求5所述的发光基板，其特征在于，所述发光基板还包括位于所述第一导电层与所述第二导电层之间的第二绝缘层，所述第二绝缘层覆盖所述绑定区。
  10. 根据权利要求1所述的发光基板，其特征在于，所述发光基板包括第一导电层及位于所述第一导电层背离所述衬底一侧的第二导电层，所述焊盘包括第一导电结构，所述绑定端子包括第二导电结构；
    所述第一导电结构位于所述第二导电层，所述第二导电结构位于所述第一导电层。
  11. 根据权利要求10所述的发光基板，其特征在于，所述发光基板还包括位于所述绑定区与所述发光区之间的过渡区，所述过渡区设有位于所述第一导电层的连接走线，所述发光区设有与所述连接走线相连的信号线；
    所述连接走线与所述第二导电结构相连。
  12. 根据权利要求11所述的发光基板，其特征在于，所述发光基板还包括位于所述第一导电层与所述第二导电层之间的第二绝缘层，所述第二绝缘层在所述衬底上的正投影位于所述绑定区之外的区域。
  13. 根据权利要求1所述的发光基板，其特征在于，所述绑定端子包 括第二导电结构，相邻所述绑定端子的第二导电结构间隔设置。
  14. 根据权利要求1所述的发光基板，其特征在于，所述绑定端子包括第二导电结构，所述发光基板还包括位于所述发光区的多条信号线，同一所述信号线与多个所述绑定端子相连；与同一所述信号线相连的多个绑定端子中，至少两个相邻的所述绑定端子的第三导电结构相连。
  15. 根据权利要求14所述的发光基板，其特征在于，与同一所述信号线相连的各绑定端子的第三导电结构均相连。
  16. 一种显示装置，其特征在于，所述显示装置包括权利要求1至15任一项所述的发光基板。
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