WO2023142100A1 - 显示面板、显示装置 - Google Patents

显示面板、显示装置 Download PDF

Info

Publication number
WO2023142100A1
WO2023142100A1 PCT/CN2022/075159 CN2022075159W WO2023142100A1 WO 2023142100 A1 WO2023142100 A1 WO 2023142100A1 CN 2022075159 W CN2022075159 W CN 2022075159W WO 2023142100 A1 WO2023142100 A1 WO 2023142100A1
Authority
WO
WIPO (PCT)
Prior art keywords
insulating layer
layer
area
edge
organic
Prior art date
Application number
PCT/CN2022/075159
Other languages
English (en)
French (fr)
Inventor
王欣欣
张波
初志文
屈忆
冯翱远
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to PCT/CN2022/075159 priority Critical patent/WO2023142100A1/zh
Priority to CN202280000122.3A priority patent/CN117083998A/zh
Publication of WO2023142100A1 publication Critical patent/WO2023142100A1/zh

Links

Images

Definitions

  • the present disclosure relates to but not limited to the field of display technology, especially a display panel and a display device.
  • touch screen Touch Screen
  • the touch screen can be divided into Add on Mode, On Cell, In Cell, etc.
  • the touch screen can be divided into capacitive, resistive, infrared, surface acoustic wave and so on.
  • the capacitive On Cell type is a touch structure formed on the light-emitting side surface of the display screen. Due to its advantages of simple structure, thin thickness, and high transmittance, it has gradually become the mainstream technology.
  • OLED Organic Light Emitting Diode
  • FMLOC flexible multi-layer overlay
  • an embodiment of the present disclosure provides a display panel, including:
  • the base includes a display area and a peripheral area at least partially surrounding the display area, the peripheral area includes a binding area on one side of the display area, the binding area includes a first fan-out area and a curved a bending area, the bending area is located on a side of the first fan-out area away from the display area;
  • a first inorganic insulating layer located on a side of the plurality of signal leads away from the substrate
  • a first organic composite insulating layer located on a side of the first inorganic insulating layer away from the substrate;
  • the second inorganic insulating layer is located at least on the side of the first organic composite insulating layer away from the substrate;
  • a first power line located in the peripheral area and at least partially surrounding the display area
  • the first power supply pin end and the second power supply pin end are located in the binding area and are respectively connected to both ends of the first power supply line;
  • the first fan-out area includes at least one fan-out edge area, and the at least one fan-out edge area is located at one of the first power supply pin end and the second power supply pin end away from the other.
  • the fan-out edge region includes an organic layer coverage area and an organic layer non-coverage area
  • the orthographic projection of the first organic composite insulating layer on the substrate is located in the organic layer coverage area
  • the first organic composite insulation layer The orthographic projection of the layer on the base does not overlap with the uncovered area of the organic layer
  • the second inorganic insulating layer covers the uncovered area of the organic layer
  • the second inorganic insulating layer is on the orthographic projection of the base
  • the projection at least partially overlaps the orthographic projection of the first organic composite insulating layer on the substrate.
  • the first fan-out area includes a first fan-out edge area and a second fan-out edge area, and the first fan-out edge area is located at the end of the first power supply pin away from the first fan-out edge area.
  • the second fan-out edge area is located on a side away from the first power supply pin end of the second power supply pin end.
  • the second inorganic insulating layer includes a first edge extending along a first direction, and a second edge extending along a second direction, the first direction and the second direction intersect;
  • the orthographic projection of at least one of the first edge and the second edge on the substrate overlaps with the orthographic projection of the first organic composite insulating layer on the substrate.
  • the orthographic projections of the first edge and the second edge on the substrate both overlap with the orthographic projections of the first organic composite insulating layer on the substrate.
  • the first organic composite insulating layer includes a third edge extending along the first direction, and a fourth edge extending along the second direction, the second edge is on the substrate
  • the minimum distance between the orthographic projection of , and the orthographic projection of the fourth edge on the base is L1, and the L1 is greater than or equal to 40um and less than or equal to 200um.
  • the first organic composite insulating layer includes a third edge extending along the first direction, and a fourth edge extending along the second direction, the first edge is on the substrate
  • the minimum distance between the orthographic projection of and the orthographic projection of the third edge on the base is greater than or equal to 40um and less than or equal to 200um.
  • the first organic composite insulating layer includes a first organic insulating layer, a second organic insulating layer, and a third organic insulating layer arranged in sequence along a direction away from the substrate, and the first organic insulating layer layer, the second organic insulating layer, and the third organic insulating layer all include the third edge and the fourth edge, and the orthographic projection of the second edge on the substrate is the same as that of the first organic insulating layer.
  • the minimum distance between the orthographic projections of the fourth edge of the layer on the base is L2, and the L2 is greater than or equal to 20um and less than or equal to 180um.
  • the minimum distance between the orthographic projection of the second edge 502 on the substrate and the orthographic projection of the fourth edge of the second organic insulating layer on the substrate is L3, and the L3 Greater than or equal to 30um, less than or equal to 190um.
  • the minimum distance between the orthographic projection of the fourth edge of the first organic insulating layer on the substrate and the orthographic projection of the fourth edge of the second organic insulating layer on the substrate is L4
  • the minimum distance between the orthographic projection of the fourth edge of the second organic insulating layer on the substrate and the orthographic projection of the fourth edge of the third organic insulating layer on the substrate is L5
  • the L4 The ratio to said L5 is 1 to 2.
  • it further includes: a driving structure layer on the display area, a light emitting structure layer on the driving structure layer, and a touch control structure layer on the light emitting structure layer.
  • the driving structure layer includes a first insulating layer disposed on the substrate, an active layer disposed on the first insulating layer, and a second insulating layer covering the active layer. , a first gate metal layer disposed on the second insulating layer, a third insulating layer covering the first gate metal layer, a second gate metal layer disposed on the third insulating layer, covering the The fourth insulating layer of the second gate metal layer, the first source-drain metal layer disposed on the fourth insulating layer, the fifth insulating layer covering the first source-drain metal layer, the first gate metal layer At least include a gate electrode and a first capacitor electrode, the second gate metal layer includes at least a second capacitor electrode, the first source-drain metal layer includes at least a source electrode and a drain electrode, the first capacitor electrode and the first capacitor electrode The two capacitor electrodes form a storage capacitor, and the fifth insulating layer is located at the same layer as the first inorganic insulating layer and is made of the same material.
  • the plurality of signal leads are respectively located on the first gate metal layer and the second gate metal layer.
  • the plurality of signal leads include a plurality of first leads and a plurality of second leads located on a side of the plurality of first leads away from the substrate, the plurality of first leads and the plurality of second leads are The plurality of second leads are electrically connected, the third insulating layer is located between the plurality of first leads and the plurality of second leads, and the plurality of first leads are respectively located in the first gate metal layer , the plurality of second leads are respectively located on the second gate metal layer.
  • the plurality of signal leads are respectively located on the first gate metal layer.
  • the plurality of signal leads are respectively located on the second gate metal layer.
  • the first organic composite insulating layer includes a first organic insulating layer, a second organic insulating layer and a first organic insulating layer arranged in sequence along a direction away from the substrate
  • the third organic insulating layer, the first planar layer is located on the same layer as the first organic insulating layer and is made of the same material
  • the second planar layer is located on the same layer as the second organic insulating layer and is made of the same material
  • the The pixel definition layer is located at the same layer as the third organic insulating layer and has the same material.
  • the touch control structure layer includes a bridge electrode layer, a seventh insulating layer, and a touch control electrode layer arranged in sequence on the side of the light emitting structure layer away from the substrate, and the seventh insulating layer and The second inorganic insulating layer is located at the same layer and made of the same material.
  • At least one first groove is disposed in the first organic composite insulating layer, and the at least one first groove is located between the display region and the bending region.
  • the binding area further includes a second fan-out area, the second fan-out area is located on the side of the bending area away from the display area, and the second fan-out area is set There is a second organic composite insulating layer, and at least one second groove is arranged in the second organic composite insulating layer, and the at least one second groove is located on the side of the bending area away from the display area.
  • an orthographic projection of the second inorganic insulating layer on the substrate does not overlap with the bending region.
  • the plurality of signal lines are at least one of a clock signal line, an initialization line, a high-level signal line, and a low-level signal line.
  • an embodiment of the present disclosure further provides a display device, including the aforementioned display panel.
  • FIG. 1 is a cross-sectional view of a first fan-out region in a related art display panel
  • FIG. 2 is a schematic structural diagram of a display panel of the present disclosure
  • FIG. 3 is a schematic structural diagram of the binding area in the display panel of the present disclosure.
  • FIG. 4a is a partial enlarged view 1 of the fan-out edge area in the display panel of the present disclosure
  • Fig. 4b is a partial enlarged view 2 of the fan-out edge area in the display panel of the present disclosure
  • 5a is a partial cross-sectional view 1 of the first fan-out region in the display panel of the present disclosure
  • FIG. 5b is a second partial cross-sectional view of the first fan-out region in the display panel of the present disclosure
  • FIG. 5c is a third partial cross-sectional view of the first fan-out region in the display panel of the present disclosure.
  • FIG. 6 is a cross-sectional view of a display area in a display panel of the present disclosure.
  • connection should be interpreted in a broad sense.
  • it may be a fixed connection, or a detachable connection, or an integral connection; it may be a mechanical connection, or an electrical connection; it may be a direct connection, or an indirect connection through an intermediate piece, or an internal communication between two components.
  • a transistor refers to an element including at least three terminals of a gate electrode, a drain electrode, and a source electrode.
  • a transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode .
  • a channel region refers to a region through which current mainly flows.
  • the first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode.
  • the functions of the "source electrode” and “drain electrode” may be interchanged. Therefore, in this specification, “source electrode” and “drain electrode” can be interchanged with each other.
  • electrically connected includes the case where constituent elements are connected together through an element having some kind of electrical function.
  • the "element having some kind of electrical action” is not particularly limited as long as it can transmit and receive electrical signals between connected components.
  • Examples of “elements having some kind of electrical function” include not only electrodes and wiring but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having various functions.
  • parallel refers to a state where the angle formed by two straight lines is -10° to 10°, and therefore includes a state where the angle is -5° to 5°.
  • perpendicular means a state in which the angle formed by two straight lines is 80° to 100°, and therefore also includes an angle of 85° to 95°.
  • film and “layer” are interchangeable.
  • conductive layer may sometimes be replaced with “conductive film”.
  • insulating film may sometimes be replaced with “insulating layer”.
  • FIG. 1 is a cross-sectional view of a first fan-out region in a related art display panel.
  • the related art display panel includes a display area and a non-display area located around the display area.
  • the non-display area includes a binding area located on one side of the display area and an edge area located on the other side of the display area.
  • the binding area includes a The first fan-out zone and the bending zone are set in sequence.
  • the display area includes a driving structure layer, a light emitting structure layer arranged on the driving structure layer, and a touch structure layer arranged on the light emitting structure layer, and the touch structure layer includes a touch control unit and a touch control layer arranged on the light emitting structure layer.
  • the inorganic insulating layer covers the touch unit and is used to package the touch unit. As shown in Fig. 1, the inorganic insulating layer 5' extends to the first fan-out region of the bonding region.
  • the inorganic insulating layer 5' Due to the high hardness of the inorganic insulating layer 5', in order to make the bending area in the binding area easier to bend, it is necessary to place the inorganic insulating layer 5' on the bending area and the part of the first fan-out area near the bending area The inorganic insulating layer 5' is removed by etching, but in the process of etching the inorganic insulating layer 5', in addition to etching off the film layer of the inorganic insulating layer 5' itself on the first fan-out area, it will continue to go down Etching to a certain depth is over-etching.
  • the first inorganic insulating layer of the previous process will be formed on the first fan-out area. 3 is etched away together with the inorganic insulating layer 5 ′, so that the multiple signal lead wires 2 on the area not covered by the organic insulating layer in the first fan-out area are exposed, and are easily corroded by water, oxygen, and the like.
  • the present disclosure provides a first aspect, and an embodiment of the present disclosure provides a display panel, including:
  • the base includes a display area and a peripheral area at least partially surrounding the display area, the peripheral area includes a binding area on one side of the display area, the binding area includes a first fan-out area and a curved a bending area, the bending area is located on a side of the first fan-out area away from the display area;
  • a first inorganic insulating layer located on a side of the plurality of signal leads away from the substrate
  • a first organic composite insulating layer located on a side of the first inorganic insulating layer away from the substrate;
  • the second inorganic insulating layer is located at least on the side of the first organic composite insulating layer away from the substrate;
  • a first power line located in the peripheral area and at least partially surrounding the display area
  • the first power supply pin end and the second power supply pin end are located in the binding area and are respectively connected to both ends of the first power supply line;
  • the first fan-out area includes at least one fan-out edge area, and the at least one fan-out edge area is located at one of the first power supply pin end and the second power supply pin end away from the other.
  • the fan-out edge region includes an organic layer coverage area and an organic layer non-coverage area
  • the orthographic projection of the first organic composite insulating layer on the substrate is located in the organic layer coverage area
  • the first organic composite insulation layer The orthographic projection of the layer on the base does not overlap with the uncovered area of the organic layer
  • the second inorganic insulating layer covers the uncovered area of the organic layer
  • the second inorganic insulating layer is on the orthographic projection of the base
  • the projection at least partially overlaps the orthographic projection of the first organic composite insulating layer on the substrate.
  • the first fan-out area includes a first fan-out edge area and a second fan-out edge area, and the first fan-out edge area is located at the end of the first power supply pin away from the first fan-out edge area.
  • the second fan-out edge area is located on a side away from the first power supply pin end of the second power supply pin end.
  • the second inorganic insulating layer includes a first edge extending along a first direction, and a second edge extending along a second direction, the first direction and the second direction intersect;
  • the orthographic projection of at least one of the first edge and the second edge on the substrate overlaps with the orthographic projection of the first organic composite insulating layer on the substrate.
  • the orthographic projections of the first edge and the second edge on the substrate both overlap with the orthographic projections of the first organic composite insulating layer on the substrate.
  • the first organic composite insulating layer includes a third edge extending along the first direction, and a fourth edge extending along the second direction, the second edge is on the substrate
  • the minimum distance between the orthographic projection of , and the orthographic projection of the fourth edge on the base is L1, and the L1 is greater than or equal to 40um and less than or equal to 200um.
  • the first organic composite insulating layer includes a third edge extending along the first direction, and a fourth edge extending along the second direction, the first edge is on the substrate
  • the minimum distance between the orthographic projection of and the orthographic projection of the third edge on the base is greater than or equal to 40um and less than or equal to 200um.
  • the first organic composite insulating layer includes a first organic insulating layer, a second organic insulating layer, and a third organic insulating layer arranged in sequence along a direction away from the substrate, and the first organic insulating layer layer, the second organic insulating layer, and the third organic insulating layer all include the third edge and the fourth edge, and the orthographic projection of the second edge on the substrate is the same as that of the first organic insulating layer.
  • the minimum distance between the orthographic projections of the fourth edge of the layer on the base is L2, and the L2 is greater than or equal to 20um and less than or equal to 180um.
  • the minimum distance between the orthographic projection of the second edge 502 on the substrate and the orthographic projection of the fourth edge of the second organic insulating layer on the substrate is L3, and the L3 Greater than or equal to 30um, less than or equal to 190um.
  • the minimum distance between the orthographic projection of the fourth edge of the first organic insulating layer on the substrate and the orthographic projection of the fourth edge of the second organic insulating layer on the substrate is L4
  • the minimum distance between the orthographic projection of the fourth edge of the second organic insulating layer on the substrate and the orthographic projection of the fourth edge of the third organic insulating layer on the substrate is L5
  • the L4 The ratio to said L5 is 1 to 2.
  • it further includes: a driving structure layer on the display area, a light emitting structure layer on the driving structure layer, and a touch control structure layer on the light emitting structure layer.
  • the driving structure layer includes a first insulating layer disposed on the substrate, an active layer disposed on the first insulating layer, and a second insulating layer covering the active layer. , a first gate metal layer disposed on the second insulating layer, a third insulating layer covering the first gate metal layer, a second gate metal layer disposed on the third insulating layer, covering the The fourth insulating layer of the second gate metal layer, the first source-drain metal layer disposed on the fourth insulating layer, the fifth insulating layer covering the first source-drain metal layer, the first gate metal layer At least include a gate electrode and a first capacitor electrode, the second gate metal layer includes at least a second capacitor electrode, the first source-drain metal layer includes at least a source electrode and a drain electrode, the first capacitor electrode and the first capacitor electrode The two capacitor electrodes form a storage capacitor, and the fifth insulating layer is located at the same layer as the first inorganic insulating layer and is made of the same material.
  • the plurality of signal leads are respectively located on the first gate metal layer and the second gate metal layer.
  • the plurality of signal leads include a plurality of first leads and a plurality of second leads located on a side of the plurality of first leads away from the substrate, the plurality of first leads and the plurality of second leads are The plurality of second leads are electrically connected, the third insulating layer is located between the plurality of first leads and the plurality of second leads, and the plurality of first leads are respectively located in the first gate metal layer , the plurality of second leads are respectively located on the second gate metal layer.
  • the plurality of signal leads are respectively located on the first gate metal layer.
  • the plurality of signal leads are respectively located on the second gate metal layer.
  • the first organic composite insulating layer includes a first organic insulating layer, a second organic insulating layer and a first organic insulating layer arranged in sequence along a direction away from the substrate
  • the third organic insulating layer, the first planar layer is located on the same layer as the first organic insulating layer and is made of the same material
  • the second planar layer is located on the same layer as the second organic insulating layer and is made of the same material
  • the The pixel definition layer is located at the same layer as the third organic insulating layer and has the same material.
  • the touch control structure layer includes a bridge electrode layer, a seventh insulating layer, and a touch control electrode layer arranged in sequence on the side of the light emitting structure layer away from the substrate, and the seventh insulating layer and The second inorganic insulating layer is located at the same layer and made of the same material.
  • At least one first groove is disposed in the first organic composite insulating layer, and the at least one first groove is located between the display region and the bending region.
  • the binding area further includes a second fan-out area, the second fan-out area is located on the side of the bending area away from the display area, and the second fan-out area is set There is a second organic composite insulating layer, and at least one second groove is arranged in the second organic composite insulating layer, and the at least one second groove is located on the side of the bending area away from the display area.
  • an orthographic projection of the second inorganic insulating layer on the substrate does not overlap with the bending region.
  • the plurality of signal lines are at least one of a clock signal line, an initialization line, a high-level signal line, and a low-level signal line.
  • an embodiment of the present disclosure further provides a display device, including the aforementioned display panel.
  • FIG. 2 is a schematic structural diagram of a display panel of the present disclosure.
  • the display panel of the present disclosure includes a substrate 1, the substrate includes a display area 100 and a non-display area located around the display area 100, the non-display area includes a binding area 200 located on one side of the display area 100 and a binding area located on the display area 100. Edge region 300 on the other side.
  • the display panel of the present disclosure further includes a driving structure layer, a light emitting structure layer and a touch control structure layer, and the driving structure layer is located on the substrate 1 and located in the display area 100 .
  • the light emitting structure layer is located on the side of the driving structure layer away from the substrate 1 and is located in the display area 100 .
  • the touch control structure layer is located on the side of the light emitting structure layer away from the substrate 1 and is located in the display area 100 .
  • the light-emitting structure layer includes at least a plurality of light-emitting units arranged regularly, and at least a binding circuit for connecting the signal lines of the plurality of light-emitting units to an external driving device is provided on the binding area 200, and at least a bonding circuit for connecting the signal lines of the plurality of light-emitting units to an external driving device is provided on the edge area 300.
  • the unit transmits power lines for voltage signals, and the binding area 200 and the edge area 300 form a ring structure surrounding the display area 100 .
  • the driving structure layer mainly includes a pixel driving circuit composed of a plurality of thin film transistors (Thin Film Transistor, TFT), and each light emitting unit mainly includes stacked anodes, organic luminescent layer and cathode.
  • the touch structure layer mainly includes a plurality of touch units.
  • FIG. 3 is a schematic structural diagram of a binding area in a display panel of the present disclosure.
  • the binding area 200 of the display panel in the embodiment of the present disclosure is located on one side of the display area 100 .
  • the bending area 202 is configured to bend the second fan-out area 203 , the antistatic area 204 , the driving chip area 205 and the binding pin area 206 to the back of the display area 100 .
  • the second fan-out area 203 includes a plurality of data connection lines led out by fan-out routing.
  • the antistatic area 204 includes an antistatic circuit configured to prevent static damage of the display panel by eliminating static electricity.
  • the driver chip area 205 includes an integrated circuit (Integrated Circuit, IC for short), which is configured to be connected to a plurality of data connection lines.
  • the bonding electrode area 206 includes a plurality of bonding pads (Bonding Pads), which are configured to be bonded and connected to an external flexible circuit board (Flexible Printed Circuit, FPC for short).
  • a first array test (Array Test) unit 210 and a second array test unit 220 are also provided on the side of the binding area 200 away from the display area 100, the first array test unit 210
  • Both the test unit 210 and the second array test unit 220 include a plurality of test terminals (ET Pad), and the plurality of test terminals are correspondingly connected to a plurality of pins in the binding pin area 206 through interface lines, and are configured to test the display panel , to check whether there is a short circuit, open circuit and other problems.
  • a first cutting line 601 and a second cutting line 602 are further provided on the outer side of the binding area 200 .
  • the first cutting line 601 is located on the side of the second cutting line 602 away from the binding area 200 .
  • Both the first cutting line 601 and the second cutting line 602 extend around the edge of the binding area 200 , and the shapes of the first cutting line 601 and the second cutting line 602 are the same as the outline of the binding area 200 .
  • the first cutting line 601 is a rough cutting line
  • the second cutting line 602 is a fine cutting line.
  • a second cutting line 602 is provided between the binding area 200 and the first array test unit 210 and the second array test unit 220 .
  • At least one first cutting line 601 is provided on a side of the first array testing unit 210 and the second array testing unit 220 away from the bonding area 200 .
  • the cutting device cuts along the first cutting line 601 (rough cutting line), and after the test is completed, the cutting device cuts along the second cutting line 602 (fine cutting line), and the first array test unit 210 and the second array test unit 220 are separated from the binding area 200 to form a display panel.
  • Fig. 4a is a partially enlarged view of the fan-out edge area in the display panel of the present disclosure
  • Fig. 4b is a partial enlarged view of the fan-out edge area of the display panel of the present disclosure
  • Fig. 5a is the first fan-out area of the display panel of the present disclosure Partial sectional view one.
  • Fig. 4a and Fig. 4b are both enlarged views at a in Fig. 3
  • Fig. 5a is a cross-sectional view at A-A in Fig. 4b.
  • the display panel of the embodiment of the present disclosure further includes a data fan-out line, a plurality of signal leads 2, a first power line 8, a second power line, and a first inorganic insulating layer 3 , the first organic composite insulating layer 4 and the second inorganic insulating layer 5 .
  • data fan-out lines, first power lines 8 , second power lines (not shown) and a plurality of signal leads are all located on the substrate 1 And at least located in the first fan-out area 201 .
  • the data fan-out line is located in the middle of the first fan-out area 201, and includes a plurality of data connection lines, and the plurality of data connection lines are configured to connect the data lines (Data Line) of the display area 100 in a fan-out (Fanout) routing manner.
  • the first power line 8 is located on both sides of the data fan-out line and is a low-voltage power line (VSS).
  • the first power line 8 is a lead wire, one end of the first power line 8 is connected to the first binding electrode in the binding electrode area 206, and the other end of the first power line 8 is along the edge of the display area 100, surrounding the display area After 100 one week, connect to the second binding electrode in the binding electrode area 206 .
  • the second power line is a high voltage power line (VDD).
  • the multiple signal leads are located on both sides of the data fan-out line, and the multiple signal leads are respectively located on the side of the first power line 8 away from the data fan-out line. At least part of the multiple signal leads 2 extend along the edge of the display area 100.
  • the signal leads 2 are configured to connect the GOA leads on the edge area 300 .
  • the plurality of signal leads 2 may be at least one of a clock signal line, an initialization line, a high-level signal line, and a low-level signal line.
  • the first inorganic insulating layer 3 is located on the substrate 1 and at least on the first fan-out region 201 .
  • the first inorganic insulating layer 3 is located on the side of the plurality of signal leads 2 away from the substrate 1 , at least partially covers the plurality of signal leads 2 , and can prevent the plurality of signal leads 2 from being affected by water vapor.
  • the first organic composite insulating layer 4 is located on the substrate 1 and at least on the first fan-out region 201 .
  • the first organic composite insulating layer 4 is located on the side of the first inorganic insulating layer 3 away from the substrate 1 .
  • the second inorganic insulating layer 5 is located on the substrate 1 and at least on the first fan-out region 201.
  • the second inorganic insulating layer 5 is at least located on the side of the first organic composite insulating layer 4 away from the substrate 1 .
  • the display panel of the embodiment of the present disclosure further includes a first power supply pin end 9 and a second power supply pin end 10, and the first power supply pin end 9 and the second power supply pin end
  • the terminals 10 are located at the edge of the bonding area 202 close to the first fan-out area 201 , and the first power supply pin terminal 9 and the second power supply pin terminal 10 are respectively connected to two ends of the first power supply line 8 .
  • the first fan-out area 201 includes at least one fan-out edge area, at least one fan-out edge area is located on one side of the first power pin end 9 and the second power pin end 10 away from the other side, that is, at least one The fan-out edge area is located on a side of one of the first power supply pin end 9 and the second power supply pin end 10 close to the edge of the first fan-out area 201 .
  • the first fan-out area 201 includes a first fan-out edge area and a second fan-out edge area, and the first fan-out edge area is located at the first power pin end 9 away from the On the side of the second power supply pin end 10, the second fan-out edge area is located on the side of the second power supply pin end 10 away from the first power supply pin end 9, that is, the first fan-out edge area and the second fan-out edge area are respectively located Areas on both sides of the first fan-out area 201 .
  • the fan-out edge region includes an organic layer coverage area 2012 and an organic layer non-coverage area 2011, and the orthographic projection of the first organic composite insulating layer 4 on the substrate 1 is located in the organic layer coverage area 2012. , the orthographic projection of the first organic composite insulating layer 4 on the substrate 1 does not overlap the organic layer uncovered region 2011, the first organic composite insulating layer 4 does not cover the organic layer uncovered region 2011, so that the organic layer uncovered region 2011 The first inorganic insulating layer 3 is exposed.
  • the second inorganic insulating layer 5 covers the uncovered area 2011 of the organic layer, that is, at least part of the orthographic projection of the second inorganic insulating layer 5 on the substrate 1 overlaps the uncovered area 2011 of the organic layer.
  • the orthographic projection of the second inorganic insulating layer 5 on the substrate 1 at least partially overlaps the orthographic projection of the first organic composite insulating layer 4 on the substrate 1 .
  • the orthographic projection of the second inorganic insulating layer 5 on the substrate 1 and the orthographic projection of the first organic composite insulating layer 4 on the substrate 1 are at least partially overlapped, so that at least part of the second inorganic insulating layer 5
  • the layer 3 is etched so that the first inorganic insulating layer 3 can protect a plurality of signal leads 2 .
  • both the first inorganic insulating layer 3 and the second inorganic insulating layer 5 may use any one or more of silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride (SiON) Various, can be a single layer, multi-layer or composite layer, with water and oxygen resistance.
  • the second inorganic insulating layer 5 includes a first edge 501 extending along a first direction, and a second edge 502 extending along a second direction.
  • the first edge 501 The orthographic projection of at least one of the second edge 502 on the substrate overlaps with the orthographic projection of the first organic composite insulating layer 4 on the substrate.
  • the first direction and the second direction intersect; for example, the first direction and the second direction are perpendicular.
  • the orthographic projections of the first edge 501 and the second edge 502 on the substrate both overlap with the orthographic projection of the first organic composite insulating layer 4 on the substrate, so that the second Both the first edge 501 and the second edge 502 of the inorganic insulating layer 5 are located on the first organic composite insulating layer 4 .
  • the first organic composite insulating layer 4 includes a third edge 404 extending along a first direction, and a fourth edge 405 extending along a second direction, and the second inorganic
  • the minimum distance between the orthographic projection of the second edge 502 of the insulating layer 5 on the substrate and the orthographic projection of the fourth edge 405 on the substrate is L1.
  • L1 is greater than or equal to 40um and less than or equal to 200um.
  • the distance between the orthographic projection of the first edge 501 of the second inorganic insulating layer 5 on the substrate and the orthographic projection of the third edge 404 of the first organic composite insulating layer 4 on the substrate The minimum distance is greater than or equal to 40um and less than or equal to 200um.
  • the first organic composite insulating layer 4 includes a first organic insulating layer 401, a second organic insulating layer 401, a second The organic insulating layer 402 and the third organic insulating layer 403, the first organic insulating layer 401, the second organic insulating layer 402 and the third organic insulating layer 403 all include a third edge and a fourth edge, the second inorganic insulating layer 5
  • the minimum distance between the orthographic projection of the second edge 502 on the substrate and the orthographic projection of the fourth edge of the first organic insulating layer 401 on the substrate is L2. Among them, L2 is greater than or equal to 20um and less than or equal to 180um.
  • L3 is greater than or equal to 30um and less than or equal to 190um.
  • the distance between the orthographic projection of the fourth edge of the first organic insulating layer 401 on the substrate and the orthographic projection of the fourth edge of the second organic insulating layer 702 on the substrate The minimum distance is L4, and the minimum distance between the orthographic projection of the fourth edge of the second organic insulating layer 402 on the substrate and the orthographic projection of the fourth edge of the third organic insulating layer 403 on the substrate is L5.
  • the ratio of L4 to L5 is 1-2. For example, both L4 and L5 are 10um.
  • FIG. 6 is a cross-sectional view of a display area in a display panel of the present disclosure.
  • the display panel of the present disclosure further includes a driving structure layer on the display area, a light emitting structure layer on the driving structure layer, and a touch control structure layer on the light emitting structure layer.
  • the driving structure layer includes a first insulating layer 11 disposed on the substrate 1, an active layer 12 disposed on the first insulating layer 11, and a layer covering the active layer 12.
  • the fifth insulating layer 21 is located in the same layer as the first inorganic insulating layer 3 and is prepared by using the same material through the same patterning process. Wherein, the fifth insulating layer 21 may be referred to as a passivation (PVX) layer.
  • the display panel of the present disclosure further includes a first planar layer 22 disposed on the driving structure layer, and a second planar layer 22 disposed on the first planar layer 22 is perpendicular to the plane where the display panel is located.
  • Two source-drain metal layers 23, a second planar layer 24 covering the second source-drain metal layer 23, a pixel definition layer 26 disposed on the second planar layer 24, the first planar layer 22 and the first organic insulating layer 401 are located at the same layer and prepared by using the same material through the same patterning process; the second flat layer 24 and the second organic insulating layer 402 are located on the same layer and are prepared by using the same material through the same patterning process; the pixel definition layer 26 and the third organic insulating layer 403 is located on the same layer and is prepared by using the same material through the same patterning process.
  • the plurality of light-emitting units in the light-emitting structure layer each include an anode 25 arranged on the second flat layer 24 , an anode 25 arranged on the anode 25
  • the organic light emitting layer 27 and the cathode 28 disposed on the organic light emitting layer 27, the pixel definition layer 26 is provided with a pixel opening, the pixel opening exposes the anode 25, the organic light emitting layer 27 is located in the pixel opening, and is electrically connected to the exposed anode 25,
  • the cathode 28 covers the pixel opening and is electrically connected to the organic light emitting layer 27 in the pixel opening.
  • the display panel of the present disclosure further includes an encapsulation layer 29 , and the encapsulation layer 29 covers the light emitting structure layer for protecting the light emitting structure layer.
  • the encapsulation layer 29 may include a first inorganic encapsulation layer, an organic encapsulation layer and a second inorganic encapsulation layer arranged in sequence along a direction away from the substrate 1 .
  • the touch structure layer in a plane perpendicular to the display panel, includes a buffer layer 30 , a bridge electrode layer 31 , a seventh insulating The layer 32 , the touch electrode layer 33 , and the protective layer 34 , the seventh insulating layer 32 and the second inorganic insulating layer 5 are located in the same layer and are prepared by using the same material through the same patterning process.
  • the plurality of signal wires 2 are respectively located on the first gate metal layer and the second gate metal layer.
  • the plurality of signal leads 2 includes a plurality of first leads 201 and a plurality of second leads 202 located on the side of the plurality of first leads 201 away from the substrate 1, the plurality of first leads 201 and the plurality of The second lead 202 is electrically connected, the third insulating layer 16 is located between the plurality of first leads 201 and the plurality of second leads 202, and the plurality of first leads 201 are respectively located in the first gate metal layer, which can be connected with the first gate metal layer.
  • the gate electrode 14 and the first capacitance electrode 15 in the layer are located in the same layer and are prepared by the same patterning process using the same material; a plurality of second leads 202 are located in the second gate metal layer, and can be connected with the first electrode in the second gate metal layer.
  • the two capacitor electrodes 17 are located on the same layer and are made of the same material through the same patterning process.
  • FIG. 5b is a second partial cross-sectional view of the first fan-out region in the display panel of the present disclosure. Wherein, FIG. 5b is a cross-sectional view at A-A in FIG. 4b.
  • a plurality of signal leads 2 are respectively located in the first gate metal layer, and may be located in the same layer as the gate electrode 14 and the first capacitor electrode 15 in the first gate metal layer and adopt the same The material is prepared through the same patterning process.
  • FIG. 5c is a third partial cross-sectional view of the first fan-out region in the display panel of the present disclosure. Wherein, FIG. 5c is a cross-sectional view at A-A in FIG. 4b.
  • a plurality of signal leads 2 are respectively located on the second gate metal layer, and may be located on the same layer as the second capacitive electrode 17 in the second gate metal layer and are made of the same material through the same patterning. prepared by the process.
  • At least one first groove 6 is disposed in the first organic composite insulating layer 4, and at least one first The groove 6 is located between the display area 100 and the bending area 202 .
  • the first groove 6 is long and rectangular in a direction parallel to the plane where the display panel is located.
  • the bottom of the first groove 6 extends to the surface of the first inorganic insulating layer 3 , that is, the area where the first groove 6 is located is the area where the first organic composite insulating layer 4 is removed by etching.
  • the first groove 6 is configured to relieve the bending stress of the bending region 202 .
  • the orthographic projection of the second inorganic insulating layer 5 on the substrate 1 does not overlap the bending region 202, that is, the second inorganic insulating layer 5 on the bending region 202 is completely removed by etching, thereby avoiding the second inorganic insulating layer 5
  • the two inorganic insulating layers 5 affect the bending of the bending region 202 .
  • the second fan-out region 203 is located on the side of the bending region 202 away from the display region 100 , and a second organic composite insulating layer is disposed on the second fan-out region 203 , and the second organic composite insulating layer and The first organic composite insulating layer 4 is located in the same layer, and is prepared by using the same material through the same patterning process.
  • At least one second groove 7 is disposed in the second organic composite insulating layer, and the at least one second groove 7 is located on the side of the bending region 202 away from the display region 100 .
  • the second groove 7 is long and rectangular in a direction parallel to the plane where the display panel is located.
  • the area where the second groove 7 is located is the area where the second organic composite insulating layer 4 is etched away.
  • the second groove 7 is configured to relieve the bending stress of the bending region 202 .
  • the touch structure layer may be a mutual capacitance structure.
  • the touch structure layer may include a plurality of first touch units 110 and a plurality of second touch units 120, the first touch units 110 have a line shape extending along the first direction D1, and the plurality of first touch units 110 extend along the first direction D1.
  • the second touch units 120 are arranged in sequence along the second direction D2, and the second touch units 120 have a line shape extending along the second direction D2, and the plurality of second touch units 120 are arranged in sequence along the first direction D1.
  • the first direction D1 intersects the second direction D2, for example, the first direction D1 is perpendicular to the second direction D2.
  • Each first touch unit 110 includes a plurality of first touch electrodes 111 and first connecting parts 112 arranged in sequence along the first direction D1, the first touch electrodes 111 and the first connecting parts 112 are arranged alternately and pass through the first The connection parts 112 are sequentially connected.
  • Each second touch unit 120 includes a plurality of second touch electrodes 121 and a second connecting portion 122 arranged in sequence along the second direction D2, the plurality of second touch electrodes 121 are arranged at intervals, and adjacent second touch electrodes 121 The electrodes 121 are connected to each other through the second connection part 122 .
  • the plurality of first touch electrodes 111, the plurality of second touch electrodes 121 and the plurality of first connecting parts 112 may be located on the touch electrode layer 33 in the same layer, that is, the plurality of first touch electrodes 111 , the multiple second touch electrodes 121 and the multiple first connecting parts 112 may be formed by using the same material through the same patterning process.
  • the first touch electrodes 111 and the first connecting portion 112 may be an integral structure connected to each other.
  • the second connection portion 122 may be located at the bridge electrode layer, and connect adjacent second touch electrodes 121 to each other through via holes.
  • the first touch electrodes 111 and the second touch electrodes 121 are alternately arranged in the third direction D3. Wherein, the third direction D3 is different from the first direction D1 and the second direction D2.
  • the first touch electrodes may be driving (Tx) electrodes
  • the second touch electrodes may be sensing (Rx) electrodes
  • the first touch electrodes may be sensing (Rx) electrodes
  • the second touch electrodes may be driving (Tx) electrodes.
  • the first touch electrodes 111 and the second touch electrodes 121 may have a rhombus shape, such as a regular rhombus, or a horizontally long rhombus, or a vertically long rhombus.
  • the first touch electrodes 111 and the second touch electrodes 121 may have any one or more of triangles, squares, trapezoids, parallelograms, pentagons, hexagons and other polygons. , the present disclosure is not limited here.
  • the first touch electrodes 111 and the second touch electrodes 121 may be transparent conductive electrodes.
  • a plurality of driving (Tx) wires and a plurality of sensing (Rx) wires are arranged on the edge area 300, the first ends of the driving wires are connected to the first touch electrodes 111, and the second ends of the driving wires Along the edge region 300 it extends to the binding region 200 .
  • the first end of the sensing lead is connected to the second touch electrode 121 , and the second end of the sensing lead extends along the edge area 300 to the binding area 200 .
  • the driving leads and the sensing leads together form the touch leads.
  • the present disclosure also provides a method for manufacturing a display panel.
  • the display panel includes a base, the base includes a display area and a peripheral area at least partially surrounding the display area, and the peripheral area includes a binding on one side of the display area.
  • a plurality of signal leads are formed on the substrate, and the plurality of signal leads are at least located in the first fan-out area;
  • first inorganic insulating layer on a plurality of signal leads, the first inorganic insulating layer is located at least in the first fan-out region;
  • first organic composite insulating layer is located at least in the first fan-out region
  • the display panel also includes a first power line, a first power pin end and a second power pin end, the first power line is located in the peripheral area and at least partially surrounds the display area; the first power pin end and the second power supply pin end are located in the binding area and are respectively connected to the two ends of the first power supply line; the first fan-out area includes at least one fan-out edge area, and the at least one fan-out edge area Located on one side of one of the first power supply pin end and the second power supply pin end away from the other, the fan-out edge region includes an organic layer coverage area and an organic layer non-coverage area, the first power supply pin end
  • the orthographic projection of an organic composite insulating layer on the substrate is located in the covered area of the organic layer, the orthographic projection of the first organic composite insulating layer on the substrate does not overlap with the non-covered area of the organic layer, and the second Two inorganic insulating layers cover the uncovered area of the organic layer, and the orthographic projection of the second inorganic insulating layer on the
  • the present disclosure also provides a display device, including the display panel of the foregoing embodiments.
  • the display device can be any product or component with a display function such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, and the like.

Landscapes

  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种显示面板、显示装置。显示面板包括：多条信号引线(2)，位于基底(1)上且至少位于第一扇出区(201)；第一扇出区(201)包括至少一个扇出边缘区域，扇出边缘区域包括有机层覆盖区(2012)和有机层未覆盖区(2011)，第一有机复合绝缘层(4)在基底(1)的正投影位于有机层覆盖区(2012)，第一有机复合绝缘层(4)在基底(1)的正投影与有机层未覆盖区(2011)不交叠，第二无机绝缘层(5)覆盖有机层未覆盖区(2011)，且第二无机绝缘层(5)在基底(1)的正投影与第一有机复合绝缘层(4)在基底(1)的正投影至少部分交叠。

Description

显示面板、显示装置 技术领域
本公开涉及但不限于显示技术领域，尤指一种显示面板、显示装置。
背景技术
随着显示技术的飞速发展，触控屏(Touch Screen)已经逐渐遍及人们的生活中。按照组成结构，触控屏可以分为外挂式(Add on Mode)、覆盖表面式(On Cell)、内嵌式(In Cell)等。按照工作原理，触控屏可以分为电容式、电阻式、红外线式、表面声波式等。电容式On Cell类型是在显示屏出光侧表面形成触控结构，由于具有结构简单、厚度薄、透过率高等优点，逐渐成为主流技术。
有机发光二极管(Organic Light Emitting Diode，简称OLED)为主动发光显示器件，具有自发光、广视角、高对比度、低耗电、极高反应速度等优点。随着显示技术的不断发展，以OLED为发光器件、由薄膜晶体管(Thin Film Transistor，简称TFT)进行信号控制的柔性显示装置(Flexible Display)已成为目前显示领域的主流产品。根据柔性折叠、窄边框等产品需求，现有基于OLED的触控结构采用柔性多层覆盖表面式(Flexible Multi Layer On Cell，简称FMLOC)结构形式，柔性的触控基板设置在OLED背板的封装层上，具有轻薄、可折叠等优点，可以满足柔性折叠、窄边框等产品需求。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
第一方面，本公开实施例提供了一种显示面板，包括：
基底，所述基底包括显示区域和至少部分围绕所述显示区域的周边区域，所述周边区域包括位于所述显示区域一侧的绑定区域，所述绑定区域包括第一扇出区和弯折区，所述弯折区位于所述第一扇出区远离所述显示区域的一 侧；
多条信号引线，位于所述基底上且至少位于所述第一扇出区；
第一无机绝缘层，位于所述多条信号引线远离所述基底的一侧；
第一有机复合绝缘层，位于所述第一无机绝缘层远离所述基底的一侧；
第二无机绝缘层，至少位于所述第一有机复合绝缘层远离所述基底的一侧；
第一电源线，位于所述周边区域，且至少部分围绕所述显示区域；
第一电源引脚端和第二电源引脚端，位于所述绑定区域且分别与所述第一电源线的两端连接；
所述第一扇出区包括至少一个扇出边缘区域，所述至少一个扇出边缘区域位于所述第一电源引脚端和所述第二电源引脚端中的之一远离另一个的一侧，所述扇出边缘区域包括有机层覆盖区和有机层未覆盖区，所述第一有机复合绝缘层在所述基底的正投影位于所述有机层覆盖区，所述第一有机复合绝缘层在所述基底的正投影与所述有机层未覆盖区不交叠，所述第二无机绝缘层覆盖所述有机层未覆盖区，且所述第二无机绝缘层在所述基底的正投影与所述第一有机复合绝缘层在所述基底的正投影至少部分交叠。
在示例性实施方式中，所述第一扇出区包括第一扇出边缘区域和第二扇出边缘区域，所述第一扇出边缘区域位于所述第一电源引脚端远离所述第二电源引脚端一侧，所述第二扇出边缘区域位于所述第二电源引脚端远离所述第一电源引脚端一侧。
在示例性实施方式中，所述第二无机绝缘层包括沿第一方向延伸的第一边缘，和沿第二方向延伸的第二边缘，所述第一方向和所述第二方向交叉；所述第一边缘和所述第二边缘的至少之一在所述基底的正投影与所述第一有机复合绝缘层在所述基底的正投影交叠。
在示例性实施方式中，所述第一边缘和所述第二边缘的在所述基底的正投影均与所述第一有机复合绝缘层在所述基底的正投影交叠。
在示例性实施方式中，所述第一有机复合绝缘层包括沿所述第一方向延 伸的第三边缘，和沿所述第二方向延伸的第四边缘，所述第二边缘在所述基底的正投影与所述第四边缘在所述基底的正投影之间的最小距离为L1，所述L1大于等于40um，小于等于200um。
在示例性实施方式中，所述第一有机复合绝缘层包括沿所述第一方向延伸的第三边缘，和沿所述第二方向延伸的第四边缘，所述第一边缘在所述基底的正投影与所述第三边缘在所述基底的正投影之间的最小距离大于等于40um，小于等于200um。
在示例性实施方式中，所述第一有机复合绝缘层包括沿着远离所述基底方向依次设置的第一有机绝缘层、第二有机绝缘层以及第三有机绝缘层，所述第一有机绝缘层、所述第二有机绝缘层以及所述第三有机绝缘层均包括所述第三边缘和所述第四边缘，所述第二边缘在所述基底的正投影与所述第一有机绝缘层的第四边缘在所述基底的正投影之间的最小距离为L2，所述L2大于等于20um，小于等于180um。
在示例性实施方式中，所述第二边缘502在所述基底的正投影与所述第二有机绝缘层的第四边缘在所述基底的正投影之间的最小距离为L3，所述L3大于等于30um，小于等于190um。
在示例性实施方式中，所述第一有机绝缘层的第四边缘在所述基底的正投影与所述第二有机绝缘层的第四边缘在所述基底的正投影之间的最小距离为L4，所述第二有机绝缘层的第四边缘在所述基底的正投影与所述第三有机绝缘层的第四边缘在所述基底的正投影之间的最小距离为L5，所述L4与所述L5的比值为1至2。
在示例性实施方式中，还包括：位于所述显示区域上驱动结构层、位于所述驱动结构层上的发光结构层以及位于所述发光结构层上的触控结构层。
在示例性实施方式中，所述驱动结构层包括设置在所述基底上的第一绝缘层，设置在所述第一绝缘层上的有源层，覆盖所述有源层的第二绝缘层，设置在所述第二绝缘层上的第一栅金属层，覆盖所述第一栅金属层的第三绝缘层，设置在所述第三绝缘层上的第二栅金属层，覆盖所述第二栅金属层的第四绝缘层，设置在所述第四绝缘层上的第一源漏金属层，覆盖所述第一源 漏金属层的第五绝缘层，所述第一栅金属层至少包括栅电极和第一电容电极，所述第二栅金属层至少包括第二电容电极，所述第一源漏金属层至少包括源电极和漏电极，所述第一电容电极和所述第二电容电极组成存储电容，所述第五绝缘层与第一无机绝缘层位于同一层且材料相同。
在示例性实施方式中，所述多条信号引线分别位于所述第一栅金属层和所述第二栅金属层。
在示例性实施方式中，所述多条信号引线包括多条第一引线和位于所述多条第一引线远离所述基底一侧的多条第二引线，所述多条第一引线和所述多条第二引线电连接，所述第三绝缘层位于所述多条第一引线和所述多条第二引线之间，所述多条第一引线分别位于所述第一栅金属层，所述多条第二引线分别位于所述第二栅金属层。
在示例性实施方式中，所述多条信号引线分别位于所述第一栅金属层。
在示例性实施方式中，所述多条信号引线分别位于所述第二栅金属层。
在示例性实施方式中，还包括设置在所述驱动结构层上的第一平坦层，设置在所述第一平坦层上的第二源漏金属层，覆盖所述第二源漏金属层的第二平坦层，设置在所述第二平坦层上的像素定义层，所述第一有机复合绝缘层包括沿着远离所述基底方向依次设置的第一有机绝缘层、第二有机绝缘层以及第三有机绝缘层，所述第一平坦层与所述第一有机绝缘层位于同一层且材料相同，所述第二平坦层与所述第二有机绝缘层位于同一层且材料相同，所述像素定义层与所述第三有机绝缘层位于同一层且材料相同。
在示例性实施方式中，所述触控结构层包括依次设置在所述发光结构层远离所述基底一侧的桥电极层、第七绝缘层和触控电极层，所述第七绝缘层与所述第二无机绝缘层位于同一层且材料相同。
在示例性实施方式中，所述第一有机复合绝缘层中设置有至少一个第一凹槽，所述至少一个第一凹槽位于所述显示区域和弯折区域之间。
在示例性实施方式中，所述绑定区域还包括第二扇出区，所述第二扇出区位于所述弯折区远离所述显示区域一侧，所述第二扇出区上设置有第二有机复合绝缘层，所述第二有机复合绝缘层中设置有至少一个第二凹槽，所述 至少一个第二凹槽位于所述弯折区远离所述显示区域一侧。
在示例性实施方式中，所述第二无机绝缘层在所述基底的正投影与所述弯折区不交叠。
在示例性实施方式中，所述多条信号线为时钟信号线、初始化线、高电平信号线、低电平信号线中的至少一种。
又一方面，本公开实施例还提供了一种显示装置，包括前述的显示面板。
在阅读理解了附图和详细描述后，可以明白其他方面。
附图说明
附图用来提供对本公开技术方案的进一步理解，并且构成说明书的一部分，与本公开的实施例一起用于解释本公开的技术方案，并不构成对本公开的技术方案的限制。附图中各部件的形状和大小不反映真实比例，目的只是示意说明本公开内容。
图1为相关技术显示面板中第一扇出区的剖视图；
图2为本公开显示面板的结构示意图；
图3为本公开显示面板中绑定区域的结构示意图；
图4a为本公开显示面板中扇出边缘区域的局部放大图一；
图4b为本公开显示面板中扇出边缘区域的局部放大图二；
图5a为本公开显示面板中第一扇出区的局部剖视图一；
图5b为本公开显示面板中第一扇出区的局部剖视图二；
图5c为本公开显示面板中第一扇出区的局部剖视图三；
图6为本公开显示面板中显示区域的剖视图。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚明白，下文中将结合附图对本公开的实施例进行详细说明。注意，实施方式可以以多个不同形式来实 施。所属技术领域的普通技术人员可以很容易地理解一个事实，就是方式和内容可以在不脱离本公开的宗旨及其范围的条件下被变换为各种各样的形式。因此，本公开不应该被解释为仅限定在下面的实施方式所记载的内容中。在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互任意组合。
在附图中，有时为了明确起见，夸大表示了各构成要素的大小、层的厚度或区域。因此，本公开的一个方式并不一定限定于该尺寸，附图中各部件的形状和大小不反映真实比例。此外，附图示意性地示出了理想的例子，本公开的一个方式不局限于附图所示的形状或数值等。
本说明书中的“第一”、“第二”、“第三”等序数词是为了避免构成要素的混同而设置，而不是为了在数量方面上进行限定的。
在本说明书中，为了方便起见，使用“中部”、“上”、“下”、“前”、“后”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示方位或位置关系的词句以参照附图说明构成要素的位置关系，仅是为了便于描述本说明书和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本公开的限制。构成要素的位置关系根据描述各构成要素的方向适当地改变。因此，不局限于在说明书中说明的词句，根据情况可以适当地更换。
在本说明书中，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解。例如，可以是固定连接，或可拆卸连接，或一体地连接；可以是机械连接，或电连接；可以是直接相连，或通过中间件间接相连，或两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本公开中的具体含义。
在本说明书中，晶体管是指至少包括栅电极、漏电极以及源电极这三个端子的元件。晶体管在漏电极(漏电极端子、漏区域或漏电极)与源电极(源电极端子、源区域或源电极)之间具有沟道区域，并且电流能够流过漏电极、沟道区域以及源电极。注意，在本说明书中，沟道区域是指电流主要流过的区域。
在本说明书中，第一极可以为漏电极、第二极可以为源电极，或者第一 极可以为源电极、第二极可以为漏电极。在使用极性相反的晶体管的情况或电路工作中的电流方向变化的情况等下，“源电极”及“漏电极”的功能有时互相调换。因此，在本说明书中，“源电极”和“漏电极”可以互相调换。
在本说明书中，“电连接”包括构成要素通过具有某种电作用的元件连接在一起的情况。“具有某种电作用的元件”只要可以进行连接的构成要素间的电信号的授受，就对其没有特别的限制。“具有某种电作用的元件”的例子不仅包括电极和布线，而且还包括晶体管等开关元件、电阻器、电感器、电容器、其它具有各种功能的元件等。
在本说明书中，“平行”是指两条直线形成的角度为-10°以上且10°以下的状态，因此，也包括该角度为-5°以上且5°以下的状态。另外，“垂直”是指两条直线形成的角度为80°以上且100°以下的状态，因此，也包括85°以上且95°以下的角度的状态。
在本说明书中，“膜”和“层”可以相互调换。例如，有时可以将“导电层”换成为“导电膜”。与此同样，有时可以将“绝缘膜”换成为“绝缘层”。
本公开中的“约”，是指不严格限定界限，允许工艺和测量误差范围内的数值。
图1为相关技术显示面板中第一扇出区的剖视图。相关技术显示面板包括显示区域和位于显示区域周边的非显示区域，非显示区域包括位于显示区域一侧的绑定区域和位于显示区域其它侧的边缘区域，绑定区域包括沿着远离显示区域的方向依次设置的第一扇出区以及弯折区。在垂直于显示面板所在平面方向，显示区域包括驱动结构层、设置在驱动结构层上的发光结构层以及设置在发光结构层上的触控结构层，触控结构层包括触控单元以及设置在触控单元上的无机绝缘层(TLD)，无机绝缘层将触控单元覆盖，用于封装触控单元。如图1所示，无机绝缘层5’延伸至绑定区域的第一扇出区。由于无机绝缘层5’的硬度较高，为了使绑定区域中弯折区更易弯折，需要将弯折区上的无机绝缘层5’以及第一扇出区靠近弯折区一侧的部分无机绝缘层5’刻蚀去除，但是在刻蚀无机绝缘层5’的工艺过程中，除了会刻蚀掉第一扇出区上无机绝缘层5’本身的膜层外，还会继续往下刻蚀一定的深度，即过刻。 由于一部分第一扇出区的区域上没有覆盖有机绝缘复合层4’，在第一扇出区未覆盖有机绝缘层的区域上，会导致第一扇出区上前工艺的第一无机绝缘层3与无机绝缘层5’一起被刻蚀掉，使第一扇出区未覆盖有机绝缘层区域上的多条信号引线2裸露，容易被水氧等腐蚀。
本公开提供了第一方面，本公开实施例提供了一种显示面板，包括：
基底，所述基底包括显示区域和至少部分围绕所述显示区域的周边区域，所述周边区域包括位于所述显示区域一侧的绑定区域，所述绑定区域包括第一扇出区和弯折区，所述弯折区位于所述第一扇出区远离所述显示区域的一侧；
多条信号引线，位于所述基底上且至少位于所述第一扇出区；
第一无机绝缘层，位于所述多条信号引线远离所述基底的一侧；
第一有机复合绝缘层，位于所述第一无机绝缘层远离所述基底的一侧；
第二无机绝缘层，至少位于所述第一有机复合绝缘层远离所述基底的一侧；
第一电源线，位于所述周边区域，且至少部分围绕所述显示区域；
第一电源引脚端和第二电源引脚端，位于所述绑定区域且分别与所述第一电源线的两端连接；
所述第一扇出区包括至少一个扇出边缘区域，所述至少一个扇出边缘区域位于所述第一电源引脚端和所述第二电源引脚端中的之一远离另一个的一侧，所述扇出边缘区域包括有机层覆盖区和有机层未覆盖区，所述第一有机复合绝缘层在所述基底的正投影位于所述有机层覆盖区，所述第一有机复合绝缘层在所述基底的正投影与所述有机层未覆盖区不交叠，所述第二无机绝缘层覆盖所述有机层未覆盖区，且所述第二无机绝缘层在所述基底的正投影与所述第一有机复合绝缘层在所述基底的正投影至少部分交叠。
在示例性实施方式中，所述第一扇出区包括第一扇出边缘区域和第二扇出边缘区域，所述第一扇出边缘区域位于所述第一电源引脚端远离所述第二电源引脚端一侧，所述第二扇出边缘区域位于所述第二电源引脚端远离所述 第一电源引脚端一侧。
在示例性实施方式中，所述第二无机绝缘层包括沿第一方向延伸的第一边缘，和沿第二方向延伸的第二边缘，所述第一方向和所述第二方向交叉；所述第一边缘和所述第二边缘的至少之一在所述基底的正投影与所述第一有机复合绝缘层在所述基底的正投影交叠。
在示例性实施方式中，所述第一边缘和所述第二边缘的在所述基底的正投影均与所述第一有机复合绝缘层在所述基底的正投影交叠。
在示例性实施方式中，所述第一有机复合绝缘层包括沿所述第一方向延伸的第三边缘，和沿所述第二方向延伸的第四边缘，所述第二边缘在所述基底的正投影与所述第四边缘在所述基底的正投影之间的最小距离为L1，所述L1大于等于40um，小于等于200um。
在示例性实施方式中，所述第一有机复合绝缘层包括沿所述第一方向延伸的第三边缘，和沿所述第二方向延伸的第四边缘，所述第一边缘在所述基底的正投影与所述第三边缘在所述基底的正投影之间的最小距离大于等于40um，小于等于200um。
在示例性实施方式中，所述第一有机复合绝缘层包括沿着远离所述基底方向依次设置的第一有机绝缘层、第二有机绝缘层以及第三有机绝缘层，所述第一有机绝缘层、所述第二有机绝缘层以及所述第三有机绝缘层均包括所述第三边缘和所述第四边缘，所述第二边缘在所述基底的正投影与所述第一有机绝缘层的第四边缘在所述基底的正投影之间的最小距离为L2，所述L2大于等于20um，小于等于180um。
在示例性实施方式中，所述第二边缘502在所述基底的正投影与所述第二有机绝缘层的第四边缘在所述基底的正投影之间的最小距离为L3，所述L3大于等于30um，小于等于190um。
在示例性实施方式中，所述第一有机绝缘层的第四边缘在所述基底的正投影与所述第二有机绝缘层的第四边缘在所述基底的正投影之间的最小距离为L4，所述第二有机绝缘层的第四边缘在所述基底的正投影与所述第三有机绝缘层的第四边缘在所述基底的正投影之间的最小距离为L5，所述L4与所 述L5的比值为1至2。
在示例性实施方式中，还包括：位于所述显示区域上驱动结构层、位于所述驱动结构层上的发光结构层以及位于所述发光结构层上的触控结构层。
在示例性实施方式中，所述驱动结构层包括设置在所述基底上的第一绝缘层，设置在所述第一绝缘层上的有源层，覆盖所述有源层的第二绝缘层，设置在所述第二绝缘层上的第一栅金属层，覆盖所述第一栅金属层的第三绝缘层，设置在所述第三绝缘层上的第二栅金属层，覆盖所述第二栅金属层的第四绝缘层，设置在所述第四绝缘层上的第一源漏金属层，覆盖所述第一源漏金属层的第五绝缘层，所述第一栅金属层至少包括栅电极和第一电容电极，所述第二栅金属层至少包括第二电容电极，所述第一源漏金属层至少包括源电极和漏电极，所述第一电容电极和所述第二电容电极组成存储电容，所述第五绝缘层与第一无机绝缘层位于同一层且材料相同。
在示例性实施方式中，所述多条信号引线分别位于所述第一栅金属层和所述第二栅金属层。
在示例性实施方式中，所述多条信号引线包括多条第一引线和位于所述多条第一引线远离所述基底一侧的多条第二引线，所述多条第一引线和所述多条第二引线电连接，所述第三绝缘层位于所述多条第一引线和所述多条第二引线之间，所述多条第一引线分别位于所述第一栅金属层，所述多条第二引线分别位于所述第二栅金属层。
在示例性实施方式中，所述多条信号引线分别位于所述第一栅金属层。
在示例性实施方式中，所述多条信号引线分别位于所述第二栅金属层。
在示例性实施方式中，还包括设置在所述驱动结构层上的第一平坦层，设置在所述第一平坦层上的第二源漏金属层，覆盖所述第二源漏金属层的第二平坦层，设置在所述第二平坦层上的像素定义层，所述第一有机复合绝缘层包括沿着远离所述基底方向依次设置的第一有机绝缘层、第二有机绝缘层以及第三有机绝缘层，所述第一平坦层与所述第一有机绝缘层位于同一层且材料相同，所述第二平坦层与所述第二有机绝缘层位于同一层且材料相同，所述像素定义层与所述第三有机绝缘层位于同一层且材料相同。
在示例性实施方式中，所述触控结构层包括依次设置在所述发光结构层远离所述基底一侧的桥电极层、第七绝缘层和触控电极层，所述第七绝缘层与所述第二无机绝缘层位于同一层且材料相同。
在示例性实施方式中，所述第一有机复合绝缘层中设置有至少一个第一凹槽，所述至少一个第一凹槽位于所述显示区域和弯折区域之间。
在示例性实施方式中，所述绑定区域还包括第二扇出区，所述第二扇出区位于所述弯折区远离所述显示区域一侧，所述第二扇出区上设置有第二有机复合绝缘层，所述第二有机复合绝缘层中设置有至少一个第二凹槽，所述至少一个第二凹槽位于所述弯折区远离所述显示区域一侧。
在示例性实施方式中，所述第二无机绝缘层在所述基底的正投影与所述弯折区不交叠。
在示例性实施方式中，所述多条信号线为时钟信号线、初始化线、高电平信号线、低电平信号线中的至少一种。
又一方面，本公开实施例还提供了一种显示装置，包括前述的显示面板。
图2为本公开显示面板的结构示意图。如图2所示，本公开显示面板包括基底1，基底包括显示区域100和位于显示区域100周边的非显示区域，非显示区域包括位于显示区域100一侧的绑定区域200和位于显示区域100其它侧的边缘区域300。
在示例性实施方式中，本公开显示面板还包括驱动结构层、发光结构层以及触控结构层，驱动结构层位于基底1上，且位于显示区域100中。发光结构层位于驱动结构层远离基底1一侧，且位于显示区域100中。触控结构层位于发光结构层远离基底1一侧，且位于显示区域100中。发光结构层至少包括规则排列的多个发光单元，绑定区域200上至少设置有将多个发光单元的信号线连接至外部驱动装置的绑定电路，边缘区域300上至少设置有向多个发光单元传输电压信号的电源线，绑定区域200和边缘区域300形成环绕显示区域100的环形结构。
在示例性实施方式中，在垂直于显示面板所在的平面，驱动结构层主要包括多个薄膜晶体管(Thin Film Transistor，TFT)组成的像素驱动电路，每 个发光单元主要包括叠设的阳极、有机发光层和阴极。触控结构层主要包括多个触控单元。
图3为本公开显示面板中绑定区域的结构示意图。如图3所示，在平行于显示面板所在的平面，本公开实施例显示面板的绑定区域200位于显示区域100的一侧，绑定区域200包括沿着远离显示区域100的方向依次设置的第一扇出区201、弯折区202、第二扇出区203、防静电区204、驱动芯片区205和绑定电极区206。弯折区202配置为使第二扇出区203、防静电区204、驱动芯片区205和绑定引脚区206弯折到显示区域100的背面。第二扇出区203包括扇出走线方式引出的多条数据连接线。防静电区204包括防静电电路，被配置为通过消除静电防止显示面板的静电损伤。驱动芯片区205包括集成电路(Integrated Circuit，简称IC)，被配置为与多条数据连接线连接。绑定电极区206包括多个绑定焊盘(Bonding Pad)，被配置为与外部的柔性线路板(Flexible Printed Circuit，简称FPC)绑定连接。
在示例性实施方式中，在制备显示装置的过程中，绑定区域200远离显示区域100的一侧还设置有第一阵列测试(Array Test)单元210和第二阵列测试单元220，第一阵列测试单元210和第二阵列测试单元220均包括多个测试端子(ET Pad)，多个测试端子通过接口线与绑定引脚区206的多个引脚对应连接，配置为对显示面板进行测试，以检查是否有短路、断路等问题。
在示例性实施方式中，绑定区域200的外侧还设置有第一切割线601和第二切割线602。第一切割线601位于第二切割线602远离绑定区域200一侧。第一切割线601和第二切割线602均围绕绑定区域200的边缘延伸，第一切割线601和第二切割线602的形状均与绑定区域200的轮廓相同。其中，第一切割线601为粗切割线，第二切割线602为精切割线。
在示例性实施方式中，绑定区域200与第一阵列测试单元210和第二阵列测试单元220之间设置第二切割线602。在第一阵列测试单元210和第二阵列测试单元220远离绑定区域200的一侧，设置有至少一条第一切割线601。在完成膜层工艺后，切割设备沿着第一切割线601(粗切割线)切割，在完成测试后，切割设备沿着第二切割线602(精切割线)切割，将第一阵列测试单元210和第二阵列测试单元220均与绑定区域200分离，形成显示 面板。
图4a为本公开显示面板中扇出边缘区域的局部放大图一；图4b为本公开显示面板中扇出边缘区域的局部放大图二；图5a为本公开显示面板中第一扇出区的局部剖视图一。其中，图4a和图4b均为图3中a处的放大图，图5a为图4b中A-A处的剖视图。如图3、图4a、图4b和图5a所示，本公开实施例显示面板还包括数据扇出线、多条信号引线2、第一电源线8、第二电源线、第一无机绝缘层3、第一有机复合绝缘层4以及第二无机绝缘层5。
在示例性实施方式中，如图3所示，在平行于显示面板所在平面，数据扇出线、第一电源线8、第二电源线(未示出)和多条信号引线均位于基底1上且至少位于第一扇出区201中。数据扇出线位于第一扇出区201的中部，包括多条数据连接线，多条数据连接线被配置为以扇出(Fanout)走线方式连接显示区域100的数据线(Data Line)。第一电源线8位于数据扇出线的两侧，为低电压电源线(VSS)。第一电源线8为一条引线，第一电源线8的一端与绑定电极区206中的第一绑定电极连接，第一电源线8的另一端沿着显示区域100的边缘，环绕显示区域100一周后，与绑定电极区206中的第二绑定电极连接。第二电源线为高电压电源线(VDD)。多条信号引线分别位于数据扇出线的两侧，且多条信号引线分别位于第一电源线8远离数据扇出线的一侧，至少部分多条信号引线2沿着显示区域100的边缘延伸，多条信号引线2被配置为连接边缘区域300上的GOA引线。多条信号引线2可以为时钟信号线、初始化线、高电平信号线、低电平信号线中的至少一种。
在示例性实施方式中，如图4b和图5a所示，第一无机绝缘层3位于基底1上且至少位于第一扇出区201上。第一无机绝缘层3位于多条信号引线2远离基底1的一侧，至少部分覆盖多条信号引线2，可以避免多条信号引线2受到水汽的影响。
在示例性实施方式中，第一有机复合绝缘层4位于基底1上且至少位于第一扇出区201上。第一有机复合绝缘层4位于第一无机绝缘层3远离基底1的一侧。
在示例性实施方式中，第二无机绝缘层5位于基底1上且至少位于第一 扇出区201上。第二无机绝缘层5至少位于第一有机复合绝缘层4远离基底1的一侧。
在示例性实施方式中，如图3所示，本公开实施例显示面板还包括第一电源引脚端9和第二电源引脚端10，第一电源引脚端9和第二电源引脚端10均位于绑定区域202靠近第一扇出区201的边缘，第一电源引脚端9和第二电源引脚端10分别与第一电源线8的两端连接。第一扇出区201包括至少一个扇出边缘区域，至少一个扇出边缘区域位于第一电源引脚端9和第二电源引脚端10中的之一远离另一个的一侧，即至少一个扇出边缘区域位于第一电源引脚端9和第二电源引脚端10中的之一靠近第一扇出区201边缘的一侧。
在示例性实施方式中，如图3所示，第一扇出区201包括第一扇出边缘区域和第二扇出边缘区域，第一扇出边缘区域位于第一电源引脚端9远离第二电源引脚端10一侧，第二扇出边缘区域位于第二电源引脚端10远离第一电源引脚端9一侧，即第一扇出边缘区域和第二扇出边缘区域分别位于第一扇出区201两侧边缘的区域。
在示例性实施方式中，如图5a所示，扇出边缘区域包括有机层覆盖区2012和有机层未覆盖区2011，第一有机复合绝缘层4在基底1的正投影位于有机层覆盖区2012，第一有机复合绝缘层4在基底1的正投影与有机层未覆盖区2011不交叠，第一有机复合绝缘层4没有覆盖有机层未覆盖区2011，使有机层未覆盖区2011中的第一无机绝缘层3暴露。第二无机绝缘层5覆盖有机层未覆盖区2011，即至少部分第二无机绝缘层5在基底1的正投影与有机层未覆盖区2011交叠。第二无机绝缘层5在基底1的正投影与第一有机复合绝缘层4在基底1的正投影至少部分交叠。
本公开实施例显示面板通过使第二无机绝缘层5在基底1的正投影与第一有机复合绝缘层4在基底1的正投影至少部分交叠，使至少部分第二无机绝缘层5与第一无机绝缘层3之间存在第一有机复合绝缘层4，第一有机复合绝缘层4能够保护第一无机绝缘层3，避免在刻蚀去除第二无机绝缘层5过程中将第一无机绝缘层3刻蚀，使第一无机绝缘层3能够保护多条信号引线2。
在示例性实施方式中，第一无机绝缘层3和第二无机绝缘层5均可以采用硅氧化物(SiOx)、硅氮化物(SiNx)和氮氧化硅(SiON)中的任意一种或更多种，可以是单层、多层或复合层，具有抗水氧能力。
在示例性实施方式中，如图4b和图5a所示，第二无机绝缘层5包括沿第一方向延伸的第一边缘501，和沿第二方向延伸的第二边缘502，第一边缘501和第二边缘502的至少之一在基底的正投影与第一有机复合绝缘层4在基底的正投影交叠。其中，第一方向和第二方向交叉；示例的，第一方向和第二方向垂直。
在示例性实施方式中，如图4b和图5a所示，第一边缘501和第二边缘502在基底的正投影均与第一有机复合绝缘层4在基底的正投影交叠，使第二无机绝缘层5的第一边缘501和第二边缘502均位于第一有机复合绝缘层4上。
在示例性实施方式中，如图4b和图5a所示，第一有机复合绝缘层4包括沿第一方向延伸的第三边缘404，和沿第二方向延伸的第四边缘405，第二无机绝缘层5的第二边缘502在基底的正投影与第四边缘405在基底的正投影之间的最小距离为L1。其中，L1大于等于40um，小于等于200um。
在示例性实施方式中，如图4b所示，第二无机绝缘层5的第一边缘501在基底的正投影与第一有机复合绝缘层4的第三边缘404在基底的正投影之间的最小距离大于等于40um，小于等于200um。
在示例性实施方式中，如图4b和图5a所示，第一有机复合绝缘层4包括沿着远离基底1方向依次设置在第一无机绝缘层3上的第一有机绝缘层401、第二有机绝缘层402以及第三有机绝缘层403，第一有机绝缘层401、第二有机绝缘层402和第三有机绝缘层403均包括第三边缘和第四边缘，第二无机绝缘层5的第二边缘502在基底的正投影与第一有机绝缘层401的第四边缘在基底的正投影之间的最小距离为L2。其中，L2大于等于20um，小于等于180um。
在示例性实施方式中，如图4b和图5a所示，第二无机绝缘层5的第二边缘502在基底的正投影与第二有机绝缘层402的第四边缘在基底的正投影 之间的最小距离为L3。其中，L3大于等于30um，小于等于190um。
在示例性实施方式中，如图4b和图5a所示，第一有机绝缘层401的第四边缘在基底的正投影与第二有机绝缘层702的第四边缘在基底的正投影之间的最小距离为L4，第二有机绝缘层402的第四边缘在基底的正投影与第三有机绝缘层403的第四边缘在基底的正投影之间的最小距离为L5。其中，L4与L5的比值为1至2。例如，L4和L5均为10um。
图6为本公开显示面板中显示区域的剖视图。在示例性实施方式中，本公开显示面板还包括位于显示区域上驱动结构层、位于驱动结构层上的发光结构层以及位于发光结构层上的触控结构层。如图6所示，在垂直于显示面板所在平面，驱动结构层包括设置在基底1上的第一绝缘层11，设置在第一绝缘层11上的有源层12，覆盖有源层12的第二绝缘层13，设置在第二绝缘层13上的第一栅金属层，覆盖第一栅金属层的第三绝缘层16，设置在第三绝缘层16上的第二栅金属层，覆盖第二栅金属层的第四绝缘层18，设置在第四绝缘层18上的第一源漏金属层，覆盖第一源漏金属层的第五绝缘层21，第一栅金属层至少包括栅电极14和第一电容电极15，第二栅金属层至少包括第二电容电极17，第一源漏金属层至少包括源电极20和漏电极19，第一电容电极15和第二电容电极17组成存储电容，第五绝缘层21与第一无机绝缘层3位于同一层且采用相同材料通过同一构图工艺制备而成。其中，第五绝缘层21可以被称之为钝化(PVX)层。
在示例性实施方式中，如图6所示，在垂直于显示面板所在平面，本公开显示面板还包括设置在驱动结构层上的第一平坦层22，设置在第一平坦层22上的第二源漏金属层23，覆盖第二源漏金属层23的第二平坦层24，设置在第二平坦层24上的像素定义层26，第一平坦层22与第一有机绝缘层401位于同一层且采用相同材料通过同一构图工艺制备而成；第二平坦层24与第二有机绝缘层402位于同一层且采用相同材料通过同一构图工艺制备而成；像素定义层26与第三有机绝缘层403位于同一层且采用相同材料通过同一构图工艺制备而成。
在示例性实施方式中，如图6所示，在垂直于显示面板所在平面，发光结构层中的多个发光单元均包括设置在第二平坦层24上的阳极25、设置在 阳极25上的有机发光层27以及设置在有机发光层27上的阴极28，像素定义层26中设置有像素开口，像素开口将阳极25暴露，有机发光层27位于像素开口中，与暴露的阳极25电连接，阴极28覆盖像素开口，与像素开口中的有机发光层27电连接。
在示例性实施方式中，如图6所示，在垂直于显示面板所在平面，本公开显示面板还包括封装层29，封装层29覆盖发光结构层，用于保护发光结构层。封装层29可以包括沿着远离基底1方向依次设置的第一无机封装层、有机封装层和第二无机封装层。
在示例性实施方式中，如图6所示，在垂直于显示面板所在平面，触控结构层包括依次设置在发光结构层远离基底1一侧的缓冲层30、桥电极层31、第七绝缘层32、触控电极层33以及保护层34，第七绝缘层32与第二无机绝缘层5位于同一层且采用相同材料通过同一构图工艺制备而成。
在示例性实施方式中，多条信号引线2分别位于第一栅金属层和第二栅金属层。具体地，如图5a所示，多条信号引线2包括多条第一引线201和位于多条第一引线201远离基底1一侧的多条第二引线202，多条第一引线201和多条第二引线202电连接，第三绝缘层16位于多条第一引线201和多条第二引线202之间，多条第一引线201分别位于第一栅金属层，可以与第一栅金属层中的栅电极14和第一电容电极15位于同一层且采用相同材料通过同一构图工艺制备而成；多条第二引线202位于第二栅金属层，可以与第二栅金属层中的第二电容电极17位于同一层且采用相同材料通过同一构图工艺制备而成。
图5b为本公开显示面板中第一扇出区的局部剖视图二。其中，图5b为图4b中A-A处的剖视图。在示例性实施方式中，如图5b所示，多条信号引线2分别位于第一栅金属层，可以与第一栅金属层中的栅电极14和第一电容电极15位于同一层且采用相同材料通过同一构图工艺制备而成。
图5c为本公开显示面板中第一扇出区的局部剖视图三。其中，图5c为图4b中A-A处的剖视图。在示例性实施方式中，如图5c所示，多条信号引线2分别位于第二栅金属层，可以与第二栅金属层中的第二电容电极17位于 同一层且采用相同材料通过同一构图工艺制备而成。
在示例性实施方式中，如图3所示，在第一扇出区201中的有机层覆盖区2012，第一有机复合绝缘层4中设置有至少一个第一凹槽6，至少一个第一凹槽6位于显示区域100和弯折区域202之间。第一凹槽6在平行于显示面板所在平面方向为长条矩形。第一凹槽6的槽底延伸至第一无机绝缘层3的表面，即第一凹槽6所在的区域为第一有机复合绝缘层4刻蚀去除的区域。第一凹槽6被配置为缓解弯折区202的弯折应力。
在示例性实施方式中，第二无机绝缘层5在基底1的正投影与弯折区202不交叠，即弯折区202上的第二无机绝缘层5完全被刻蚀去除，从而避免第二无机绝缘层5影响弯折区202的弯折。
在示例性实施方式中，第二扇出区203位于弯折区202远离所述显示区域100一侧，第二扇出区203上设置有第二有机复合绝缘层，第二有机复合绝缘层与第一有机复合绝缘层4位于同层，采用相同的材料通过同一构图工艺制备而成。第二有机复合绝缘层中设置有至少一个第二凹槽7，至少一个第二凹槽7位于弯折区202远离显示区域100一侧。第二凹槽7在平行于显示面板所在平面方向为长条矩形。第二凹槽7所在的区域为第二有机复合绝缘层4刻蚀去除的区域。第二凹槽7被配置为缓解弯折区202的弯折应力。
在示例性实施方式中，如图2所示，触控结构层可以为互容式结构。触控结构层可以包括多个第一触控单元110和多个第二触控单元120，第一触控单元110具有沿第一方向D1延伸的线形状，多个第一触控单元110沿第二方向D2依次排列，第二触控单元120具有沿第二方向D2延伸的线形状，多个第二触控单元120沿第一方向D1依次排列。其中，第一方向D1与第二方向D2交叉，示例的，第一方向D1与第二方向D2垂直。每个第一触控单元110包括沿第一方向D1依次排列的多个第一触控电极111和第一连接部112，第一触控电极111和第一连接部112交替设置且通过第一连接部112依次连接。每个第二触控单元120包括沿第二方向D2依次排列的多个第二触控电极121和第二连接部122，多个第二触控电极121间隔设置，相邻的第二触控电极121通过第二连接部122彼此连接。
在示例性实施方式中，多个第一触控电极111、多个第二触控电极121和多个第一连接部112可以同层位于触控电极层33，即多个第一触控电极111、多个第二触控电极121和多个第一连接部112可以采用相同的材料通过同一次图案化工艺形成。第一触控电极111和第一连接部112可以为相互连接的一体结构。第二连接部122可以位于桥电极层，通过过孔使相邻的第二触控电极121相互连接。第一触控电极111和第二触控电极121在第三方向D3上交替布置。其中，第三方向D3均与第一方向D1和第二方向D2不同。
在示例性实施方式中，第一触控电极可以是驱动(Tx)电极，第二触控电极可以是感应(Rx)电极。或者，第一触控电极可以是感应(Rx)电极，第二触控电极可以是驱动(Tx)电极。
在示例性实施方式中，第一触控电极111和第二触控电极121可以具有菱形状，例如可以是正菱形，或者是横长的菱形，或者是纵长的菱形。
在一些可能的实现方式中，第一触控电极111和第二触控电极121可以具有三角形、正方形、梯形、平行四边形、五边形、六边形和其它多边形中的任意一种或多种，本公开在此不做限定。
在示例性实施方式中，第一触控电极111和第二触控电极121可以是透明的导电电极。
在示例性实施方式中，边缘区域300上设置有多条驱动(Tx)引线和多条感应(Rx)引线，驱动引线的第一端与第一触控电极111连接，驱动引线的第二端沿着边缘区域300延伸到绑定区域200。感应引线的第一端与第二触控电极121连接，感应引线的第二端沿着边缘区域300延伸到绑定区域200。驱动引线和感应引线一起组成触控引线。
本公开还提供了一种显示面板的制备方法，显示面板包括基底，所述基底包括显示区域和至少部分围绕所述显示区域的周边区域，所述周边区域包括位于所述显示区域一侧的绑定区域，所述绑定区域包括第一扇出区和弯折区，所述弯折区位于所述第一扇出区远离所述显示区域的一侧，所述制备方法包括：
在所述基底上形成多条信号引线，多条信号引线至少位于所述第一扇出 区；
在多条信号引线上形成第一无机绝缘层，第一无机绝缘层至少位于所述第一扇出区；
在所述第一无机绝缘层上形成第一有机复合绝缘层，第一有机复合绝缘层至少位于所述第一扇出区；
在所述第一无机绝缘层上沉积覆盖所述第一有机复合绝缘层的无机绝缘薄膜，对所述无机绝缘薄膜进行构图工艺，使所述无机绝缘薄膜形成第二无机绝缘层；第二无机绝缘层至少位于所述第一扇出区。
其中，显示面板还包括第一电源线、第一电源引脚端和第二电源引脚端，第一电源线位于所述周边区域，且至少部分围绕所述显示区域；第一电源引脚端和第二电源引脚端位于所述绑定区域且分别与所述第一电源线的两端连接；所述第一扇出区包括至少一个扇出边缘区域，所述至少一个扇出边缘区域位于所述第一电源引脚端和所述第二电源引脚端中的之一远离另一个的一侧，所述扇出边缘区域包括有机层覆盖区和有机层未覆盖区，所述第一有机复合绝缘层在所述基底的正投影位于所述有机层覆盖区，所述第一有机复合绝缘层在所述基底的正投影与所述有机层未覆盖区不交叠，所述第二无机绝缘层覆盖所述有机层未覆盖区，且所述第二无机绝缘层在所述基底的正投影与所述第一有机复合绝缘层在所述基底的正投影至少部分交叠。
本公开还提供了一种显示装置，包括前述实施例的显示面板。显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本申请中的附图只涉及本公开涉及到的结构，其他结构可参考通常设计。在不冲突的情况下，本公开的实施例即实施例中的特征可以相互组合以得到新的实施例。
本领域的普通技术人员应当理解，可以对本公开的技术方案进行修改或者等同替换，而不脱离本公开技术方案的精神和范围，均应涵盖在本申请的权利要求的范围当中。

Claims (22)

  1. 一种显示面板，包括：
    基底，所述基底包括显示区域和至少部分围绕所述显示区域的周边区域，所述周边区域包括位于所述显示区域一侧的绑定区域，所述绑定区域包括第一扇出区和弯折区，所述弯折区位于所述第一扇出区远离所述显示区域的一侧；
    多条信号引线，位于所述基底上且至少位于所述第一扇出区；
    第一无机绝缘层，位于所述多条信号引线远离所述基底的一侧；
    第一有机复合绝缘层，位于所述第一无机绝缘层远离所述基底的一侧；
    第二无机绝缘层，至少位于所述第一有机复合绝缘层远离所述基底的一侧；
    第一电源线，位于所述周边区域，且至少部分围绕所述显示区域；
    第一电源引脚端和第二电源引脚端，位于所述绑定区域且分别与所述第一电源线的两端连接；
    所述第一扇出区包括至少一个扇出边缘区域，所述至少一个扇出边缘区域位于所述第一电源引脚端和所述第二电源引脚端中的之一远离另一个的一侧，所述扇出边缘区域包括有机层覆盖区和有机层未覆盖区，所述第一有机复合绝缘层在所述基底的正投影位于所述有机层覆盖区，所述第一有机复合绝缘层在所述基底的正投影与所述有机层未覆盖区不交叠，所述第二无机绝缘层覆盖所述有机层未覆盖区，且所述第二无机绝缘层在所述基底的正投影与所述第一有机复合绝缘层在所述基底的正投影至少部分交叠。
  2. 根据权利要求1所述的显示面板，其中，所述第一扇出区包括第一扇出边缘区域和第二扇出边缘区域，所述第一扇出边缘区域位于所述第一电源引脚端远离所述第二电源引脚端一侧，所述第二扇出边缘区域位于所述第二电源引脚端远离所述第一电源引脚端一侧。
  3. 根据权利要求1所述的显示面板，其中，所述第二无机绝缘层包括沿第一方向延伸的第一边缘，和沿第二方向延伸的第二边缘，所述第一方向和 所述第二方向交叉；所述第一边缘和所述第二边缘的至少之一在所述基底的正投影与所述第一有机复合绝缘层在所述基底的正投影交叠。
  4. 根据权利要求3所述的显示面板，其中，所述第一边缘和所述第二边缘的在所述基底的正投影均与所述第一有机复合绝缘层在所述基底的正投影交叠。
  5. 根据权利要求3所述的显示面板，其中，所述第一有机复合绝缘层包括沿所述第一方向延伸的第三边缘，和沿所述第二方向延伸的第四边缘，所述第二边缘在所述基底的正投影与所述第四边缘在所述基底的正投影之间的最小距离为L1，所述L1大于等于40um，小于等于200um。
  6. 根据权利要求3所述的显示面板，其中，所述第一有机复合绝缘层包括沿所述第一方向延伸的第三边缘，和沿所述第二方向延伸的第四边缘，所述第一边缘在所述基底的正投影与所述第三边缘在所述基底的正投影之间的最小距离大于等于40um，小于等于200um。
  7. 根据权利要求5所述的显示面板，其中，所述第一有机复合绝缘层包括沿着远离所述基底方向依次设置的第一有机绝缘层、第二有机绝缘层以及第三有机绝缘层，所述第一有机绝缘层、所述第二有机绝缘层以及所述第三有机绝缘层均包括所述第三边缘和所述第四边缘，所述第二边缘在所述基底的正投影与所述第一有机绝缘层的第四边缘在所述基底的正投影之间的最小距离为L2，所述L2大于等于20um，小于等于180um。
  8. 根据权利要求7所述的显示面板，其中，所述第二边缘502在所述基底的正投影与所述第二有机绝缘层的第四边缘在所述基底的正投影之间的最小距离为L3，所述L3大于等于30um，小于等于190um。
  9. 根据权利要求7所述的显示面板，其中，所述第一有机绝缘层的第四边缘在所述基底的正投影与所述第二有机绝缘层的第四边缘在所述基底的正投影之间的最小距离为L4，所述第二有机绝缘层的第四边缘在所述基底的正投影与所述第三有机绝缘层的第四边缘在所述基底的正投影之间的最小距离为L5，所述L4与所述L5的比值为1至2。
  10. 根据权利要求1至9任一所述的显示面板，还包括：位于所述显示 区域上驱动结构层、位于所述驱动结构层上的发光结构层以及位于所述发光结构层上的触控结构层。
  11. 根据权利要求10所述的显示面板，其中，所述驱动结构层包括设置在所述基底上的第一绝缘层，设置在所述第一绝缘层上的有源层，覆盖所述有源层的第二绝缘层，设置在所述第二绝缘层上的第一栅金属层，覆盖所述第一栅金属层的第三绝缘层，设置在所述第三绝缘层上的第二栅金属层，覆盖所述第二栅金属层的第四绝缘层，设置在所述第四绝缘层上的第一源漏金属层，覆盖所述第一源漏金属层的第五绝缘层，所述第一栅金属层至少包括栅电极和第一电容电极，所述第二栅金属层至少包括第二电容电极，所述第一源漏金属层至少包括源电极和漏电极，所述第一电容电极和所述第二电容电极组成存储电容，所述第五绝缘层与第一无机绝缘层位于同一层且材料相同。
  12. 根据权利要求11所述的显示面板，其中，所述多条信号引线分别位于所述第一栅金属层和所述第二栅金属层。
  13. 根据权利要求12所述的显示面板，其中，所述多条信号引线包括多条第一引线和位于所述多条第一引线远离所述基底一侧的多条第二引线，所述多条第一引线和所述多条第二引线电连接，所述第三绝缘层位于所述多条第一引线和所述多条第二引线之间，所述多条第一引线分别位于所述第一栅金属层，所述多条第二引线分别位于所述第二栅金属层。
  14. 根据权利要求11所述的显示面板，其中，所述多条信号引线分别位于所述第一栅金属层。
  15. 根据权利要求11所述的显示面板，其中，所述多条信号引线分别位于所述第二栅金属层。
  16. 根据权利要求11所述的显示面板，还包括设置在所述驱动结构层上的第一平坦层，设置在所述第一平坦层上的第二源漏金属层，覆盖所述第二源漏金属层的第二平坦层，设置在所述第二平坦层上的像素定义层，所述第一有机复合绝缘层包括沿着远离所述基底方向依次设置的第一有机绝缘层、第二有机绝缘层以及第三有机绝缘层，所述第一平坦层与所述第一有机绝缘 层位于同一层且材料相同，所述第二平坦层与所述第二有机绝缘层位于同一层且材料相同，所述像素定义层与所述第三有机绝缘层位于同一层且材料相同。
  17. 根据权利要求11所述的显示面板，其中，所述触控结构层包括依次设置在所述发光结构层远离所述基底一侧的桥电极层、第七绝缘层和触控电极层，所述第七绝缘层与所述第二无机绝缘层位于同一层且材料相同。
  18. 根据权利要求1至17任一所述的显示面板，其中，所述第一有机复合绝缘层中设置有至少一个第一凹槽，所述至少一个第一凹槽位于所述显示区域和弯折区域之间。
  19. 根据权利要求1至17任一所述的显示面板，其中，所述绑定区域还包括第二扇出区，所述第二扇出区位于所述弯折区远离所述显示区域一侧，所述第二扇出区上设置有第二有机复合绝缘层，所述第二有机复合绝缘层中设置有至少一个第二凹槽，所述至少一个第二凹槽位于所述弯折区远离所述显示区域一侧。
  20. 根据权利要求1至17任一所述的显示面板，其中，所述第二无机绝缘层在所述基底的正投影与所述弯折区不交叠。
  21. 根据权利要求1至17任一所述的显示面板，其中，所述多条信号线为时钟信号线、初始化线、高电平信号线、低电平信号线中的至少一种。
  22. 一种显示装置，包括如权利要求1至21任一项所述的显示面板。
PCT/CN2022/075159 2022-01-30 2022-01-30 显示面板、显示装置 WO2023142100A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/CN2022/075159 WO2023142100A1 (zh) 2022-01-30 2022-01-30 显示面板、显示装置
CN202280000122.3A CN117083998A (zh) 2022-01-30 2022-01-30 显示面板、显示装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2022/075159 WO2023142100A1 (zh) 2022-01-30 2022-01-30 显示面板、显示装置

Publications (1)

Publication Number Publication Date
WO2023142100A1 true WO2023142100A1 (zh) 2023-08-03

Family

ID=87470276

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/075159 WO2023142100A1 (zh) 2022-01-30 2022-01-30 显示面板、显示装置

Country Status (2)

Country Link
CN (1) CN117083998A (zh)
WO (1) WO2023142100A1 (zh)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105390525A (zh) * 2014-08-29 2016-03-09 三星显示有限公司 显示装置及其制造方法
CN209150099U (zh) * 2019-01-09 2019-07-23 昆山工研院新型平板显示技术中心有限公司 一种显示面板和显示装置
CN112133729A (zh) * 2020-09-25 2020-12-25 京东方科技集团股份有限公司 一种显示基板及其制备方法、显示装置
CN112420788A (zh) * 2020-11-12 2021-02-26 合肥维信诺科技有限公司 一种显示面板及其制作方法、显示装置
US20210257589A1 (en) * 2019-10-16 2021-08-19 Chengdu Boe Optoelectronics Technology Co., Ltd. Display substrate and manufacturing method thereof, and display device
CN113937236A (zh) * 2020-06-29 2022-01-14 京东方科技集团股份有限公司 显示基板及其制备方法、显示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105390525A (zh) * 2014-08-29 2016-03-09 三星显示有限公司 显示装置及其制造方法
CN209150099U (zh) * 2019-01-09 2019-07-23 昆山工研院新型平板显示技术中心有限公司 一种显示面板和显示装置
US20210257589A1 (en) * 2019-10-16 2021-08-19 Chengdu Boe Optoelectronics Technology Co., Ltd. Display substrate and manufacturing method thereof, and display device
CN113937236A (zh) * 2020-06-29 2022-01-14 京东方科技集团股份有限公司 显示基板及其制备方法、显示装置
CN112133729A (zh) * 2020-09-25 2020-12-25 京东方科技集团股份有限公司 一种显示基板及其制备方法、显示装置
CN112420788A (zh) * 2020-11-12 2021-02-26 合肥维信诺科技有限公司 一种显示面板及其制作方法、显示装置

Also Published As

Publication number Publication date
CN117083998A (zh) 2023-11-17

Similar Documents

Publication Publication Date Title
US11460948B2 (en) Touch panel and preparation method thereof, and display apparatus
JP7005566B2 (ja) タッチパネル及びタッチディスプレイ装置
KR102637068B1 (ko) 표시 장치 및 이의 제조 방법
TWI717787B (zh) 觸控顯示面板、觸控顯示裝置及其驅動方法
TWI731746B (zh) 觸控顯示裝置
KR102463812B1 (ko) 터치 디스플레이 장치 및 터치 센싱 방법
CN112445367B (zh) 触摸显示装置
JP6986601B2 (ja) タッチ表示装置
CN112860095B (zh) 触摸显示装置
KR20200009804A (ko) 터치 디스플레이 패널, 터치 디스플레이 장치
TW201508601A (zh) 觸控面板與觸控顯示面板
KR20200108148A (ko) 표시 장치
KR20210081701A (ko) 터치 스크린 일체형 발광 표시 장치
WO2022156341A1 (zh) 触控面板及其制备方法、显示触控装置
US11839018B2 (en) Flexible printed circuit board and display touch apparatus
WO2023142100A1 (zh) 显示面板、显示装置
US20230168757A1 (en) Touch Panel and Preparation Method thereof, and Display Touch Apparatus
KR20220136547A (ko) 표시 장치
TWI830424B (zh) 電子裝置
WO2023184244A1 (zh) 显示基板及显示装置
TWI821811B (zh) 柔性顯示裝置
WO2022236680A9 (zh) 显示面板及其制备方法、显示触控装置
US11917875B2 (en) Display device
US20240164173A1 (en) Display Panel, Manufacturing Method Thereof, and Display Device
US20240155761A1 (en) Flexible Printed Circuit Board and Touch-Control Display Apparatus

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 18016680

Country of ref document: US