WO2023124254A1 - 一种硼掺杂选择性发射极的制备方法及应用 - Google Patents

一种硼掺杂选择性发射极的制备方法及应用 Download PDF

Info

Publication number
WO2023124254A1
WO2023124254A1 PCT/CN2022/119038 CN2022119038W WO2023124254A1 WO 2023124254 A1 WO2023124254 A1 WO 2023124254A1 CN 2022119038 W CN2022119038 W CN 2022119038W WO 2023124254 A1 WO2023124254 A1 WO 2023124254A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
boron
silicon wafer
bsg
temperature
Prior art date
Application number
PCT/CN2022/119038
Other languages
English (en)
French (fr)
Inventor
曹育红
符黎明
Original Assignee
常州时创能源股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 常州时创能源股份有限公司 filed Critical 常州时创能源股份有限公司
Publication of WO2023124254A1 publication Critical patent/WO2023124254A1/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1876—Particular processes or apparatus for batch treatment of the devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention relates to the field of photovoltaics, in particular to a preparation method and application of a boron-doped selective emitter.
  • N-type crystalline silicon cells Due to the advantages of high minority carrier lifetime, low temperature coefficient, and no photothermal-induced attenuation caused by B-O recombination, N-type crystalline silicon cells have become the key development direction of a new generation of high-efficiency solar cells, and have attracted more and more attention from the industry.
  • the more mature N-type crystalline silicon batteries mainly include N-PERT, N-PERL, N-TOPCon and N-IBC and other structural batteries.
  • the selective emitter structure (Selective Emitter, referred to as SE) is to optimize the emitter area by heavily doping the electrode contact area and lightly doping between the electrodes, so that the gap between the metal electrode and the silicon chip can be reduced. contact resistance, and at the same time, it can reduce the carrier recombination in the diffusion layer region, enhance the output voltage and current of the battery, and thus significantly improve the battery efficiency.
  • an object of the present invention is to provide a method for preparing a boron-doped selective emitter, depositing a BSG layer on the surface of the silicon wafer after texturing, and then partially covering the mask layer on the surface of the BSG layer , so that the coverage area of the mask layer is consistent with the metal electrode printing area on the surface of the silicon wafer, and then the silicon wafer is oxidized at a high temperature, and finally the BSG layer and the mask layer on the silicon wafer are removed.
  • the deposition of the BSG layer on the surface of the silicon wafer after texturing comprises the following steps: placing the silicon wafer after the texturing in a tubular or chain boron diffusion furnace for BSG deposition and slight advancement, so that the surface of the silicon wafer is A BSG layer and a shallower boron junction are obtained.
  • depositing the BSG layer on the surface of the silicon wafer after texturing includes the following steps: placing the silicon wafer after texturing in equipment that can realize BSG deposition such as CVD, PECVD, etc. to deposit BSG, so that the surface of the silicon wafer can obtain One BSG layer.
  • BSG deposition such as CVD, PECVD, etc.
  • the mask layer is a high-temperature resistant and anti-oxidation film, which can maintain a good ability to block oxygen at a temperature of 800-1200°C.
  • the high temperature and oxidation resistant film is selected from any one of silicon nitride layer, silicon oxynitride layer, boron nitride layer, silicon oxide layer, silicone resin layer, and high temperature resistant ceramic layer.
  • the partial covering of the mask layer on the surface of the BSG layer includes the following steps: screen printing paste or laser transfer paste on a local area of the surface of the BSG layer, forming a mask layer in the local area, and the local area is connected with The metal electrode printing area on the surface of the silicon wafer is consistent.
  • the partial covering of the mask layer on the surface of the BSG layer includes the following steps: using a template to cover the surface of the BSG directly on the surface of the BSG layer in a local area of the BSG layer through CVD or PECVD and other equipment that can deposit a mask layer A mask layer is formed in a local area, which is consistent with the metal electrode printing area on the surface of the silicon wafer.
  • the partial covering of the mask layer on the surface of the BSG layer includes the following steps: depositing a mask layer on the entire area of the surface of the BSG layer through CVD or PECVD and other equipment that can deposit a mask layer, and then screen printing etching slurry corrosion For the mask layer in some areas, the uncorroded area is consistent with the metal electrode printing area on the surface of the silicon wafer.
  • a chain-type diffusion furnace is used for high-temperature oxidation advancement of the silicon wafer.
  • the chain-type diffusion furnace is provided with a constant temperature zone.
  • the temperature in the constant temperature zone is controlled at 800-1200°C, and the high-temperature oxidation of the silicon wafer is advanced in the constant temperature zone for 200-1000s.
  • a tubular diffusion furnace is used for high-temperature oxidation advancement of the silicon wafer.
  • nitrogen and oxygen are introduced into the tubular diffusion furnace.
  • the temperature of the tubular diffusion furnace is controlled at 800-1200° C., and the high-temperature oxidation advance time is 200-3000 s.
  • an RTP furnace is used for high-temperature oxidation advancement of the silicon wafer, and nitrogen and oxygen are introduced into the RTP furnace during high-temperature oxidation advancement.
  • the temperature of the RTP furnace is controlled at 800-1200°C, and the high-temperature oxidation advance time is 200-1000s.
  • the BSG layer and the mask layer on the silicon wafer are removed by using a cleaning solution containing HF.
  • Another object of the present invention is to provide a method for preparing an N-type battery, including the method for preparing a boron-doped selective emitter.
  • the advantages and beneficial effects of the present invention are: to provide a method for preparing a boron-doped selective emitter. After depositing the BSG layer, it only needs to partially cover the mask layer, and it can be prepared at high temperature without removing the BSG layer. SE structure.
  • the mask layer is selectively covered on the local area of the surface of the BSG layer (that is, the metal electrode printing area, hereinafter referred to as the electrode area), so as to inhibit the diffusion of boron in the electrode area into the ambient atmosphere during subsequent high-temperature advancement.
  • the mask layer is a high-temperature resistant and anti-oxidation film selected from silicon nitride (SiNx) layer, silicon oxynitride (SiOxNy) layer, nitride Boron layer, silicon oxide layer, silicone resin layer or high-temperature-resistant ceramic layer can inhibit the boron in the silicon surface of the electrode area and the BSG layer from diffusing into the ambient atmosphere (air), so that there are more boron sources in the electrode area Diffusion into the silicon substrate, the boron concentration obtained in the electrode area is higher and the junction depth is deeper; since the non-electrode area does not cover the mask layer, during the high-temperature oxidation process, the boron in the silicon surface and the BSG layer in the non-electrode area will be large Diffusion into the ambient atmosphere, the boron concentration obtained in the non-electrode area is lower and the junction depth is shallower;
  • a tubular diffusion furnace or RTP furnace is used for high-temperature oxidation advancement, a certain proportion of nitrogen and oxygen can be introduced into the tubular diffusion furnace or RTP furnace.
  • nitrogen and oxygen can be introduced into the tubular diffusion furnace or RTP furnace.
  • boron in the BSG layer in the non-electrode area can be promoted Diffusion in ambient atmosphere.
  • the invention has few process steps and low cost. After depositing the BSG layer, it only needs to cover the electrode area with a mask layer (silicon nitride layer, silicon oxynitride layer, boron nitride layer, silicon oxide layer or silicone resin layer),
  • the SE structure can be prepared by high-temperature advancement without removing the BSG layer.
  • the present invention has high feasibility and can directly utilize existing industrial equipment.
  • the present invention can use chain type propulsion, which can increase production capacity compared with tubular type.
  • the present invention has broad application prospects.
  • This embodiment provides a method for preparing a boron-doped selective emitter.
  • a BSG (borosilicate glass) layer is deposited on the surface of a silicon wafer after texturing, and then a local area on the surface of the BSG layer (that is, the metal electrode printing area, hereinafter referred to as Electrode area) covering the mask layer (silicon nitride layer, silicon oxynitride layer, boron nitride layer, silicon oxide layer or, silicone resin layer or high temperature resistant ceramic layer), so that the covered area of the mask layer is consistent with the surface of the silicon wafer
  • the metal electrode printing area is consistent, and then the silicon wafer is advanced at high temperature, and then the BSG layer and mask layer on the silicon wafer are removed.
  • BSG layer on the surface of the textured silicon wafer place the textured silicon wafer in a tubular boron diffusion furnace for tubular deposition and slight advancement, so that the surface of the silicon wafer can obtain a layer of BSG layer and a shallower Boron junction: After tube deposition and slight push are completed, the peak concentration of boron doping is 2E20cm -3 , the depth of boron junction is 100nm, the thickness of BSG layer is 20nm, and the square resistance is about 200 ⁇ ;
  • the mask layer can be any one of silicon nitride layer, silicon oxynitride layer, boron nitride layer, silicon oxide layer, silicone resin layer and high temperature resistant ceramic layer : Screen printing paste containing mask layer components on the local area of the BSG layer surface, specifically, paste containing SiNx components, SiOxNy components, boron nitride components, silicon oxide components, silicone resin components or high temperature resistant ceramic layer components , forming a mask layer in this local area, which is consistent with the metal electrode printing area on the surface of the silicon wafer; the width of the screen printing pattern is about 100um;
  • Carry out high-temperature oxidation advancement of silicon wafers use a chain diffusion furnace to carry out high-temperature advancement of silicon wafers.
  • the chain diffusion furnace is equipped with five temperature zones, and the conveyor belt speed is 100cm/min.
  • Constant temperature area, cooling area and furnace area the temperature in the constant temperature area is controlled at 800-1200 °C, the silicon wafer is advanced in the constant temperature area for 200-1000s at high temperature, and the square resistance of the electrode area is 80-100 ohms after the high-temperature oxidation is completed, and the square resistance of the non-electrode area is The resistance is 200-250 ohms;
  • This embodiment provides a method for preparing a boron-doped selective emitter, which is the same as that of Embodiment 1, except that the steps are as follows:
  • a mask layer is partially covered on the surface of the BSG layer.
  • the mask layer can be any one of SiNx layer, SiOxNy layer and silicon oxide layer: a device that can deposit a mask layer on a local area of the BSG layer surface by CVD or PECVD, During the deposition process, the template is used to cover the BSG surface to directly form a mask layer in a local area, which is consistent with the metal electrode printing area on the silicon wafer surface;
  • Carry out high-temperature oxidation promotion on silicon wafers Use RTP furnace to carry out high-temperature oxidation promotion on silicon wafers.
  • the temperature is controlled at 800-1200°C, and the high-temperature advance time is 200-1000s.
  • the square resistance of the electrode area is 80-100 ohms, and the square resistance of the non-electrode area is 200-250 ohms.
  • This embodiment provides a method for preparing a boron-doped selective emitter, which is the same as that of Embodiment 1, except that the steps are as follows:
  • the mask layer can be any one of SiNx layer, SiOxNy layer and silicon oxide layer: Deposit on the entire surface of the BSG layer by CVD or PECVD and other equipment that can deposit a mask layer Mask layer, then screen printing etching slurry corrosion mask layer in some areas, the uncorroded area is consistent with the metal electrode printing area on the silicon wafer surface; the etching slurry used in this embodiment is the etching slurry containing HF ;
  • This embodiment provides a method for preparing an N-type battery, the N-type battery is a TOPCon solar cell, which specifically includes the following steps:
  • the mask layer is SiNx layer, SiOxNy layer, boron nitride layer, silicon oxide layer, silicone resin layer or high temperature resistant ceramic layer:
  • a paste containing mask layer components is screen-printed, specifically a paste containing SiNx components, SiOxNy components, boron nitride components, silicon oxide components, silicone resin components or high-temperature resistant ceramic components.
  • This local area forms a mask layer, and this local area is consistent with the metal electrode printing area on the surface of the silicon wafer; the width of the screen printing pattern is about 100um;
  • the mask layer can be deposited by CVD or PECVD. During the deposition process, the template is used to cover the BSG surface and directly form a mask layer in the local area.
  • the mask layer is SiNx layer, SiOxNy layer or silicon oxide. layer, the local area is consistent with the metal electrode printing area on the surface of the silicon wafer;
  • the mask layer is a SiNx layer, SiOxNy layer or a silicon oxide layer, and the thickness of the mask layer is 30-200nm; then screen printing
  • the etching slurry corrodes the local area mask layer, keeps the uncorroded area consistent with the metal electrode printing area on the silicon wafer surface, and the pattern width of the unetched area is 50-100um; the used etching slurry in this embodiment contains HF corrosion slurry;
  • the chain diffusion furnace is used to advance the silicon wafer at high temperature.
  • the chain diffusion furnace is equipped with five temperature zones, and the conveyor belt speed is 100cm/min.
  • the temperature in the zone is controlled at 800-1200°C, and the silicon wafer is advanced in the constant temperature zone at high temperature for 200-1000s.
  • the square resistance of the electrode area is 80-100 ohms, and the square resistance of the non-electrode area is 200-250 ohms;
  • silicon wafer backside polishing in solution Put the silicon wafer in the HF solution with a concentration of 0.5-10% to remove the BSG on the back of the silicon wafer by floating on water or covering the front with a water film; then place the silicon wafer in a sodium hydroxide solution or potassium hydroxide containing polishing additives Silicon wafer backside polishing in solution;
  • Removal of winding plating remove the film layer wound to the front side during the deposition and annealing of phosphorus-doped polysilicon on the back side, so as not to affect the electrical properties and appearance of the front side, and at the same time etch the edge damage caused by laser slicing;

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Sustainable Development (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Energy (AREA)
  • Manufacturing & Machinery (AREA)
  • Photovoltaic Devices (AREA)
  • Bipolar Transistors (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

本发明公开了一种硼掺杂选择性发射极的制备方法及应用，所述硼掺杂选择性发射极的制备方法包括在制绒后的硅片表面沉积BSG层，接着在BSG层表面局部覆盖掩膜层，使掩膜层的覆盖区域与硅片表面的金属电极印刷区域一致，然后对硅片进行高温推进，最后将硅片上的BSG层和掩膜层去除。本发明的硼掺杂选择性发射极的制备方法，其在沉积BSG层后只需局部覆盖掩膜层，能在不去除BSG层的条件下高温推进即可制备SE结构。

Description

一种硼掺杂选择性发射极的制备方法及应用 技术领域
本发明涉及光伏领域，具体涉及一种硼掺杂选择性发射极的制备方法及应用。
 背景技术
由于具有少子寿命高、温度系数低以及无B-O复合导致的光热诱导衰减等优点，N型晶硅电池已成为新一代高效太阳能电池的重点发展方向，也越来越受到业界的关注。目前较为成熟的N型晶硅电池主要包括N-PERT、N-PERL、N-TOPCon和N-IBC等结构电池。
选择性发射极结构（Selective Emitter，简称SE）是通过在电极接触区域进行重掺杂，电极之间进行轻掺杂，实现对发射极区域的优化，这样便可降低金属电极和硅片之间的接触电阻，同时还能降低扩散层区域的载流子复合，增强电池的输出电压和电流，从而能显著提升电池效率。
磷的SE结构目前已在工业生产中得以应用，但是硼SE结构还没有得到有效应用。目前行业中也有一些针对硼SE结构的制备方法，主要分为以下两大类：（1）通过掩膜法结合二次硼扩的方法制备硼SE结构，主要是通过在硅衬底预先长掩膜层，然后对局部区域进行刻蚀形成窗口，之后进行一次硼扩散形成重掺，去掉掩膜后再二次硼扩散形成轻掺杂，该方法过程相对较为复杂，生产成本较高，难以在工业化中得以应用；（2）激光SE法，主要是通过沉积或涂抹硼源后再通过局部区域的激光推进实现重掺，其他未打激光区域实现轻掺，进而实现SE结构，由于硼的扩散所需激活能较高，需要较高的激光能量才能足以使得硼进行有效推进，这个过程激光不可避免会对基底硅产生较大烧蚀损伤，既会影响绒面结构，同时带来复合损伤，影响电池效率提升。
 技术解决方案
为解决现有技术的缺陷，本发明的一个目的在于提供一种硼掺杂选择性发射极的制备方法，在制绒后的硅片表面沉积BSG层，接着在BSG层表面局部覆盖掩膜层，使掩膜层的覆盖区域与硅片表面的金属电极印刷区域一致，然后对硅片进行高温氧化推进，最后将硅片上的BSG层和掩膜层去除。
优选的，所述在制绒后的硅片表面沉积BSG层，包括如下步骤：将制绒后的硅片置于管式或者链式硼扩散炉中进行BSG沉积和轻微推进，使硅片表面获得一层BSG层和较浅的硼结。
优选的，所述在制绒后的硅片表面沉积BSG层，包括如下步骤：将制绒后的硅片置于CVD、PECVD等可实现BSG沉积的设备中进行BSG沉积，使硅片表面获得一层BSG层。
优选的，所述掩膜层为耐高温抗氧化膜，在温度800-1200℃下能保持良好的阻隔氧气的能力。
进一步优选的，所述耐高温抗氧化膜选自氮化硅层、氮氧化硅层、氮化硼层、氧化硅层、有机硅树脂层、耐高温陶瓷层中的任意一种。
优选的，所述在BSG层表面局部覆盖掩膜层，包括如下步骤：在BSG层表面局部区域丝网印刷浆料或者激光转印浆料，在该局部区域形成掩膜层，该局部区域与硅片表面的金属电极印刷区域一致。
优选的，所述在BSG层表面局部覆盖掩膜层，包括如下步骤：在BSG层表面局部区域通过CVD或PECVD等可沉积掩膜层的设备，在沉积过程中采用模板覆盖在BSG表面直接在局部区域形成掩膜层，该局部区域与硅片表面的金属电极印刷区域一致。
优选的，所述在BSG层表面局部覆盖掩膜层，包括如下步骤：在BSG层表面全部区域通过CVD或PECVD等可沉积掩膜层的设备沉积掩膜层，再丝网印刷腐蚀浆料腐蚀部分区域的掩膜层，未被腐蚀的区域与硅片表面的金属电极印刷区域一致。
优选的，采用链式扩散炉对硅片进行高温氧化推进，链式扩散炉设置恒温区，恒温区的温度控制在800-1200℃，硅片在恒温区高温氧化推进200-1000s。
优选的，采用管式扩散炉对硅片进行高温氧化推进，高温氧化推进时，管式扩散炉中通入氮气和氧气。
进一步优选的，管式扩散炉的温度控制在800-1200℃，高温氧化推进的时间为200-3000s。
优选的，采用RTP炉对硅片进行高温氧化推进，高温氧化推进时，RTP炉中通入氮气和氧气。
进一步优选的，RTP炉的温度控制在800-1200℃，高温氧化推进的时间为200-1000s。
优选的，采用含有HF的清洗液将硅片上的BSG层和掩膜层去除。
本发明的另一目的在于提出一种N型电池的制备方法，包括上述硼掺杂选择性发射极的制备方法。
 有益效果
本发明的优点和有益效果在于：提供一种硼掺杂选择性发射极的制备方法，在沉积BSG层后只需局部覆盖掩膜层，能在不去除BSG层的条件下高温推进即可制备SE结构。
本发明通过选择性的在BSG层表面局部区域（即金属电极印刷区域，以下简称电极区）覆盖掩膜层，对后续高温推进时电极区的硼向环境气氛中扩散起到抑制作用。具体的：在高温推进的过程中，由于电极区覆盖有掩膜层，该掩膜层为耐高温抗氧化膜，选自氮化硅（SiNx）层、氮氧化硅（SiOxNy）层、氮化硼层、氧化硅层、有机硅树脂层或耐高温陶瓷层，能抑制电极区硅表面和BSG层中的硼往环境气氛（空气）中扩散逸出，从而使电极区有更多的硼源往硅衬底中扩散，电极区获得的硼浓度较高且结深较深；由于非电极区没有覆盖掩膜层，高温氧化推进过程中，非电极区硅表面和BSG层中的硼会大量往环境气氛中扩散逸出，非电极区获得的硼浓度较低和且结深较浅；利用电极区和非电极区的差异便能制备出选择性发射极。
若采用管式扩散炉或者RTP炉进行高温氧化推进，可向管式扩散炉或者RTP炉通入一定比例的氮气和氧气，在有氧气的环境中，能促进非电极区BSG层中的硼往环境气氛中扩散。
本发明具有如下特点：
1、本发明工艺步骤少，成本低，沉积BSG层后只需在电极区覆盖掩膜层（氮化硅层、氮氧化硅层、氮化硼层、氧化硅层或有机硅树脂层），在不去除BSG层的条件下高温推进即可制备SE结构。
2、本发明可行性高，可以直接利用现有产业设备。
3、本发明可使用链式推进，相对管式能增加产能。
4、本发明应用前景广。
 本发明的最佳实施方式
下面结合实施例，对本发明的具体实施方式作进一步描述。以下实施例仅用于更加清楚地说明本发明的技术方案，而不能以此来限制本发明的保护范围。
实施例1
本实施例提供一种硼掺杂选择性发射极的制备方法，在制绒后的硅片表面沉积BSG（硼硅玻璃）层，然后在BSG层表面局部区域（即金属电极印刷区域，以下简称电极区）覆盖掩膜层（氮化硅层、氮氧化硅层、氮化硼层、氧化硅层或、有机硅树脂层或耐高温陶瓷层），使掩膜层的覆盖区域与硅片表面的金属电极印刷区域一致，然后对硅片进行高温推进，然后将硅片上的BSG层和掩膜层去除。
具体步骤如下：
1）制绒：选取N型硅原片进行常规清洗和制绒；
2）在制绒后的硅片表面沉积BSG层：将制绒后的硅片置于管式硼扩散炉中进行管式沉积和轻微推进，使硅片表面获得一层BSG层和较浅的硼结；管式沉积和轻微推进完成后，硼掺杂的峰值浓度为2E20cm -3，硼结深度为100nm，BSG层的厚度为20nm，方阻为200欧左右；
3）在BSG层表面局部覆盖掩膜层，掩膜层可以为氮化硅层、氮氧化硅层、氮化硼层、氧化硅层或、有机硅树脂层和耐高温陶瓷层中任意一种：在BSG层表面局部区域丝网印刷含有掩膜层成分的浆料，具体为含有SiNx成分、SiOxNy成分、氮化硼成分、氧化硅成分、有机硅树脂成分或者耐高温陶瓷层成分的浆料，在该局部区域形成掩膜层，该局部区域与硅片表面的金属电极印刷区域一致；丝网印刷的图形宽度约为100um；
4）对硅片进行高温氧化推进：采用链式扩散炉对硅片进行高温推进，链式扩散炉设置五个温区，传送带速为100cm/min，硅片依次经过进炉区、升温区、恒温区、降温区和出炉区，恒温区的温度控制在800-1200℃，硅片在恒温区高温推进200-1000s，高温氧化推进完成后电极区方阻为80-100欧，非电极区域方阻为200-250欧；
5）采用含有HF的清洗液将硅片上的BSG层和掩膜层清洗去除。
实施例2
本实施例提供一种硼掺杂选择性发射极的制备方法，同实施例1，不同的是如下步骤：
2）在制绒后的硅片表面沉积BSG层：将制绒后的硅片置于CVD、PECVD等可实现BSG沉积的设备中进行BSG沉积，使硅片表面获得一层BSG层；
3）在BSG层表面局部覆盖掩膜层，掩膜层可以为SiNx层、SiOxNy层和氧化硅层中任意一种：在BSG层表面局部区域通过CVD或PECVD等可沉积掩膜层的设备，在沉积过程中采用模板覆盖在BSG表面直接在局部区域形成掩膜层，该局部区域与硅片表面的金属电极印刷区域一致；
4）对硅片进行高温氧化推进：采用RTP炉对硅片进行高温氧化推进，高温氧化推进时，RTP炉中通入氮气和氧气，气体流量为O 2:N 2=1:4，RTP的温度控制在800-1200℃，高温推进的时间为200-1000s，高温氧化推进完成后电极区方阻为80-100欧，非电极区域方阻为200-250欧。
实施例3
本实施例提供一种硼掺杂选择性发射极的制备方法，同实施例1，不同的是如下步骤：
3）在BSG层表面局部覆盖掩膜层，掩膜层可以为SiNx层、SiOxNy层和氧化硅层中任意一种：在BSG层表面全部区域通过CVD或PECVD等可沉积掩膜层的设备沉积掩膜层，再丝网印刷腐蚀浆料腐蚀部分区域的掩膜层，未被腐蚀的区域与硅片表面的金属电极印刷区域一致；本实施例所用的腐蚀浆料为含有HF的腐蚀浆料；
4）对硅片进行高温氧化推进：采用管式扩散炉对硅片进行高温推进，管式扩散炉中通入氮气和氧气，气体流量为O 2:N 2=1:4，管式扩散炉的温度控制在800-1200℃，高温推进的时间为200-3000s，高温氧化推进完成后电极区方阻为80-100欧，非电极区域方阻为200-250欧。
实施例4
本实施例提供一种N型电池的制备方法，该N型电池为TOPCon太阳能电池，具体包括如下步骤：
1）制绒：选取N型硅原片进行常规清洗和制绒；
2）在制绒后的硅片表面沉积BSG层：
将制绒后的硅片置于管式硼扩散炉中进行管式沉积和轻微推进，使硅片表面获得一层BSG层和较浅的硼结；管式沉积和轻微推进完成后，硼掺杂的峰值浓度为2E20cm -3，硼结深度为100nm，BSG层的厚度为20nm，方阻为200欧左右；
或者，
将制绒后的硅片置于CVD、PECVD等可实现BSG沉积的设备中进行BSG沉积，使硅片表面获得一层BSG层；
3）在BSG层表面局部覆盖掩膜层，掩膜层为SiNx层、SiOxNy层、氮化硼层、氧化硅层、有机硅树脂层或者耐高温陶瓷层：
在BSG层表面局部区域丝网印刷含有掩膜层成分的浆料，具体为含有SiNx成分、SiOxNy成分、氮化硼成分、氧化硅成分、有机硅树脂成分或者耐高温陶瓷成分的浆料，在该局部区域形成掩膜层，该局部区域与硅片表面的金属电极印刷区域一致；丝网印刷的图形宽度约为100um；
或者，
在BSG层表面局部区域通过CVD或PECVD等可沉积掩膜层的设备，在沉积过程中采用模板覆盖在BSG表面直接在局部区域形成掩膜层，掩膜层为SiNx层、SiOxNy层或氧化硅层，该局部区域与硅片表面的金属电极印刷区域一致；
或者，
在BSG层表面全部区域通过CVD或PECVD等可沉积掩膜层的设备沉积掩膜层，掩膜层为SiNx层、SiOxNy层或氧化硅层，掩膜层厚度为30-200nm；再丝网印刷腐蚀浆料腐蚀局部区域掩膜层，保持未被腐蚀的区域与硅片表面的金属电极印刷区域一致，未被腐蚀的区域的图形宽度为50-100um；本实施例所用的腐蚀浆料为含有HF的腐蚀浆料；
4）对硅片进行高温推进：
采用链式扩散炉对硅片进行高温推进，链式扩散炉设置五个温区，传送带速为100cm/min，硅片依次经过进炉区、升温区、恒温区、降温区和出炉区，恒温区的温度控制在800-1200℃，硅片在恒温区高温推进200-1000s，高温推进完成后电极区方阻为80-100欧，非电极区域方阻为200-250欧；
或者，
采用管式扩散炉对硅片进行高温推进，管式扩散炉中通入氮气和氧气，气体流量为O 2:N 2=1:4，管式扩散炉的温度控制在800-1200℃，高温推进的时间为200-3000s；
或者，
采用RTP炉对硅片进行高温推进，RTP中通入氮气和氧气，气体流量为O 2:N 2=1:4，RTP的温度控制在800-1200℃，高温推进的时间为200-1000s；
5）去除背面BSG和背面碱抛光：
采用水上漂或者正面水膜覆盖的方式，将硅片置于浓度0.5-10%的HF溶液中去除硅片背面BSG；再将硅片置于含有抛光添加剂成分的氢氧化钠溶液或氢氧化钾溶液中实现硅片背面抛光；
6）去除正面掩膜层和BSG：
采用浓度0.5-20%的HF溶液同时清洗正面掩膜层和BSG；
7)形成背面隧穿钝化结构：
在硅片背面沉积隧穿氧化层以及掺磷多晶硅层，并对硅片进行退火处理；
8) 去除绕镀：将背面掺磷多晶硅沉积和退火过程中绕到正面的膜层去除，以免影响正面的电性能和外观，同时刻蚀激光分片产生的边缘损伤；
8）沉积正背面钝化层及减反射层；
9）印刷烧结。
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明技术原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (15)

  1. 一种硼掺杂选择性发射极的制备方法，其特征在于，在制绒后的硅片表面沉积BSG层，接着在BSG层表面局部覆盖掩膜层，使掩膜层的覆盖区域与硅片表面的金属电极印刷区域一致，然后对硅片进行高温氧化推进，最后将硅片上的BSG层和掩膜层去除。
  2. 根据权利要求1所述的硼掺杂选择性发射极的制备方法，其特征在于，所述在制绒后的硅片表面沉积BSG层，包括如下步骤：将制绒后的硅片置于管式或者链式硼扩散炉中进行BSG沉积和轻微推进，使硅片表面获得一层BSG层和较浅的硼结。
  3. 根据权利要求1所述的硼掺杂选择性发射极的制备方法，其特征在于，所述在制绒后的硅片表面沉积BSG层，包括如下步骤：将制绒后的硅片置于CVD、PECVD等可实现BSG沉积的设备中进行BSG沉积，使硅片表面获得一层BSG层。
  4. 根据权利要求1所述的硼掺杂选择性发射极的制备方法，其特征在于，所述掩膜层为耐高温抗氧化膜，在温度800-1200℃下能保持良好的阻隔氧气的能力。
  5. 根据权利要求4所述的硼掺杂选择性发射极的制备方法，其特征在于，所述耐高温抗氧化膜选自氮化硅层、氮氧化硅层、氮化硼层、氧化硅层、有机硅树脂层和耐高温陶瓷层中的任意一种。
  6. 根据权利要求1所述的硼掺杂选择性发射极的制备方法，其特征在于，所述在BSG层表面局部覆盖掩膜层，包括如下步骤：在BSG层表面局部区域丝网印刷浆料或者激光转印浆料，在该局部区域形成掩膜层，该局部区域与硅片表面的金属电极印刷区域一致。
  7. 根据权利要求1所述的硼掺杂选择性发射极的制备方法，其特征在于，所述在BSG层表面局部覆盖掩膜层，包括如下步骤：在BSG层表面局部区域通过CVD或PECVD等可沉积掩膜层的设备，在沉积过程中采用模板覆盖在BSG表面直接在局部区域形成掩膜层，该局部区域与硅片表面的金属电极印刷区域一致。
  8. 根据权利要求1所述的硼掺杂选择性发射极的制备方法，其特征在于，所述在BSG层表面局部覆盖掩膜层，包括如下步骤：在BSG层表面全部区域通过CVD或PECVD等可沉积掩膜层的设备沉积掩膜层，再丝网印刷腐蚀浆料腐蚀部分区域的掩膜层，未被腐蚀的区域与硅片表面的金属电极印刷区域一致。
  9. 根据权利要求1所述的硼掺杂选择性发射极的制备方法，其特征在于，采用链式扩散炉对硅片进行高温氧化推进，链式扩散炉设置恒温区，恒温区的温度控制在800-1200℃，硅片在恒温区高温氧化推进200-1000s。
  10. 根据权利要求1所述的硼掺杂选择性发射极的制备方法，其特征在于，采用管式扩散炉对硅片进行高温氧化推进，高温氧化推进时，管式扩散炉中通入氮气和氧气。
  11. 根据权利要求10所述的硼掺杂选择性发射极的制备方法，其特征在于，管式扩散炉的温度控制在800-1200℃，高温氧化推进的时间为200-3000s。
  12. 根据权利要求1所述的硼掺杂选择性发射极的制备方法，其特征在于，采用RTP炉对硅片进行高温氧化推进，高温氧化推进时，RTP炉中通入氮气和氧气。
  13. 根据权利要求12所述的硼掺杂选择性发射极的制备方法，其特征在于，RTP炉的温度控制在800-1200℃，高温氧化推进的时间为200-1000s。
  14. 根据权利要求1所述的硼掺杂选择性发射极的制备方法，其特征在于，采用含有HF的清洗液将硅片上的BSG层和掩膜层去除。
  15. 一种N型电池的制备方法，其特征在于，包括权利要求1-14中任一项所述的硼掺杂选择性发射极的制备方法。
PCT/CN2022/119038 2021-06-01 2022-09-15 一种硼掺杂选择性发射极的制备方法及应用 WO2023124254A1 (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CN202110607719.1A CN113363334A (zh) 2021-06-01 2021-06-01 一种硼掺杂选择性发射极的制备方法
CN202210000228.5 2022-01-01
CN202210000228.5A CN114497242A (zh) 2021-06-01 2022-01-01 一种硼掺杂选择性发射极的制备方法及应用

Publications (1)

Publication Number Publication Date
WO2023124254A1 true WO2023124254A1 (zh) 2023-07-06

Family

ID=77530730

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/119038 WO2023124254A1 (zh) 2021-06-01 2022-09-15 一种硼掺杂选择性发射极的制备方法及应用

Country Status (2)

Country Link
CN (2) CN113363334A (zh)
WO (1) WO2023124254A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114464700A (zh) * 2022-01-17 2022-05-10 常州时创能源股份有限公司 N型晶硅电池的选择性硼掺杂方法及其应用

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113363334A (zh) * 2021-06-01 2021-09-07 常州时创能源股份有限公司 一种硼掺杂选择性发射极的制备方法
CN113871512B (zh) * 2021-09-23 2023-01-03 常州时创能源股份有限公司 一种硼掺杂选择性发射极电池的制备方法
CN114479658B (zh) * 2022-01-01 2023-02-03 常州时创能源股份有限公司 Se掺杂用掩膜胶及其制备方法和应用
CN115020536A (zh) * 2022-04-30 2022-09-06 常州时创能源股份有限公司 一种ibc电池图形化p区制备方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102437238A (zh) * 2011-11-30 2012-05-02 晶澳（扬州）太阳能科技有限公司 一种用于晶体硅太阳电池硼掺杂的方法
US20130112260A1 (en) * 2010-04-26 2013-05-09 Photowatt International Method for preparing an n+pp+ or p+nn+ structure on silicon wafers
CN105576083A (zh) * 2016-03-11 2016-05-11 泰州中来光电科技有限公司 一种基于apcvd技术的n型双面太阳能电池及其制备方法
CN111628047A (zh) * 2020-06-01 2020-09-04 江苏顺风光电科技有限公司 一种N型TOPCon太阳能电池的制作方法
CN113363334A (zh) * 2021-06-01 2021-09-07 常州时创能源股份有限公司 一种硼掺杂选择性发射极的制备方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5414298B2 (ja) * 2009-02-13 2014-02-12 信越化学工業株式会社 太陽電池の製造方法
CN103151428A (zh) * 2013-03-26 2013-06-12 浙江晶科能源有限公司 一种晶体硅太阳电池选择性发射极的实现方法
CN109671807A (zh) * 2018-12-26 2019-04-23 浙江晶科能源有限公司 一种太阳能电池制备方法
CN111739982B (zh) * 2020-06-30 2022-10-11 浙江晶科能源有限公司 一种选择性发射极的制备方法和太阳能电池
CN112490304A (zh) * 2020-12-04 2021-03-12 东方日升（常州）新能源有限公司 一种高效太阳能电池的制备方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130112260A1 (en) * 2010-04-26 2013-05-09 Photowatt International Method for preparing an n+pp+ or p+nn+ structure on silicon wafers
CN102437238A (zh) * 2011-11-30 2012-05-02 晶澳（扬州）太阳能科技有限公司 一种用于晶体硅太阳电池硼掺杂的方法
CN105576083A (zh) * 2016-03-11 2016-05-11 泰州中来光电科技有限公司 一种基于apcvd技术的n型双面太阳能电池及其制备方法
CN111628047A (zh) * 2020-06-01 2020-09-04 江苏顺风光电科技有限公司 一种N型TOPCon太阳能电池的制作方法
CN113363334A (zh) * 2021-06-01 2021-09-07 常州时创能源股份有限公司 一种硼掺杂选择性发射极的制备方法
CN114497242A (zh) * 2021-06-01 2022-05-13 常州时创能源股份有限公司 一种硼掺杂选择性发射极的制备方法及应用

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114464700A (zh) * 2022-01-17 2022-05-10 常州时创能源股份有限公司 N型晶硅电池的选择性硼掺杂方法及其应用

Also Published As

Publication number Publication date
CN114497242A (zh) 2022-05-13
CN113363334A (zh) 2021-09-07

Similar Documents

Publication Publication Date Title
WO2023124254A1 (zh) 一种硼掺杂选择性发射极的制备方法及应用
KR101673565B1 (ko) 태양 전지 및 이의 제조방법
CN108963005B (zh) 一种新型复合结构全背面异质结太阳电池及制备方法
WO2022100081A1 (zh) 一种高效太阳能电池及其制备方法
WO2012008061A1 (ja) ボロン拡散層を有するシリコン太陽電池セル及びその製造方法
CN111725359B (zh) 一种钝化接触太阳能电池的制备方法
CN109087965B (zh) 一种背面钝化的晶体硅太阳能电池及其制备方法
CN111816727A (zh) 一种基于lpcvd的高效掺杂非晶硅技术的交叉指式背接触异质结太阳电池
CN112510121B (zh) 一种perc电池碱抛前后保护工艺
CN111509057A (zh) 一种n型电池及其制备方法
CN114975643B (zh) N-TOPCon光伏太阳能电池制备方法及太阳能电池
WO2024066207A1 (zh) 一种新型太阳能电池及其制作方法
CN112687761A (zh) 太阳能电池表面多层钝化方法
CN114497288A (zh) 栅线嵌入选择性重掺杂区域的异质结太阳能电池制造方法
CN113948611A (zh) 一种p型ibc电池及其制备方法、组件、光伏系统
CN115132852A (zh) 一种N型TOPCon太阳能电池及其制作方法
CN116741877A (zh) 一种tbc电池制备方法及tbc电池
CN115101627A (zh) 双面钝化接触太阳电池及其制备方法
CN113314627B (zh) 一种perc太阳能电池及制备方法
CN114823969A (zh) 一种提升钝化接触结构性能的低温氢等离子体辅助退火方法和TOPCon太阳能电池
US20150206990A1 (en) Solar cell production method, and solar cell produced by same production method
CN112687762A (zh) 太阳能电池表面钝化方法
CN108172642A (zh) 一种单晶掺镓双面太阳电池及其制备方法
CN108172637A (zh) 一种多晶掺镓背钝化太阳电池及其制备方法
WO2012162901A1 (zh) 背接触晶体硅太阳能电池片制造方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22913521

Country of ref document: EP

Kind code of ref document: A1