WO2023123784A1 - 减小射频功率放大器寄生参数的方法、装置及相关设备 - Google Patents

减小射频功率放大器寄生参数的方法、装置及相关设备 Download PDF

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WO2023123784A1
WO2023123784A1 PCT/CN2022/090600 CN2022090600W WO2023123784A1 WO 2023123784 A1 WO2023123784 A1 WO 2023123784A1 CN 2022090600 W CN2022090600 W CN 2022090600W WO 2023123784 A1 WO2023123784 A1 WO 2023123784A1
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transmission lines
substrate
power amplifier
radio frequency
distance
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French (fr)
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黄�焕
郭嘉帅
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Lansus Technologies Inc
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Lansus Technologies Inc
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings

Definitions

  • the invention relates to the technical field of wireless communication, in particular to a method, device and related equipment for reducing parasitic parameters of radio frequency power amplifiers.
  • Wireless communication refers to long-distance transmission communication between multiple nodes without transmission through conductors or cables. Wireless communication can be carried out by using radios, radios, etc.
  • radio frequency power amplifiers are used as a relatively important One of the devices, it mainly plays the role of amplifying the radio frequency signal, thereby improving the quality of communication, but when the radio frequency power amplifier is actually working, the transmission line on the chip substrate often has parasitic parameters, and the parasitic parameters have a great impact on the performance of the radio frequency power amplifier. Cause a great impact, thereby affecting the quality of wireless communication.
  • An embodiment of the present invention provides a method for reducing parasitic parameters of a radio frequency power amplifier, so as to solve the above technical problems.
  • an embodiment of the present invention provides a method for reducing parasitic parameters of a radio frequency power amplifier, including the following steps:
  • the substrate is prepared according to the preset plate-making process of the chip substrate
  • An insulating layer is provided outside the two transmission lines, and a metal mesh is added outside the insulating layer, and the metal mesh is single-ended grounded.
  • the following steps are further included:
  • the step of calculating the capacitive reactance of the two transmission lines according to the distance between the two transmission lines specifically includes:
  • s is the area of the opposite sides of the two transmission lines, wherein ⁇ is the dielectric constant of 4.3, ⁇ 0 is the vacuum dielectric constant of 8.86 ⁇ 10 -12 , ⁇ is the circumference ratio of 3.14, and f is the center frequency of the working frequency band of the RF power amplifier .
  • the insulating layer is made of foamed polyethylene material, and its thickness is 1mm-2.5mm.
  • the metal mesh is made of copper material.
  • the embodiment of the present invention also provides a device for reducing parasitic parameters of a radio frequency power amplifier, including:
  • the substrate manufacturing module is used to manufacture the substrate according to the preset chip substrate plate-making process
  • a distance increasing module configured to arrange at least two transmission lines on the substrate, and increase the distance between the two transmission lines on the substrate;
  • a calculation module configured to calculate the capacitive reactance of the two transmission lines according to the distance between the two transmission lines
  • the insulation increasing module is configured to arrange an insulating layer on the outside of the two transmission lines, and add a metal mesh on the outside of the insulating layer, and the single end of the metal mesh is grounded.
  • the distance increasing module further includes:
  • a first measuring unit for measuring the length and width of two opposite sides of said transmission line
  • the first calculation unit is configured to calculate the area of the two opposite sides of the two transmission lines according to the length and width of the opposite sides of the two transmission lines.
  • the insulating layer is made of foamed polyethylene material, and its thickness is 1mm-2.5mm.
  • an embodiment of the present invention also provides an electronic device, including: a memory, a processor, and a computer program stored on the memory and operable on the processor, and the processor executes the computer program
  • the program is to implement the steps in the method for reducing the parasitic parameters of the radio frequency power amplifier described in any one of the above.
  • an embodiment of the present invention also provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the method described in any one of the above-mentioned Steps in a method of reducing parasitic parameters of a radio frequency power amplifier.
  • the parasitic capacitance between the two transmission lines is reduced, and at the same time, a resistor with a negative resistance value is installed at the rear end of the two transmission lines.
  • a resistor with a negative resistance value is installed at the rear end of the two transmission lines.
  • FIG. 1 is a flowchart of a method for reducing parasitic parameters of a radio frequency power amplifier provided by an embodiment of the present invention
  • FIG. 2 is a flowchart of a method for reducing parasitic parameters of a radio frequency power amplifier provided by an embodiment of the present invention
  • FIG. 3 is a block diagram of a device for reducing parasitic parameters of a radio frequency power amplifier provided by an embodiment of the present invention
  • FIG. 4 is a block diagram of a device for reducing parasitic parameters of a radio frequency power amplifier provided by an embodiment of the present invention
  • Fig. 5 is a schematic structural diagram of an electronic device in an embodiment of the present invention.
  • Figure 1 is a flowchart of a method for reducing parasitic parameters of a radio frequency power amplifier provided by an embodiment of the present invention
  • Figure 2 is a flowchart of a method for reducing parasitic parameters of a radio frequency power amplifier provided by an embodiment of the present invention.
  • the present invention provides a method for reducing parasitic parameters of a radio frequency power amplifier, comprising the following steps:
  • a substrate is manufactured according to a preset chip substrate plate-making process.
  • the chip substrate is preset according to needs, and an adhesive layer is formed on an upper surface and a lower surface of the preset chip substrate; punching holes are formed on the preset chip substrate formed with the adhesive layer, and punching
  • the upper surface and the lower surface of the preset chip substrate are pressed with copper foil, and the copper foil is baked at the same time so that the copper foil is bonded to the preset chip substrate through the adhesive layer; the copper foil layer on the upper and lower surfaces of the preset chip substrate
  • Conductive pillars are formed at the surface of the copper foil, and the encapsulation gel is coated on the conductive pillars and covered on the copper foil; the encapsulation gel at the conductive pillars is ground until the conductive pillars are exposed outside the encapsulation gel; the board is removed to expose Presetting the copper foil on the chip substrate, and forming an electroplating layer on the copper foil; etching the copper foil layer exposed from the electroplating layer, and forming the first conductive circuit layer and the second conductive circuit layer on the copper
  • the parasitic between the two transmission lines can be reduced by increasing the distance between the two transmission lines Capacitance, which in turn can reduce the parasitic parameters of the two transmission lines.
  • the set resistance is used to offset the parasitic resistance caused by the parasitic capacitance .
  • An insulating layer is provided outside the two transmission lines, and a metal mesh is added outside the insulating layer, and a single end of the metal mesh is grounded.
  • the parasitic inductance will cause an induced magnetic field, and the induced magnetic field will cause an induced current, and the induced current Conducted to the ground through the metal mesh, so as to avoid the influence of the induced current on the radio frequency signal transmitted in the transmission line.
  • the parasitic capacitance, parasitic resistance and parasitic inductance the parasitic parameters of the transmission line on the chip substrate are reduced, and the situation that the parasitic parameters affect the quality of wireless communication is avoided.
  • the opposite sides of the two transmission lines are arranged in parallel, so by measuring the length and width of the opposite sides of the two transmission lines, the area of the opposite sides of the two transmission lines is obtained by multiplying the product of the length and width .
  • the step of calculating the capacitance between the two transmission lines according to the distance between the two transmission lines, and calculating the capacitive reactance of the two transmission lines according to the capacitance between the two transmission lines Specifically include:
  • s is the area of the opposite sides of the two transmission lines, where ⁇ is the dielectric constant of 4.3, the vacuum dielectric constant of 8.86 ⁇ 10 -12 , ⁇ is the circular ratio of 3.14, and f is the center frequency of the working frequency band of the radio frequency power amplifier.
  • the parasitic capacitance c between the two transmission lines is calculated by the formula (1), where ⁇ is the dielectric constant of 4.3, and ⁇ 0 is the vacuum dielectric constant of 8.86 ⁇ 10 -12 ;
  • formula (2) obtain capacitive reactance Xc, wherein ⁇ is the circumference ratio 3.14, and f is the center frequency of radio frequency power amplifier operating frequency band, and c is a parasitic capacitance, selects corresponding negative resistance according to the capacitive reactance Xc that calculates
  • a value resistor can be installed at the rear end of the two transmission lines to offset the parasitic resistance caused by the parasitic capacitance.
  • the insulating layer is made of foamed polyethylene material, and its thickness is 1mm-2.5mm.
  • Foamed polyethylene material is a semi-rigid foam plastic, which has excellent resistance to repeated compression, but it takes a long time to rebound, so it is an ideal packaging material.
  • the water vapor transmission rate is much lower than polystyrene and rigid foam polyurethane, and the water absorption is also much lower than polystyrene.
  • Thermal conductivity is about the same as polystyrene. The highest operating temperature is 80°C, and the lowest operating temperature is -84°C.
  • the thickness of the insulating layer is 1 mm, the thickness is small and the cost is low.
  • the thickness of the insulating layer can also be 1.2mm, 1.5mm, 2mm, 2.5mm, etc., and the specific thickness can be selected according to the actual situation.
  • the metal mesh is made of copper material.
  • the copper material has a good conductive effect, so that the induced current is conducted to the ground through the metal mesh, thereby preventing the induced current from affecting the radio frequency signal transmitted in the transmission line.
  • Figure 3 is a block diagram of a device for reducing parasitic parameters of a radio frequency power amplifier provided by an embodiment of the present invention
  • Figure 4 is a device block diagram for reducing parasitic parameters of a radio frequency power amplifier provided by an embodiment of the present invention Device block diagram.
  • the embodiment of the present invention also provides a device 20 for reducing parasitic parameters of a radio frequency power amplifier, including:
  • the substrate production module 21 is used to prepare the substrate according to the preset chip substrate plate-making process
  • a distance increasing module 22 configured to arrange at least two transmission lines on the substrate, and increase the distance between the two transmission lines on the substrate;
  • a calculation module 23 configured to calculate the capacitive reactance of the two transmission lines according to the distance between the two transmission lines;
  • the insulation increasing module 24 is configured to provide an insulating layer on the outside of the two transmission lines, and add a metal mesh on the outside of the insulating layer, and the single end of the metal mesh is grounded.
  • the substrate is manufactured through the substrate manufacturing module according to the preset chip substrate plate making process; at least two transmission lines are arranged on the substrate through the distance increasing module, and the distance between the two transmission lines on the substrate is increased.
  • the distance between the two transmission lines is calculated by the calculation module according to the distance between the two transmission lines, and the capacitance reactance of the two transmission lines is calculated; the insulation layer is arranged outside the two transmission lines through the insulation increase module, and the insulation layer A metal mesh is added outside, and the metal mesh is single-ended grounded.
  • the parasitic capacitance between the two transmission lines is reduced, and at the same time, a negative resistance resistor is installed at the rear end of the two transmission lines to offset the parasitic capacitance.
  • the resulting parasitic resistance, and the insulation layer is added outside the transmission line, and the metal mesh is added outside the insulation layer.
  • the transmission line generates parasitic inductance
  • the parasitic inductance will cause an induced magnetic field
  • the induced magnetic field will cause an induced current.
  • the induced current passes through The metal mesh is conducted to the ground, so as to prevent the induced current from affecting the radio frequency signal transmitted in the transmission line.
  • the distance increasing module 22 also includes:
  • a first measuring unit 221, configured to measure the length and width of two opposite sides of the transmission line
  • the first calculation unit 222 is configured to calculate the area of the two opposite sides of the two transmission lines according to the length and width of the opposite sides of the two transmission lines.
  • the above calculation module 23 specifically includes:
  • s is the area of the opposite sides of the two transmission lines, where ⁇ is the dielectric constant of 4.3, the vacuum dielectric constant of 8.86 ⁇ 10 -12 , ⁇ is the circular ratio of 3.14, and f is the center frequency of the working frequency band of the radio frequency power amplifier.
  • the parasitic capacitance c between the two transmission lines is calculated by the formula (1), where ⁇ is the dielectric constant of 4.3, and ⁇ 0 is the vacuum dielectric constant of 8.86 ⁇ 10 -12 ;
  • formula (2) obtain capacitive reactance Xc, wherein ⁇ is the circumference ratio 3.14, and f is the center frequency of radio frequency power amplifier operating frequency band, and c is a parasitic capacitance, selects corresponding negative resistance according to the capacitive reactance Xc that calculates
  • a value resistor can be installed at the rear end of the two transmission lines to offset the parasitic resistance caused by the parasitic capacitance.
  • the insulating layer is made of foamed polyethylene material, and its thickness is 1mm-2.5mm.
  • Foamed polyethylene material is a semi-rigid foam plastic, which has excellent resistance to repeated compression, but it takes a long time to rebound, so it is an ideal packaging material.
  • the water vapor transmission rate is much lower than polystyrene and rigid foam polyurethane, and the water absorption is also much lower than polystyrene.
  • Thermal conductivity is about the same as polystyrene. The highest operating temperature is 80°C, and the lowest operating temperature is -84°C.
  • the thickness of the insulating layer is 1 mm, the thickness is small and the cost is low.
  • the thickness of the insulating layer can also be 1.2mm, 1.5mm, 2mm, 2.5mm, etc., and the specific thickness can be selected according to the actual situation.
  • the metal mesh is made of copper material.
  • the copper material has a good conductive effect, so that the induced current is conducted to the ground through the metal mesh, thereby preventing the induced current from affecting the radio frequency signal transmitted in the transmission line.
  • the embodiment of the present invention also provides an electronic device 300, including: a memory 301, a processor 302, and a computer program stored in the memory 301 and operable on the processor 302, the processing When the computer program is executed by the device 302, various steps in the method for reducing parasitic parameters of a radio frequency power amplifier as described in any one of the above are realized.
  • the above-mentioned electronic devices may be mobile phones, monitors, computers, servers and other devices that can be used for optimal video-based target capture.
  • the electronic device provided by the embodiment of the present invention can realize each process of the video-based optimal target capture method in the above method embodiment, and can achieve the same beneficial effect. To avoid repetition, details are not repeated here.
  • the memory 301 includes at least one type of readable storage medium, and the readable storage medium includes flash memory, hard disk, multimedia card, card-type memory (for example, SD or DX memory, etc.), random access memory (RAM), static random access memory ( SRAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), programmable read-only memory (PROM), magnetic memory, magnetic disk, optical disk, etc.
  • the storage 301 may be an internal storage unit of the electronic device 300 , such as a hard disk or a memory of the electronic device 300 .
  • the memory 301 can also be an external storage device of the electronic device 300, such as a plug-in hard disk equipped on the electronic device 300, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, flash memory card (Flash Card), etc.
  • the memory 301 may also include both an internal storage unit of the electronic device 300 and an external storage device thereof.
  • the memory 301 is generally used to store an operating system installed in the electronic device 300 and various application software, such as a program code of a microstrip line modeling method, and the like.
  • the memory 301 can also be used to temporarily store various types of data that have been output or will be output.
  • the processor 302 may be a central processing unit (Central Processing Unit, CPU), a controller, a microcontroller, a microprocessor, or other data processing chips in some embodiments.
  • the processor 302 is generally used to control the overall operation of the electronic device 300 .
  • the processor 302 is configured to run program codes stored in the memory 301 or process data, for example, run program codes of a method for converting text to images based on a generative adversarial network.
  • an embodiment of the present invention also provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the method described in any one of the above-mentioned Various steps in a method for reducing parasitic parameters of a radio frequency power amplifier. And can achieve the same technical effect, in order to avoid repetition, no more details here.

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Abstract

本发明提供一种减小射频功率放大器寄生参数的方法、装置及相关设备，包括以下步骤：根据预设的芯片基板制版工艺制得基板；将至少两个传输线设置于所述基板上，并增大所述基板上两个所述传输线之间的距离；根据两个所述传输线之间的距离，计算两个传输线之间的电容，并根据两个传输线之间的电容值，计算两个所述传输线的容抗，并在两个所述传输线的后端安装一个负阻值的电阻；通过在两个所述传输线的外部设置绝缘层，并在所述绝缘层的外部增加金属网，所述金属网单端接地。本发明能够通过减小寄生电容、寄生电阻和寄生电感，从而减小芯片基板上传输线的寄生参数，避免寄生参数影响无线通信质量的情况，进而提升射频功率放大器的性能。

Description

减小射频功率放大器寄生参数的方法、装置及相关设备 技术领域
本发明涉及无线通信技术领域，尤其涉及一种减小射频功率放大器寄生参数的方法、装置及相关设备。
背景技术
无线通信是指多个节点间不经由导体或缆线传播进行的远距离传输通讯，利用收音机、无线电等都可以进行无线通讯，在进行无线通信的过程中，射频功率放大器作为一种比较重要的器件之一，其主要起到将射频信号放大的作用，从而提高通信的质量，但是射频功率放大器在实际工作的时候，其芯片基板上传输线往往会存在寄生参数，寄生参数对射频功率放大器的性能造成极大的影响，从而影响无线通信的质量。
发明内容
本发明实施例提供一种减小射频功率放大器寄生参数的方法，以解决上述技术问题。
第一方面，本发明实施例提供一种减小射频功率放大器寄生参数的方法，包括以下步骤：
根据预设的芯片基板制版工艺制得基板；
将至少两个传输线设置于所述基板上，并增大所述基板上两个所述传输线之间的距离；
根据两个所述传输线之间的距离，计算两个传输线之间的电容，并根据两个传输线之间的电容值，计算两个所述传输线的容抗，并在两个所述传输线的后端安装一个负阻值的电阻；
通过在两个所述传输线的外部设置绝缘层，并在所述绝缘层的外部增加金属网，所述金属网单端接地。
优选的，在所述将至少两个传输线设置于所述基板上，并增大所述基板上 两个所述传输线之间的距离之后，还包括以下步骤：
测量两个所述传输线相对侧的长度和宽度；
根据两个所述传输线相对侧的长度和宽度计算两个所述传输线相对侧的面积。
优选的，所述根据两个所述传输线之间的距离，计算两个所述传输线的容抗的步骤具体包括：
测量两个所述传输线之间的距离，并定义所述距离为d；
并通过公式
Figure PCTCN2022090600-appb-000001
计算两个所述传输线之间的寄生电容，定义所述寄生电容为c；
根据所述寄生电容，通过公式
Figure PCTCN2022090600-appb-000002
计算得到容抗，所述容抗定义为Xc；
其中，s为两个所述传输线相对侧的面积，其中ε为介电常数4.3，ε 0为真空介电常数8.86×10 -12，π为圆周率3.14，f为射频功率放大器工作频段的中心频率。
优选的，所述绝缘层为发泡聚乙烯材料制成，并且其厚度为1mm-2.5mm。
优选的，所述金属网为铜材料制成。
第二方面，本发明实施例还提供一种减小射频功率放大器寄生参数的装置，包括：
基板制作模块，用于根据预设的芯片基板制版工艺制得基板；
距离增大模块，用于将至少两个传输线设置于所述基板上，并增大所述基板上两个所述传输线之间的距离；
计算模块，用于根据两个所述传输线之间的距离，计算两个所述传输线的容抗；
绝缘增加模块，用于通过在两个所述传输线的外部设置绝缘层，并在所述绝缘层的外部增加金属网，所述金属网单端接地。
优选的，所述距离增大模块还包括：
第一测量单元，用于测量两个所述传输线相对侧的长度和宽度；
第一计算单元，用于根据两个所述传输线相对侧的长度和宽度计算两个所述传输线相对侧的面积。
优选的，所述绝缘层为发泡聚乙烯材料制成，并且其厚度为1mm-2.5mm。
第三方面，本发明实施例还提供了一种电子设备，包括：存储器、处理器及存储在所述存储器上并可在所述处理器上运行的计算机程序，所述处理器执行所述计算机程序时实现如上述任一项所述的减小射频功率放大器寄生参数的方法中的步骤。
第四方面，本发明实施例还提供了一种计算机可读存储介质，所述计算机可读存储介质上存储有计算机程序，所述计算机程序被处理器执行时实现如上述任一项所述的减小射频功率放大器寄生参数的方法中的步骤。
本发明实施例中，通过将基板上的两个传输线之间的距离增大，从而减小两个传输线之间的寄生电容，同时在两个传输线的后端安装一个负阻值的电阻，用于抵消寄生电容所造成的寄生电阻，并且在传输线的外部增加绝缘层，并在绝缘层的外部增加金属网，传输线产生寄生电感后，寄生电感会引发感应磁场，而感应磁场则会引发感应电流，感应电流通过金属网传导至大地，从而避免感应电流对传输线中传输的射频信号造成影响，进而提升射频功率放大器的性能。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明实施例提供的减小射频功率放大器寄生参数的方法流程图；
图2是本发明实施例提供的减小射频功率放大器寄生参数的方法流程图；
图3是本发明实施例提供的减小射频功率放大器寄生参数的装置模块图；
图4是本发明实施例提供的减小射频功率放大器寄生参数的装置模块图；
图5是本发明实施例中电子设备的结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的每个行人其他实施例，都属于本发明保护的范围。
本申请的说明书和权利要求书及附图说明中的术语“包括”和“具有”以及它们的任何变形，意图在于覆盖不排他的包含。本申请的说明书和权利要求书或附图中的术语“第一”、“第二”等是用于区别不同对象，而不是用于描述特定顺序。在本文中提及“实施例”意味着，结合实施例描述的特定特征、结构或特性可以包含在本申请的至少一个实施例中。在说明书中的各个位置出现该短语并不一定均是指相同的实施例，也不是与其它实施例互斥的独立的或备选的实施例。本领域技术人员显式地和隐式地理解的是，本文所描述的实施例可以与其它实施例相结合。
如图1-2所示，图1是本发明实施例提供的减小射频功率放大器寄生参数的方法流程图；图2是本发明实施例提供的减小射频功率放大器寄生参数的方法流程图。
第一方面，本发明提供一种减小射频功率放大器寄生参数的方法，包括以下步骤：
S1、根据预设的芯片基板制版工艺制得基板。
具体的，根据需要预设芯片基板，在预设芯片基板的一上表面及一下表面，各形成一黏着剂层；在形成有黏着剂层的预设芯片基板上进行冲孔，并在冲孔后的预设芯片基板的上表面和下表面压附铜箔，同时烘烤使该铜箔透过黏着剂层于预设芯片基板结合；在预设芯片基板的上、下表面的铜箔层处形成导电柱，在铜箔的表面形成封装胶体，封装胶体包覆在导电柱并覆盖在铜箔上；研磨导电柱处的封装胶体，直至导电柱露出在封装胶体外；拆板，以露出在预设芯片基板上的铜箔，并在铜箔上形成电镀层；蚀刻从电镀层露出的铜箔层，以上、下表面的铜箔层形成第一导电线路层和第二导电线路层；将第一导电线路层或第二导电线路层表面的电镀层制作形成焊球垫，并在所形成的焊球垫表面再形成防焊层；对防焊层进行研磨直至完全暴露出焊球垫，得到芯片基板。
S2、将至少两个传输线设置于所述基板上，并增大所述基板上两个所述传输线之间的距离。
具体的，通过在基板上设置至少两个传输线，并逐渐增大所述基板上两个所述传输线之间的距离，通过增加两个传输线之间的距离来减小两个传输线之间的寄生电容，进而能够减少两个传输线的寄生参数。
S3、根据两个所述传输线之间的距离，计算两个传输线之间的电容，并根据两个传输线之间的电容值，计算两个所述传输线的容抗，并在两个所述传输线的后端安装一个负阻值的电阻。
具体的，通过计算两个传输线之间的距离以及传输线的容抗，并在两个所述传输线的后端安装一个负阻值的电阻，通过设置的电阻用于抵消寄生电容所造成的寄生电阻。
S4、通过在两个所述传输线的外部设置绝缘层，并在所述绝缘层的外部增加金属网，所述金属网单端接地。
具体的，通过在两个所述传输线的外部设置绝缘层，并在绝缘层的外部增加金属网，传输线产生寄生电感后，寄生电感会引发感应磁场，而感应磁场则会引发感应电流，感应电流通过金属网传导至大地，从而避免感应电流对传输线中传输的射频信号造成影响。通过减小寄生电容、寄生电阻和寄生电感，从而减小芯片基板上传输线的寄生参数，避免寄生参数影响无线通信质量的情况。
在本实施例中，在所述将至少两个传输线设置于所述基板上，并增大所述基板上两个所述传输线之间的距离之后，还包括以下步骤：
S21、测量两个所述传输线相对侧的长度和宽度。
S22、根据两个所述传输线相对侧的长度和宽度计算两个所述传输线相对侧的面积。
具体的，由于一般的传输线为矩形结构设置，使得两个传输线相对侧为平行设置，这样通过测量两个传输线相对侧的长度和宽度，通过将长度和宽度的乘积得到两个传输线相对侧的面积。
在本实施例中，所述根据两个所述传输线之间的距离，计算两个传输线之间的电容，并根据两个传输线之间的电容值，计算两个所述传输线的容抗的步骤具体包括：
测量两个所述传输线之间的距离，并定义所述距离为d；
并通过公式
Figure PCTCN2022090600-appb-000003
计算两个所述传输线之间的寄生电容，定义所述寄生电容为c；
根据所述寄生电容，通过公式
Figure PCTCN2022090600-appb-000004
计算得到容抗，所述容抗定义为Xc；
其中，s为两个所述传输线相对侧的面积，其中ε为介电常数4.3，为真空介电常数8.86×10 -12，π为圆周率3.14，f为射频功率放大器工作频段的中心频率。
具体的，首先测量两个传输线相对侧的长度和宽度，并根据测量出来的长度和宽度计算两个传输线相对侧的面积s，然后测量两个传输线之间的距离d，计算两个传输线之间的电容，并根据两个传输线之间的电容值，并通过公式(1)计算出两个传输线之间的寄生电容c，其中ε为介电常数4.3，ε 0为真空介电常数8.86×10 -12；再然后根据公式(2)，得到容抗Xc，其中π为圆周率3.14，f为射频功率放大器工作频段的中心频率，c为寄生电容，根据计算得到的容抗Xc选择相应的负阻值电阻安装在两个传输线的后端即可，用于抵消寄生电容所造成的寄生电阻。
在本实施例中，所述绝缘层为发泡聚乙烯材料制成，并且其厚度为1mm-2.5mm。发泡聚乙烯材料属于半硬质泡沫塑料，耐反复压缩性能优良，但回弹需要时间比较长，是理想的包装材料。水蒸气透过率远低于聚苯乙烯和硬质泡沫聚氨酯，吸水性也远低于聚苯乙烯。热导率和聚苯乙烯大致相同。最高使用温度80℃，最低使用温度-84℃。
其中，绝缘层的厚度为1mm时，厚度小，成本低。
绝缘层的厚度还可以是1.2mm、1.5mm、2mm、2.5mm等，具体的厚度使用可以根据实际情况选择。
在本实施例中，所述金属网为铜材料制成。铜材料导电效果好，使得感应电流通过金属网传导至大地，从而避免感应电流对传输线中传输的射频信号造成影响。
第二方面，如图3-4所示，图3是本发明实施例提供的减小射频功率放大 器寄生参数的装置模块图；图4是本发明实施例提供的减小射频功率放大器寄生参数的装置模块图。本发明实施例还提供一种减小射频功率放大器寄生参数的装置20，包括：
基板制作模块21，用于根据预设的芯片基板制版工艺制得基板；
距离增大模块22，用于将至少两个传输线设置于所述基板上，并增大所述基板上两个所述传输线之间的距离；
计算模块23，用于根据两个所述传输线之间的距离，计算两个所述传输线的容抗；
绝缘增加模块24，用于通过在两个所述传输线的外部设置绝缘层，并在所述绝缘层的外部增加金属网，所述金属网单端接地。
具体的，通过基板制作模块根据预设的芯片基板制版工艺制得基板；通过距离增大模块将至少两个传输线设置于所述基板上，并增大所述基板上两个所述传输线之间的距离；通过通过计算模块根据两个所述传输线之间的距离，计算两个所述传输线的容抗；通过绝缘增加模块在两个所述传输线的外部设置绝缘层，并在所述绝缘层的外部增加金属网，所述金属网单端接地。这样通过将芯片基板上的两个传输线之间的距离增大，从而减小两个传输线之间的寄生电容，同时在两个传输线的后端安装一个负阻值的电阻，用于抵消寄生电容所造成的寄生电阻，并且在传输线的外部增加绝缘层，并在绝缘层的外部增加金属网，传输线产生寄生电感后，寄生电感会引发感应磁场，而感应磁场则会引发感应电流，感应电流通过金属网传导至大地，从而避免感应电流对传输线中传输的射频信号造成影响。通过减小寄生电容、寄生电阻和寄生电感，从而减小芯片基板上传输线的寄生参数，避免寄生参数影响无线通信质量的情况。
在本实施例中，所述距离增大模块22还包括：
第一测量单元221，用于测量两个所述传输线相对侧的长度和宽度；
第一计算单元222，用于根据两个所述传输线相对侧的长度和宽度计算两个所述传输线相对侧的面积。
在本实施例中，上述计算模块23具体包括：
测量两个所述传输线之间的距离，并定义所述距离为d；
并通过公式
Figure PCTCN2022090600-appb-000005
计算两个所述传输线之间的寄生电容，定义所述寄生电容为c；
根据所述寄生电容，通过公式
Figure PCTCN2022090600-appb-000006
计算得到容抗，所述容抗定义为Xc；
其中，s为两个所述传输线相对侧的面积，其中ε为介电常数4.3，为真空介电常数8.86×10 -12，π为圆周率3.14，f为射频功率放大器工作频段的中心频率。
具体的，首先测量两个传输线相对侧的长度和宽度，并根据测量出来的长度和宽度计算两个传输线相对侧的面积s，然后测量两个传输线之间的距离d，计算两个传输线之间的电容，并根据两个传输线之间的电容值，并通过公式(1)计算出两个传输线之间的寄生电容c，其中ε为介电常数4.3，ε 0为真空介电常数8.86×10 -12；再然后根据公式(2)，得到容抗Xc，其中π为圆周率3.14，f为射频功率放大器工作频段的中心频率，c为寄生电容，根据计算得到的容抗Xc选择相应的负阻值电阻安装在两个传输线的后端即可，用于抵消寄生电容所造成的寄生电阻。
在本实施例中，所述绝缘层为发泡聚乙烯材料制成，并且其厚度为1mm-2.5mm。发泡聚乙烯材料属于半硬质泡沫塑料，耐反复压缩性能优良，但回弹需要时间比较长，是理想的包装材料。水蒸气透过率远低于聚苯乙烯和硬质泡沫聚氨酯，吸水性也远低于聚苯乙烯。热导率和聚苯乙烯大致相同。最高使用温度80℃，最低使用温度-84℃。
其中，绝缘层的厚度为1mm时，厚度小，成本低。
绝缘层的厚度还可以是1.2mm、1.5mm、2mm、2.5mm等，具体的厚度使用可以根据实际情况选择。
在本实施例中，所述金属网为铜材料制成。铜材料导电效果好，使得感应电流通过金属网传导至大地，从而避免感应电流对传输线中传输的射频信号造成影响。
第三方面，本发明实施例还提供了一种电子设备300，包括：存储器301、处理器302及存储在所述存储器301上并可在所述处理器302上运行的计算机程序，所述处理器302执行所述计算机程序时实现如上述任一项所述的减小射 频功率放大器寄生参数的方法中的各个步骤。
需要说明的是，上述电子设备可以是可以应用于可以进行基于视频的最优目标捕捉的手机、监控器、计算机、服务器等设备。
本发明实施例提供的电子设备能够实现上述方法实施例中基于视频的最优目标捕捉方法实现的各个过程，且可以达到相同的有益效果，为避免重复，这里不再赘述。
存储器301至少包括一种类型的可读存储介质，可读存储介质包括闪存、硬盘、多媒体卡、卡型存储器(例如，SD或DX存储器等)、随机访问存储器(RAM)、静态随机访问存储器(SRAM)、只读存储器(ROM)、电可擦除可编程只读存储器(EEPROM)、可编程只读存储器(PROM)、磁性存储器、磁盘、光盘等。在一些实施例中，存储器301可以是电子设备300的内部存储单元，例如该电子设备300的硬盘或内存。在另一些实施例中，存储器301也可以是电子设备300的外部存储设备，例如该电子设备300上配备的插接式硬盘，智能存储卡(Smart Media Card,SMC)，安全数字(Secure Digital,SD)卡，闪存卡(Flash Card)等。当然，存储器301还可以既包括电子设备300的内部存储单元也包括其外部存储设备。本实施例中，存储器301通常用于存储安装于电子设备300的操作系统和各类应用软件，例如一种微带线建模方法的程序代码等。此外，存储器301还可以用于暂时地存储已经输出或者将要输出的各类数据。
处理器302在一些实施例中可以是中央处理器(Central Processing Unit，CPU)、控制器、微控制器、微处理器、或其他数据处理芯片。该处理器302通常用于控制电子设备300的总体操作。本实施例中，处理器302用于运行存储器301中存储的程序代码或者处理数据，例如运行一种基于生成式对抗网络的文本转换图像的方法的程序代码。
第四方面，本发明实施例还提供了一种计算机可读存储介质，所述计算机可读存储介质上存储有计算机程序，所述计算机程序被处理器执行时实现如上述任一项所述的减小射频功率放大器寄生参数的方法中的各个步骤。且能达到相同的技术效果，为避免重复，这里不再赘述。
以上所揭露的仅为本发明较佳实施例而已，当然不能以此来限定本发明之权利范围，因此依本发明权利要求所作的等同变化，仍属本发明所涵盖的范围。

Claims (10)

  1. 一种减小射频功率放大器寄生参数的方法，其特征在于，包括以下步骤：
    根据预设的芯片基板制版工艺制得基板；
    将至少两个传输线设置于所述基板上，并增大所述基板上两个所述传输线之间的距离；
    根据两个所述传输线之间的距离，计算两个传输线之间的电容，并根据两个所述传输线之间的电容值，计算两个所述传输线的容抗，并在两个所述传输线的后端安装一个负阻值的电阻；
    通过在两个所述传输线的外部设置绝缘层，并在所述绝缘层的外部增加金属网，所述金属网单端接地。
  2. 如权利要求1所述的减小射频功率放大器寄生参数的方法，其特征在于，在所述将至少两个传输线设置于所述基板上，并增大所述基板上两个所述传输线之间的距离之后，还包括以下步骤：
    测量两个所述传输线相对侧的长度和宽度；
    根据两个所述传输线相对侧的长度和宽度计算两个所述传输线相对侧的面积。
  3. 如权利要求2所述的减小射频功率放大器寄生参数的方法，其特征在于，所述根据两个所述传输线之间的距离，计算两个所述传输线的容抗的步骤 具体包括：
    测量两个所述传输线之间的距离，并定义所述距离为d；
    并通过公式
    Figure PCTCN2022090600-appb-100001
    计算两个所述传输线之间的寄生电容，定义所述寄生电容为c；
    根据所述寄生电容，通过公式
    Figure PCTCN2022090600-appb-100002
    计算得到容抗，所述容抗定义为Xc；
    其中，s为两个所述传输线相对侧的面积，其中ε为介电常数4.3，ε 0为真空介电常数8.86×10 -12，π为圆周率3.14，f为射频功率放大器工作频段的中心频率。
  4. 如权利要求1所述的减小射频功率放大器寄生参数的方法，其特征在于，所述绝缘层为发泡聚乙烯材料制成，并且其厚度为1mm-2.5mm。
  5. 如权利要求1所述的减小射频功率放大器寄生参数的方法，其特征在于，所述金属网为铜材料制成。
  6. 一种减小射频功率放大器寄生参数的装置，其特征在于，包括：
    基板制作模块，用于根据预设的芯片基板制版工艺制得基板；
    距离增大模块，用于将至少两个传输线设置于所述基板上，并增大所述基板上两个所述传输线之间的距离；
    计算模块，用于根据两个所述传输线之间的距离，计算两个所述传输线的容抗；
    绝缘增加模块，用于通过在两个所述传输线的外部设置绝缘层，并在所述绝缘层的外部增加金属网，所述金属网单端接地。
  7. 如权利要求6所述的减小射频功率放大器寄生参数的装置，其特征在于，所述距离增大模块还包括：
    第一测量单元，用于测量两个所述传输线相对侧的长度和宽度；
    第一计算单元，用于根据两个所述传输线相对侧的长度和宽度计算两个所述传输线相对侧的面积。
  8. 如权利要求6所述的减小射频功率放大器寄生参数的装置，其特征在于，所述绝缘层为发泡聚乙烯材料制成，并且其厚度为1mm-2.5mm。
  9. 一种电子设备，其特征在于，包括：存储器、处理器及存储在所述存储器上并可在所述处理器上运行的计算机程序，所述处理器执行所述计算机程序时实现如权利要求1至5中任一项所述的减小射频功率放大器寄生参数的方法中的步骤。
  10. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质上存储有计算机程序，所述计算机程序被处理器执行时实现如权利要求1至5中任一项所述的减小射频功率放大器寄生参数的方法中的步骤。
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101022696A (zh) * 2006-02-16 2007-08-22 华通电脑股份有限公司 具网状接地面的多层电路板特性阻抗控制方法及结构
CN107528542A (zh) * 2017-08-24 2017-12-29 天津大学 一种采用cmos工艺实现的毫米波压控振荡器
US20190080999A1 (en) * 2017-09-13 2019-03-14 SK Hynix Inc. Package substrates with signal transmission paths relating to parasitic capacitance values
CN110166003A (zh) * 2019-05-09 2019-08-23 重庆大学 基于片上连续可调电感的压控振荡器
US20200373265A1 (en) * 2019-05-21 2020-11-26 Cree, Inc. Reduced-Length Bond Pads for Broadband Power Amplifiers
CN114340165A (zh) * 2021-12-28 2022-04-12 深圳飞骧科技股份有限公司 减小射频功率放大器寄生参数的方法、装置及相关设备

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0581365A (ja) * 1991-09-20 1993-04-02 Fujitsu Ltd 配線寄生容量の見積り方法
US6208702B1 (en) * 1998-01-23 2001-03-27 International Business Machines Corporation High frequency clock signal distribution utilizing CMOS negative impedance terminations
CN101110367A (zh) * 2006-07-21 2008-01-23 矽统科技股份有限公司 基底与其布局的方法
JP2008173717A (ja) * 2007-01-18 2008-07-31 Fanuc Ltd 放電加工装置
TWM318840U (en) * 2007-03-22 2007-09-11 Shi-Chin Guo Wire structure with filter functions used between power generator and battery for automobile use
CN107425814B (zh) * 2017-08-07 2021-01-29 杭州电子科技大学 一种基于补偿寄生电容的宽带Doherty功率放大器

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101022696A (zh) * 2006-02-16 2007-08-22 华通电脑股份有限公司 具网状接地面的多层电路板特性阻抗控制方法及结构
CN107528542A (zh) * 2017-08-24 2017-12-29 天津大学 一种采用cmos工艺实现的毫米波压控振荡器
US20190080999A1 (en) * 2017-09-13 2019-03-14 SK Hynix Inc. Package substrates with signal transmission paths relating to parasitic capacitance values
CN110166003A (zh) * 2019-05-09 2019-08-23 重庆大学 基于片上连续可调电感的压控振荡器
US20200373265A1 (en) * 2019-05-21 2020-11-26 Cree, Inc. Reduced-Length Bond Pads for Broadband Power Amplifiers
CN114340165A (zh) * 2021-12-28 2022-04-12 深圳飞骧科技股份有限公司 减小射频功率放大器寄生参数的方法、装置及相关设备

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