WO2023120546A1 - 制御装置及び制御方法 - Google Patents

制御装置及び制御方法 Download PDF

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Publication number
WO2023120546A1
WO2023120546A1 PCT/JP2022/046982 JP2022046982W WO2023120546A1 WO 2023120546 A1 WO2023120546 A1 WO 2023120546A1 JP 2022046982 W JP2022046982 W JP 2022046982W WO 2023120546 A1 WO2023120546 A1 WO 2023120546A1
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WIPO (PCT)
Prior art keywords
phase
current
phases
voltage
unit
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Ceased
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PCT/JP2022/046982
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English (en)
French (fr)
Japanese (ja)
Inventor
哲三 永久
友博 福村
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Nidec Corp
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Nidec Corp
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Priority to DE112022006151.0T priority Critical patent/DE112022006151T5/de
Priority to JP2023569471A priority patent/JPWO2023120546A1/ja
Priority to US18/721,193 priority patent/US20250055364A1/en
Priority to CN202280085031.4A priority patent/CN118435511A/zh
Publication of WO2023120546A1 publication Critical patent/WO2023120546A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0009—Devices or circuits for detecting current in a converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H02M7/53875—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output

Definitions

  • the present disclosure relates to a control device and control method.
  • Patent Document 1 a microcomputer (microcomputer) that controls a three-phase brushless motor is known (for example, Patent Document 1).
  • the PWM forming section outputs PWM signals of each phase obtained by modulating a carrier wave (triangular wave) of 16 kHz based on the voltage command value to the inverter circuit.
  • a motor is driven by the inverter circuit.
  • a shunt resistor is interposed between the emitter of the IGBT on the lower arm side of the inverter circuit and the ground, and the emitter of the IGBT is connected to the input terminal of the amplification bias circuit.
  • A/D conversion values for two phases are obtained at the same time. Since current detection by the shunt resistor can be performed only during the period when the IGBT on the lower arm side is on, A/D conversion is performed at the timing when the triangular wave of the PWM carrier wave reaches the trough. If two phases of the three-phase current can be detected, the remaining one phase can be estimated.
  • the middle phase current corresponding to the second largest phase voltage and the minimum phase current corresponding to the smallest phase voltage of current is detected.
  • the inventors of the present application have knowledge that the variation in the intermediate phase current is greater than the variation in the minimum phase current.
  • the inventors of the present application have knowledge that the current is likely to be disturbed near the zero crossing of the current. According to such knowledge, the error in the detection result of the intermediate phase current may be larger than the error in the detection result of the minimum phase current.
  • the detected value of the current flowing through each phase may vary.
  • the present disclosure has been made in view of the above problems, and an object thereof is to provide a control device and a control method capable of suppressing variations in detected values of currents flowing in each phase.
  • An exemplary control device of the present disclosure controls an N-phase inverter that applies a voltage to each of the N phases when N is an odd number of 3 or more.
  • the control device includes a current detection section and a calculation section.
  • the current detection unit detects, at a current detection time, the phase to which the (N+1)/2th largest voltage is applied as an intermediate phase. , the current of each of the (N-1) phases other than the intermediate phase is detected.
  • the calculator calculates a current value of the intermediate phase current based on the detection result of the current detector.
  • the exemplary control method of the present disclosure is performed by a control device that controls an N-phase inverter that applies a voltage to each of the N phases, where N is an odd number of 3 or more.
  • the control method includes a current detection process and a calculation process.
  • the current detection step among the voltages applied to the N phases, when the phase to which the (N+1)/2th largest voltage is applied at the current detection time is the intermediate phase, among the currents of the N phases , the current of each of the (N-1) phases other than the current of the intermediate phase is detected.
  • the calculating step a current value of the intermediate phase current is calculated based on the detection result of the current detecting step.
  • FIG. 1 is a block diagram showing a motor module according to Embodiment 1 of the present disclosure.
  • FIG. 2 is a diagram showing waveforms of voltages applied to each phase (three-phase modulation) and current waveforms of each phase in the first embodiment.
  • FIG. 3 is a circuit diagram showing a three-phase inverter according to Embodiment 1.
  • FIG. 4 is a diagram showing an example of voltages (three-phase modulation) applied to each phase, carrier waves, and compare values in the first embodiment.
  • FIG. 5 is a diagram showing transitions of intermediate, maximum, and minimum phases in the electrical angle range of 0 [degE] to 360 [degE] in the first embodiment.
  • FIG. 1 is a block diagram showing a motor module according to Embodiment 1 of the present disclosure.
  • FIG. 2 is a diagram showing waveforms of voltages applied to each phase (three-phase modulation) and current waveforms of each phase in the first embodiment.
  • FIG. 3 is a circuit diagram showing a
  • FIG. 6 is a diagram showing an example of a voltage applied to each phase (three-phase modulation), a carrier wave, a compare value, and a second gate signal in Embodiment 1.
  • FIG. FIG. 7 is a diagram showing another example of the voltage applied to each phase (three-phase modulation), the carrier wave, the compare value, and the second gate signal in the first embodiment.
  • 8 is a diagram showing a current detection unit according to the first embodiment.
  • FIG. FIG. 9 is a diagram showing an example of a voltage (two-phase modulation min type) applied to each phase, a carrier wave, a compare value, and a second gate signal in the first modification of the first embodiment.
  • FIG. 10 is a diagram showing another example of the voltage applied to each phase (two-phase modulation min type), the carrier wave, the compare value, and the second gate signal in the first modified example of the first embodiment.
  • FIG. 11 is a diagram showing an example of a voltage applied to each phase (two-phase modulation min-max type), a carrier wave, a compare value, and a second gate signal in the second modification of the first embodiment.
  • 12 is a diagram showing another example of the voltage applied to each phase (two-phase modulation min-max type), the carrier wave, the compare value, and the second gate signal in the second modification of the first embodiment;
  • FIG. 13 is a block diagram showing a motor module according to Embodiment 2 of the present disclosure.
  • FIG. 14 is a diagram illustrating an example of carrier waves and compare values according to the second embodiment.
  • FIG. 15 is a diagram showing another example of carriers and compare values according to the second embodiment.
  • FIG. 16 is a flowchart showing phase determination processing for determining a phase in which current is directly detected in the second embodiment.
  • FIG. 17 is a flowchart showing current value calculation processing for calculating the current value of an undetected current in the second embodiment.
  • FIG. 18 is a diagram showing an example of voltages (five-phase modulation) applied to each phase, carrier waves, and compare values in the second embodiment.
  • FIG. 19 is a diagram showing changes in the order of magnitude of the P1 phase to P5 phase in the electrical angle range of 0 [degE] to 360 [degE] in five-phase modulation according to the second embodiment.
  • FIG. 20 is a diagram showing a motor module according to Embodiment 3 of the present disclosure.
  • 21 is a diagram showing a current sensor unit according to Embodiment 3.
  • FIG. 22 is a diagram showing a current sensor unit according to Embodiment 4 of the present disclosure.
  • FIG. 23 is a diagram showing a current detector according to the fourth embodiment.
  • FIG. 1 is a block diagram showing a motor module 200 according to Embodiment 1.
  • FIG. 1 is a block diagram showing a motor module 200 according to Embodiment 1.
  • the motor module 200 includes a control device 100 and a three-phase motor M3.
  • a control device 100 controls a three-phase inverter 1 that applies voltages Vu, Vv, and Vw to each of the three phases.
  • the three phases are U phase, V phase and W phase.
  • Voltage Vu is a U-phase voltage
  • voltage Vv is a V-phase voltage
  • voltage Vw is a W-phase voltage.
  • voltages Vu, Vv, and Vw may be referred to as applied voltages Vu, Vv, and Vw.
  • the control device 100 includes the three-phase inverter 1 .
  • the three-phase inverter 1 is connected to the DC power supply section PW.
  • the three-phase inverter 1 applies voltages Vu, Vv, and Vw having different phases to the U-phase, V-phase, and W-phase of the three-phase motor M3 to to drive.
  • Currents Iu, Iv, and Iw corresponding to voltages Vu, Vv, and Vw flow through the U-phase, V-phase, and W-phase of the three-phase motor M3.
  • the current Iu is the U-phase current
  • the current Iv is the V-phase current
  • the current Iw is the W-phase current.
  • the three-phase motor M3 includes three-phase coils CLu, CLv, and CLw.
  • Coil CLu is a U-phase coil
  • coil CLv is a V-phase coil
  • coil CLw is a W-phase coil.
  • the three-phase motor M3 is, for example, a brushless DC motor.
  • Three-phase motor M3 has a U-phase, a V-phase and a W-phase.
  • the polarities of the currents Iu, Iv, and Iw the direction of current flowing from the three-phase inverter 1 to the neutral point NP of the three-phase motor M3 is positive, and the direction of current flowing from the neutral point NP to the three-phase inverter 1 is positive. current polarity is negative.
  • three-phase inverter 1 is not limited to the three-phase motor M3, and may be other electrical equipment. Further, three-phase inverter 1 may be arranged outside control device 100 .
  • FIG. 2 is a diagram showing waveforms of voltages Vu, Vv, and Vw applied to each phase and waveforms of currents Iu, Iv, and Iw of each phase.
  • a waveform diagram F1 shows voltages Vu, Vv, and Vw applied to each phase.
  • the horizontal axis indicates the electrical angle [degE]
  • the vertical axis indicates the voltages Vu, Vv, and Vw.
  • the vertical axis of the waveform diagram F1 represents voltage values normalized by the input voltage V1-V2.
  • voltages Vu, Vv, and Vw are sinusoidal.
  • the phases of voltages Vu, Vv, and Vw are different from each other.
  • the energization of the three-phase modulation method is performed.
  • Waveform diagram F2 shows currents Iu, Iv, and Iw of each phase.
  • the horizontal axis indicates the electrical angle [degE]
  • the vertical axis indicates the currents Iu, Iv, Iw [a. u. ] is shown.
  • the phases of the currents Iu, Iv and Iw are delayed with respect to the phases of the voltages Vu, Vv and Vw, respectively. From the waveform diagram F2, the currents Iu, Iv, and Iw are disturbed in the vicinity of the zero cross Z of the currents Iu, Iv, and Iw.
  • a zero cross Z occurs in the intermediate phases of the voltages Vu, Vv, and Vw.
  • the intermediate phase is the phase to which the second largest voltage among the voltages Vu, Vv, and Vw is applied.
  • the intermediate phase is the phase (W phase) to which the second largest voltage Vw is applied.
  • the intermediate phase is the phase (U phase) to which the second largest voltage Vu is applied.
  • the intermediate phase is the phase (V phase) to which the second largest voltage Vv is applied.
  • the currents of the two phases other than the intermediate phase are detected, and the current of the intermediate phase is calculated based on the current values of the two phases other than the intermediate phase.
  • the two phases other than the intermediate phase are the maximum phase and the minimum phase.
  • the maximum phase is the phase to which the largest voltage among the voltages Vu, Vv, and Vw is applied.
  • the maximum phase is the phase (U phase) to which the largest voltage Vu is applied.
  • the maximum phase is the phase (V phase) to which the largest voltage Vv is applied.
  • the maximum phase is the phase (W phase) to which the largest voltage Vw is applied.
  • the minimum phase is the phase to which the smallest of the voltages Vu, Vv, and Vw is applied.
  • the minimum phase is the phase (V phase) to which the smallest voltage Vv is applied.
  • the minimum phase is the phase (W phase) to which the smallest voltage Vw is applied.
  • the minimum phase is the phase (U phase) to which the smallest voltage Vu is applied.
  • the control device 100 further includes a calculator 21 and a current detector 26 .
  • the current detection unit 26 detects currents Iu, Among Iv and Iw, the currents of the two phases other than the intermediate phase are detected.
  • the two phases other than the intermediate phase are the maximum phase and the minimum phase.
  • the maximum phase is the phase to which the largest voltage among the voltages Vu, Vv, and Vw applied to each of the three phases is applied at the current detection time.
  • the minimum phase is the phase to which the smallest voltage among the voltages Vu, Vv, and Vw applied to each of the three phases is applied at the current detection time.
  • the current detection unit 26 detects the maximum phase and Detects the minimum phase current. Therefore, among the currents Iu, Iv, and Iw, errors in the detection results are suppressed for the directly detected currents.
  • the control device 100 further includes a carrier generation section 22 , a drive section 23 , a comparison section 24 and a switching section 25 .
  • the control device 100 includes an inverter control section 2 .
  • the inverter controller 2 includes a calculator 21 , a carrier wave generator 22 , a driver 23 , a comparator 24 , a switcher 25 and a current detector 26 .
  • the inverter control unit 2 is, for example, a microcomputer.
  • a microcomputer consists of, for example, a processor such as a CPU (Central Processing Unit), a semiconductor memory, an ASIC (Application Specific Integrated Circuit), an A/D converter (ADC: Analog-to-Digital Converter), and various electronic components. is a hardware circuit that
  • each of the calculation unit 21, the carrier wave generation unit 22, the drive unit 23, the comparison unit 24, and the switching unit 25 may be realized by wired logic in a microcomputer, or a processor may be implemented in a semiconductor memory. It may be implemented by executing a stored computer program, or by a combination thereof. Also, for example, the current detector 26 is realized by an A/D converter.
  • FIG. 3 is a circuit diagram showing the three-phase inverter M3.
  • the driving section 23 outputs a PWM (Pulse Width Modulation) signal Spwm to the three-phase inverter 1 .
  • the three-phase inverter 1 is driven by the PWM signal Spwm.
  • the PWM signal Spwm includes first gate signals G1u, G1v, G1w and second gate signals G2u, G2v, G2w.
  • the three-phase inverter 1 includes three switching units Uu, Uv, Uv.
  • the switching units Uu, Uv, Uv apply voltages Vu, Vv, Vw to the three phases, respectively.
  • the switching units Uu, Uv, and Uv apply different phase voltages Vu, Vv, and Vw to the three-phase coils CLu, CLv, and CLw (FIG. 1), respectively.
  • the switching units Uu, Uv, Uv are connected in parallel between the first power line LN1 and the second power line LN2.
  • Each of the switching units Uu, Uv, and Uv includes a first switching element SW1 on the first voltage V1 side of the DC power supply section PW and a second switching element SW2 on the second voltage V2 side of the DC power supply section PW.
  • the second switching element SW2 is connected in series with the first switching element SW1.
  • the first switching element SW1 and the second switching element SW2 are connected in series between the first power line LN1 and the second power line LN2.
  • a first voltage V1 is supplied from the DC power supply section PW to the first power supply line LN1.
  • a second voltage V2 is supplied from the DC power supply section PW to the second power supply line LN2.
  • the second voltage V2 is less than the first voltage V1.
  • the second voltage V2 is the ground voltage (0V).
  • the control device 100 further includes three electrical resistance units Ru, Rv, and Rw for detecting the three-phase currents Iu, Iv, and Iw, respectively.
  • Each of the electric resistance portions Ru, Rv, and Rw, or a generic term for these, may be referred to as an electric resistance portion R in some cases.
  • the control device 100 includes a current sensor section 3 for detecting the three-phase currents Iu, Iv, and Iw.
  • the current sensor section 3 includes electric resistance sections Ru, Rv, and Rw. Therefore, the first switching element SW1, the second switching element SW2, and the electric resistance section Ru of the switching unit Uu are connected in series between the first power line LN1 and the second power line LN2.
  • a first switching element SW1, a second switching element SW2, and an electric resistance section Rv of the switching unit Uv are connected in series between the first power line LN1 and the second power line LN2.
  • a first switching element SW1, a second switching element SW2, and an electric resistance section Rw of the switching unit Uw are connected in series between the first power line LN1 and the second power line LN2.
  • Each of the first switching element SW1 and the second switching element SW2 is a semiconductor switching element.
  • each of the first switching element SW1 and the second switching element SW2 is an IGBT (insulated gate bipolar transistor).
  • IGBT insulated gate bipolar transistor
  • each of the first switching element SW1 and the second switching element SW2 may be another transistor such as a field effect transistor.
  • the collector of the first switching element SW1 is connected to the first power supply line LN1.
  • a connection point N connects the emitter of the first switching element SW1 and the collector of the second switching element SW2.
  • a connection point N of the switching unit Uu is connected to the coil CLu (FIG. 1) of the three-phase motor M3.
  • a connection point N of the switching unit Uv is connected to the coil CLv (FIG. 1) of the three-phase motor M3.
  • a connection point N of the switching unit Uw is connected to the coil CLw (FIG. 1) of the three-phase motor M3.
  • the emitter of the second switching element SW2 of the switching unit Uu is connected to one terminal of the electrical resistance section Ru at the connection point N1.
  • the emitter of the second switching element SW2 of the switching unit Uv is connected to one terminal of the electric resistance section Rv at the connection point N2.
  • the emitter of the second switching element SW2 of the switching unit Uw is connected to one terminal of the electrical resistance section Rw at the connection point N3.
  • the other terminals of the electrical resistance units Ru, Rv, and Rw are connected to the second power supply line LN2.
  • the first gate signals G1u, G1v, G1w are input to the gates of the first switching elements SW1 of the switching units Uu, Uv, Uw, respectively.
  • the first switching elements SW1 of the switching units Uu, Uv, Uw are turned on when the first gate signals G1u, G1v, G1w are at high level, respectively.
  • the first switching elements SW1 of the switching units Uu, Uv, Uw are turned off when the first gate signals G1u, G1v, G1w are at low level, respectively.
  • the second gate signals G2u, G2v, G2w are input to the gates of the second switching elements SW2 of the switching units Uu, Uv, Uw, respectively.
  • the second switching elements SW2 of the switching units Uu, Uv, Uw are turned on when the second gate signals G2u, G2v, G2w are at high level, respectively.
  • the second switching elements SW2 of the switching units Uu, Uv, Uw are turned off when the second gate signals G2u, G2v, G2w are at low level, respectively.
  • the polarities of the second gate signals G2u, G2v, and G2w are basically opposite to the polarities of the first gate signals G1u, G1v, and G1w, respectively. That is, the second gate signals G2u, G2v, G2w and the first gate signals G1u, G1v, G1w are basically complementary. However, regarding the first gate signals G1u, G1v, G1w and the second gate signals G2u, G2v, G2w, when the first switching element SW1 and the second switching element SW2 are switched on and off, the first gate signals and A period (dead time) in which both the second gate signal and the second gate signal are at low level may be provided. The reason why the dead time is provided is that the short circuit between the first power supply line LN1 and the second power supply line LN2 is caused by the rise time and fall time required for each of the first switching element SW1 and the second switching element SW2. This is to prevent
  • a rectifying element D is connected in parallel to each of the first switching element SW1 and the second switching element SW2, with the first power line LN1 side as a cathode and the second power line LN2 side as an anode.
  • parasitic diodes may be used as rectifying elements.
  • the electric resistance portions Ru, Rv, and Rw will be described with reference to FIG.
  • the electrical resistance units Ru, Rv, and Rw are resistance components (for example, resistance element).
  • the control device 100 can be realized at low cost by using the electrical resistance units Ru, Rv, and Rw as current sensors.
  • Each of the electrical resistors Ru, Rv, Rw is, for example, a shunt resistor. Specifically, at each current detection time, two electrical resistance units R among the three electrical resistance units Ru, Rv, and Rw are used.
  • the electrical resistance units Ru, Rv, and Rw are arranged corresponding to the switching units Uu, Uv, and Uw, respectively.
  • the electric resistance section Ru is arranged between the second switching element SW2 of the switching unit Uu and the DC power supply section PW.
  • the electric resistance section Rv is arranged between the second switching element SW2 of the switching unit Uv and the DC power supply section PW.
  • the electric resistance section Rw is arranged between the second switching element SW2 of the switching unit Uw and the DC power supply section PW.
  • the control device 100 further includes signal lines LNu, LNv, and LNw.
  • the signal line LNu extends from the connection point N1 of the electrical resistance portion Ru to the current detection portion 26.
  • the signal line LNv extends from the connection point N2 of the electric resistance portion Rv to the current detection portion 26.
  • the signal line LNw extends from the connection point N3 of the electrical resistance portion Rw to the current detection portion 26.
  • the current detection section 26 When detecting the current Iu, the current detection section 26 detects, via the signal line LNu, the potential difference between both ends of the electrical resistance section Ru through which the current Iu flows. A potential difference across the electrical resistance portion Ru is caused by a voltage drop across the electrical resistance portion Ru. Then, the current detection unit 26 acquires the current value of the current Iu by converting the potential difference between both ends of the electrical resistance unit Ru into a current. Note that the second switching element SW2 of the switching unit Uu needs to be on in order to detect the current Iu using the electrical resistance section Ru. Alternatively, the calculation unit 21 may convert the potential difference between both ends of the electrical resistance unit Ru into the current Iu.
  • the current detection section 26 When detecting the current Iv, the current detection section 26 detects, via the signal line LNv, the potential difference across the electrical resistance section Rv through which the current Iv flows. Then, the current detection unit 26 acquires the current value of the current Iv by converting the potential difference between both ends of the electric resistance unit Rv into a current. Note that the second switching element SW2 of the switching unit Uv needs to be on in order to detect the current Iv using the electric resistance section Rv. Further, the calculator 21 may convert the potential difference between both ends of the electric resistance portion Rv into the current Iv. Other than that, the detection of the current Iv is the same as the detection of the current Iu.
  • the current detection section 26 When detecting the current Iw, the current detection section 26 detects, via the signal line LNw, the potential difference across the electrical resistance section Rw through which the current Iw flows. Then, the current detection unit 26 acquires the current value of the current Iw by converting the potential difference between both ends of the electrical resistance unit Rw into a current. Note that the second switching element SW2 of the switching unit Uw needs to be on in order to detect the current Iw using the electrical resistance section Rw. Further, the calculator 21 may convert the potential difference between both ends of the electrical resistance portion Rw into the current Iw. Other than that, the detection of the current Iw is the same as the detection of the current Iu.
  • the control device 100 further includes a capacitor C.
  • Capacitor C is connected between first power supply line LN1 and second power supply line LN2.
  • the capacitor C can stabilize the power supply current from the DC power supply section PW.
  • the calculator 21 calculates the voltage command values Vbu, Vbv, and Vbw corresponding to the U-phase, V-phase, and W-phase, respectively.
  • Calculation unit 21 outputs voltage command values Vbu, Vbv, and Vbw to comparison unit 24 .
  • the voltage command values Vbu, Vbv, and Vbw indicate the voltage values of the voltages Vu, Vv, and Vw output by the three-phase inverter 1, respectively. Therefore, the voltage command values Vbu, Vbv and Vbw substantially match the voltage values of the voltages Vu, Vv and Vw output by the three-phase inverter 1, respectively. Specifically, the voltage command values Vbu, Vbv, and Vbw indicate voltage values to be followed by the voltages Vu, Vv, and Vw applied to the U-phase, V-phase, and W-phase, respectively. In this specification, the voltage command values Vbu, Vbv, Vbw and the applied voltages Vu, Vv, Vw are substantially synonymous.
  • the calculation unit 21 calculates the compare values Cmu, CMv, CMw based on the voltage command values Vbu, Vbv, Vbw. Therefore, the compare values CMu, CMv and CMw respectively correspond to the voltage command values Vbu, Vbv and Vbw.
  • the compare values CMu, CMv, CMw directly or indirectly indicate the duty values of the first gate signals G1u, G1v, G1w in the PWM signal Spwm, respectively. Specifically, the duty value indicates the ratio of the ON time of the first switching element SW1 of each phase to the preset PWM cycle Tpwm.
  • the PWM cycle Tpwm is the cycle of the PWM signal Spwm.
  • the PWM period Tpwm is the period of the first gate signals G1u, G1v, G1w and the second gate signals G2u, G2v, G2w.
  • the calculator 21 outputs the compare values CMU, CMv, and CMw to the driver 23 .
  • the carrier generation unit 22 generates a carrier CA.
  • the carrier wave generation unit 22 outputs the carrier wave CA to the drive unit 23 .
  • Carrier CA is, for example, a triangular wave. Note that the waveform of the carrier wave CA is not particularly limited.
  • FIG. 4 is a diagram showing an example of the voltages Vu, Vv, Vw applied to each phase, the carrier wave CA, and the compare values CMu, CMv, CMw.
  • a waveform chart F10 in FIG. 4 shows voltages Vu, Vv, and Vw applied to the U-phase, V-phase, and W-phase.
  • the horizontal axis indicates the electrical angle [degE]
  • the vertical axis indicates the voltages Vu, Vv, and Vw.
  • the vertical axis of the waveform diagram F10 represents voltage values normalized by the input voltage V1-V2, and the voltages Vu, Vv, and Vw take values in the range of 0-1.
  • This value also represents the duty value, which is the ratio of the ON time of the first switching element SW1 of each phase to the PWM cycle Tpwm.
  • voltages Vu, Vv, and Vw are sinusoidal. The phases of voltages Vu, Vv, and Vw are different from each other.
  • the right area of the waveform diagram F10 shows the carrier wave CA and the compare values Cmu, CMv, and CMw in the electrical angle range (time range) shown in the area A1 of the waveform diagram F10.
  • the PWM period Tpwm is equal to the period of the carrier wave CA.
  • the period from one minimum point of the carrier wave CA to the next minimum point indicates the PWM cycle Tpwm.
  • the PWM period Tpwm is, but not limited to, 50 ⁇ s, for example. Note that the start point and end point of the PWM period Tpwm are not limited to the minimum point of the carrier wave CA, and can be set arbitrarily.
  • control period Tcnt is defined by the period of the carrier wave CA.
  • the control cycle Tcnt is a cycle for updating the duty value of the PWM signal Spwm. Therefore, the duty value of the PWM signal Spwm is updated every control cycle Tcnt. That is, the compare values CMU, CMv, CMw and the voltage command values Vbu, Vbv, Vbw are updated every control period Tcnt.
  • Control cycle Tcnt is longer than PWM cycle Tpwm.
  • the control period Tcnt is an integral multiple of the PWM period Tpwm. However, the control period Tcnt may not be an integral multiple of the PWM period Tpw.
  • Compare values CMu, CMv, and CMw determined for each control cycle Tcnt may be updated at timing determined by a microcomputer used as inverter control section 2, for example.
  • the timing determined by the microcomputer is, for example, the local minimum of the carrier CA.
  • the control period Tcnt is, for example, 200 ⁇ s, although not particularly limited.
  • the start point and end point of the control period Tcnt are the local minimum points of the carrier wave CA. Note that the start point and end point of the control period Tcnt are not limited to the minimum point of the carrier wave CA, and can be set arbitrarily.
  • the drive unit 23 generates the PWM signal Spwm based on the carrier wave CA and the compare values CMu, CMv, CMw. Specifically, the drive unit 23 compares each of the compare values CMu, CMv, and CMw with the carrier wave CA, and generates the PWM signal Spwm based on the comparison result. Details will be described later. The drive unit 23 then outputs the PWM signal Spwm to the three-phase inverter 1 to drive the three-phase inverter 1 . As a result, the three-phase inverter 1 applies voltages Vu, Vv, Vw indicated by the voltage command values Vbu, Vbv, Vbw to the three-phase coils CLu, CLv, CLw, respectively.
  • the drive unit 23 generates a trigger TG in synchronization with the carrier wave CA and outputs it to the current detection unit 26.
  • the trigger TG indicates to the current detector 26 that the current detection time has come.
  • the drive unit 23 generates the trigger TG at the timing when the maximum point occurs in the carrier wave CA, and outputs the trigger TG to the current detection unit 26 .
  • the event for generating the trigger TG is not limited to the maximum point, and can be arbitrarily set.
  • the current detection unit 26 detects current via the current sensor unit 3 in response to the trigger TG generated by the drive unit 23 .
  • the time when the trigger TG is generated becomes the current detection time.
  • the current detection unit 26 detects two second switching elements SW2 (FIG. 3) that are turned on at the current detection time td synchronized with the carrier wave CA for generating the PWM signal Spwm. , are detected.
  • the current detection time td is the time when the maximum point of the carrier wave CA occurs.
  • the electrical angle [degE] can be regarded as representing time by an angle.
  • the magnitude relationship of the compare values Cmu, CMv, and CMw is matched with the magnitude relationship of the voltage command values Vbu, Vbv, and Vbw (applied voltages Vu, Vv, and Vw).
  • the straight lines indicating the compare values Cmu, CMv, and CMw indicate the voltage command values Vbu, Vbv, and Vbw (applied voltages Vu, Vv, and Vw) in FIG. It is considered as a straight line and explained.
  • the comparator 24 compares the three-phase voltage command values Vbu, Vbv, and Vbw with each other at each current detection time td, and determines which of the voltage command values Vbu, Vbv, and Vbw is the largest.
  • the comparison unit 24 compares the voltages Vu, Vv, and Vw applied to the U-phase, V-phase, and W-phase, respectively, at each current detection time td, and determines the voltages Vu, Vv, and Vw. Determine what is the largest of each.
  • the comparator 24 determines the intermediate phase, the maximum phase, and the minimum phase from among the U phase, V phase, and W phase. For example, in the central control period Tcnt in FIG. 4, the W phase is the intermediate phase, the V phase is the maximum phase, and the U phase is the minimum phase.
  • FIG. 5 is a diagram showing the transition of the intermediate phase, maximum phase, and minimum phase in the electrical angle range of 0 [degE] to 360 [degE].
  • the horizontal and vertical axes of FIG. 5 are the same as the horizontal and vertical axes of the waveform diagram F10 shown in FIG.
  • the combination of the intermediate phase, maximum phase, and minimum phase changes every 60 [degE].
  • the comparator 24 determines the U phase as the intermediate phase, the V phase as the maximum phase, and the W phase as the minimum phase. .
  • FIG. 6 is a diagram showing an example of the voltages Vu, Vv, Vw applied to each phase, the carrier wave CA, the compare values CMu, CMv, CMw, and the second gate signals G2u, G2v, G2w.
  • a waveform chart F20 in FIG. 6 shows voltages Vu, Vv, and Vw applied to the U-phase, V-phase, and W-phase.
  • the horizontal and vertical axes of the waveform diagram F20 are the same as those of the waveform diagram F10 in FIG.
  • the right area of the waveform diagram F20 shows the carrier wave CA and the compare values Cmu, CMv, and CMw in the electrical angle range (time range) shown in the area A2 of the waveform diagram F10. Also shown are the second gate signals G2u, G2v, G2w to be applied to the second switching elements SW of the switching units Uu, Uv, Uw, respectively, corresponding to the carrier wave CA and the compare values CMu, CMv, CMw.
  • the comparison unit 24 in FIG. 6 as well as in the case of FIG. Vv, Vw) will be considered as a straight line.
  • the drive unit 23 compares the compare value CMu with the carrier wave CA, the compare value CMv with the carrier wave CA, and the compare value CMw with the carrier wave CA in each PWM period Tpwm. Execute. As a result, first gate signals G1u, G1v, G1w and second gate signals G2u, G2v, G2w are generated. In the first embodiment, the drive unit 23 generates the first gate signals G1u, G1v, G1w and the second gate signals G2u, G2v, G2w by center alignment.
  • the drive unit 23 sets the second gate signal G2u to high level (the first gate signal G1u to low level) when the compare value CMu is less than the level of the carrier wave CA.
  • the driving unit 23 sets the second gate signal G2u to low level (the first gate signal G1u to high level) when the compare value CMu is equal to or higher than the level of the carrier wave CA.
  • the drive unit 23 sets the second gate signal G2v to high level (the first gate signal G1v to low level) when the compare value CMv is less than the level of the carrier wave CA.
  • the driving unit 23 sets the second gate signal G2v to low level (the first gate signal G1v to high level) when the compare value CMv is equal to or higher than the level of the carrier wave CA.
  • the drive unit 23 sets the second gate signal G2w to high level (the first gate signal G1w to low level) when the compare value CMw is less than the level of the carrier wave CA.
  • the drive unit 23 sets the second gate signal G2w to low level (the first gate signal G1w to high level) when the compare value CMw is equal to or higher than the level of the carrier wave CA.
  • the comparison unit 24 determines the intermediate phase, maximum phase, and minimum phase based on the comparison results of the voltage command values Vbu, Vbv, and Vbw for each current detection time td.
  • the intermediate phase is the W phase corresponding to the voltage command value Vbw
  • the maximum phase is the V phase corresponding to the voltage command value Vbv
  • the minimum phase is the voltage command value Vbu.
  • the corresponding U phase is the intermediate phase, maximum phase, and minimum phase based on the comparison results of the voltage command values Vbu, Vbv, and Vbw for each current detection time td.
  • the switching unit 25 detects the period Tm during which the second switching element SW2 of the switching unit Uv for applying voltage to the maximum phase (V phase) is turned on at each current detection time td. 26 determines whether it is shorter than the preset period Td for detecting the current. In the example of FIG. 6, the switching unit 25 determines that the period Tm is longer than or equal to the period Td.
  • the current detection unit 26 detects the current Iv of the maximum phase (V phase) other than the intermediate phase (W phase) and the current Iu of the minimum phase (U phase) at the current detection time td as follows: They are detected via the electric resistors Rv and Ru, respectively.
  • the second gate signals G2u and G2v are at high level, so the second switching elements SW2 of the switching units Uu and Uv are turned on. Therefore, currents Iu and Iv flow through the electrical resistance portions Ru and Rv, respectively.
  • FIG. 7 is a diagram showing another example of the voltages Vu, Vv, Vw applied to each phase, the carrier wave CA, the compare values CMu, CMv, CMw, and the second gate signals G2u, G2v, G2w.
  • a waveform diagram F30 in FIG. 7 shows voltages Vu, Vv, and Vw applied to the U-phase, V-phase, and W-phase.
  • the horizontal and vertical axes of the waveform diagram F30 are the same as those of the waveform diagram F20 in FIG.
  • the right area of the waveform diagram F30 shows the carrier wave CA and the compare values Cmu, CMv, and CMw in the electrical angle range (time range) shown in the area A3 of the waveform diagram F30. Otherwise, the view of FIG. 7 is the same as the view of FIG.
  • the switching unit 25 applies the voltage Vv to the maximum phase (V phase) within the PWM period Tpwm, longer than the period Td preset for detecting the current by the current detecting unit 26.
  • the current detection unit 26 detects the voltage of the intermediate phase (W phase) instead of the maximum phase (V phase). Detecting the current Iw, the calculation unit 21 calculates the current value of the maximum phase (V phase) current Iv based on the detection results of the intermediate phase (W phase) current Iw and the minimum phase (U phase) current Iu. do.
  • the period Tm during which the second switching element SW2 of the maximum phase is turned on within the PWM period Twpm is shorter than the period Td means that the period during which the first switching element SW1 of the maximum phase is turned on within the PWM period Twpm. indicates that is long.
  • the duty value of the first gate signal (the first gate signal G1v in the example of FIG. 7) applied to the first switching element SW1 of the maximum phase is around 100%.
  • the second gate signals G2u and G2w are at high level, so the second switching elements SW2 of the switching units Uu and Uw are turned on. Therefore, currents Iu and Iw flow through the electrical resistance portions Ru and Rw, respectively. As a result, the current detection section 26 can detect the currents Iu and Iw via the electrical resistance sections Ru and Rw.
  • FIG. 8 is a diagram showing the current detector 26.
  • the current detector 26 includes a first detector 31, a second detector 32, an amplifier 33u, an amplifier 33v, an amplifier 33w, a first selector 41, a first 2 selection unit 42 .
  • the first detector 31 includes a sample hold section 311 and a detection section 312 .
  • the second detector 32 includes a sample hold section 321 and a detection section 322 .
  • the first selector 41 has three switching elements 51 , 52 , 53 .
  • the second selector 42 has three switching elements 61 , 62 , 63 .
  • the first detector 31 detects the currents Iu, Iv, Among Iw, the maximum phase current is detected.
  • the second detector 32 detects the current Iu, Among Iv and Iw, the minimum phase current is detected.
  • the detectors (the first detector 31 and the second detector 32) dedicated to the maximum phase and the minimum phase are respectively provided.
  • the current detected by each detector is stable during the entire detection period.
  • the current detection accuracy can be improved during the entire detection period.
  • the current values of the three-phase currents Iu, Iv, and Iw can be obtained with two detectors.
  • signal lines LNu, LNv, and LNw are connected to the amplifiers 33u, 33v, and 33w, respectively.
  • the voltage signal SGu corresponding to the current Iu flowing through the electric resistance section Ru is input from the signal line LNu to the amplification section 33u. That is, the voltage signal SGu having a level corresponding to the potential difference between both ends of the electric resistance portion Ru is input from the signal line LNu to the amplification portion 33u.
  • the amplification unit 33 u amplifies the voltage signal SGu and outputs the amplified voltage signal SGua to the first selection unit 41 and the second selection unit 42 .
  • the amplification unit 33u includes an amplifier such as an operational amplifier, for example.
  • the voltage signal SGv corresponding to the current Iv flowing through the electric resistance section Rv is input from the signal line LNv to the amplification section 33v. That is, the voltage signal SGv having a level corresponding to the potential difference between both ends of the electrical resistance portion Rv is input from the signal line LNv to the amplification portion 33v.
  • the amplification unit 33v amplifies the voltage signal SGv and outputs the amplified voltage signal SGva to the first selection unit 41 and the second selection unit 42.
  • the amplifier 33v includes an amplifier such as an operational amplifier, for example.
  • the voltage signal SGw corresponding to the current Iw flowing through the electrical resistance section Rw is input from the signal line LNw to the amplification section 33w. That is, the voltage signal SGw having a level corresponding to the potential difference between both ends of the electrical resistance portion Rw is input from the signal line LNw to the amplification portion 33w.
  • the amplification unit 33 w amplifies the voltage signal SGw and outputs the amplified voltage signal SGwa to the first selection unit 41 and the second selection unit 42 .
  • the amplification unit 33w includes an amplifier such as an operational amplifier, for example.
  • the first selector 41 selects one of the amplifiers 33u, 33v, and 33w under the control of the switcher 25, and selects the selected amplifier as the sample-and-hold unit of the first detector 31. 311.
  • the switching element 51 is controlled by the switching section 25 to electrically connect or disconnect the amplifying section 33u and the sample/hold section 311 .
  • the switching element 52 electrically connects or disconnects the amplifier section 33v and the sample/hold section 311 under the control of the switching section 25 .
  • the switching element 53 electrically connects or disconnects the amplifier section 33w and the sample/hold section 311 under the control of the switching section 25 .
  • the second selector 42 selects one of the amplifiers 33u, 33v, and 33w under the control of the switcher 25, and selects the selected amplifier as the sample-and-hold unit of the second detector 32. 321.
  • the switching element 61 is controlled by the switching section 25 to electrically connect or disconnect the amplifying section 33u and the sample/hold section 321 .
  • the switching element 62 electrically connects or disconnects the amplifier section 33v and the sample/hold section 321 under the control of the switching section 25 .
  • the switching element 63 electrically connects or disconnects the amplifier section 33w and the sample/hold section 321 under the control of the switching section 25 .
  • the switching section 25 controls the first selection section 41 and the second selection section 42 . Specifically, when the switching unit 25 determines to detect the current of the maximum phase and the minimum phase, the voltage signal representing the current value of the current of the maximum phase among the voltage signals SGua, SGva, and SGwa is The first selection section 41 is controlled so that the signal is input to the sample hold section 311 of the first detector 31 . As a result, the first selection unit 41 inputs only the voltage signal representing the current value of the maximum phase current to the sample/hold unit 311 . Then, the sample hold section 311 responds to the trigger TG of the driving section 23 and starts sampling the voltage signal representing the current value of the maximum phase current.
  • the sample hold unit 311 finishes sampling the voltage signal when the period Td has elapsed from the start of sampling.
  • the period Td is preset in the current detection section 26 and is an essential period required for the first detector 31 to detect the current.
  • the sample-and-hold unit 311 is, for example, a sample-and-hold circuit including elements such as capacitors.
  • the detection unit 312 converts the voltage signal sampled by the sample hold unit 311 into a digital signal. That is, the detection unit 312 converts the voltage signal indicating the potential difference between both ends of the electrical resistance unit R into a digital signal and outputs the digital signal to the calculation unit 21 .
  • the calculation unit 21 converts the potential difference between both ends of the electrical resistance unit R indicated by the digital signal into a current value to acquire the current value of the maximum phase current. Thus, the detector 312 detects the maximum phase current.
  • the switching unit 25 determines to detect the current of the maximum phase and the minimum phase
  • the voltage signal representing the current value of the current of the minimum phase among the voltage signals SGua, SGva, and SGwa is the second voltage signal.
  • the second selection section 42 is controlled so that the signal is input to the sample hold section 321 of the detector 32 .
  • the second selection unit 42 inputs only the voltage signal representing the current value of the minimum phase current to the sample/hold unit 321 .
  • the sample hold section 321 responds to the trigger TG of the driving section 23 and starts sampling the voltage signal representing the current value of the current of the minimum phase.
  • the sample hold section 321 finishes sampling the voltage signal when the period Td has elapsed from the start of sampling.
  • the period Td is preset in the current detection section 26 and is an essential period required for the second detector 32 to detect the current.
  • the sample-and-hold section 321 is, for example, a sample-and-hold circuit including elements such as capacitors.
  • the detection section 322 converts the voltage signal sampled by the sample hold section 321 into a digital signal. That is, the detection section 322 converts the voltage signal indicating the potential difference between both ends of the electric resistance section R into a digital signal and outputs the digital signal to the calculation section 21 .
  • the calculation unit 21 converts the potential difference between both ends of the electrical resistance unit R indicated by the digital signal into a current value, and acquires the current value of the current of the minimum phase. Thus, the detector 322 detects the minimum phase current.
  • the switching unit 25 determines to detect the currents of the intermediate phase and the minimum phase
  • the voltage signal representing the current value of the current of the intermediate phase among the voltage signals SGua, SGva, and SGwa is the first detection signal.
  • the first selection unit 41 is controlled so that the data is input to the sample hold unit 311 of the device 31 . Then, the sample hold section 311 starts sampling the voltage signal representing the current value of the intermediate phase current in response to the trigger TG of the driving section 23 .
  • the sample hold unit 311 finishes sampling the voltage signal when the period Td has elapsed from the start of sampling.
  • the detection unit 312 converts the voltage signal sampled by the sample hold unit 311 into a digital signal. That is, the detection unit 312 converts the voltage signal indicating the potential difference between both ends of the electrical resistance unit R into a digital signal and outputs the digital signal to the calculation unit 21 .
  • the calculation unit 21 converts the potential difference between both ends of the electrical resistance unit R indicated by the digital signal into a current value to acquire the current value of the intermediate phase current. Thus, the detection unit 312 detects the intermediate phase current.
  • the switching unit 25 determines to detect the currents of the intermediate phase and the minimum phase, among the voltage signals SGua, SGva, and SGwa, the voltage signal representing the current value of the current of the minimum phase is selected as the second voltage signal.
  • the second selection section 42 is controlled so that the signal is input to the sample hold section 321 of the detector 32 .
  • the minimum phase current detection processing when it is determined to detect the intermediate phase and minimum phase currents is the same as the minimum phase current detection processing when it is determined to detect the maximum phase and minimum phase currents. is.
  • each of the detection units 312 and 322 is, for example, an A/D converter.
  • each of the first detector 31 and the second detector 32 may be an A/D converter.
  • each of the detection units 312 and 322 may convert the potential difference between both ends of the electrical resistance unit R into a current value.
  • FIG. 9 A first modification of the first embodiment will be described with reference to FIGS. 9 and 10.
  • FIG. The first modification mainly differs from the first embodiment in which energization of three-phase modulation is performed in that a two-phase modulation min-type modulation method is employed. Differences of the first modification from the first embodiment will be mainly described below.
  • a waveform diagram F40 in FIG. 9 shows voltages Vu, Vv, and Vw applied to the U-phase, V-phase, and W-phase.
  • the horizontal and vertical axes of the waveform diagram F20 are the same as those of the waveform diagram F10 in FIG.
  • the two-phase modulation min type modulation method is a modulation method having a period in which one of the three phases is fixed off in the waveforms of the voltages Vu, Vv, and Vw applied to each phase. It's about.
  • the control device 100 according to the first modification executes energization by a two-phase modulation min-type modulation method.
  • the right area of the waveform diagram F40 shows the carrier wave CA and the compare values Cmu, CMv, and CMw in the electrical angle range (time range) shown in the area A4 of the waveform diagram F40. Otherwise, the view of FIG. 9 is the same as the view of FIG.
  • the comparison unit 24 determines the intermediate phase, maximum phase, and minimum phase based on the comparison results of the voltage command values Vbu, Vbv, and Vbw for each current detection time td.
  • the intermediate phase is the W phase corresponding to the voltage command value Vbw
  • the maximum phase is the V phase corresponding to the voltage command value Vbv
  • the minimum phase is the voltage command value Vbu.
  • the corresponding U phase is the intermediate phase, maximum phase, and minimum phase based on the comparison results of the voltage command values Vbu, Vbv, and Vbw for each current detection time td.
  • the switching unit 25 detects that the period Tm during which the second switching element SW2 of the switching unit Uv for applying a voltage to the maximum phase (V phase) is turned on is set at each current detection time td. 26 determines whether it is shorter than the preset period Td for detecting the current. In the example of FIG. 9, the switching unit 25 determines that the period Tm is longer than or equal to the period Td.
  • the current detection unit 26 detects the current Iv of the maximum phase (V phase) other than the intermediate phase (W phase) and the current Iu of the minimum phase (U phase) at the current detection time td. , are detected via the electric resistance portions Rv and Ru, respectively. Then, the calculator 21 calculates the intermediate phase current Iw based on the maximum phase current Iv and the minimum phase current Iu. Therefore, according to the first modification, even when the two-phase modulation min type modulation method is adopted, the currents Iu, Iv, and Variation in the detected value of Iw can be suppressed.
  • FIG. 10 shows another example of the voltages Vu, Vv, Vw (two-phase modulation min type) applied to each phase, the carrier wave CA, the compare values Cmu, CMv, CMw, and the second gate signals G2u, G2v, G2w.
  • FIG. 4 is a diagram showing;
  • a waveform diagram F50 in FIG. 10 shows voltages Vu, Vv, and Vw applied to the U-phase, V-phase, and W-phase.
  • the horizontal and vertical axes of the waveform chart F50 are the same as the horizontal and vertical axes of the waveform chart F20 in FIG. In FIG.
  • the right area of the waveform diagram F50 shows the carrier wave CA and the compare values Cmu, CMv, and CMw in the electrical angle range (time range) shown in the area A5 of the waveform diagram F50. Otherwise, the view of FIG. 10 is the same as the view of FIG.
  • the switching unit 25 applies the voltage Vv to the maximum phase (V phase) within the PWM period Tpwm, longer than the period Td preset for detecting the current by the current detecting unit 26.
  • the current detection unit 26 detects the voltage of the intermediate phase (W phase) instead of the maximum phase (V phase). Detecting the current Iw, the calculation unit 21 calculates the current value of the maximum phase (V phase) current Iv based on the detection results of the intermediate phase (W phase) current Iw and the minimum phase (U phase) current Iu. do.
  • the first gate signal ( In the example, even if the current detector 26 cannot detect the maximum phase current because the duty value of the first gate signal G1v) is in the vicinity of 100%, by substituting the intermediate phase current, the three-phase current can be detected. Current values of currents Iu, Iv, and Iw can be detected.
  • FIG. 11 A second modification of the first embodiment will be described with reference to FIGS. 11 and 12.
  • FIG. The second modification mainly differs from the first embodiment in which energization of three-phase modulation is performed in that a two-phase modulation min-max type modulation method is employed. Differences of the second modification from the first embodiment will be mainly described below.
  • a waveform diagram F60 in FIG. 11 shows voltages Vu, Vv, and Vw applied to the U-phase, V-phase, and W-phase.
  • the horizontal and vertical axes of the waveform diagram F60 are the same as those of the waveform diagram F10 in FIG.
  • the two-phase modulation min-max type modulation method includes a period in which one of the three phases is fixed to ON in the waveforms of the voltages Vu, Vv, and Vw applied to each phase, It is a modulation method having a period in which one of the three phases is fixed off.
  • the control device 100 according to the second modification executes energization by a two-phase modulation min-max type modulation method.
  • the right area of the waveform diagram F60 shows the carrier wave CA and the compare values Cmu, CMv, and CMw in the electrical angle range (time range) shown in the area A6 of the waveform diagram F60. Otherwise, the view of FIG. 11 is the same as the view of FIG.
  • the comparison unit 24 determines the intermediate phase, maximum phase, and minimum phase based on the comparison results of the voltage command values Vbu, Vbv, and Vbw for each current detection time td.
  • the intermediate phase is the W phase corresponding to the voltage command value Vbw
  • the maximum phase is the V phase corresponding to the voltage command value Vbv
  • the minimum phase is the voltage command value Vbu.
  • the corresponding U phase is the intermediate phase, maximum phase, and minimum phase based on the comparison results of the voltage command values Vbu, Vbv, and Vbw for each current detection time td.
  • the switching unit 25 detects the period Tm during which the second switching element SW2 of the switching unit Uv for applying a voltage to the maximum phase (V phase) is turned on at each current detection time td. 26 determines whether it is shorter than the preset period Td for detecting the current. In the example of FIG. 11, the switching unit 25 determines that the period Tm is longer than or equal to the period Td.
  • the current detection unit 26 detects the current Iv of the maximum phase (V phase) other than the intermediate phase (W phase) and the current Iu of the minimum phase (U phase) at the current detection time td as follows: They are detected via the electric resistors Rv and Ru, respectively. Then, the calculator 21 calculates the intermediate phase current Iw based on the maximum phase current Iv and the minimum phase current Iu. Therefore, according to the second modification, even when the two-phase modulation min-max type modulation method is adopted, compared to the case where the current in the intermediate phase is directly detected, the currents Iu, Variation in detected values of Iv and Iw can be suppressed.
  • FIG. 12 is a diagram showing another example of the voltages Vu, Vv, Vw applied to each phase, the carrier wave CA, the compare values CMu, CMv, CMw, and the second gate signals G2u, G2v, G2w.
  • a waveform diagram F70 in FIG. 12 shows voltages Vu, Vv, and Vw applied to the U-phase, V-phase, and W-phase.
  • the horizontal and vertical axes of the waveform diagram F70 are the same as those of the waveform diagram F20 in FIG.
  • the right area of the waveform chart F70 shows the carrier wave CA and the compare values Cmu, CMv, and CMw in the electrical angle range (time range) shown in the area A7 of the waveform chart F70. Otherwise, the view of FIG. 12 is the same as the view of FIG.
  • the second gate signal G2v is at zero level in the two-phase modulation min-max type modulation method. Therefore, at the current detection time td, the second switching element SW2 of the switching unit Uv is off. As a result, within the PWM period Tpwm, the switching unit 25 applies the voltage Vv to the maximum phase (V phase) longer than the preset period Td for detecting the current by the current detection unit 26. It is determined that the period Tm during which the second switching element SW2 of Uv is turned on is short.
  • the current detection unit 26 detects the current Iw of the intermediate phase (W phase) instead of the maximum phase (V phase), and the calculation unit 21 detects the current Iw of the intermediate phase (W phase) and the minimum phase (U phase). ), the current value of the current Iv of the maximum phase (V phase) is calculated based on the detection result of the current Iu.
  • the first gate signal ( In example 12, even if the current detection unit 26 cannot detect the current of the maximum phase because the duty value of the first gate signal G1v) is 100%, by substituting the current of the middle phase, three phases can detect current values of the currents Iu, Iv, and Iw.
  • FIG. 2 A motor module 200A according to a second embodiment of the present disclosure will be described with reference to FIGS. 13 to 17.
  • FIG. The second embodiment is mainly different from the first embodiment in which the motor module 200 controls the three-phase inverter 1 in that the motor module 200A according to the second embodiment controls the N-phase inverter 1A.
  • differences of the second embodiment from the first embodiment will be mainly described.
  • FIG. 13 is a block diagram showing a motor module 200A according to the second embodiment.
  • the motor module 200A includes a control device 100A and an N-phase motor MN.
  • N denotes an odd number of 3 or more.
  • Control device 100A controls N-phase inverter 1A that applies voltages Va1 to VaN to N-phases, respectively, when N is an odd number of 3 or more.
  • the control device 100A has an N-phase inverter 1A.
  • N-phase inverter 1A is connected to DC power supply section PW.
  • the N-phase inverter 1A applies voltages Va1 to VaN having different phases to the respective phases of the N-phase motor MN to drive the N-phase motor MN.
  • the voltages Va1 to VaN may be referred to as applied voltages Va1 to VaN.
  • Currents Ia1 to IaN corresponding to voltages Va1 to VaN flow through the respective phases of N-phase motor MN.
  • the N-phase motor MN includes N-phase coils CL1 to CLN.
  • the N-phase motor MN is, for example, a brushless DC motor.
  • the N-phase motor MN has P1 to PN phases.
  • the polarity of the current flowing from the N-phase inverter 1A to the neutral point NP of the N-phase motor MN is positive, and the polarity of the current flowing from the neutral point NP to the N-phase inverter 1A. is negative.
  • the object to be driven by the N-phase inverter 1A is not limited to the N-phase motor MN, and may be other electrical equipment.
  • the N-phase motor MN may be arranged outside the control device 100A.
  • the control device 100A further includes a calculator 21 and a current detector 26 .
  • the current detection unit 26 determines that the phase to which the (N+1)/2th largest voltage is applied at the current detection time among the voltages Va1 to VaN applied to each of the N phases is the intermediate phase. Among Ia1 to IaN, the current of each of the (N-1) phases other than the intermediate phase is detected. Specifically, the current detection unit 26 selects the phase to which the (N+1)/2nd largest voltage is applied among the voltages Va1 to VaN applied to the N-phase coils CL1 to CLN as the intermediate phase at the current detection time. , the current of each of the (N-1) phases other than the intermediate phase is detected among the currents Ia1 to IaN of each of the N phases.
  • the current detection unit 26 selects not the current of the intermediate phase, which has relatively large current fluctuations and disturbances, among the currents Ia1 to IaN, but rather (N-1) phase current is detected. Therefore, among the currents Ia1 to IaN, errors in the detection results are suppressed for the directly detected currents.
  • the control device 100A will be described with reference to FIG.
  • the N-phase inverter 1A includes N switching units U1-UN.
  • the N switching units U1 to UN apply voltages Va1 to VaN to the N phases, respectively. Specifically, the N switching units U1 to UN apply different phase voltages Va1 to VaN to the N phase coils CL1 to CLN, respectively.
  • Each of the switching units U1 to UN includes a first switching element SW1 on the first voltage V1 side of the DC power supply section PW and a second switching element SW2 on the second voltage V2 side of the DC power supply section PW.
  • the second switching element SW2 is connected in series with the first switching element SW1.
  • the second voltage V2 is less than the first voltage V1.
  • the second voltage V2 is the ground voltage (0V).
  • the N-phase inverter 1A is driven by the PWM signal Spwm.
  • the PWM signal Spwm includes N first gate signals G11 to G1N that drive the first switching elements SW1 of the switching units U1 to UN, respectively, and N first gate signals G11 to G1N that respectively drive the second switching elements SW2 of the switching units U1 to UN. and second gate signals G21 to G2N.
  • each of the first switching element SW1 and the second switching element SW2 is a semiconductor switching element.
  • each of the first switching element SW1 and the second switching element SW2 is an IGBT (insulated gate bipolar transistor).
  • each of the first switching element SW1 and the second switching element SW2 may be another transistor such as a field effect transistor.
  • the polarities of the second gate signals G21 to G2N are basically opposite to the polarities of the first gate signals G11 to G1N, respectively. That is, the second gate signals G21-G2N and the first gate signals G11-G1N are basically complementary. However, the fact that a dead time may be provided is the same as in the three-phase case described with reference to FIG.
  • the control device 100A further includes a current sensor section 3A for detecting currents Ia1 to IaN of the N phases.
  • the current sensor section 3A includes N electric resistance sections R1 to RN for detecting currents Ia1 to IaN of the N phases, respectively.
  • Each of the electrical resistance portions R1 to RN, or a generic term for these, may be referred to as an electrical resistance portion R.
  • the electric resistance units R1 to RN are resistance components (for example, resistance elements) for detecting currents flowing through the N-phase coils CL1 to CLN through the N-phase inverter 1A.
  • (N ⁇ 1) electrical resistance units R among the N electrical resistance units R1 to RN are used.
  • the electric resistance units R1 to RN are arranged corresponding to the switching units U1 to UN, respectively.
  • Each of the electrical resistance units R1 to RN is arranged between the second switching element SW2 of the corresponding one of the switching units U1 to UN and the DC power supply unit PW.
  • the control device 100A further includes a carrier generation section 22, a drive section 23, a comparison section 24, and a switching section 25.
  • the control device 100A includes an inverter control section 2 .
  • the inverter controller 2 includes a calculator 21 , a carrier wave generator 22 , a driver 23 , a comparator 24 , a switcher 25 and a current detector 26 .
  • the inverter control unit 2 is, for example, a microcomputer.
  • the current detector 26 is realized by an A/D converter.
  • the calculation unit 21 calculates voltage command values Vb1 to VbN. Assuming that the N phases constituting the N phases are "P1 phase to PN phase", calculation unit 21 calculates voltage command values Vb1 to VbN corresponding to the P1 phase to PN phase, respectively. Calculation unit 21 outputs voltage command values Vb1 to VbN to comparison unit 24 .
  • the voltage command values Vb1 to VbN indicate the voltage values of the voltages Va1 to VaN output by the N-phase inverter 1A, respectively. Therefore, the voltage command values Vb1 to VbN substantially match the voltage values of the voltages Va1 to VaN output from the N-phase inverter 1A, respectively. Specifically, the voltage command values Vb1 to VbN indicate voltage values to be followed by the voltages Va1 to VaN applied to the P1 to PN phases constituting the N phase, respectively. In this specification, voltage command values Vb1 to VbN and applied voltages Va1 to VaN are substantially synonymous.
  • the calculator 21 calculates compare values CM1 to CMN based on the voltage command values Vb1 to VbN. Therefore, compare values CM1-CMN correspond to voltage command values Vb1-VbN, respectively.
  • the compare values CM1-CMN directly or indirectly indicate the duty values of the first gate signals G11-G1N in the PWM signal Spwm, respectively.
  • the calculator 21 outputs the compare values CM1 to CMN to the driver 23 .
  • the duty value indicates the ratio of the ON time of the first switching element SW1 of each phase to the preset PWM cycle Tpwm.
  • the carrier generation unit 22 generates a carrier CA.
  • the carrier wave generation unit 22 outputs the carrier wave CA to the drive unit 23 .
  • Carrier CA is, for example, a triangular wave. Note that the waveform of the carrier wave CA is not particularly limited.
  • FIG. 14 is a diagram showing an example of carrier CA and compare values CM1 to CMN.
  • "n" indicates an integer smaller than N and larger than one.
  • the PWM period Tpwm is equal to the period of the carrier CA.
  • the PWM period Tpwm of the second embodiment is the same as the PWM period Tpwm of the first embodiment.
  • control period Tcnt is defined by the period of the carrier wave CA.
  • the control cycle Tcnt is a cycle for updating the duty value of the PWM signal Spwm. Therefore, the duty value of the PWM signal Spwm is updated every control period Tcnt.
  • Control cycle Tcnt is longer than PWM cycle Tpwm.
  • the control period Tcnt of the second embodiment is the same as the control period Tcnt of the first embodiment.
  • the driving section 23 generates the PWM signal Spwm based on the carrier wave CA and the compare values CM1 to CMN. Then, the drive unit 23 outputs the PWM signal Spwm to the N-phase inverter 1A to drive the N-phase inverter 1A.
  • N-phase inverter 1A applies voltages Va1-VaN indicated by voltage command values Vb1-VbN, respectively, to N-phase coils CL1-CLN, respectively.
  • the drive unit 23 compares each of the compare values CM1 to CMN with the carrier wave CA, and generates the PWM signal Spwm based on the comparison result. More specifically, the driving unit 23 determines whether the compare value is equal to or higher than the level of the carrier wave CA for each of the compare values CM1 to CMN. Then, the drive unit 23 activates or deactivates each of the first gate signals G11 to G1N in the PWM signal Spwm based on the determination result for each of the compare values CM1 to CMN. As a result, the duty values of the N first gate signals G11 to G1N are set according to the compare values CM1 to CMN. The first switching element SW1 to which the activated first gate signal among the first gate signals G11 to G1N is applied is turned on. The first switching element SW1 to which the inactivated first gate signal among the first gate signals G11 to G1N is applied is turned off.
  • Comparing unit 24 compares voltage command values Vb1 to VbN of phases P1 to PN constituting phase N with each other at each current detection time td, and obtains voltage command values Vb1 to VbN of phases P1 to PN, respectively. Determines what is the largest In other words, the comparison unit 24 compares the voltages Va1 to VaN applied to the P1 to PN phases at each current detection time td, and compares the voltages Va1 to VaN applied to the P1 to PN phases with each other. Determines what is the largest In other words, the comparator 24 determines the intermediate phase and the maximum phase from among the P1-PN phases. Note that the comparison unit 24 may determine the minimum phase. For example, in the central control cycle Tcnt in FIG. 14, the PN phase is the intermediate phase, the Pn phase is the maximum phase, and the P1 phase is the minimum phase.
  • the intermediate phase is the phase for which the (N+1)/2nd largest voltage command value is set at the current detection time td among the voltage command values Vb1 to VbN for the P1 to PN phases constituting the N phase. That is, the intermediate phase is the phase to which the (N+1)/2nd largest voltage is applied at the current detection time td among the voltages Va1 to VaN applied to the P1 to PN phases, respectively.
  • the maximum phase is the phase for which the largest voltage command value is set at the current detection time td among the voltage command values Vb1 to VbN for the P1 to PN phases constituting the N phase. That is, the maximum phase is the phase to which the largest voltage is applied at the current detection time td among the voltages Va1 to VaN applied to the P1 to PN phases, respectively.
  • the minimum phase is the phase for which the smallest voltage command value is set at the current detection time among the voltage command values Vb1 to VbN for the P1 to PN phases constituting the N phase. That is, the minimum phase is the phase to which the smallest voltage is applied at the current detection time td among the voltages Va1 to VaN applied to the P1 to PN phases, respectively.
  • the Pn phase is the maximum phase.
  • the period Tm during which the second switching element SW2 of the switching unit Un for applying the voltage Van to the Pn phase, which is the maximum phase, is turned on is It is determined whether or not the period is shorter than a preset period Td.
  • the switching unit 25 determines that the period Tm is not shorter than the period Td, that is, when it determines that the period Tm is equal to or longer than the period Td, the switching unit 25 detects the current of each of the (N ⁇ 1) phases other than the intermediate phase. decide to
  • the driving section 23 activates the second gate signal G2n to turn on the second switching element SW2 of the switching unit Un when the compare value CMn is lower than the level of the carrier wave CA. .
  • FIG. 15 is a diagram showing another example of carrier CA and compare values CM1 to CMN.
  • the Pn phase is the maximum phase.
  • the switching unit 25 of FIG. 13 determines whether the period Tm during which the second switching element SW2 of the maximum phase is turned on is shorter than the period Td preset for detecting the current by the current detecting unit 26. .
  • the switching unit 25 determines to detect the current of each of the (N ⁇ 1) phases other than the maximum phase. In other words, in this case, the middle phase current is detected instead of the maximum phase.
  • the current detection section 26 detects current via the current sensor section 3 in response to the trigger TG generated by the drive section 23 .
  • the time when the trigger TG is generated becomes the current detection time.
  • the current detecting unit 26 responds to the trigger TG generated by the driving unit 23. to detect the current of each of the (N-1) phases other than the intermediate phase. Then, the current detection unit 26 outputs to the calculation unit 21 a signal indicating the current value of each of the (N ⁇ 1) phases other than the intermediate phase. The calculation unit 21 calculates the current value of the current of the intermediate phase based on the current value of each of the (N ⁇ 1) phases other than the intermediate phase.
  • the current detecting unit 26 responds to the trigger TG generated by the driving unit 23, The current of each of the (N-1) phases other than the largest phase is detected. Then, the current detection unit 26 outputs to the calculation unit 21 a signal indicating the current value of each of the (N ⁇ 1) phases other than the maximum phase.
  • the current detection unit 26 Even if it is impossible to detect the current of the maximum phase by , the current values of the currents Ia1 to IaN of the N phases can be detected by substituting the current of the intermediate phase.
  • the period Tm during which the second switching element SW2 of the maximum phase is turned on within the PWM period Twpm is shorter than the period Td means that the period during which the first switching element SW1 of the maximum phase is turned on within the PWM period Twpm. indicates that is long. In this case, the duty value of the first gate signal G1n of the maximum phase is near 100%.
  • the fact that the period Tm during which the second switching element SW2 of the maximum phase is turned on within the PWM period Twpm is zero means that the first switching element SW1 of the maximum phase is turned on during the entire period of the PWM period Twpm. indicates In this case, the duty value of the first gate signal applied to the first switching element SW1 of the maximum phase is 100%.
  • FIG. 4 is a flow chart showing phase determination processing for determining the phase in which the current is directly detected. As shown in FIG. 16, the phase determination process includes steps S1-S7. The phase determination process is repeatedly executed every control period Tcnt.
  • step S1 the calculator 21 calculates voltage command values Vb1 to VbN respectively indicating applied voltages Va1 to VaN.
  • step S2 the calculator 21 calculates compare values CM1 to CMN based on the voltage command values Vb1 to VbN.
  • step S3 the comparison unit 24 compares the voltage command values Vb1 to VbN of the P1 phase to the PN phase, and determines which of the voltage command values Vb1 to VbN of the P1 phase to the PN phase is the largest. decide. Then, comparison unit 24 determines the phase for which the largest voltage command value among voltage command values Vb1 to VbN is set as the maximum phase. Further, the comparison unit 24 determines the phase for which the (N+1)/2th largest voltage command value among the voltage command values Vb1 to VbN is set as the intermediate phase.
  • the comparison unit 24 compares the voltages Va1 to VaN applied to the P1 phase to the PN phase, and determines which of the voltages Va1 to VaN is the highest. Then, the comparison unit 24 determines the phase to which the largest voltage among the voltages Va1 to VaN applied to the P1 phase to the PN phase is the maximum phase. Further, the comparison unit 24 determines the phase to which the (N+1)/2th largest voltage among the voltages Va1 to VaN applied to the P1 to PN phases is the intermediate phase.
  • step S4 the switching unit 25 causes the current detection unit 26 to determine whether the ON period Tm of the second switching element SW2 corresponding to the maximum phase is shorter than the period Td preset for current detection. determine whether
  • step S4 If it is determined in step S4 that the ON period Tm is not shorter than the period Td (No), the process proceeds to step S5. That is, if it is determined in step S4 that the ON period Tm is longer than or equal to the period Td, the process proceeds to step S5.
  • step S5 the switching unit 25 determines to detect the current of the (N-1) phase other than the intermediate phase. For example, the switching unit 25 sets a flag indicating that the current of the (N-1) phase other than the intermediate phase is detected.
  • step S4 determines whether the ON period Tm is shorter than the period Td (Yes). If it is determined in step S4 that the ON period Tm is shorter than the period Td (Yes), the process proceeds to step S6.
  • step S6 the switching unit 25 determines to detect the current of the (N-1) phases other than the maximum phase. For example, the switching unit 25 sets a flag indicating that the current of (N ⁇ 1) phases other than the maximum phase is detected.
  • step S7 after steps S5 and S6, the calculation unit 21 sets the compare values CM1 to CMN calculated in step S2 in the drive unit 23. Then the process ends.
  • the compare values CM1 to CMN set in the drive unit 23 in step S7 executed in a certain control cycle Tcnt are determined by the drive unit 23 in the next control cycle Tcnt or by the microcomputer used as the inverter control unit 2. It will be reflected at the specified timing. Further, the determinations in steps S5 and S6 executed in a certain control cycle Tcnt are performed by the switching unit 25 and the current detection unit 26 at the next control cycle Tcnt or at the timing determined by the microcomputer used as the inverter control unit 2. reflected.
  • FIG. 17 is a flowchart showing current value calculation processing for calculating the current value of an undetected current.
  • the current value calculation process includes steps S11 to S17.
  • the current value calculation process is repeatedly executed for each PWM cycle Tpwm. Steps S11 to S17 correspond to an example of "a control method executed by a control device".
  • step S11 the switching unit 25 determines whether or not it has been determined to detect the current of the (N-1) phase other than the maximum phase. That is, the switching unit 25 determines whether or not a flag is set to indicate that the current of the (N-1) phase other than the maximum phase is detected.
  • step S11 If it is determined in step S11 that it has not been decided to detect the current of the (N-1) phase other than the maximum phase (No), the process proceeds to step S12. That is, if it is determined in step S11 that it is decided to detect the current of the (N-1) phase other than the intermediate phase, the process proceeds to step S12.
  • step S12 the current detection unit 26 determines whether or not the current detection time has arrived. In other words, the current detection section 26 determines whether or not the drive section 23 has output the trigger TG.
  • step S12 If it is determined in step S12 that the current detection time has not arrived (No), the process repeats step S12.
  • step S12 if it is determined that the current detection time has arrived in step S12 (Yes), the process proceeds to step S13.
  • step S13 the current detection unit 26 detects the currents of the (N-1) phases other than the intermediate phase.
  • Step S13 corresponds to an example of the "current detection step”.
  • step S14 the calculation unit 21 calculates the current value of the current of the intermediate phase based on the current detection result of each of the (N-1) phases other than the intermediate phase.
  • Step S14 corresponds to an example of a "calculation step.” Then the process ends.
  • step S11 determines whether it has been determined to detect the current of the (N-1) phase other than the maximum phase (Yes). If it is determined in step S11 that it has been determined to detect the current of the (N-1) phase other than the maximum phase (Yes), the process proceeds to step S15.
  • step S15 the current detection unit 26 determines whether or not the current detection time has arrived. In other words, the current detection section 26 determines whether or not the drive section 23 has output the trigger TG.
  • step S15 If it is determined in step S15 that the current detection time has not arrived (No), the process repeats step S15.
  • step S15 if it is determined that the current detection time has arrived in step S15 (Yes), the process proceeds to step S16.
  • step S16 the current detection unit 26 detects currents of (N-1) phases other than the maximum phase.
  • step S17 the calculation unit 21 calculates the current value of the current of the maximum phase based on the detection result of the current of each of the (N-1) phases other than the maximum phase. Then the process ends.
  • FIG. 18 is a diagram showing an example of voltages Va1, Va2, Va3, Va4 and Va5 applied to each of the five phases, carrier wave CA, and compare values CM1, CM2, CM3, CM4 and CM5 in the second embodiment.
  • a waveform diagram F100 in FIG. 18 shows voltages Va1, Va2, Va3, Va4, and Va5 applied to the P1 phase, P2 phase, P3 phase, P4 phase, and P5 phase, respectively.
  • the horizontal axis indicates the electrical angle [degE]
  • the vertical axis indicates the voltages Va1 to Va5.
  • the vertical axis of the waveform diagram F100 represents the voltage value normalized by the input voltage V1-V2, and the voltages Va1-Va5 take values in the range of 0-1.
  • This value also represents the duty value, which is the ratio of the ON time of the first switching element SW1 of each phase to the PWM period Tpwm.
  • voltages Va1 to Va5 are sinusoidal.
  • the phases of voltages Va1 to Va5 are different from each other. In the example of FIG. 18, energization by five-phase modulation is performed.
  • the right area of the waveform diagram F100 shows the carrier wave CA and the compare values CM1 to CM5 in the electrical angle range (time range) shown in the area A10 of the waveform diagram F100.
  • the compare values CM1 to CM5 and the voltage command values Vb1 to Vb5 are updated every control period Tcnt.
  • the drive unit 23 compares each of the compare values CM1 to CM5 with the carrier wave CA in each PWM cycle Tpwm. As a result, first gate signals G11 to G15 and second gate signals G21 to G25 are generated. In the second embodiment, the driving section 23 generates the first gate signals G11 to G15 and the second gate signals G21 to G25 by center alignment.
  • the comparison unit 24 compares the voltage command values Vb1 to Vb5 of the five phases with each other at each current detection time td, and determines which of the voltage command values Vb1 to Vb5 is the largest. Focusing on the control cycle Tcnt in the center of FIG. 18, the comparison unit 24 determines that the voltage command value Vb3 is the largest, the voltage command value Vb2 is the second largest, and the voltage command value Vb4 is the third largest. , the voltage command value Vb1 is determined to be the fourth largest, and the voltage command value Vb5 is determined to be the fifth largest.
  • the comparison unit 24 determines the phase for which the voltage command value Vb3 is set as the maximum phase, and the phase for which the voltage command value Vb4 is set as the intermediate phase.
  • the current detection unit 26 detects the currents of the four phases other than the P4 phase, which is the intermediate phase. Specifically, the current detection unit 26 detects the current Ia1 of the P1 phase, the current Ia2 of the P2 phase, the current Ia3 of the P3 phase (maximum phase), and the current Ia5 of the P5 phase through the electric resistance units R1 and R2. , R3 and R5.
  • the calculation unit 21 calculates the current value of the intermediate phase current Ia4 based on the current values of the current Ia1, the current Ia2, the current Ia3, and the current Ia5.
  • FIG. 19 is a diagram showing changes in the order of the magnitudes of the P1 to P5 phases in the electrical angle range of 0 [degE] to 360 [degE] in 5-phase modulation.
  • the horizontal and vertical axes of FIG. 19 are the same as those of the waveform diagram F100 shown in FIG. In FIG. 19, the order of magnitude is shown from No. 1 to No. 5 for each of the P1 to P5 phases. As shown in FIG. 19, the order of the magnitudes of the P1 to P5 phases changes for each predetermined electrical angle [degE].
  • the current of the intermediate phase is calculated by detecting the current of the four phases other than the intermediate phase.
  • variations in the detected values of the five-phase currents Ia1 to Ia5 can be suppressed.
  • FIG. Embodiment 3 mainly differs from Embodiment 1, which includes an electrical resistance type current sensor section 3, in that it includes a clamp-type current sensor section 3B. In the following, differences of the third embodiment from the first embodiment will be mainly described.
  • FIG. 20 is a diagram showing a motor module 200B according to the third embodiment.
  • the motor module 200B has a control device 100B.
  • the control device 100B includes a current sensor section 3B for detecting three-phase currents Iu, Iv, and Iw.
  • the current sensor section 3B is, for example, a clamp type.
  • Current sensor unit 3B is arranged between three-phase inverter 1 and three-phase motor M3.
  • FIG. 21 is a diagram showing a current sensor section 3B according to the third embodiment.
  • the current sensor unit 3B includes a magnetic core CPu for detecting the U-phase current Iu, a magnetic core CPv for detecting the V-phase current Iv, and a magnetic core CPv for detecting the W-phase current. It comprises a magnetic core CPw, a current sensor MGu, a current sensor MGv and a current sensor MGw.
  • magnetic cores CPu, CPv, CPw surround lines Lu, Lv, Lw, respectively.
  • the magnetic core CPu is arranged on the line Lu.
  • the line Lu is an electric wire that connects the connection point N in the switching unit Uu and the U-phase coil CLu.
  • the magnetic core CPu detects magnetic flux according to the current value of the current Iu flowing through the line Lu. For example, the magnetic flux is proportional to the current value.
  • the magnetic core CPu is connected to the current sensor MGu.
  • the current sensor MGu converts the magnetic flux detected by the magnetic core CPu into a voltage signal SGu and outputs the voltage signal SGu to the current detector 26 .
  • the voltage signal SGu represents the current value of the current Iu flowing through the line Lu.
  • the current sensor MGu is connected to the amplifier 33u of FIG. 8 by a signal line LNu.
  • the voltage signal SGu is input to the amplifier 33u.
  • Current sensor MGu includes, for example, a magnetic sensor such as a Hall element.
  • the current sensor MGu is arranged, for example, in the vicinity of or on the magnetic core CPu.
  • the magnetic core CPv is arranged on the line Lv.
  • the line Lv is an electric wire that connects the connection point N in the switching unit Uv and the V-phase coil CLv.
  • the magnetic core CPv detects magnetic flux according to the current value of the current Iv flowing through the line Lv. For example, the magnetic flux is proportional to the current value.
  • the current sensor MGv converts the magnetic flux detected by the magnetic core CPv into a voltage signal SGv and outputs the voltage signal SGv to the current detector 26 .
  • Voltage signal SGv represents the current value of current Iv flowing through line Lv.
  • Current sensor MGv is connected to amplifier 33v in FIG. 8 by signal line LNv.
  • the voltage signal SGv is input to the amplifier 33u.
  • Current sensor MGv includes, for example, a magnetic sensor such as a Hall element.
  • the current sensor MGv is arranged, for example, in the vicinity of the magnetic core CPv or on the magnetic core CPv.
  • the magnetic core CPw is arranged on the line Lw.
  • the line Lw is an electric wire that connects the connection point N in the switching unit Uw and the W-phase coil CLw.
  • the magnetic core CPw detects magnetic flux according to the current value of the current Iw flowing through the line Lw. For example, the magnetic flux is proportional to the current value.
  • the current sensor MGw converts the magnetic flux detected by the magnetic core CPw into a voltage signal SGw and outputs the voltage signal SGw to the current detection section 26 .
  • the voltage signal SGw represents the current value of the current Iw flowing through the line Lw.
  • the current sensor MGw is connected to the amplifier 33w of FIG. 8 by a signal line LNw.
  • the voltage signal SGw is input to the amplifier 33w.
  • Current sensor MGw includes, for example, a magnetic sensor such as a Hall element.
  • the current sensor MGw is arranged, for example, in the vicinity of or on the magnetic core CPw.
  • lines Lu, Lv, and Lw are connected to connection points N in switching units Uu, Uv, and Uw, respectively.
  • Currents of the maximum phase and the minimum phase among the currents Iu, Iv, and Iw flow into the current sensor section 3B from the lines Lu, Lv, and Lw. Therefore, the current detection section 26 can detect the maximum phase and minimum phase currents via the current sensor section 3B regardless of whether the second switching element SW2 is on or off. That is, the current detection unit 26 can detect the maximum phase and minimum phase currents without being restricted by the second switching element SW2.
  • FIG. 4 A motor module 200B according to Embodiment 4 of the present disclosure will be described with reference to FIGS. 20, 22, and 23.
  • FIG. The overall configuration of the motor module 200B according to the fourth embodiment is the same as the overall configuration of the motor module 200B according to the third embodiment shown in FIG. Embodiment 4 is mainly different from Embodiment 3 in which the current sensor section 3B includes magnetic cores CPu, CPv, and CPw in that the current sensor section 3B of Embodiment 4 includes electrical resistance sections Ru, Rv, and Rw. .
  • the fourth embodiment from the third embodiment will be mainly described.
  • FIG. 22 is a diagram showing a current sensor section 3B according to Embodiment 4.
  • the current sensor section 3B includes electric resistance sections Ru, Rv, and Rw for detecting three-phase currents Iu, Iv, and Iw, respectively.
  • the configurations of the electrical resistance portions Ru, Rv, and Rw are the same as those of the electrical resistance portions Ru, Rv, and Rw in FIG. 3, for example.
  • a current detection section 26A which will be described later, is provided instead of the current detection section 26 shown in FIGS.
  • the electric resistance portion Ru is arranged on the line Lu through which the U-phase current Iu flows.
  • a line Lu extends from the connection point N in the switching unit Uu to the coil CLu (FIG. 20). That is, the electrical resistance portion Ru is connected between the connection point N and the coil CLu.
  • the electric resistance portion Rv is arranged on the line Lv through which the V-phase current Iv flows.
  • a line Lv extends from the connection point N of the switching unit Uv to the coil CLv (FIG. 20). That is, the electrical resistance portion Rv is connected between the connection point N and the coil CLv.
  • the electric resistance portion Rw is arranged on the line Lw through which the W-phase current Iw flows.
  • a line Lw extends from the connection point N of the switching unit Uw to the coil CLw (FIG. 20). That is, the electrical resistance portion Rw is connected between the connection point N and the coil CLw.
  • Signal lines Lu1 and Lu2 extend from both ends of the electrical resistance portion Ru to the current detection portion 26A. Therefore, the current detection section 26A can detect the potential difference between both ends of the electrical resistance section Ru.
  • the potential difference across the electrical resistance portion Ru has a magnitude corresponding to the current Iu flowing through the electrical resistance portion Ru.
  • the current value of the current Iu can be calculated by dividing the potential difference between both ends of the electrical resistance portion Ru by the resistance value of the electrical resistance portion Ru.
  • Signal lines Lv1 and Lv2 extend from both ends of the electrical resistance portion Rv to the current detection portion 26A. Therefore, the current detection section 26A can detect the potential difference across the electrical resistance section Rv.
  • the potential difference across the electrical resistance portion Rv has a magnitude corresponding to the current Iv flowing through the electrical resistance portion Rv.
  • the current value of the current Iv can be calculated by dividing the potential difference across the electrical resistance portion Rv by the resistance value of the electrical resistance portion Rv.
  • Signal lines Lw1 and Lw2 extend from both ends of the electrical resistance portion Rw to the current detection portion 26A. Therefore, the current detection section 26A can detect the potential difference across the electrical resistance section Rw.
  • the potential difference across the electrical resistance portion Rw has a magnitude corresponding to the current Iw flowing through the electrical resistance portion Rw.
  • the current value of the current Iw can be calculated by dividing the potential difference between both ends of the electrical resistance portion Rw by the resistance value of the electrical resistance portion Rw.
  • FIG. 23 is a diagram showing a current detection section 26A according to the fourth embodiment.
  • the current detector 26A includes differential amplifiers 39u, 39v and 39w instead of the amplifiers 33u, 33v and 33w shown in FIG.
  • Each of the differential amplifiers 39u, 39v, and 39w is, for example, a differential amplifier including an operational amplifier.
  • the differential amplifier section 39u amplifies the potential difference across the electrical resistance section Ru (FIG. 22) and outputs a voltage signal SGu indicating the potential difference after amplification to the first selection section 41 and the second selection section 42.
  • the processing of the voltage signal SGu after the differential amplifier 39u is the same as the processing of the voltage signal SGu after the amplifier 33u shown in FIG. Note that, for example, after the voltage signal SGu is converted into a digital signal by the detection unit 312 or the detection unit 322, the calculation unit 21 calculates the potential difference between both ends of the electric resistance unit Ru indicated by the digital signal as the resistance of the electric resistance unit Ru. By dividing by the value, the current value of the current Iu is calculated.
  • the differential amplifier 39v amplifies the potential difference across the electrical resistance unit Rv (FIG. 22) and outputs a voltage signal SGv indicating the potential difference after amplification to the first selector 41 and the second selector 42. .
  • the processing of the voltage signal SGv after the differential amplifier 39v is the same as the processing of the voltage signal SGv after the amplifier 33v shown in FIG.
  • the calculation unit 21 calculates the potential difference between both ends of the electric resistance unit Rv indicated by the digital signal as the resistance value of the electric resistance unit Rv. By dividing, the current value of the current Iv is calculated.
  • the differential amplifier section 39w amplifies the potential difference across the electrical resistance section Rw (FIG. 22) and outputs a voltage signal SGw indicating the potential difference after amplification to the first selection section 41 and the second selection section 42.
  • the processing of the voltage signal SGw after the differential amplifier 39w is the same as the processing of the voltage signal SGw after the amplifier 33w shown in FIG.
  • the calculation unit 21 calculates the potential difference between both ends of the electric resistance unit Rw indicated by the digital signal as the resistance value of the electric resistance unit Rw. By dividing, the current value of the current Iw is calculated.
  • lines Lu, Lv, and Lw are connected to connection points N in switching units Uu, Uv, and Uw, respectively.
  • Currents of the maximum phase and the minimum phase among the currents Iu, Iv, and Iw flow into the current sensor section 3B from the lines Lu, Lv, and Lw. Therefore, the current detection section 26A can detect the maximum phase and minimum phase currents via the current sensor section 3B regardless of whether the second switching element SW2 is on or off. That is, the current detection unit 26A can detect the maximum phase and minimum phase currents without being restricted by the second switching element SW2.
  • the control device 100B can be realized at a relatively low cost.
  • control device 100B controls the three-phase inverter 1 in FIGS.
  • control device 100B may control N-phase inverter 1A.
  • the current sensor section 3B includes N magnetic cores and N current sensors.
  • the current sensor section 3B includes N electric resistance sections R. As shown in FIG.
  • the present invention can be suitably used for control devices and control methods.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
PCT/JP2022/046982 2021-12-24 2022-12-20 制御装置及び制御方法 Ceased WO2023120546A1 (ja)

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US18/721,193 US20250055364A1 (en) 2021-12-24 2022-12-20 Control device and control method
CN202280085031.4A CN118435511A (zh) 2021-12-24 2022-12-20 控制装置及控制方法

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1054852A (ja) * 1996-08-09 1998-02-24 Yaskawa Electric Corp インバータの出力電流検出方法
JP2003079157A (ja) * 2001-08-31 2003-03-14 Fuji Electric Co Ltd インバータの出力電流検出方法
JP2011091949A (ja) * 2009-10-23 2011-05-06 Ebara Corp 電力変換装置
WO2017221339A1 (ja) * 2016-06-22 2017-12-28 三菱電機株式会社 電力変換装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3981549B2 (ja) 2001-11-28 2007-09-26 株式会社東芝 洗濯機の制御装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1054852A (ja) * 1996-08-09 1998-02-24 Yaskawa Electric Corp インバータの出力電流検出方法
JP2003079157A (ja) * 2001-08-31 2003-03-14 Fuji Electric Co Ltd インバータの出力電流検出方法
JP2011091949A (ja) * 2009-10-23 2011-05-06 Ebara Corp 電力変換装置
WO2017221339A1 (ja) * 2016-06-22 2017-12-28 三菱電機株式会社 電力変換装置

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