WO2023103743A1 - Procédé de test de temps de commutation marche/arrêt, système et dispositif associés et support de stockage - Google Patents

Procédé de test de temps de commutation marche/arrêt, système et dispositif associés et support de stockage Download PDF

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Publication number
WO2023103743A1
WO2023103743A1 PCT/CN2022/132751 CN2022132751W WO2023103743A1 WO 2023103743 A1 WO2023103743 A1 WO 2023103743A1 CN 2022132751 W CN2022132751 W CN 2022132751W WO 2023103743 A1 WO2023103743 A1 WO 2023103743A1
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WIPO (PCT)
Prior art keywords
switch
waveform
switching time
output
oscilloscope
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PCT/CN2022/132751
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English (en)
Chinese (zh)
Inventor
薛厚
郭嘉帅
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深圳飞骧科技股份有限公司
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Publication of WO2023103743A1 publication Critical patent/WO2023103743A1/fr

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/327—Testing of circuit interrupters, switches or circuit-breakers

Definitions

  • the invention relates to the technical field of switch testing, in particular to a switch switching time testing method, a switch switching time testing system, a switch switching time testing device and a computer-readable storage medium.
  • AP wireless access point
  • the purpose of the present invention is to overcome the above technical problems, and provide a switch switching time testing method, a switch switching time testing device and a computer-readable storage medium with a simple test structure and easy operation.
  • the embodiment of the present invention provides a switch switching time testing method, providing a waveform generator, an inverter, an oscilloscope, a switch, a signal generator, a power amplifier, and a wave detector.
  • the method includes the following steps:
  • Td is the switching time of the switch
  • Tosc is the start-stop time of the switch
  • Tdet is the delay time difference
  • the preset waveform is set such that the output waveform of the waveform generator is set at a frequency of 100Khz and an amplitude of 3V.
  • the preset output state is set such that the output waveform of the signal generator is set at a frequency of 1Ghz and a power amplitude of -10dbm.
  • the preset output state settings are adjusted accordingly according to the properties of the power amplifier.
  • the preset output state is set such that the output waveform of the signal generator is set at a frequency of 5Ghz and a power amplitude of -20dbm.
  • the embodiment of the present invention also provides a switch switching time test system, the system includes a test module and a calculation module,
  • the test module includes a waveform generator, an inverter, an oscilloscope, a switch, a signal generator, a power amplifier, and a wave detector; the output terminals of the waveform generator are respectively connected to the input ends of the inverter, the oscilloscope
  • the first input terminal of the switch and the first control terminal of the switch, the output terminal of the inverter is connected to the second control terminal of the switch, and the output terminal of the signal generator is connected to the power amplifier after being connected in series to the input end of the switch, the output end of the switch is connected to the input end of the wave detector, and the output end of the wave detector is connected to the second input end of the wave detector;
  • the waveform generator, the The inverter, the oscilloscope, the switch, the signal generator, the power amplifier and the detector are energized and set to work, the waveform generator is adjusted to a preset waveform setting, and the signal the generator is adjusted to a preset output state setting, and the oscilloscope is adjusted to a preset
  • the calculation module is used to read the first waveform output by the waveform generator and the second waveform output by the detector displayed by the oscilloscope, according to the high potential or low potential in one cycle of the first waveform Potential and the low potential or high potential of the initial stable state of the corresponding second waveform in this cycle to obtain the switch start and stop time, and obtain the delay time difference according to the high and low level inversion time of the second waveform, and according to the switch
  • the switching time of the switch is obtained by calculating the start-stop time and the delay time difference, and satisfies the following formula:
  • Td is the switching time of the switch
  • Tosc is the start-stop time of the switch
  • Tdet is the delay time difference
  • the embodiment of the present invention also provides a switching time testing device, including a processor and a memory, the processor is used to read the program in the memory, and the processor reads the program in the memory The program executes the steps in the above-mentioned switching time testing method of the embodiment of the present invention.
  • an embodiment of the present invention also provides a computer-readable storage medium, the computer-readable storage medium stores a computer program, the computer program includes program instructions, and when the program instructions are executed by a processor, the above The steps in the switch switching time test method described in any one.
  • the switching time testing method of the present invention includes the following steps: building a testing system, starting the testing system, adjusting testing equipment, and calculating the switching time.
  • the implementation of this step builds a test system with a simple structure, which includes a waveform generator, an inverter, an oscilloscope, a switch, a signal generator, a power amplifier, and a wave detector.
  • Test equipment which is beneficial for testers to test and operate.
  • the tester finishes building the test system he only needs to power on the relevant equipment and devices, and after making simple adjustments to the waveform generator, the signal generator and the oscilloscope, read the The oscilloscope displays the first waveform output by the waveform generator and the second waveform output by the detector, and performs a simple subtraction calculation to obtain the switching time of the switch.
  • the whole test process is simple and easy to operate. Therefore, the test structure of the switch switching time test method, the switch switch time test system, the switch switch time test equipment and the computer-readable storage medium of the present invention are simple and easy to operate.
  • Fig. 1 is a block flow diagram of a switch switching time testing method provided by an embodiment of the present invention
  • FIG. 2 is a schematic structural diagram of a test system of a switch switching time test method provided by an embodiment of the present invention
  • Fig. 3 is the output waveform diagram of waveform generator, inverter and detector in Fig. 2;
  • FIG. 4 is a block diagram of a module structure of a switching time testing system provided by an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of a switching time testing device provided by an embodiment of the present invention.
  • FIG. 1 is a flow chart of the switching time testing method of the present invention.
  • the present invention provides a switch switching time testing method, and the switch switching time testing method includes the following steps:
  • Step S1 building a test system.
  • Fig. 2 is a schematic structural diagram of a test system for a switching time test method provided by an embodiment of the present invention.
  • the test system of the switch switching time test method includes a waveform generator, an inverter, an oscilloscope, a switch, a signal generator, a power amplifier and a wave detector.
  • Step S2 start the test system.
  • Step S3 adjusting the testing equipment.
  • adjusting the waveform generator to a preset waveform setting adjusting the signal generator to a preset output state setting, and adjusting the oscilloscope to a preset resolution reading setting.
  • the preset waveform setting is that the output waveform of the waveform generator is set at a frequency of 100Khz and an amplitude of 3V. After adjusting the waveform generator, the tester only needs to confirm whether the waveform state is consistent with the setting.
  • the preset output state setting is that the output waveform of the signal generator is set at a frequency of 1Ghz and a power amplitude of -10dbm. After the tester adjusts the signal generator, he only needs to confirm whether the output signal state is consistent with the setting.
  • the preset output state setting is adjusted accordingly according to the property of the power amplifier. That is to say, the tester can replace the power amplifier of different models during the test and readjust the output waveform of the signal generator.
  • This setting is conducive to flexible adjustment during the test of the switching time of the switch. Easy to operate for testers.
  • the preset output state setting is adjusted so that the output waveform of the signal generator is set at a frequency of 5Ghz and a power amplitude of -20dbm.
  • the preset resolution reading means that the oscilloscope is adjusted to a suitable reading resolution condition, and the tester checks whether the reading is normal.
  • Step S4 calculating the switching time of the switch.
  • Td is the switching time of the switch
  • Tosc is the start-stop time of the switch
  • Tdet is the delay time difference
  • the waveform generator and the inverter are combined into a logic control circuit to quickly switch the switch between two states.
  • the switch shown in FIG. 2 is directly and quickly switched between two connection states of CA and CB.
  • the signal generator provides a low-power radio frequency signal as a signal input, the signal is amplified by the power amplifier, and then converted by the detector to be used as the oscilloscope as a marker signal for detection, i.e. waveform W3;
  • the oscilloscope also detects the waveform W1 of the waveform generator to determine the switch flipping state.
  • the time for the switch to switch from CA to CB, that is, from state 1 to state 2, is measured.
  • the switch start-stop time Tosc is 500ns
  • the delay time difference Tdet is 300ns.
  • the switching time Td of the switch is calculated to be 200 ns.
  • the delay of the inverter itself is about 20 ns.
  • FIG. 4 is a block diagram of a module structure of a switching time testing system provided by an embodiment of the present invention.
  • the present invention also provides a switching time testing system 100 .
  • the switching time test system 100 includes a test module 1 and a calculation module 2 .
  • the test module 1 includes a waveform generator, an inverter, an oscilloscope, a switch, a signal generator, a power amplifier and a wave detector; the output terminals of the waveform generator are respectively connected to the input terminals of the inverter, the The first input terminal of the oscilloscope and the first control terminal of the switch, the output terminal of the inverter is connected to the second control terminal of the switch, and the output terminal of the signal generator is connected to the input end of the switch, the output end of the switch is connected to the input end of the detector, and the output end of the detector is connected to the second input end of the shown wave detector; wherein, the waveform generator, The inverter, the oscilloscope, the switch, the signal generator, the power amplifier and the detector are powered on and set to work, the waveform generator is adjusted to a preset waveform setting, and the The signal generator is tuned to a preset output state setting and the oscilloscope is tuned to a preset resolution readout setting.
  • the calculation module 2 is used to read the first waveform output by the waveform generator and the second waveform output by the detector displayed by the oscilloscope, according to the high potential or The low potential and the low potential or high potential corresponding to the initial stable state of the second waveform in this cycle obtain the switch start and stop time, obtain the delay time difference according to the high and low level inversion time of the second waveform, and according to the The switch switching time is obtained by calculating the switching start and stop time and the delay time difference, and satisfies the following formula:
  • Td is the switching time of the switch
  • Tosc is the start-stop time of the switch
  • Tdet is the delay time difference
  • FIG. 5 is a schematic structural diagram of a switching time testing device 1000 of the present invention.
  • the present invention also provides a switching time testing device 1000 .
  • the switching time testing device 1000 includes a processor 1001, a memory 1002, a network interface 1003 and a computer program stored on the memory 1002 and operable on the processor 1001, and the processor 1001 is used to read the The program in 1002, the processor 1001 implements the steps in the switching time testing method provided by the embodiment when executing the computer program. That is, the processor 1001 executes the steps in the switching time testing method.
  • the processor 1001 is configured to perform the following steps:
  • Step S1 building a test system. Specifically:
  • the output terminal of the waveform generator is connected to the input terminal of the inverter, the first input terminal of the oscilloscope and the first control terminal of the switch respectively, and the output terminal of the inverter is connected to
  • the second control terminal of the switch connects the output terminal of the signal generator to the input terminal of the switch after connecting the power amplifier in series, and connects the output terminal of the switch to the input terminal of the detector , connect the output of the detector to the second input of the detector.
  • Step S2 start the test system. Specifically:
  • Step S3 adjusting the testing equipment. Specifically:
  • the waveform generator is adjusted to a preset waveform setting
  • the signal generator is adjusted to a preset output state setting
  • the oscilloscope is adjusted to a preset resolution readout setting.
  • Step S4 calculating the switching time of the switch. Specifically:
  • the switch start and stop time is obtained, and the delay time difference is obtained according to the high and low level inversion time of the second waveform, and according to the switch start and stop time and the The delay time difference is calculated to obtain the switching time of the switch, and satisfies the following formula:
  • Td is the switching time of the switch
  • Tosc is the start-stop time of the switch
  • Tdet is the delay time difference
  • the switch switching time testing device 1000 provided in the embodiment of the present invention can realize various implementation modes and corresponding beneficial effects in the switch switching time testing method embodiment. To avoid repetition, details are not repeated here.
  • the switching time testing device 1000 is a device that can automatically perform numerical calculation and/or information processing according to preset or stored instructions, and its hardware includes but not Limited to microprocessors, application specific integrated circuits (Application Specific Integrated Circuit, ASIC), programmable gate arrays (Field-Programmable GateArray, FPGA), digital processors (Digital Signal Processor, DSP), embedded devices, etc.
  • ASIC Application Specific Integrated Circuit
  • FPGA Field-Programmable GateArray
  • DSP Digital Signal Processor
  • the memory 1002 includes at least one type of readable storage medium, and the readable storage medium includes flash memory, hard disk, multimedia card, card-type memory (for example, SD or DX memory, etc.), random access memory (RAM), static random access Memory (SRAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), Programmable Read Only Memory (PROM), Magnetic Memory, Magnetic Disk, Optical Disk, etc.
  • the memory 1002 may be an internal storage unit of the switching time testing device 1000, such as a hard disk or a memory of the switching time testing device 1000.
  • the memory 1002 can also be an external storage device of the switching time testing device 1000, such as a plug-in hard disk equipped on the switching time testing device 1000, a smart memory card (Smart Media Card , SMC), Secure Digital (Secure Digital, SD) card, Flash Card (Flash Card), etc.
  • the memory 1002 may also include both the internal storage unit of the switching time testing device 1000 and its external storage device.
  • the memory 1002 is generally used to store the operating system and various application software installed in the switching time testing device 1000 , such as the program code of the switching time testing method of the switching time testing device 1000 .
  • the memory 1002 can also be used to temporarily store various types of data that have been output or will be output.
  • the processor 1001 may be a central processing unit (Central Processing Unit, CPU), controller, microcontroller, microprocessor, or other data processing chips in some embodiments.
  • the processor 1001 is generally used to control the overall operation of the switching time testing device 1000 .
  • the processor 1001 is configured to run program codes stored in the memory 1002 or process data, for example, program codes for running a switching time testing method of the switching time testing device 1000 .
  • the network interface 1003 may include a wireless network interface or a wired network interface, and the network interface 1003 is generally used to establish a communication connection between the switching time testing device 1000 and other electronic devices.
  • the present invention also provides a computer-readable storage medium, the computer-readable storage medium stores a computer program, the computer program includes program instructions, and when the program instructions are executed by the processor 1001, the switch switching time as described above is realized A step in a test method.
  • the storage medium may be a magnetic disk, an optical disk, a read-only memory (Read-Only Memory, ROM) or a random access memory (Random Access Memory, RAM for short).
  • the switching time testing method of the present invention includes the following steps: building a testing system, starting the testing system, adjusting testing equipment, and calculating the switching time.
  • the implementation of this step builds a test system with a simple structure, which includes a waveform generator, an inverter, an oscilloscope, a switch, a signal generator, a power amplifier, and a wave detector.
  • Test equipment which is beneficial for testers to test and operate.
  • the tester finishes building the test system he only needs to power on the relevant equipment and devices, and after making simple adjustments to the waveform generator, the signal generator and the oscilloscope, read the The oscilloscope displays the first waveform output by the waveform generator and the second waveform output by the detector, and performs a simple subtraction calculation to obtain the switching time of the switch.
  • the whole test process is simple and easy to operate. Therefore, the test structure of the switch switching time test method, the switch switch time test system, the switch switch time test equipment and the computer-readable storage medium of the present invention are simple and easy to operate.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)

Abstract

La présente invention concerne un procédé de test de temps de commutation marche/arrêt, qui implique un générateur de forme d'onde, un onduleur, un oscilloscope, un commutateur, un générateur de signal, un amplificateur de puissance et un détecteur. Le procédé comprend les étapes suivantes consistant : à construire un système de test, à démarrer le système de test, à régler un dispositif de test et à calculer le temps de commutation marche/arrêt. De même, la présente invention concerne un système de test de temps de commutation marche/arrêt, un dispositif de test de temps de commutation marche/arrêt et un support de stockage lisible par ordinateur. La structure de test utilisant cette solution technique est simple et facile à utiliser.
PCT/CN2022/132751 2021-12-06 2022-11-18 Procédé de test de temps de commutation marche/arrêt, système et dispositif associés et support de stockage WO2023103743A1 (fr)

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CN202111480038.XA CN114167274B (zh) 2021-12-06 2021-12-06 开关切换时间测试方法、相关系统和设备及存储介质

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CN114167274B (zh) * 2021-12-06 2024-04-12 深圳飞骧科技股份有限公司 开关切换时间测试方法、相关系统和设备及存储介质

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009046747A1 (fr) * 2007-10-08 2009-04-16 Siemens Aktiengesellschaft Procédé pour contrôler le comportement de déclenchement libre d'un interrupteur de puissance à actionnement électromécanique et dispositif pour mettre en oeuvre ce procédé
CN103412255A (zh) * 2013-07-18 2013-11-27 西安空间无线电技术研究所 一种星载多路微波开关测试装置
CN104267338A (zh) * 2014-09-12 2015-01-07 哈尔滨理大晟源科技开发有限公司 微波高速开关的开关时间测量系统及测量方法
CN106371005A (zh) * 2016-08-17 2017-02-01 中国电子科技集团公司第四十研究所 基于开关矩阵的微波组件开关响应时间量测试装置及方法
CN107167729A (zh) * 2017-05-26 2017-09-15 中国电子科技集团公司第四十研究所 利用触发脉冲控制的继电器操作时间自动测试装置及方法
CN109347550A (zh) * 2018-09-29 2019-02-15 国家电网有限公司 基于光通道智能切换系统
CN109613848A (zh) * 2018-10-26 2019-04-12 中国船舶重工集团公司第七0九研究所 一种多通道高速信号切换系统及控制方法
CN112198428A (zh) * 2020-12-02 2021-01-08 佛山市联动科技股份有限公司 一种射频开关芯片响应时间的测试方法及系统
CN112219124A (zh) * 2018-06-15 2021-01-12 菲尼克斯电气公司 开关监测装置
CN114167274A (zh) * 2021-12-06 2022-03-11 深圳飞骧科技股份有限公司 开关切换时间测试方法、相关系统和设备及存储介质

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009046747A1 (fr) * 2007-10-08 2009-04-16 Siemens Aktiengesellschaft Procédé pour contrôler le comportement de déclenchement libre d'un interrupteur de puissance à actionnement électromécanique et dispositif pour mettre en oeuvre ce procédé
CN103412255A (zh) * 2013-07-18 2013-11-27 西安空间无线电技术研究所 一种星载多路微波开关测试装置
CN104267338A (zh) * 2014-09-12 2015-01-07 哈尔滨理大晟源科技开发有限公司 微波高速开关的开关时间测量系统及测量方法
CN106371005A (zh) * 2016-08-17 2017-02-01 中国电子科技集团公司第四十研究所 基于开关矩阵的微波组件开关响应时间量测试装置及方法
CN107167729A (zh) * 2017-05-26 2017-09-15 中国电子科技集团公司第四十研究所 利用触发脉冲控制的继电器操作时间自动测试装置及方法
CN112219124A (zh) * 2018-06-15 2021-01-12 菲尼克斯电气公司 开关监测装置
CN109347550A (zh) * 2018-09-29 2019-02-15 国家电网有限公司 基于光通道智能切换系统
CN109613848A (zh) * 2018-10-26 2019-04-12 中国船舶重工集团公司第七0九研究所 一种多通道高速信号切换系统及控制方法
CN112198428A (zh) * 2020-12-02 2021-01-08 佛山市联动科技股份有限公司 一种射频开关芯片响应时间的测试方法及系统
CN114167274A (zh) * 2021-12-06 2022-03-11 深圳飞骧科技股份有限公司 开关切换时间测试方法、相关系统和设备及存储介质

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