WO2023092855A1 - N极性GaN/AlGaN基射频整流器及其制备方法 - Google Patents

N极性GaN/AlGaN基射频整流器及其制备方法 Download PDF

Info

Publication number
WO2023092855A1
WO2023092855A1 PCT/CN2022/073798 CN2022073798W WO2023092855A1 WO 2023092855 A1 WO2023092855 A1 WO 2023092855A1 CN 2022073798 W CN2022073798 W CN 2022073798W WO 2023092855 A1 WO2023092855 A1 WO 2023092855A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
algan
rectifier
epitaxial wafer
contact electrode
Prior art date
Application number
PCT/CN2022/073798
Other languages
English (en)
French (fr)
Inventor
王文樑
江弘胜
李国强
李林浩
张景鸿
Original Assignee
华南理工大学
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华南理工大学 filed Critical 华南理工大学
Priority to DE112022000131.3T priority Critical patent/DE112022000131T5/de
Publication of WO2023092855A1 publication Critical patent/WO2023092855A1/zh

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3171Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3192Multilayer coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H01L29/045Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • H01L29/205Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401Multistep manufacturing processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/47Schottky barrier electrodes
    • H01L29/475Schottky barrier electrodes on AIII-BV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/66196Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices with an active layer made of a group 13/15 material
    • H01L29/66204Diodes
    • H01L29/66212Schottky diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds

Definitions

  • the invention relates to the technical field of rectifiers, in particular to an N-polarity GaN/AlGaN-based radio frequency rectifier and a preparation method thereof.
  • Radio frequency rectifiers are the core devices in space wireless energy transmission systems, and are widely used in military and civilian fields such as satellite systems, aerospace vehicles, and household appliances.
  • traditional Si-based devices face problems such as difficulty in meeting radio frequency requirements, large reverse leakage current, severe heat generation under intermediate frequency working conditions, and poor performance stability.
  • Group III nitrides represented by GaN have the characteristics of large band gap, high breakdown voltage, and high electron saturation rate, and can generate high density and high mobility in heterojunctions by means of spontaneous and piezoelectric polarization effects.
  • the two-dimensional electron gas is expected to realize high-performance radio frequency rectifiers.
  • the present invention provides an N-polarity GaN/AlGaN-based radio frequency rectifier and a preparation method thereof, which can realize a high-performance radio frequency rectifier with high breakdown voltage and high cut-off frequency.
  • the first object of the present invention is to provide an N-polar GaN/AlGaN-based radio frequency rectifier.
  • the second object of the present invention is to provide a method for preparing an N-polarity GaN/AlGaN-based radio frequency rectifier.
  • the rectifier epitaxial wafer includes an AlN buffer layer, an AlGaN buffer layer, a non-doped AlGaN barrier layer, an AlN insertion layer and a non-doped GaN channel layer grown sequentially on a silicon substrate;
  • Both the ohmic contact electrode and the SiN x /Al 2 O 3 passivation layer are disposed on the non-doped GaN channel layer;
  • the Schottky contact electrode is etched deep into the non-doped GaN channel layer from the surface of the SiN x /Al 2 O 3 passivation layer, and partly extends to the surface of the SiN x /Al 2 O 3 passivation layer.
  • the SiN x /Al 2 O 3 passivation layer includes an Al 2 O 3 layer and a SiN x layer, the Al 2 O 3 layer is deposited on the non-doped GaN channel layer, and the SiN x layer is deposited on the Al2O3 layer.
  • the thickness of the Al 2 O 3 layer is 120-150 nm, and the thickness of the SiN x layer is 20-22 nm.
  • the ohmic contact electrode is prepared by sequentially vapor-depositing ohmic contact electrode metal Ti/Al/Ni/Au;
  • the Schottky contact electrode is made by sequentially evaporating Schottky contact electrode metal W/Au;
  • the distance between the ohmic contact electrode and the Schottky contact electrode is 5-8 ⁇ m.
  • the thickness of the ohmic contact electrode is 200-250 nm.
  • the Schottky contact electrode is etched deep into the non-doped GaN channel layer, the etching depth is 180-200nm, and the distance between the edge of the Schottky contact electrode and the edge of the adjacent etching groove is 0.6 ⁇ 1 ⁇ m.
  • the thicknesses of the AlN buffer layer, AlGaN buffer layer, non-doped AlGaN barrier layer, AlN insertion layer and non-doped GaN channel layer in the rectifier epitaxial wafer are 150-180 nm, 500-700 nm, 300-300 nm, respectively. 320nm, 1 ⁇ 2nm and 25 ⁇ 40nm.
  • the AlN buffer layer, AlGaN buffer layer, non-doped AlGaN barrier layer, AlN insertion layer and non-doped GaN channel layer in the rectifier epitaxial wafer are all of N polarity, that is, along [000-1 ] direction of growth.
  • a method for preparing an N-polarity GaN/AlGaN-based radio frequency rectifier comprising:
  • AlN buffer layer, AlGaN buffer layer, non-doped AlGaN barrier layer, AlN insertion layer and non-doped GaN channel layer are sequentially grown on the Si substrate to obtain the rectifier epitaxial wafer and perform pretreatment;
  • Photolithography was performed on the rectifier epitaxial wafer prepared with SiNx / Al2O3 passivation layer by mask alignment , on which the ohmic electrode pattern and Schottky electrode were obtained pattern, using a wet etching method to etch away the exposed passivation layer, and remove the photoresist on the surface of the rectifier epitaxial wafer;
  • the rectifier epitaxial wafer etched with the Schottky electrode groove into the electron beam evaporation equipment, and evaporate the Schottky contact electrode metal to obtain the Schottky electrode, and the Schottky electrode is partially extended to SiN x / The surface of the Al 2 O 3 passivation layer; the photoresist on the surface of the epitaxial wafer of the rectifier is removed, thereby making an N-polarity GaN/AlGaN-based radio frequency rectifier.
  • the preparation of the SiN x /Al 2 O 3 passivation layer specifically includes: first depositing the Al 2 O 3 layer by atomic layer deposition, and then depositing the SiN x layer by plasma enhanced chemical vapor deposition, so that A passivation layer of SiN x /Al 2 O 3 is produced.
  • the present invention has the following beneficial effects:
  • the present invention uses N-polarity GaN/AlGaN heterojunction epitaxial wafers to prepare rectifiers, which has the following advantages compared with traditional metal-polarity AlGaN/GaN heterojunctions: N-polarity AlGaN layer acts as a natural back barrier, which can Enhance the confinement of the two-dimensional electron gas; the ohmic contact electrode metal is directly connected to the top non-doped GaN channel layer, which can form a good ohmic contact.
  • the present invention designs a Schottky electrode structure that is directly in contact with the conductive channel from the side of the etching groove and is superimposed on the surface of the SiN x /Al 2 O 3 passivation layer. This electrode structure can effectively increase the equivalent capacitance of the device , and then increase the cut-off frequency of the rectifier.
  • FIG. 1 is a schematic cross-sectional view of an N-polarity GaN/AlGaN-based radio frequency rectifier according to an embodiment of the present invention.
  • Fig. 2 is an optical microscope view of an electrode of an N-polarity GaN/AlGaN-based radio frequency rectifier according to an embodiment of the present invention.
  • This embodiment provides a method for preparing an N-polarity GaN/AlGaN-based radio frequency rectifier, which specifically includes:
  • a low-temperature N-polar AlN buffer layer, a non-doped N-polar AlGaN buffer layer, a non-doped N-polar AlGaN layer, an ultra-thin AlN insertion layer and a non-doped AlGaN layer are sequentially grown on a Si substrate. Doping the N-polar GaN layer to obtain a rectifier epitaxial wafer;
  • the non-doped N-polar AlGaN buffer layer 3 and the non-doped N-polar AlGaN barrier layer 4 are different in composition and function: the Al composition of the non-doped N-polar AlGaN buffer layer 3 is larger, The function of the non-doped N-polar AlGaN buffer layer 3 is to buffer the lattice mismatch, and the function of the non-doped N-polar AlGaN barrier layer 4 is to generate a two-dimensional electron gas in the channel layer;
  • step (2) Place the rectifier epitaxial wafer obtained in step (1) into acetone for 3-5 minutes and dry it with high-purity nitrogen, then place it in ethanol for 3-5 minutes and dry it with high-purity nitrogen;
  • step (3) Perform photolithography on the rectifier epitaxial wafer obtained in step (2): drop an appropriate amount of photoresist on the surface of the rectifier epitaxial wafer and place it in a coater for processing, pre-baking the rectifier epitaxial wafer coated with photoresist, and then The engraving machine exposes the rectifier epitaxial wafer for 2-4s to obtain the ohmic electrode pattern, and finally immerses the rectifier epitaxial wafer in the developer solution for 60s and then cleans it;
  • step (3) Put the rectifier epitaxial wafer obtained in step (3) into the electron beam evaporation equipment, evacuate to 1-3 ⁇ 10 -5 Pa and vapor-deposit ohmic contact electrode metal, and then anneal at 850-900°C for 30s;
  • step (7) Align by mask plate and adopt the method similar to step (3) to obtain ohmic electrode and Schottky electrode pattern, use wet etching method to etch away the passivation layer exposed, then adopt step (5) ) process to remove the photoresist;
  • step (5) Using the process of step (5) to remove the photoresist.
  • a method for fabricating an N-polarity GaN/AlGaN-based radio frequency rectifier including:
  • step (2) The rectifier epitaxial wafer obtained in step (1) is placed in acetone for ultrasonic treatment for 3min and dried with high-purity nitrogen, then placed in ethanol for ultrasonic treatment for 3min and dried with high-purity nitrogen;
  • step (3) Photoetching the rectifier epitaxial wafer obtained in step (2): drip an appropriate amount of photoresist on the surface of the rectifier epitaxial wafer, the model is RZJ304, and place it in a glue leveler for processing, and the rectifier epitaxial wafer coated with photoresist is processed at 95 Pre-bake at °C for 45s, then use a photolithography machine to expose the rectifier epitaxial wafer for 2s to obtain the ohmic electrode pattern, and finally immerse the rectifier epitaxial wafer in the developer solution for 60s and then clean it;
  • step (3) Put the rectifier epitaxial wafer obtained in step (3) into the electron beam evaporation equipment, evacuate to 1 ⁇ 10 -5 Pa and sequentially evaporate the ohmic contact electrode metal Ti/Al/Ni/Au, and then Anneal for 30s to obtain the ohmic electrode 7, as shown in Figure 1;
  • ALD atomic layer deposition
  • PECVD plasma enhanced chemical vapor deposition
  • step (7) Align by mask plate and adopt the method similar to step (3) to obtain ohmic electrode and Schottky electrode pattern, use wet etching method to etch away the passivation layer exposed, then adopt step (5) ) process to remove the photoresist;
  • step (5) The photoresist is removed by the process of step (5), and finally an N-polarity GaN/AlGaN-based radio frequency rectifier is manufactured.
  • the electrode structure of the rectifier prepared in this embodiment is shown in FIG. 2 .
  • a method for fabricating an N-polarity GaN/AlGaN-based radio frequency rectifier including:
  • step (2) Place the rectifier epitaxial wafer obtained in step (1) into acetone for ultrasonic treatment for 5 minutes and dry it with high-purity nitrogen, then place it in ethanol for ultrasonic treatment for 5 minutes and dry it with high-purity nitrogen;
  • step (3) Photoetching the rectifier epitaxial wafer obtained in step (2): drip an appropriate amount of photoresist on the surface of the rectifier epitaxial wafer, the model is RZJ304, and place it in a glue leveler for processing, and the rectifier epitaxial wafer coated with photoresist is processed at 95 Pre-bake at °C for 45s, then use a photolithography machine to expose the rectifier epitaxial wafer for 2s to obtain the ohmic electrode pattern, and finally immerse the rectifier epitaxial wafer in the developer solution for 60s and then clean it;
  • step (3) Put the rectifier epitaxial wafer obtained in step (3) into the electron beam evaporation equipment, evacuate to 3 ⁇ 10 -5 Pa and sequentially evaporate the ohmic contact electrode metal Ti/Al/Ni/Au, and then Anneal for 30s to obtain ohmic electrode 7;
  • step (7) Align by mask plate and adopt the method similar to step (3) to obtain ohmic electrode and Schottky electrode pattern, use wet etching method to etch away the passivation layer exposed, then adopt step (5) ) process to remove the photoresist;
  • step (5) The photoresist is removed by the process of step (5), and finally an N-polarity GaN/AlGaN-based radio frequency rectifier is manufactured.
  • the N-polarity GaN/AlGaN-based RF rectifier provided by the present invention, the N-polarity GaN/AlGaN-based RF rectifier epitaxial wafer includes an AlN buffer layer, an AlGaN buffer layer, a non-doped
  • the AlGaN barrier layer, the AlN insertion layer and the non-doped GaN channel layer also include an ohmic contact electrode and a SiN x /Al 2 O 3 passivation layer arranged on the N-polarity GaN/AlGaN-based radio frequency rectifier epitaxial wafer, And the Schottky contact electrode; the ohmic contact electrode and the SiN x /Al 2 O 3 passivation layer are set on the non-doped GaN channel layer, and the Schottky contact electrode is etched deep into the non-doped GaN channel layer, Part of it extends to the surface of the SiN x /Al 2 O 3 passivation layer.
  • the present invention also provides a method for preparing an N-polar GaN/AlGaN-based radio frequency rectifier.
  • a low-temperature AlN buffer layer, a non-doped AlGaN buffer layer, a non-doped AlGaN barrier layer and a non-doped GaN layer are sequentially grown on a silicon substrate. channel layer to obtain a rectifier epitaxial wafer; then prepare an ohmic contact electrode by photolithography development and evaporation, then deposit a passivation layer, and finally etch the Schottky electrode area to prepare a Schottky contact electrode.
  • the N-polarity GaN/AlGaN-based radio frequency rectifier provided by the invention improves the working frequency of the rectifier device.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

本发明公开了一种N极性GaN/AlGaN基射频整流器及其制备方法,所述N极性GaN/AlGaN基射频整流器包括整流器外延片和设置在整流器外延片上的欧姆接触电极和SiN x/Al 2O 3钝化层以及肖特基接触电极,x=1.35~1.45;整流器外延片包括在硅衬底上依次生长的AlN缓冲层、AlGaN缓冲层、非掺杂AlGaN势垒层、AlN插入层和非掺杂GaN沟道层;欧姆接触电极和SiN x/Al 2O 3钝化层均设置在非掺杂GaN沟道层上;肖特基接触电极从SiN x/Al 2O 3钝化层表面通过刻蚀深入非掺杂GaN沟道层,并部分延伸至钝化层表面。本发明提供了一种具有高击穿电压、高截止频率的高性能射频整流器。

Description

N极性GaN/AlGaN基射频整流器及其制备方法 技术领域
本发明涉及整流器技术领域,具体涉及一种N极性GaN/AlGaN基射频整流器及其制备方法。
背景技术
射频整流器是空间无线能量传输系统中的核心器件,在卫星系统、航空航天飞行器、家用电器等军事、民用领域都有着广泛的应用。然而,传统Si基器件面临着工作频率难以达到射频需求、反向漏电流大、中频工作条件下发热严重、性能稳定性差等问题。而以GaN为代表的III族氮化物,具备禁带宽度大、击穿电压高、电子饱和速率高等特点,并且能借助自发和压电极化效应在异质结中产生高密度、高迁移率的二维电子气,有望实现高性能射频整流器。
发明内容
有鉴于此,本发明提供了一种N极性GaN/AlGaN基射频整流器及其制备方法,能够实现具有高击穿电压、高截止频率的高性能射频整流器。
本发明的第一个目的在于提供一种N极性GaN/AlGaN基射频整流器。
本发明的第二个目的在于提供一种N极性GaN/AlGaN基射频整流器的制备方法。
本发明的第一个目的可以通过采取如下技术方案达到:
一种N极性GaN/AlGaN基射频整流器,包括整流器外延片和设置在所述整流器外延片上的欧姆接触电极和SiN x/Al 2O 3钝化层,以及肖特基接触电极,x=1.35~1.45;其中:
所述整流器外延片包括在硅衬底上依次生长的AlN缓冲层、AlGaN缓冲层、非掺杂AlGaN势垒层、AlN插入层和非掺杂GaN沟道层;
所述欧姆接触电极和所述SiN x/Al 2O 3钝化层均设置在所述非掺杂GaN沟道层上;
所述肖特基接触电极从SiN x/Al 2O 3钝化层表面通过刻蚀深入所述非掺杂GaN沟道层,并部分延伸至SiN x/Al 2O 3钝化层表面。
进一步的,所述SiN x/Al 2O 3钝化层包括Al 2O 3层和SiN x层,所述Al 2O 3层沉积在所述非掺杂GaN沟道层上,所述SiN x层沉积在所述Al 2O 3层上。
进一步的,所述Al 2O 3层的厚度为120~150nm,所述SiN x层的厚度为20~22nm。
进一步的,所述欧姆接触电极由依次蒸镀欧姆接触电极金属Ti/Al/Ni/Au而制得;
所述肖特基接触电极由依次蒸镀肖特基接触电极金属W/Au而制得;
所述欧姆接触电极与肖特基接触电极的间距为5~8μm。
进一步的,所述欧姆接触电极的厚度为200~250nm。
进一步的,所述肖特基接触电极通过刻蚀深入所述非掺杂GaN沟道层,刻蚀深度为180~200nm,所述肖特基接触电极边缘与邻近的刻蚀槽边缘的距离为0.6~1μm。
进一步的,所述整流器外延片中AlN缓冲层、AlGaN缓冲层、非掺杂AlGaN势垒层、AlN插入层和非掺杂GaN沟道层的厚度分别为150~180nm、500~700nm、300~320nm、1~2nm和25~40nm。
进一步的,所述整流器外延片中AlN缓冲层、AlGaN缓冲层、非掺杂AlGaN势垒层、AlN插入层和非掺杂GaN沟道层均为N极性的,即为沿[000-1]方向生长。
本发明的第二个目的可以通过采取如下技术方案达到:
一种N极性GaN/AlGaN基射频整流器的制备方法,所述方法包括:
在Si衬底上依次生长AlN缓冲层、AlGaN缓冲层、非掺杂AlGaN势垒层、AlN插入层和非掺杂GaN沟道层,得到整流器外延片并进行预处理;
对预处理后整流器外延片进行光刻,在所述非掺杂GaN沟道层上得到欧姆电极图案;
将制备有欧姆电极图案的整流器外延片放入电子束蒸发设备中,蒸镀欧姆接触电极金属,得到欧姆电极;
去除制备有欧姆电极的整流器外延片表面的光刻胶,在制备有欧姆电极的整流器外延片的非掺杂GaN沟道层上,制备SiN x/Al 2O 3钝化层;其中,x=1.35~1.45;
通过掩模版对准,对制备有SiN x/Al 2O 3钝化层的整流器外延片进行光刻,在所述SiN x/Al 2O 3钝化层上得到欧姆电极图案和肖特基电极图案,使用湿法刻蚀方法将暴露出的钝化层刻蚀掉,并去除整流器外延片表面的光刻胶;
通过掩模版对准,对整流器外延片进行光刻,在SiN x/Al 2O 3钝化层上得到肖特基电极图案;
采用湿法刻蚀方法,从SiN x/Al 2O 3钝化层表面刻蚀出肖特基电极凹槽,所述肖特基电极凹槽深入所述非掺杂GaN沟道层;
将刻蚀有肖特基电极凹槽的整流器外延片放入电子束蒸发设备中,蒸镀肖特基接触电极金属,得到肖特基电极,所述肖特基电极并部分延伸至SiN x/Al 2O 3钝化层表面; 去除整流器外延片表面的光刻胶,从而制得N极性GaN/AlGaN基射频整流器。
进一步的,所述制备SiN x/Al 2O 3钝化层,具体包括:先采用原子层沉积的方法沉积Al 2O 3层,再采用等离子体增强化学气相沉积的方法沉积SiN x层,从而制得SiN x/Al 2O 3钝化层。
本发明相对于现有技术具有如下的有益效果:
1、本发明使用N极性GaN/AlGaN异质结外延片制备整流器,与传统的金属极性AlGaN/GaN异质结相比具有以下优点:N极性AlGaN层作为天然的背势垒,可以增强二维电子气限域性;欧姆接触电极金属直接和顶层的非掺杂GaN沟道层相连,能够形成良好的欧姆接触。
2、本发明设计了从刻蚀槽侧面直接与导电沟道接触同时叠于SiN x/Al 2O 3钝化层表面的肖特基电极结构,该电极结构能有效增大器件的等效电容,进而提高整流器工作的截止频率。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图示出的结构获得其他的附图。
图1为本发明实施例的N极性GaN/AlGaN基射频整流器的截面示意图。
图2为本发明实施例的N极性GaN/AlGaN基射频整流器电极光学显微镜图。
图1中:
1-硅衬底、2-低温N极性AlN缓冲层、3-非掺杂N极性AlGaN缓冲层、4-非掺杂N极性AlGaN层、5-AlN插入层、6-非掺杂N极性GaN层、7-欧姆电极、8-Al 2O 3层、9-SiN x层、10-肖特基电极。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明的一部分实施例,而不是全部的实施例,基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。应当理解,描述的具体实施例仅仅用以解释本申请,并不用于限定本申请。
实施例:
本实施例提供了一种N极性GaN/AlGaN基射频整流器的制备方法,具体包括:
(1)如图1所示,在Si衬底上依次生长低温N极性AlN缓冲层,非掺杂N极性AlGaN缓冲层,非掺杂N极性AlGaN层,超薄AlN插入层和非掺杂N极性GaN层,得到整流器外延片;
其中,非掺杂N极性AlGaN缓冲层3和非掺杂N极性AlGaN势垒层4在组分和功能上不一样:非掺杂N极性AlGaN缓冲层3的Al组分更大,非掺杂N极性AlGaN缓冲层3的功能是缓冲晶格失配,而非掺杂N极性AlGaN势垒层4的功能是在沟道层中产生二维电子气;
(2)将步骤(1)所得整流器外延片置于丙酮中超声处理3~5min并用高纯氮气吹干,接着置于乙醇中超声处理3~5min并用高纯氮气吹干;
(3)对步骤(2)所得整流器外延片进行光刻:在整流器外延片表面滴适量光刻胶并置于匀胶机中处理,将涂有光刻胶的整流器外延片进行预烘,接着用光刻机对整流器外延片进行2~4s曝光得到欧姆电极图案,最后将整流器外延片浸入显影液60s后清洗;
(4)将步骤(3)所得整流器外延片放入电子束蒸发设备中,抽真空至1~3×10 -5Pa并蒸镀欧姆接触电极金属,接着在850~900℃下退火30s;
(5)将步骤(4)所得整流器外延片浸入去胶溶液中浸泡,接着先后置于丙酮和乙醇中超声处理3~5min并用高纯氮气吹干;
(6)制备钝化层:在步骤(5)所得的外延片表面先后采用ALD和PECVD的方法沉积Al 2O 3和SiN x层;
(7)通过掩模版对准并采用与步骤(3)相似的方法得到欧姆电极和肖特基电极图案,使用湿法刻蚀方法将暴露出的钝化层刻蚀掉,接着采用步骤(5)的工艺除去光刻胶;
(8)通过掩模版对准并采用与步骤(3)相似的方法得到肖特基电极图案;
(9)湿法刻蚀出肖特基电极凹槽,并采用与步骤(4)相似的方法制备肖特基电极;
(10)采用步骤(5)的工艺除去光刻胶。
在一个实施例中,提供了一种N极性GaN/AlGaN基射频整流器的制备方法,具体包括:
(1)在Si(111)衬底1上依次生长150nm厚的低温N极性AlN缓冲层2、500nm厚的非掺杂N极性AlGaN缓冲层3、300nm厚的非掺杂N极性AlGaN势垒层4,1nm厚的超薄AlN插入层5和25nm厚的非掺杂N极性GaN层6,得到整流器外延片;
(2)将步骤(1)所得整流器外延片置于丙酮中超声处理3min并用高纯氮气吹干,接 着置于乙醇中超声处理3min并用高纯氮气吹干;
(3)对步骤(2)所得整流器外延片进行光刻:在整流器外延片表面滴适量光刻胶,型号为RZJ304,并置于匀胶机中处理,将涂有光刻胶的整流器外延片在95℃下预烘45s,接着用光刻机对整流器外延片进行2s曝光得到欧姆电极图案,最后将整流器外延片浸入显影液60s后清洗;
(4)将步骤(3)所得整流器外延片放入电子束蒸发设备中,抽真空至1×10 -5Pa并依次蒸镀欧姆接触电极金属Ti/Al/Ni/Au,接着在850℃下退火30s,得到欧姆电极7,如图1所示;
(5)将步骤(4)所得整流器外延片浸入去胶溶液中浸泡,接着先后置于丙酮和乙醇中超声处理3~5min并用高纯氮气吹干;
(6)制备钝化层:在步骤(5)所得的外延片表面先后采用原子层沉积(ALD)和等离子体增强化学气相沉积(PECVD)的方法沉积120nm厚的Al 2O 3层8和20nm厚的SiN x层9,x=1.35,如图1所示;
(7)通过掩模版对准并采用与步骤(3)相似的方法得到欧姆电极和肖特基电极图案,使用湿法刻蚀方法将暴露出的钝化层刻蚀掉,接着采用步骤(5)的工艺除去光刻胶;
(8)通过掩模版对准并采用与步骤(3)相似的方法得到肖特基电极图案;
(9)从SiN x层表面用湿法刻蚀出深度为180nm的肖特基电极凹槽,接着将整流器外延片放入电子束蒸发设备中,抽真空至1×10 -5Pa并依次蒸镀肖特基接触电极金属W/Au,接着在450℃下退火3min,得到肖特基电极10,如图1所示;
(10)采用步骤(5)的工艺除去光刻胶,最后制得N极性GaN/AlGaN基射频整流器。
本实施例所制备的整流器电极结构如图2所示。
在一个实施例中,提供了一种N极性GaN/AlGaN基射频整流器的制备方法,具体包括:
(1)在Si(111)衬底1上依次生长180nm厚的低温N极性AlN缓冲层2、700nm厚的非掺杂N极性AlGaN缓冲层3、320nm厚的非掺杂N极性AlGaN层4、2nm厚的超薄AlN插入层5和40nm厚的非掺杂N极性GaN层6,得到整流器外延片;
(2)将步骤(1)所得整流器外延片置于丙酮中超声处理5min并用高纯氮气吹干,接着置于乙醇中超声处理5min并用高纯氮气吹干;
(3)对步骤(2)所得整流器外延片进行光刻:在整流器外延片表面滴适量光刻胶,型号为RZJ304,并置于匀胶机中处理,将涂有光刻胶的整流器外延片在95℃下预烘45s,接着用光刻机对整流器外延片进行2s曝光得到欧姆电极图案,最后将整流器外延 片浸入显影液60s后清洗;
(4)将步骤(3)所得整流器外延片放入电子束蒸发设备中,抽真空至3×10 -5Pa并依次蒸镀欧姆接触电极金属Ti/Al/Ni/Au,接着在900℃下退火30s,得到欧姆电极7;
(5)将步骤(4)所得整流器外延片浸入去胶溶液中浸泡,接着先后置于丙酮和乙醇中超声处理5min并用高纯氮气吹干;
(6)制备钝化层:在步骤(5)所得的外延片表面先后采用原子层沉积(ALD)和等离子体增强化学气相沉积(PECVD)的方法沉积150nm厚的Al 2O 3层和22nm厚的SiN x层,x=1.45;
(7)通过掩模版对准并采用与步骤(3)相似的方法得到欧姆电极和肖特基电极图案,使用湿法刻蚀方法将暴露出的钝化层刻蚀掉,接着采用步骤(5)的工艺除去光刻胶;
(8)通过掩模版对准并采用与步骤(3)相似的方法得到肖特基电极图案;
(9)在整流器外延片上用湿法刻蚀出深度为200nm的肖特基电极凹槽,接着将整流器外延片放入电子束蒸发设备中,抽真空至3×10 -5Pa并依次蒸镀肖特基接触电极金属W/Au,接着在500℃下退火3min;
(10)采用步骤(5)的工艺除去光刻胶,最后制得N极性GaN/AlGaN基射频整流器。
综上所述,本发明提供的N极性GaN/AlGaN基射频整流器,N极性GaN/AlGaN基射频整流器外延片包括在硅衬底上依次生长的AlN缓冲层、AlGaN缓冲层、非掺杂AlGaN势垒层、AlN插入层和非掺杂GaN沟道层,还包括设置在所述N极性GaN/AlGaN基射频整流器外延片上的欧姆接触电极和SiN x/Al 2O 3钝化层,以及肖特基接触电极;欧姆接触电极和SiN x/Al 2O 3钝化层均设置在非掺杂GaN沟道层上,肖特基接触电极通过刻蚀深入非掺杂GaN沟道层,部分延伸至SiN x/Al 2O 3钝化层表面。本发明还提供了N极性GaN/AlGaN基射频整流器的制备方法,首先在硅衬底上依次生长低温AlN缓冲层、非掺杂AlGaN缓冲层、非掺杂AlGaN势垒层和非掺杂GaN沟道层,得到整流器外延片;接着通过光刻显影和蒸镀制备欧姆接触电极,随后沉积钝化层,最后对肖特基电极区域进行刻蚀并制备肖特基接触电极。本发明提供的N极性GaN/AlGaN基射频整流器,提高了整流器件的工作频率。
以上所述,仅为本发明专利较佳的实施例,但本发明专利的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明专利所公开的范围内,根据本发明专利的技术方案及其发明构思加以等同替换或改变,都属于本发明专利的保护范围。

Claims (10)

  1. 一种N极性GaN/AlGaN基射频整流器,其特征在于,包括整流器外延片和设置在所述整流器外延片上的欧姆接触电极和SiN x/Al 2O 3钝化层,以及肖特基接触电极,x=1.35~1.45;其中:
    所述整流器外延片包括在硅衬底上依次生长的AlN缓冲层、AlGaN缓冲层、非掺杂AlGaN势垒层、AlN插入层和非掺杂GaN沟道层;
    所述欧姆接触电极和所述SiN x/Al 2O 3钝化层均设置在所述非掺杂GaN沟道层上;
    所述肖特基接触电极从SiN x/Al 2O 3钝化层表面通过刻蚀深入所述非掺杂GaN沟道层,并部分延伸至SiN x/Al 2O 3钝化层表面。
  2. 根据权利要求1所述的N极性GaN/AlGaN基射频整流器,其特征在于,所述SiN x/Al 2O 3钝化层包括Al 2O 3层和SiN x层,所述Al 2O 3层沉积在所述非掺杂GaN沟道层上,所述SiN x层沉积在所述Al 2O 3层上。
  3. 根据权利要求2所述的N极性GaN/AlGaN基射频整流器,其特征在于,所述Al 2O 3层的厚度为120~150nm,所述SiN x层的厚度为20~22nm。
  4. 根据权利要求1所述的N极性GaN/AlGaN基射频整流器,其特征在于,所述欧姆接触电极由依次蒸镀欧姆接触电极金属Ti/Al/Ni/Au而制得;
    所述肖特基接触电极由依次蒸镀肖特基接触电极金属W/Au而制得;
    所述欧姆接触电极与肖特基接触电极的间距为5~8μm。
  5. 根据权利要求1所述的N极性GaN/AlGaN基射频整流器,其特征在于,所述欧姆接触电极的厚度为200~250nm。
  6. 根据权利要求1所述的N极性GaN/AlGaN基射频整流器,其特征在于,所述肖特基接触电极通过刻蚀深入所述非掺杂GaN沟道层,刻蚀深度为180~200nm,所述肖特基接触电极边缘与邻近的刻蚀槽边缘的距离为0.6~1μm。
  7. 根据权利要求1所述的N极性GaN/AlGaN基射频整流器,其特征在于,所述整流器外延片中AlN缓冲层、AlGaN缓冲层、非掺杂AlGaN势垒层、AlN插入层和非掺杂GaN沟道层的厚度分别为150~180nm、500~700nm、300~320nm、1~2nm和25~40nm。
  8. 根据权利要求1~7任一项所述的N极性GaN/AlGaN基射频整流器,其特征在于,所述整流器外延片中AlN缓冲层、AlGaN缓冲层、非掺杂AlGaN势垒层、AlN插入层和非掺杂GaN沟道层均为N极性的,即为沿[000-1]方向生长。
  9. 一种如权利要求1~8任一项所述N极性GaN/AlGaN基射频整流器的制备方法, 其特征在于,所述方法包括:
    在Si衬底上依次生长AlN缓冲层、AlGaN缓冲层、非掺杂AlGaN势垒层、AlN插入层和非掺杂GaN沟道层,得到整流器外延片并进行预处理;
    对预处理后整流器外延片进行光刻,在所述非掺杂GaN沟道层上得到欧姆电极图案;
    将制备有欧姆电极图案的整流器外延片放入电子束蒸发设备中,蒸镀欧姆接触电极金属,得到欧姆电极;
    去除制备有欧姆电极的整流器外延片表面的光刻胶,在制备有欧姆电极的整流器外延片的非掺杂GaN沟道层上,制备SiN x/Al 2O 3钝化层;其中,x=1.35~1.45;
    通过掩模版对准,对制备有SiN x/Al 2O 3钝化层的整流器外延片进行光刻,在所述SiN x/Al 2O 3钝化层上得到欧姆电极图案和肖特基电极图案,使用湿法刻蚀方法将暴露出的钝化层刻蚀掉,并去除整流器外延片表面的光刻胶;
    通过掩模版对准,对整流器外延片进行光刻,在SiN x/Al 2O 3钝化层上得到肖特基电极图案;
    采用湿法刻蚀方法,从SiN x/Al 2O 3钝化层表面刻蚀出肖特基电极凹槽,所述肖特基电极凹槽深入所述非掺杂GaN沟道层;
    将刻蚀有肖特基电极凹槽的整流器外延片放入电子束蒸发设备中,蒸镀肖特基接触电极金属,得到肖特基电极,所述肖特基电极部分延伸至SiN x/Al 2O 3钝化层表面;去除整流器外延片表面的光刻胶,从而制得N极性GaN/AlGaN基射频整流器。
  10. 根据权利要求9所述的制备方法,其特征在于,所述制备SiN x/Al 2O 3钝化层,具体包括:先采用原子层沉积的方法沉积Al 2O 3层,再采用等离子体增强化学气相沉积的方法沉积SiN x层,从而制得SiN x/Al 2O 3钝化层。
PCT/CN2022/073798 2021-11-24 2022-01-25 N极性GaN/AlGaN基射频整流器及其制备方法 WO2023092855A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE112022000131.3T DE112022000131T5 (de) 2021-11-24 2022-01-25 N-Polarer Hochfrequenzgleichrichter auf GaN/AlGaN-Basis und Verfahren zu seiner Herstellung

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202111402684.4 2021-11-24
CN202111402684.4A CN114242782A (zh) 2021-11-24 2021-11-24 N极性GaN/AlGaN基射频整流器及其制备方法

Publications (1)

Publication Number Publication Date
WO2023092855A1 true WO2023092855A1 (zh) 2023-06-01

Family

ID=80750901

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/073798 WO2023092855A1 (zh) 2021-11-24 2022-01-25 N极性GaN/AlGaN基射频整流器及其制备方法

Country Status (3)

Country Link
CN (1) CN114242782A (zh)
DE (1) DE112022000131T5 (zh)
WO (1) WO2023092855A1 (zh)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101908511A (zh) * 2010-07-27 2010-12-08 南京大学 一种金属衬底的氮化镓肖特基整流器及其制备方法
CN107154426A (zh) * 2016-03-03 2017-09-12 北京大学 一种提高硅基GaN HEMT关态击穿电压的器件结构及实现方法
CN107910370A (zh) * 2017-11-14 2018-04-13 电子科技大学 一种氮化镓异质结横向整流器
CN111430457A (zh) * 2020-04-27 2020-07-17 华南理工大学 一种硅衬底上GaN/二维AlN异质结整流器及其制备方法
US20210217879A1 (en) * 2017-12-15 2021-07-15 South China University Of Technology Gan rectifier suitable for operating under 35ghz alternating-current frequency, and preparation method therefor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101908511A (zh) * 2010-07-27 2010-12-08 南京大学 一种金属衬底的氮化镓肖特基整流器及其制备方法
CN107154426A (zh) * 2016-03-03 2017-09-12 北京大学 一种提高硅基GaN HEMT关态击穿电压的器件结构及实现方法
CN107910370A (zh) * 2017-11-14 2018-04-13 电子科技大学 一种氮化镓异质结横向整流器
US20210217879A1 (en) * 2017-12-15 2021-07-15 South China University Of Technology Gan rectifier suitable for operating under 35ghz alternating-current frequency, and preparation method therefor
CN111430457A (zh) * 2020-04-27 2020-07-17 华南理工大学 一种硅衬底上GaN/二维AlN异质结整流器及其制备方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
LI, XIAOCHAN: "Epitaxial Structure Design and Device Fabrication of GaN Rectifiers on Silicon Substrates", CHINA MASTER’S THESES FULL-TEXT DATABASE, 11 April 2019 (2019-04-11), CN, pages 1 - 92, XP009545887, DOI: 10.27151/d.cnki.ghnlu *

Also Published As

Publication number Publication date
CN114242782A (zh) 2022-03-25
DE112022000131T5 (de) 2023-07-20

Similar Documents

Publication Publication Date Title
US20190109208A1 (en) Enhancement-mode gan-based hemt device on si substrate and manufacturing method thereof
CN107369704B (zh) 含有铁电栅介质的叠层栅增强型GaN高电子迁移率晶体管及制备方法
CN107248528B (zh) 低频率损耗GaN基微波功率器件及其制作方法
US11257935B2 (en) Gan rectifier suitable for operating under 35GHZ alternating-current frequency, and preparation method therefor
CN105762078A (zh) GaN基纳米沟道高电子迁移率晶体管及制作方法
CN106847895B (zh) 基于TiN/Cu/Ni栅电极的GaN基高电子迁移率晶体管及制作方法
WO2021217875A1 (zh) 一种硅衬底上 GaN / 二维 AlN 异质结整流器及其制备方法
CN112420850B (zh) 一种半导体器件及其制备方法
CN111816696B (zh) 一种自对准的GaN肖特基二极管及其制造方法
CN112635544A (zh) 具有偶极子层的增强型AlGaN-GaN垂直型超结HEMT及其制备方法
CN111384171B (zh) 高沟道迁移率垂直型umosfet器件及其制备方法
CN112466942B (zh) 具有插指型金刚石散热层的GaN HEMT及制备方法
WO2023092855A1 (zh) N极性GaN/AlGaN基射频整流器及其制备方法
CN106449737A (zh) 低接触电阻型GaN基器件及其制作方法
CN112510089B (zh) 基于插指状复合金刚石层的GaN HEMT及制备方法
CN112466925B (zh) 一种低射频损耗的硅基氮化镓射频功率器件及其制备方法
CN113257896A (zh) 多场板射频hemt器件及其制备方法
CN114864657A (zh) N极性GaN/AlGaN基整流器及其制备方法
CN113257911B (zh) 含Sc掺杂的源空气桥结构GaN射频HEMT及其制备方法
WO2019165975A1 (zh) GaN基器件欧姆接触电极的制备方法
CN111613670B (zh) 一种三明治弧形栅极结构的hemt器件及其制备方法
CN112466944B (zh) 基于插指状p型掺杂金刚石的GaN HEMT及制备方法
CN114883396B (zh) 一种凹陷式Fin-JFET栅结构HEMT及制作方法
CN102306626A (zh) 半导体异质结场效应晶体管栅结构的制备方法
CN106711210A (zh) 介质辅助支撑型纳米栅器件及其制作方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22896959

Country of ref document: EP

Kind code of ref document: A1