WO2023066155A1 - 一种显示器件及其驱动方法和电子纸 - Google Patents

一种显示器件及其驱动方法和电子纸 Download PDF

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WO2023066155A1
WO2023066155A1 PCT/CN2022/125369 CN2022125369W WO2023066155A1 WO 2023066155 A1 WO2023066155 A1 WO 2023066155A1 CN 2022125369 W CN2022125369 W CN 2022125369W WO 2023066155 A1 WO2023066155 A1 WO 2023066155A1
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Prior art keywords
sub
pixel
pixels
gray
display device
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PCT/CN2022/125369
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English (en)
French (fr)
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黄强灿
林奕圳
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华为技术有限公司
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Priority to KR1020247012871A priority Critical patent/KR20240055896A/ko
Priority to EP22882762.2A priority patent/EP4390910A1/en
Publication of WO2023066155A1 publication Critical patent/WO2023066155A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/165—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on translational movement of particles in a fluid under the influence of an applied field
    • G02F1/166—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on translational movement of particles in a fluid under the influence of an applied field characterised by the electro-optical or magneto-optical effect
    • G02F1/167—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on translational movement of particles in a fluid under the influence of an applied field characterised by the electro-optical or magneto-optical effect by electrophoresis
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/165—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on translational movement of particles in a fluid under the influence of an applied field
    • G02F1/1675—Constructional details
    • G02F1/1676—Electrodes
    • G02F1/16766—Electrodes for active matrices
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/165—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on translational movement of particles in a fluid under the influence of an applied field
    • G02F1/1685—Operation of cells; Circuit arrangements affecting the entire cell
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2203/00—Function characteristic
    • G02F2203/30—Gray scale
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters

Definitions

  • the present application belongs to the field of display technology, and more specifically relates to a display device, a driving method thereof, and electronic paper.
  • E-paper display technology is active in the public's field of vision because its display effect is close to that of paper.
  • the electrophoretic particles used in the electronic paper display technology have bistable characteristics, so that the electronic paper display can still retain the displayed picture for a long time when it stops working, so it has the characteristics of low power consumption.
  • E-paper display technology is a reflective display, that is, the display effect is achieved by reflecting external light sources, so its damage to human eyes is much lower than that of LCD or OLED display technology.
  • the number of gray scales that can be displayed by a pixel is small, and if the number of gray scales that can be displayed by a pixel is increased only by adjusting the driving method, it will become more difficult to control the accuracy of the gray scale.
  • increasing the number of grayscales that can be displayed by a pixel has a greater impact on the refresh rate of the display screen, which seriously affects the fluency of animation playback.
  • the present application provides a display device, its driving method, and electronic paper to solve the technical problems of increasing the number of gray levels that can be displayed by a pixel and improving the control accuracy of gray levels.
  • An embodiment of the present application provides a display device, including:
  • the pixel includes N sub-pixels with unequal pixel electrode areas, the sub-pixels can display M gray scales, and both N and M are integers not less than 2;
  • the ratio of the pixel electrode areas of two sub-pixels in the N sub-pixels is X n , 2 ⁇ X ⁇ M, and n is an integer not less than 1.
  • the gray scales displayed by the N sub-pixels are combined to present the displayed gray scales of the pixels, which can increase the number of gray scales displayed by the pixels.
  • it can greatly reduce the density of gray-scale tracks corresponding to each gray-scale, improve the accuracy of gray-scale control, and reduce the time required for pixels to switch freely between all gray-scales.
  • Time while increasing the number of displayed gray scales, has little impact on the refresh rate of the display screen, ensuring the smoothness of animation playback.
  • n N-1.
  • the ratio of the pixel electrode areas of the two sub-pixels with the largest difference in pixel electrode area is X N-1 .
  • the N subpixels include the first subpixel, the second subpixel, and the Nth subpixel; the ratio of the area of the pixel electrode of the R+1th subpixel to the area of the pixel electrode of the Rth subpixel is X, wherein, 1 ⁇ R ⁇ N, R is an integer.
  • the design of this embodiment can make the ratio of the pixel electrode area of the R+1 sub-image to the pixel electrode area of the R sub-pixel the smallest, and the total area of a single pixel is the smallest, which can increase the number of pixels set in the display device to increase the resolution.
  • the display device includes a plurality of gate lines and a plurality of data lines; the sub-pixels include switching transistors, and the output terminals of the switching transistors are electrically connected to the pixel electrodes; the control terminals of the switching transistors of N sub-pixels are connected to the same gate line The input ends of the switching transistors of the N sub-pixels are respectively connected to different data lines.
  • N sub-pixels belonging to the same pixel are controlled by the same gate line, and the data voltages of the N sub-pixels are respectively provided by different data lines.
  • the input ends of the switch transistors of the N sub-pixels are connected to the same data line, and the control ends of the switch transistors of the N sub-pixels are respectively connected to different gate lines.
  • N sub-pixels belonging to the same pixel are respectively controlled by different gate lines, and the data voltages of the N sub-pixels are provided by the same data line.
  • the pixel electrodes of the sub-pixels are strip-shaped, and the N sub-pixels are arranged in sequence along the same direction;
  • the pixel electrodes of the sub-pixels are block-shaped, and the N sub-pixels are arranged in an array;
  • the pixel electrodes of at least some of the sub-pixels are ring-shaped, and N sub-pixels are nested and arranged;
  • the pixel electrodes of at least some of the sub-pixels are L-shaped, and two adjacent sub-pixels among the N sub-pixels: one sub-pixel is half-surrounded by another sub-pixel.
  • the shape and arrangement of the sub-pixels can be designed according to specific design requirements.
  • the pixels at least include red pixels, green pixels and blue pixels;
  • the display device includes a filter layer, and the filter layer includes a red filter unit, a green filter unit and a blue filter unit; wherein, the red The pixel includes a red filter unit, the green pixel includes a green filter unit, and the blue pixel includes a blue filter unit.
  • This embodiment provides a color display device, and color display is realized by setting a color filter unit.
  • Each sub-pixel can independently display M gray scales, and each pixel can independently display M N gray scales at most, which can increase the number of displayed gray scales, thereby increasing the richness of colors displayed on the color screen.
  • the red pixel includes black electrophoretic particles and red electrophoretic particles
  • the green pixel includes black electrophoretic particles and green electrophoretic particles
  • the blue pixel includes black electrophoretic particles and blue electrophoretic particles.
  • color display is realized by arranging colored electrophoretic particles in pixels.
  • the embodiment of the present application also provides a driving method of a display device, which is used to drive the display device provided in the embodiment of the present application.
  • the driving method includes:
  • a frame display control the duration of the data voltage on the pixel electrode of the sub-pixel so that the sub-pixel displays the target gray scale, and the target gray scale is any one of the M gray scales; the gray scale displayed by the N sub-pixels Combined to present the display gray scale of the pixels.
  • the driving method further includes: before a frame is displayed, the sub-pixel displays an initial gray scale, where the initial gray scale is any one of the M gray scales;
  • An embodiment of the present application further provides electronic paper, including the display device provided in any embodiment of the present application.
  • the display device, its driving method, and electronic paper provided by the present application have the following beneficial effects:
  • the pixel includes N sub-pixels with different pixel electrode areas. Each sub-pixel can independently display M gray scales, and the pixel electrode area ratio of the sub-pixels is related to M.
  • the display of the pixel is presented by combining the gray scales displayed by the N sub-pixels. For grayscale, it is only necessary to control each sub-pixel to display M grayscales respectively, so that the pixel can display a maximum of M N grayscales, increasing the number of displayed grayscales. Applied in electronic paper display technology, it can greatly reduce the density of gray-scale tracks corresponding to each gray-scale, improve the accuracy of gray-scale control; and reduce the need for pixels to switch freely between all gray-scales. While increasing the number of displayed gray scales, it has little impact on the refresh rate of the display screen, ensuring the smoothness of animation playback.
  • FIG. 1 is a schematic diagram of driving a 4-grayscale display device in the prior art
  • FIG. 2 is a driving timing diagram of FIG. 1;
  • FIG. 3 is a schematic diagram of gray-scale tracks of a 4-gray-scale display device and a 16-gray-scale display device in the prior art
  • FIG. 4 is a driving timing diagram of a 16-grayscale display device
  • FIG. 5 is a schematic diagram of a pixel in a display device provided by an embodiment of the present application.
  • FIG. 6 is a schematic diagram of a grayscale track of a sub-pixel in an embodiment of the present application.
  • Fig. 7 is the arrangement and combination of gray-scale tracks corresponding to the gray-scale of a pixel in the present application
  • FIG. 8 is a schematic diagram of equivalently displaying the number of gray scales of a pixel into an N-bit M-ary number
  • FIG. 9 is a schematic diagram of a display device provided by an embodiment of the present application.
  • FIG. 10 is a schematic diagram of a display device provided by an embodiment of the present application.
  • FIG. 11 is a schematic diagram of the state of electrophoretic particles in sub-pixels before and after gray scale switching
  • FIG. 12 is another schematic diagram of the state of electrophoretic particles in the sub-pixel before and after grayscale switching
  • Fig. 13 is a schematic diagram of gray scale display brightness combination of a pixel in this application.
  • Fig. 14 is a schematic diagram of gray scale display brightness combination of another pixel in this application.
  • Fig. 15 is a schematic diagram of gray scale display brightness combination of another pixel in this application.
  • Fig. 16 is a schematic diagram of gray scale display brightness combination of another pixel in this application.
  • FIG. 17 is a simplified cross-sectional schematic diagram of a display device provided by an embodiment of the present application.
  • FIG. 18 is a simplified cross-sectional schematic diagram of another display device provided by an embodiment of the present application.
  • FIG. 19 is another schematic diagram of a pixel in a display device provided by an embodiment of the present application.
  • FIG. 20 is another schematic diagram of a pixel in a display device provided by an embodiment of the present application.
  • FIG. 21 is another schematic diagram of a pixel in a display device provided by an embodiment of the present application.
  • a display device applied in electronic paper display technology includes a common electrode and a pixel electrode oppositely arranged, and electrophoretic particles located between the common electrode and the pixel electrode.
  • the movement of the electrophoretic particles can be controlled after the voltage is applied to the common electrode and the pixel electrode respectively, and the final position of the electrophoretic particles in the pixel is different, so the reflected brightness of the pixel is also different, so the pixel can present different gray scales.
  • the present application introduces the concept of a gray-scale track, and the gray-scale track has a one-to-one correspondence with the gray scale displayed by a pixel.
  • the position of the white electrophoretic particles in the pixel grayscale display can be defined as the grayscale track of the grayscale.
  • FIG. 1 is a schematic diagram of driving a 4-gray-scale display device in the prior art
  • FIG. 2 is a driving timing diagram of FIG. 1
  • a 4-grayscale display device means that pixels in the display device can display 4 grayscales.
  • Figure 1 schematically shows the state of electrophoretic particles when the pixel displays gray scales of G0, G1, G2, and G3 respectively, wherein the position of the white electrophoretic particle in the gray scale display of the pixel is the gray scale track of the gray scale.
  • the display device includes a pixel electrode 01 , a common electrode 02 , black electrophoretic particles and white electrophoretic particles.
  • FIG. 2 illustrates a timing diagram for driving pixels to display different gray scales when the initial display state is a black screen.
  • the initial display state is a black screen, that is, the pixel displays G0 gray scale
  • the black electrophoretic particles and the white electrophoretic particles maintain their original positions, and the pixel continues to display G0 grayscale.
  • the timing diagram of FIG. 2 by applying a pulse voltage of 15V to the pixel electrode 01 and controlling the duration of the pulse voltage, the pixel can display G1 gray scale, G2 gray scale or G3 gray scale.
  • the initial display state is a white screen
  • a voltage of 0V is applied to the pixel electrode 01
  • the black electrophoretic particles and the white electrophoretic particles maintain their original positions, and the pixel continues to display G3 grayscale.
  • the pixel can display G2 gray scale, G1 gray scale or G0 gray scale.
  • FIG. 3 is a schematic diagram of gray-scale tracks of a 4-gray-scale display device and a 16-gray-scale display device in the prior art
  • FIG. 4 is a driving timing diagram of a 16-gray-scale display device.
  • FIG. 3 only schematically shows white electrophoretic particles and corresponding gray-scale tracks.
  • the pixels in the 4-grayscale display device can display 4 grayscales from G0 to G3, and the pixels in the 16-grayscale display device can display 16 grayscales from G0 to G15.
  • the distance between the pixel electrode 01 and the common electrode 02 needs to meet certain requirements.
  • the more gray scales the control pixel can display the denser the corresponding gray scale tracks will be, that is, the closer the adjacent gray scale tracks will be. In this case, it becomes more difficult to control the accuracy of the gray scale.
  • FIG. 4 illustrates a timing diagram for driving pixels to display different gray scales when the initial display state is a black screen.
  • the initial display state is a black screen
  • applying a pulse voltage of a certain magnitude to the pixel electrode 01 and controlling the duration of the pulse voltage can realize the pixel displaying any gray scale from G0 to G15.
  • the higher the grayscale level displayed by the pixel the longer the duration of applying the voltage to the pixel electrode 01, and the duration of applying the voltage to the pixel electrode 01 when the pixel is switched from displaying the G0 grayscale to displaying the G15 grayscale is controlled. longest.
  • the minimum unit time t0 is the scanning period of the row scanning signal
  • the scanning period of the row scanning signal is the time when all the gate lines of the display device provide a scanning signal once , that is, the time it takes for the display device to refresh one frame.
  • the scan period is about 11.7ms, that is to say, t0 ⁇ 11.7ms.
  • the duration of the pulse voltage is t0 when the control pixel is switched from displaying G0 gray scale to displaying G1 gray scale
  • the duration of pulse voltage is 15 when the control pixel is switched from displaying G0 gray scale to displaying G15 gray scale.
  • the present application provides a display device and its driving method, which divides a pixel into N sub-pixels with mutually unequal pixel electrode areas, and controls each sub-pixel to independently display M gray scales, wherein, Both N and M are integers not less than 2, and then the pixel area of each sub-pixel is designed so that the gray scales displayed by the N sub-pixels are combined to present the display gray scale of the pixel. In this way, the number of displayed gray scales can be increased to realize color display while ensuring the refresh rate of the display screen.
  • FIG. 5 is a schematic diagram of a pixel in a display device provided in an embodiment of the present application
  • FIG. 6 is a schematic diagram of a grayscale track of a sub-pixel in an embodiment of the present application.
  • the pixel P includes N sub-pixels with unequal areas, which are: the first sub-pixel sP 1 , the second sub-pixel sP 2 , the third sub-pixel sP 3 to the N-1th sub-pixel sP N -1 .
  • the Nth sub-pixel sP N can independently display M gray scales, and both N and M are integers not less than 2.
  • M gray scales correspond to M gray scale levels, and when M is not less than 3, the luminance differences between any two adjacent gray scales in the M gray scales are equal.
  • the sub-pixel includes black electrophoretic particles and white electrophoretic particles, and the position of the white electrophoretic particle when the sub-pixel sP displays a gray scale is defined as the gray scale track of the gray scale.
  • the gray scale track Q 1 corresponds to a low gray scale
  • the gray scale track Q 3 corresponds to a high gray scale.
  • the ratio of the pixel electrode areas of two sub-pixels among the N sub-pixels sP is X n , 2 ⁇ X ⁇ M, and n is an integer not less than 1.
  • X is an integer. That is to say, in the present application, the ratio of the area of the pixel electrodes of the two sub-pixels sP is related to the number of gray scales that the sub-pixels sP can independently display.
  • the N sub-pixels include the first sub-pixel, the second sub-pixel, the third sub-pixel, and the Nth sub-pixel with gradually increasing pixel electrode areas.
  • the ratio of the area of the pixel electrode of the R+1th sub-pixel to the area of the pixel electrode of the Rth sub-pixel is M, where 1 ⁇ R ⁇ N, and R is an integer.
  • the area of the pixel electrode corresponding to N sub-pixels increases by M times.
  • the ratio of the pixel electrode areas of the two sub-pixels with the largest difference in pixel electrode area is M N-1 .
  • M is a fixed value
  • the design of this embodiment can make the ratio of the pixel electrode area of the R+1th sub-pixel to the pixel electrode area of the Rth sub-pixel the smallest, and the total area of a single pixel is the smallest, which can increase the display
  • the ratio of the area of the pixel electrode of the R+1 sub-pixel to the area of the pixel electrode of the R-th sub-pixel is M 2 , which means that the area of the pixel electrode of the N sub-pixels increases by M 2 times.
  • the ratio of the pixel electrode area of the R+1 sub-pixel to the pixel electrode area of the R sub-pixel is not a fixed value, that is, the pixel electrode areas of the N sub-pixels do not increase by equal multiples .
  • N the ratio of the pixel electrode area of the second sub-pixel to the first sub-pixel
  • M the ratio of the pixel electrode area of the third sub-pixel to the second sub-pixel
  • M2 the ratio of the pixel electrode area of the fourth sub-pixel to the first sub-pixel
  • the area ratio of the pixel electrodes of the three sub-pixels is M
  • the area ratio of the pixel electrodes of the fifth sub-pixel and the fourth sub-pixel is M 3 .
  • the ratio of the area of the pixel electrode of the R+1th sub-pixel to the area of the pixel electrode of the Rth sub-pixel is X n .
  • N 2 as an example.
  • the area ratio of the pixel electrodes of the two sub-pixels is 1;2.
  • the area ratio of the pixel electrodes of the two sub-pixels is 1:3.
  • the area ratio of the pixel electrodes of the two sub-pixels is 1:4.
  • the ratio of the area of the pixel electrode of the R+1th sub-pixel to the area of the pixel electrode of the Rth sub-pixel is X.
  • the pixel electrode area equivalent to N sub-pixels is increased by X times.
  • a pixel includes N sub-pixels with different pixel electrode areas, and the N sub-pixels can respectively display M gray scales, and the ratio of the pixel electrode areas of two sub-pixels in the N sub-pixels is X n , that is, The ratio of the pixel electrode area of two sub-pixels is related to the number M of gray scales that can be displayed by the sub-pixels, then N sub-pixels display any gray scale and then combine them as the gray scale displayed by one pixel, which can increase the gray scale displayed by the pixel number of stages.
  • FIG. 7 is an arrangement and combination of gray-scale tracks corresponding to the gray-scale of a pixel in the present application.
  • the gray scale displayed by each sub-pixel sP is controlled according to the data information of the picture to be displayed, so that each sub-pixel sP displays a target gray scale, and the target gray scale is any one of the M gray scales, then N Combining the gray scales displayed by each sub-pixel can present the display gray scale of the pixel, and combining the display gray scales of multiple pixels to realize the display of a frame of picture.
  • the sub-pixel sP displays the target gray scale.
  • the display gray scale of the pixel is presented by combining the gray scales displayed by N sub-pixels. It is only necessary to control each sub-pixel to display M gray scales respectively, so that the pixel can display M N gray scales at most, which improves the The number of gray levels displayed. Compared with the existing technology that can realize M N gray-scale display, it can greatly reduce the density of gray-scale tracks corresponding to each gray-scale, and can improve the accuracy of gray-scale control; and can reduce the number of pixels to complete all The time required for free switching between gray scales increases the number of displayed gray scales and has little impact on the refresh rate of the display screen, ensuring the smoothness of animation playback.
  • the pixel P includes the first sub-pixel sP 1 , the second sub-pixel sP 2 , the third sub-pixel sP 3 to the N-1th sub-pixel sP N-1 , and the Nth sub-pixel sP N , a total of N sub-pixels. pixels.
  • the area of the pixel electrode 1 gradually increases.
  • the ratio of the pixel electrode area of each sub-pixel to the total pixel electrode area of the pixel is P 1 , P 2 , P 3 , . . . PN in sequence.
  • the total pixel electrode area of a pixel is the sum of the pixel electrode areas of N sub-pixels.
  • each sub-pixel can independently display M gray scales, that is, each sub-pixel includes M gray scale tracks respectively.
  • M N gray scales the number of gray scales that can be displayed by a pixel can be regarded as is an M-ary number with N digits, and each M-ary number corresponds to a gray scale.
  • M grayscale tracks correspond to 0, 1, 2, ... M-2, M-1 respectively.
  • FIG. 8 is a schematic diagram of equivalently displaying the number of gray scales that can be displayed by a pixel into an N-bit M-ary number.
  • the gray-scale track S 1 of the first sub-pixel sP 1 corresponds to the first bit of the base number
  • the gray-scale track S 2 of the second sub-pixel sP 2 corresponds to the second bit of the base number
  • the third The gray-scale track S 3 of the sub-pixel sP 3 corresponds to the third bit of the base number
  • the gray-scale track S R of the R-th sub-pixel sP R corresponds to the R-th bit of the base number (R is an integer not greater than N)
  • the gray-scale track S N- 2 of the N-2 sub-pixel sP N-2 corresponds to the N-2th digit of the base number
  • the gray-scale track S N- 1 of the N-1th sub-pixel sP N -1 corresponds to the base number
  • the N-1th bit of the Nth sub-pixel sP N
  • the combination of gray-scale tracks of N sub-pixels can be regarded as an N-bit M-ary number: S N S N- 1 ... S 2 S 1 , where S 1 , S 2 , ..., S N are respectively M Any integer from base 0 to M-1.
  • N-bit M-ary number S N S N-1 ...
  • S 2 S 1 represents the yth gray scale among the M N gray scales that the pixel can display, and the brightness ratio of the gray scale is expressed as Gy.
  • the grayscale Gamma is 1.0, that is, the brightness increases linearly as the grayscale increases. Then the following formula can be obtained from the conversion relationship between M base and decimal:
  • Gy (M 0 *S 1 +M 1 *S 2 +M 2 *S 3 +...+M R-1 *S R +...+M N-3 *S N-2 +M N-2 *S N -1 +M N-1 *S N )/(M N -1) 2
  • Gy and can also be expressed as:
  • Gy S 1 *P 1 /(M-1)+S 2 *P 2 /(M-1)+S 3 *P 3 /(M-1)+...+S R *P R /(M-1 )+...+S N-2 *P N-2 /(M-1)+S N-1 *P N-1 /(M-1)+S N *P N /(M-1) 3
  • FIG. 9 is a schematic diagram of a display device provided in the embodiment of the present application.
  • the display device includes multiple gate lines Scan and multiple Data line Data; one pixel P includes three sub-pixels sP.
  • the sub-pixel sP includes a switch transistor 4 , and the output terminal of the switch transistor 4 is electrically connected to the pixel electrode 1 .
  • the control terminals of the switching transistors 4 of the three sub-pixels sP are electrically connected to the same gate line Scan, and the input terminals of the switching transistors 4 of the three sub-pixels sP are respectively connected to different data lines Data.
  • the gate line Scan When driving the display device to display, the gate line Scan provides a scan signal to control the switching transistor 4 to turn on, and the data line Data writes the data voltage signal into the pixel electrode of the sub-pixel sP.
  • the electrophoretic particles move under the action of the electrophoretic capacitance formed between the pixel electrode and the common electrode, so as to realize the grayscale display of the sub-pixel sP.
  • the sub-pixel sP further includes a storage capacitor. After the switching transistor 4 is turned on, the data line Data writes the data voltage signal into the pixel electrode and stores the data voltage signal on the storage capacitor.
  • the N sub-pixels sP belonging to the same pixel P are controlled by the same gate line Scan, and the data voltages of the N sub-pixels sP are respectively provided by different data lines Data.
  • FIG. 10 is a schematic diagram of another display device provided in the embodiment of the present application.
  • the display device includes multiple gate lines Scan and A plurality of data lines Data; a pixel P includes 3 sub-pixels sP.
  • the control terminals of the switching transistors 4 of the three sub-pixels sP are respectively connected to different gate lines Scan, the input terminals of the switching transistors 4 of the three sub-pixels sP are connected to the same data line Data, and the switching transistor 4 of each sub-pixel sP
  • the output ends of each are connected to the corresponding pixel electrodes 1 .
  • the N sub-pixels sP belonging to the same pixel P are respectively controlled by different gate lines Scan, and the data voltages of the N sub-pixels sP are provided by the same data line Data.
  • the display device further includes a driving chip, and the gate line Scan and the data line Data are respectively electrically connected to the driving chip.
  • the driving chip When driving the display device to work, the driving chip provides corresponding voltage signal.
  • the magnitude and duration of the data voltage required to drive the sub-pixels to display the target gray scale are related to the gray scale displayed by the sub-pixels in the previous frame display.
  • the gray scale displayed by the sub-pixel in the last frame of the screen can be regarded as the initial gray scale of the sub-pixel relative to the target gray scale, and the initial gray scale is any one of the M gray scales, wherein the target gray scale can be The same as the initial gray scale, or the difference between the target gray scale and the initial gray scale is at least one gray scale level.
  • the target grayscale of the sub-pixel when the target grayscale of the sub-pixel is the same as the initial grayscale, it is controlled to write a data voltage of 0V to the pixel electrode of the sub-pixel, at this time If the electrophoretic particles in the sub-pixel do not move, the gray scale displayed by the sub-pixel is the same as the gray scale displayed by the sub-pixel in the previous frame display.
  • the target gray scale of the sub-pixel differs from the initial gray scale by at least one gray scale level, it is necessary to control the writing of a certain data voltage to the pixel electrode of the sub-pixel and control the data voltage based on the difference between the target gray scale and the initial gray scale.
  • the voltage is satisfied for a certain duration.
  • the data voltage includes polarity and magnitude.
  • the magnitude and/or polarity of the data voltage written to the pixel electrode is controlled, and the duration of the data voltage on the pixel electrode is controlled, so as to switch the sub-pixel from the initial gray scale to the target gray scale.
  • the time when all the gate lines Scan provide a scan signal is defined as the scan cycle for the gate line to provide the scan signal, and the completion of a scan cycle during operation can be regarded as a refresh of a display device frame.
  • the scan cycle for the gate line to provide the scan signal and the completion of a scan cycle during operation can be regarded as a refresh of a display device frame.
  • the display of one frame of picture refers to the complete display of the image information of one picture in the dynamic picture.
  • the display device refreshes one frame to complete the switching of all sub-pixels from the initial gray scale to the target gray scale, that is, the display device refreshes one frame to realize one frame display.
  • the display device needs to continue to refresh, that is, the gate line Scan continues to provide scanning signal to ensure that the data voltage continues to be written into the pixel electrode of the sub-pixel.
  • the duration of the data voltage needs to be extended.
  • the display device needs to refresh two or more frames to complete the display of one frame.
  • the duration of the data voltage can also be understood as the sustaining time of the data voltage on the pixel electrode.
  • the scan period of the scan signal is provided for the gate line Scan.
  • the duration of the data voltage is related to the period during which the gate line Scan supplies the scan signal.
  • the switching transistor 4 When the gate line Scan provides a scan signal once, the switching transistor 4 is turned on once, and the data line Data provides a data voltage to the pixel electrode 1 once. After the data voltage is written on the pixel electrode 1 once in the scanning period, the voltage value of the data voltage is maintained on the pixel electrode 1 .
  • the time taken for the sub-pixel sP to switch from the initial gray scale to the target gray scale is an integer multiple of the scanning period t of the scanning signal provided by the gate line Scan.
  • the greater the gray scale level difference between the target gray scale and the initial gray scale the more times the gate lines provide scanning signals when controlling gray scale switching, that is, the longer the duration of the data voltage.
  • the target grayscale and the initial grayscale differ by x grayscale levels, 1 ⁇ x ⁇ M-1, and x is an integer; then the control sub-pixel sp is switched from the initial grayscale
  • the duration of writing the data voltage to the pixel electrode of the sub-pixel sP is x*T1, where T1 is the duration of the data voltage when the target gray scale is 1 gray scale different from the initial gray scale.
  • the target gray scale and the initial gray scale differ by x gray scale levels.
  • x ⁇ 2 when the control sub-pixel sp is switched from the initial gray scale to the target gray scale, by adjusting The magnitude of the data voltage controls the duration of writing the data voltage to the pixel electrode of the sub-pixel sP to be less than x*T1.
  • the time for switching from the initial gray scale to the target gray scale can be shortened.
  • the target gray scale that the sub-pixel sP needs to display in one frame of image display is the gray scale corresponding to the gray scale track Q2 .
  • the initial gray scale of the sub-pixel sP is the gray scale corresponding to the gray scale track Q1 .
  • FIG. 11 is a schematic diagram of the states of the electrophoretic particles in the sub-pixels before and after gray scale switching.
  • the white electrophoretic particles move to the position corresponding to the gray-scale track Q2
  • the sub-pixel sP displays the gray scale corresponding to the gray-scale track Q2 .
  • FIG. 12 is another schematic diagram of the states of the electrophoretic particles in the sub-pixels before and after gray scale switching.
  • the grid line provides a scanning signal
  • the white electrophoretic particles move to the position between the gray-scale track Q2 and the gray-scale track Q1 .
  • the sub-pixel sP displays the grayscale corresponding to the gray-scale track Q2 .
  • the brightness between the gray scale and the gray scale corresponding to the gray scale track Q 1 is not the target gray scale; after the grid line provides two scanning signals, the white electrophoretic particles move to the position corresponding to the gray scale track Q 2 , at this time the sub-pixel sP Display the grayscale corresponding to the grayscale track Q2 .
  • the ratio of the pixel electrode areas of any two sub-pixels among the three sub-pixels is 2 n , such as 2, 4, 8 and so on.
  • the area of the pixel electrode is set according to the above formula 5 as an example for illustration. According to formula 5, the ratios of the pixel electrode areas of the three sub-pixels to the total pixel electrode area of the pixel are 1/7, 2/7, and 4/7, respectively.
  • the sub-pixels include black electrophoretic particles and white electrophoretic particles
  • the luminances corresponding to the gray scale tracks Q 1 and Q 2 are completely black (0) and completely white (1) respectively.
  • the ratios of the brightness displayed by the sub-pixel sP1 corresponding to the gray-scale tracks Q 1 and Q 2 to the brightness of the pixel P when it is completely white are 0 and 1/7 respectively; the gray-scale tracks Q 1 and Q 2 corresponding to the sub-pixel sP2 display The ratios of the brightness to the brightness when the pixel P is completely white are 0 and 2/7 respectively, and the brightness ratios of the gray scale tracks Q 1 and Q 2 corresponding to the sub-pixel sP3 are 0 and 4/7 respectively.
  • FIG. 13 is a schematic diagram of gray scale display brightness combination of a pixel in this application. As shown in FIG. 13 , combinations of 8 kinds of gray-scale brightness can be obtained through permutation and combination, and then the display of 8 gray-scales can be realized.
  • the switching time between its gray-scale tracks is related to the number of scanning periods for which the gate lines provide scanning signals. Therefore, for sub-pixels with only two gray-scale tracks Q 1 and Q 2 , if the gate line provides a scanning signal to complete switching between the two gray-scale tracks, the control is between the two gray-scale tracks Switching ideally requires only one scan cycle to be performed.
  • the frame refresh rate of the display device can reach up to 85 Hz.
  • the traditional 8-gray-scale display there are 8 gray-scale tracks per pixel in total, and the switching time between the gray-scale tracks requires at most 7 scan cycles, so the maximum screen refresh rate can only be up to 12Hz; and because the number of gray-scale tracks increases, the corresponding gray-scale control accuracy is relatively poor.
  • the embodiment of the present application can effectively increase the refresh rate of the picture, and can improve the gray-scale control precision.
  • the ratio of the pixel electrode areas of two sub-pixels is 4 n , such as 4, 16 and so on.
  • the area of the pixel electrode is set according to the above formula 5 as an example for illustration. According to formula 5, the ratios of the pixel electrode areas of the two sub-pixels to the total pixel electrode area of the pixel are 1/4 and 4/5, respectively.
  • the sub-pixels include black electrophoretic particles and white electrophoretic particles
  • the luminance corresponding to the four gray-scale tracks is completely black. (0), 1/3 white (1/3), 2/3 white (2/3), all white (1).
  • the ratios of the luminance displayed by the sub-pixel sP1 corresponding to the gray scale tracks Q 1 , Q 2 , Q 3 , and Q 4 to the luminance when the pixel P is completely white are 0, 1/15, 2/15, and 3/15 respectively;
  • the ratios of the luminance displayed by the gray scale tracks Q 1 , Q 2 , Q 3 , and Q 4 corresponding to sP2 to the luminance when the pixel P is completely white are 0, 4/15, 8/15, and 12/15, respectively.
  • FIG. 14 is a schematic diagram of another grayscale display brightness combination of pixels in this application.
  • 16 combinations of gray-scale brightness can be obtained through permutation and combination, and then the display of 16 gray-scales can be realized.
  • each sub-pixel includes 4 gray-scale tracks. If the gate line provides a scanning signal to complete switching between two adjacent gray-scale tracks, the control of switching between 4 gray-scale tracks is ideally at most Three scan cycles need to be performed. Taking the display device working in the refresh rate mode of 85 Hz as an example, with the design of the embodiment of the present application, the screen refresh rate of the display device can reach up to 28 Hz.
  • the embodiment of the present application can effectively increase the refresh rate of the picture, and can improve the gray-scale control precision.
  • the ratio of the pixel electrode areas of the three sub-pixels is 3 n , such as 3, 9, 27 and so on.
  • the area of the pixel electrode is set according to the above formula 5 as an example for illustration. According to formula 5, the ratios of the pixel electrode areas of the three sub-pixels to the total pixel electrode area of the pixel are 2/26, 6/26, and 18/26, respectively.
  • the sub-pixels include black electrophoretic particles and white electrophoretic particles
  • the luminances corresponding to the three gray-scale tracks are all black (0) respectively. , 1/2 White (1/2), Full White (1).
  • the ratios of the brightness displayed by the sub-pixel sP1 corresponding to the gray-scale tracks Q 1 , Q 2 , and Q 3 to the brightness of the pixel P when it is completely white are 0, 1/26, and 2/26 respectively;
  • the gray-scale corresponding to the sub-pixel sP2 The ratios of the luminance displayed by tracks Q 1 , Q 2 , and Q 3 to the luminance when pixel P is completely white are 0, 3/26, and 6/26, respectively;
  • the ratios of the displayed luminance to the luminance when the pixel P is completely white are 0, 9/26, and 18/26, respectively.
  • FIG. 15 is a schematic diagram of another grayscale display brightness combination of pixels in this application.
  • 27 combinations of gray-scale brightness can be obtained through permutation and combination, and then the display of 27 gray-scales can be realized.
  • each sub-pixel includes 3 gray-scale tracks. If the gate line provides a scanning signal to complete switching between two adjacent gray-scale tracks, the control of switching between 3 gray-scale tracks is ideally at most Two scan cycles need to be performed.
  • the screen refresh rate of the display device can reach up to 42 Hz.
  • the number of gray-scale tracks per pixel is 27 in total, and the switching time between gray-scale tracks requires at most 26 scan cycles, so the maximum refresh rate of the screen can only reach 3Hz; and because the number of gray-scale tracks increases, the corresponding gray-scale control accuracy is poor.
  • the embodiment of the present application can effectively increase the refresh rate of the picture, and can improve the gray-scale control precision.
  • the ratio of the pixel electrode areas of two sub-pixels is 2 n , such as 2, 4 and so on.
  • the ratios of the pixel electrode areas of the two sub-pixels to the total pixel electrode area of the pixel are 1/3 and 2/3 respectively.
  • the sub-pixels include black electrophoretic particles and white electrophoretic particles
  • the luminance corresponding to the four gray-scale tracks is completely black. (0), 1/3 white (1/3), 2/3 white (2/3), all white (1).
  • the ratios of the luminance displayed by the sub-pixel sP1 corresponding to the gray-scale tracks Q 1 , Q 2 , Q 3 , and Q 4 to the luminance when the pixel P is completely white are 0, 1/9, 2/9, and 3/9;
  • the ratios of the luminance displayed by the gray scale tracks Q 1 , Q 2 , Q 3 , and Q 4 corresponding to sP2 to the luminance when the pixel P is completely white are 0, 2/9, 4/9, and 6/9, respectively.
  • FIG. 16 is a schematic diagram of another grayscale display brightness combination of pixels in this application. As shown in FIG. 16 , there are repeated gray-scale brightnesses through permutation and combination, and this embodiment can obtain 10 combinations of gray-scale brightnesses, that is, 10 gray-scale displays can be realized.
  • the embodiment of the present application also provides another display device.
  • the pixels at least include a red pixel 1P, a green pixel 2P and a blue pixel 3P.
  • each pixel is divided into N sub-pixels, and each sub-pixel can independently display M gray scales, so each pixel can independently display X N gray scales.
  • the number of displayed gray scales can be increased, thereby increasing the richness of colors displayed on a color screen.
  • FIG. 17 is a simplified cross-sectional schematic diagram of a display device provided in an embodiment of the present application.
  • the display device includes a filter layer 3, and the filter layer 3 includes a red filter unit 31, A green filter unit 32 and a blue filter unit 33 ; wherein, the red pixel 1P includes a red filter unit 31 , the green pixel 2P includes a green filter unit 32 , and the blue pixel 3P includes a blue filter unit 33 .
  • FIG. 17 also schematically shows the common electrode 2 and the pixel electrode 1 .
  • the display device also includes a substrate 5 , where the gate lines, data lines, and switching transistors are located on the substrate 5 .
  • Each pixel further includes white electrophoretic particles and black electrophoretic particles, wherein the white electrophoretic particles are represented by white filling, and the black electrophoretic particles are represented by black filling.
  • color display is realized by setting a color filter unit.
  • FIG. 18 is a simplified cross-sectional schematic diagram of another display device provided by the embodiment of the present application.
  • the red pixel 1P includes black electrophoretic particles and red electrophoretic particles 61
  • the green pixel 2P includes Black electrophoretic particles and green electrophoretic particles 62
  • the blue pixel 3P includes black electrophoretic particles and blue electrophoretic particles 63 .
  • color display is realized by arranging colored electrophoretic particles in pixels.
  • FIG. 5 shows that the pixel electrodes 1 of the sub-pixels sP are strip-shaped, and N sub-pixels sP are arranged sequentially along the same direction.
  • the N sub-pixels sP are randomly arranged according to the area of the pixel electrode.
  • the N sub-pixels sP are arranged in such a manner that the areas of the pixel electrodes gradually increase (or gradually decrease).
  • FIG. 19 is another schematic diagram of a pixel in a display device provided by the embodiment of the present application.
  • the pixel electrode 1 of the sub-pixel sP is block-shaped, and N sub-pixels sP are in an array arranged.
  • N sub-pixels sP are arranged in an array of a row*b column. Wherein, the specific number of rows and columns may be set according to actual requirements.
  • FIG. 20 is another schematic diagram of a pixel in a display device provided in an embodiment of the present application.
  • the pixel electrodes 1 of sub-pixels sP are ring-shaped, and N sub-pixels sP Nested arrangements.
  • the N sub-pixels sP have a common center of symmetry.
  • the shape of the pixel electrode of an inner sub-pixel sP may be block.
  • the pixel electrodes 1 of some sub-pixels sP are shown as rectangular rings.
  • the pixel electrodes 1 of some sub-pixels sP may also be circular rings, elliptical rings or polygonal rings.
  • FIG. 21 is another schematic diagram of a pixel in a display device provided in the embodiment of the present application.
  • the pixel electrodes 1 of sub-pixels sP are L-shaped, and N sub-pixels sP Two adjacent sub-pixels sP: one sub-pixel sP half-surrounds the other sub-pixel sP.
  • the shape of the pixel electrode 1 of one sub-pixel sP among the N sub-pixels sP is block.
  • the L-shape of the pixel electrode 1 means that the shape of the pixel electrode is approximately L-shaped, and it can also be said that the shape of the pixel electrode is similar to “7”.
  • An embodiment of the present application further provides an electronic paper, including the display device provided in any embodiment of the present application.
  • the structure of the display device has been described in the foregoing embodiments, and will not be repeated here.

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Abstract

本申请实施例提供一种显示器件及其驱动方法和电子纸。显示器件包括：多个像素，像素包括像素电极面积互不相等的N个子像素，子像素能够显示M个灰阶，N和M均为不小于2的整数；N个子像素中两个子像素的像素电极面积之比为X n，2≤X≤M，n为不小于1的整数。本申请能够提升显示的灰阶个数，同时保证显示画面的刷新频率。

Description

一种显示器件及其驱动方法和电子纸
本申请要求于2021年10月18日提交中国专利局、申请号为202111207842.0、申请名称为“一种显示器件及其驱动方法和电子纸”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请属于显示技术领域，更具体的涉及一种显示器件及其驱动方法和电子纸。
背景技术
随着显示技术的不断发展，电子纸显示技术以其显示效果接近于纸张而活跃于大众视野中。电子纸显示技术中使用的电泳粒子具有双稳态的特性，使得电子纸显示器在停止工作时仍然可以长时间保留所显示的画面，因此其具有低功耗的特点。电子纸显示技术属于反射型显示，即通过反射外界光源来达到显示效果，因此其对人眼伤害远低于LCD或者OLED显示技术。
目前的电子纸显示技术中，像素可显示的灰阶数较少，而如果仅通过调整驱动方式来增大像素可显示的灰阶数的话，对灰阶的精准度控制的难度会变大。而且，现有技术中增大像素可显示的灰阶数后，对显示画面刷新率的影响较大，严重影响动画播放的流畅性。
发明内容
有鉴于此，本申请提供一种显示器件及其驱动方法和电子纸，以解决提升像素可显示的灰阶数量、提升灰阶的控制精度的技术问题。
本申请实施例提供一种显示器件，包括：
多个像素，像素包括像素电极面积互不相等的N个子像素，子像素能够显示M个灰阶，N和M均为不小于2的整数；其中，
N个子像素中两个子像素的像素电极面积之比为X n，2≤X≤M，n为不小于1的整数。
在本申请中通过N个子像素显示的灰阶进行组合来呈现像素的显示灰阶，能够提升像素显示的灰阶个数。与现有技术相比，能够极大的减小各灰阶对应的灰阶轨道的密集度，能够提升对灰阶控制的精度；而且能够减小像素完成所有灰阶之间自由切换所需的时间，在提升显示灰阶个数的同时对显示画面刷新率影响较小，保证动画播放的流畅性。其中，当X＝M时，仅需要控制每个子像素能够分别显示M个灰阶，就能够实现像素最多显示M N个灰阶，极大提升了显示的灰阶个数。
在一些实施方式中，n≤N-1。在该实施例中，像素电极面积差距最大的两个子像素的像素电极面积之比为X N-1。
在一些实施方式中，N个所述子像素包括第1个子像素、第2个子像素、至第N个子像素；第R+1个子像素的像素电极面积与第R个子像素的像素电极面积之比为 X，其中，1≤R≤N，R为整数。采用该实施例的设计能够使得第R+1个子像的像素电极面积和第R个子像素的像素电极面积之比最小，则单个像素的总面积最小，能够增大显示器件中设置的像素个数，提升分辨率。
在一些实施方式中，N个子像素中第R个子像素的像素电极面积在像素的总像素电极面积中的占比为P R，其中，P R＝X R-1*(X-1)/(X N-1)，1≤R≤N，R为整数。
本申请实施例中，显示器件包括多条栅线和多条数据线；子像素包括开关晶体管，开关晶体管的输出端与像素电极电连接；N个子像素的开关晶体管的控制端与同一条栅线电连接，N个子像素的开关晶体管的输入端分别连接不同的数据线。该实施方式中，属于同一个像素的N个子像素由同一条栅线控制，且N个子像素的数据电压分别由不同的数据线提供。
在一些实施方式中，N个子像素的开关晶体管的输入端连接同一条数据线，N个子像素的所述开关晶体管的控制端分别连接不同的栅线。该实施方式中，属于同一个像素的N个子像素分别由不同的栅线控制，且N个子像素的数据电压由同一条数据线提供。
本申请实施例中像素的结构为下述之一：
子像素的像素电极为条状，N个子像素沿同一方向依次排列；
子像素的像素电极为块状，N个子像素呈阵列排布；
至少部分子像素的像素电极为环状，N个子像素嵌套排布；
至少部分子像素的像素电极为L状，N个子像素中相邻的两个子像素：一个子像素半环绕另一个子像素设置。可以根据具体的设计需要对子像素的形状以及排布方式进行设计。
在一种实施例中，像素至少包括红色像素、绿色像素和蓝色像素；显示器件包括滤光层，滤光层包括红色滤光单元、绿色滤光单元和蓝色滤光单元；其中，红色像素包括红色滤光单元、绿色像素包括绿色滤光单元，蓝色像素包括蓝色滤光单元。该实施方式提供一种彩色显示器件，通过设置彩色滤光单元以实现彩色显示。每个子像素能够独立显示M个灰阶，则每个像素能够最多独立显示M N个灰阶，能够提升显示的灰阶个数，从而增加彩色画面显示的色彩的丰富度。
在另一种实施例中，红色像素包括黑色电泳粒子和红色电泳粒子，绿色像素包括黑色电泳粒子和绿色电泳粒子，蓝色像素包括黑色电泳粒子和蓝色电泳粒子。该实施方式通过在像素中设置彩色电泳粒子实现彩色显示。
本申请实施例还提供一种显示器件的驱动方法，用于驱动本申请实施例提供的显示器件，驱动方法包括：
在一帧画面显示中：控制子像素的像素电极上数据电压的持续时间、以使得子像素显示目标灰阶，目标灰阶为M个灰阶中的任意一个；N个子像素所显示的灰阶进行组合呈现像素的显示灰阶。
在一些实施方式中，驱动方法还包括：在一帧画面显示之前，子像素显示初始灰阶，初始灰阶为M个灰阶中的任意一个；
控制子像素的像素电极上数据电压的持续时间、以使得子像素显示目标灰阶，包括：栅线提供扫描信号控制开关晶体管开启，以通过数据线向像素电极提供数据电 压；在数据电压的控制下，子像素由初始灰阶切换到目标灰阶；其中，数据电压的持续时间为T，T＝m*t，其中，m为不小于1的正整数，t为栅线提供扫描信号的扫描周期。
本申请实施例还提供一种电子纸，包括本申请任意实施例提供的显示器件。
本申请提供的显示器件及其驱动方法和电子纸，具有如下有益效果：
像素包括像素电极面积不等的N个子像素，每个子像素能够独立显示M个灰阶，并且子像素的像素电极面积比与M相关，通过N个子像素显示的灰阶进行组合来呈现像素的显示灰阶，仅需要控制每个子像素能够分别显示M个灰阶，就能够实现像素最多显示M N个灰阶，提升了显示的灰阶个数。应用在电子纸显示技术中，能够极大的减小各灰阶对应的灰阶轨道的密集度，能够提升对灰阶控制的精度；而且能够减小像素完成所有灰阶之间自由切换所需的时间，在提升显示灰阶个数的同时对显示画面刷新率影响较小，保证动画播放的流畅性。
附图说明
图1为现有技术中一种4灰阶显示器件的驱动示意图；
图2为图1的一种驱动时序图；
图3为现有技术中4灰阶显示器件和16灰阶显示器件的灰阶轨道示意图；
图4为16灰阶显示器件的一种驱动时序图；
图5为本申请实施例提供的显示器件中像素的一种示意图；
图6为本申请实施例中子像素的一种灰阶轨道示意图；
图7为本申请中一种像素的灰阶对应的灰阶轨道排列组合方式；
图8为将像素可显示灰阶数等效为一个N位M进制数的示意图；
图9为本申请实施例提供的一种显示器件的示意图；
图10为本申请实施例提供的一种显示器件的示意图；
图11为在灰阶切换前后子像素中电泳粒子状态的一种示意图；
图12为在灰阶切换前后子像素中电泳粒子状态的另一种示意图；
图13本申请中一种像素的灰阶显示亮度组合示意图；
图14本申请中另一种像素的灰阶显示亮度组合示意图；
图15本申请中另一种像素的灰阶显示亮度组合示意图；
图16本申请中另一种像素的灰阶显示亮度组合示意图；
图17为本申请实施例提供的一种显示器件的截面简化示意图；
图18为本申请实施例提供的另一种显示器件的截面简化示意图；
图19为本申请实施例提供的显示器件中像素的另一种示意图；
图20为本申请实施例提供的显示器件中像素的另一种示意图；
图21为本申请实施例提供的显示器件中像素的另一种示意图。
具体实施方式
应用在电子纸显示技术中的显示器件包括相对设置的公共电极和像素电极、以及位于公共电极和像素电极之间的电泳粒子。在公共电极和像素电极上分别施加电压之 后能够控制电泳粒子移动，而像素中电泳粒子移动后最终位置不同，则该像素反射得到的亮度也不同，由此像素能够呈现出不同的灰阶。
为便于后续实施例的说明，本申请中引入灰阶轨道的概念，灰阶轨道与像素显示灰阶一一对应。以包括黑色电泳粒子和白色电泳粒子的显示器件为例，可以将像素灰阶显示中白色电泳粒子所处的位置定义为该灰阶的灰阶轨道。
图1为现有技术中一种4灰阶显示器件的驱动示意图，图2为图1的一种驱动时序图。4灰阶显示器件也即显示器件中像素能够显示4个灰阶。
图1中示意出了像素在分别显示G0、G1、G2、G3灰阶时电泳粒子的状态，其中，像素灰阶显示中白色电泳粒子所处的位置为该灰阶的灰阶轨道。如图1所示，显示器件包括像素电极01、公共电极02、黑色电泳粒子和白色电泳粒子。
以白色电泳粒子带有正电荷，黑色电泳粒子带有负电荷为例。公共电极02上施加的电压为0V，向像素电极01上施加0V、15V、-15V三种电压，以驱动电泳粒子移动实现像素显示不同的灰阶。图2中示意了起始显示状态为黑画面时驱动像素显示不同灰阶的时序图。当起始显示状态为黑画面时，也即像素显示G0灰阶，当向像素电极01上施加0V的电压时，黑色电泳粒子和白色电泳粒子均维持原来的位置静止不同，则像素继续显示G0灰阶。如图2中时序图示意的，通过向像素电极01上施加15V的脉冲电压，并控制脉冲电压的持续时间能够实现像素显示G1灰阶、G2灰阶或者G3灰阶。
可以理解，当起始显示状态为白画面，也即像素显示G3灰阶时，向像素电极01上施加0V的电压，黑色电泳粒子和白色电泳粒子均维持原来的位置静止不同，则像素继续显示G3灰阶。而通过向像素电极01上施加-15V的脉冲电压，并控制脉冲电压的持续时间能够实现像素显示G2灰阶、G1灰阶或者G0灰阶。
图3为现有技术中4灰阶显示器件和16灰阶显示器件的灰阶轨道示意图，图4为16灰阶显示器件的一种驱动时序图。
图3中仅示意出了白色电泳粒子、以及相应的灰阶轨道。4灰阶显示器件中像素能够显示G0至G3共4个灰阶，16灰阶显示器件中像素能够显示G0至G15共16个灰阶。在显示器件中像素电极01和公共电极02之间的间距需要满足一定要求。当像素电极01和公共电极02之间的间距固定时，控制像素能够显示的灰阶个数越多，则相应的灰阶轨道会越密集，也就是说相邻的灰阶轨道距离越近。在此种情况下，对灰阶的精度控制难度会增大。
图4中示意了起始显示状态为黑画面时驱动像素显示不同灰阶的时序图。如图4所示的，当起始显示状态为黑画面时，向像素电极01上施加一定大小的脉冲电压，并控制脉冲电压的持续时间能够实现像素显示G0至G15中任意一个灰阶。白色电泳粒子距公共电极02越近，则像素显示的灰阶等级越高。而像素显示的灰阶等级越高，向像素电极01上施加电压的持续时间越长，其中，控制像素由显示G0灰阶切换到显示G15灰阶时，向像素电极01上施加电压的持续时间最长。
以脉冲电压的持续时间为最小单位时间t0的整数倍为例，最小单位时间t0为行扫描信号的扫描周期，行扫描信号的扫描周期也即显示器件所有的栅线全部提供一次扫描信号的时间，也即显示器件刷新一帧的用时。比如在85Hz刷新率的模式下，扫 描周期约为11.7ms，也就是说t0≈11.7ms。如图4所示的，控制像素由显示G0灰阶切换到显示G1灰阶时脉冲电压的持续时间为t0，控制像素由显示G0灰阶切换到显示G15灰阶时脉冲电压的持续时间为15*t0。所以理想状态下，在16灰阶显示器件中，完成G0至G15所有灰阶之间的自由切换，最长需要刷新15帧才能完成。以85Hz刷新率为例，则显示画面的切换频率最多只有5～6Hz。也就是说，在现有技术中，能够显示的灰阶个数越多，显示画面的刷新频率越低，影响动画播放的流畅性。
另外，随着显示技术的发展，电子纸也不局限于黑白显示，彩色电子纸也成为一种新的显示技术。而对于能够应用于彩色电子纸的显示器件来说，在完成彩色显示时，需要红、绿、蓝三种像素进行配合，像素灰阶个数越多，则显示的彩色画面越丰富。而现有技术限制了像素显示的灰阶个数的提升，无法在灰阶个数与画面显示效果之间进行平衡。
基于现有技术存在问题，本申请提供一种显示器件及其驱动方法，将像素划分成像素电极面积互不相等的N个子像素，并控制每个子像素能够分别独立显示M个灰阶，其中，N和M均为不小于2的整数，再对各子像素的像素面积进行设计，使得N个子像素所显示的灰阶进行组合呈现像素的显示灰阶。如此能够提升显示的灰阶个数，实现彩色显示同时保证显示画面的刷新频率。
在一种实施例中，图5为本申请实施例提供的显示器件中像素的一种示意图，图6为本申请实施例中子像素的一种灰阶轨道示意图。
图5中仅示意出了像素P中的像素电极1。如图5所示，像素P包括面积互不相等的N个子像素，分别为：第1个子像素sP 1、第2个子像素sP 2、第3个子像素sP 3至第N-1个子像素sP N-1、第N个子像素sP N。每个子像素sP能够独立显示M个灰阶，N和M均为不小于2的整数。可选的，对于一个子像素sP来说，M个灰阶对应M个灰阶等级，当M不小于3时，M个灰阶中任意相邻两个灰阶之间的亮度差相等。
图6示意了M＝3时子像素sP的3个灰阶轨道Q 1、Q 2和Q 3，图6中还示意出了驱动子像素sP的显示灰阶进行切换的像素电极1和公共电极2。在一种实施例中，子像素包括黑色电泳粒子和白色电泳粒子，以子像素sP显示灰阶时白色电泳粒子所处的位置定义为该灰阶的灰阶轨道。以用户使用时公共电极2相比于像素电极1更靠近人眼为例，则灰阶轨道Q 1对应低灰阶，灰阶轨道Q 3对应高灰阶。
在一个像素P中，N个子像素sP中两个子像素的像素电极面积之比为X n，2≤X≤M，n为不小于1的整数。可选的，X为整数。也就是说，在本申请中两个子像素sP的像素电极面积之比与子像素sP能够独立显示的灰阶个数相关。
本发明实施例中，N个子像素包括像素电极面积逐渐递增的第1个子像素、第2个子像素、第3个子像素、至第N个子像素，需要说明的是此处的排序编号并非是显示器件中N个子像素实际的排布顺序。
在一种实施例中，第R+1个子像素的像素电极面积与第R个子像素的像素电极面积之比为M，其中，1≤R≤N，R为整数。此时n＝1，相当于N个子像素的像素电极面积以M倍递增。则第R+2个子像素和第R个子像素的像素电极面积之比为M 2，此时n＝2；当N等于5时，第5个子像素和第1个子像素的像素电极面积之比 为M 4，此时n为最大值，n＝4＝N-1。在该实施例中，像素电极面积差距最大的两个子像素的像素电极面积之比为M N-1。在M为固定值时，采用该实施例的设计能够使得第R+1个子像素的像素电极面积和第R个子像素的像素电极面积之比最小，则单个像素的总面积最小，能够增大显示器件中设置的像素个数，提升分辨率。
在另一种实施例中，第R+1个子像素的像素电极面积与第R个子像素的像素电极面积之比为M 2，相当于N个子像素的像素电极面积以M 2倍递增。在该实施例中，当N＝5时，第5个子像素和第1个子像素、也即像素电极面积差距最大的两个子像素的像素电极面积之比为M 8，此时n为最大值，n＝8。
在另一种实施例中，第R+1个子像素的像素电极面积与第R个子像素的像素电极面积之比不为固定值，也就是说，N个子像素的像素电极面积不以等倍数递增。比如在N＝5时，第2个子像素和第1个子像素的像素电极面积之比为M，第3个子像素和第2个子像素的像素电极面积之比为M 2，第4个子像素和第3个子像素的像素电极面积之比为M，第5个子像素和第4个子像素的像素电极面积之比为M 3。
在一些实施方式中，第R+1个子像素的像素电极面积与第R个子像素的像素电极面积之比为X n。
以M＝4，N＝2为例。在一种实施例中，取X＝2，n＝1，则两个子像素的像素电极面积比为1；2。在另一种实施例中，取X＝3，n＝1，则两个子像素的像素电极面积比为1：3。在另一种实施例中，取X＝4，n＝1，则两个子像素的像素电极面积比为1：4。
以M＝6，N＝2为例。在一种实施例中，取X＝2，n＝1，则两个子像素的像素电极面积比为1；2。在另一种实施例中，取X＝3，n＝1，则两个子像素的像素电极面积比为1：3。在另一种实施例中，取X＝6，n＝1，则两个子像素的像素电极面积比为1：6。在另一种实施例中，取2＝6，n＝2，则两个子像素的像素电极面积比为1：4。
在一种实施例中，第R+1个子像素的像素电极面积与第R个子像素的像素电极面积之比为X。相当于N个子像素的像素电极面积以X倍递增。
本申请中一个像素包括N个像素电极面积不等的子像素，N个子像素能够分别显示M个灰阶，并且N个子像素中两个子像素的像素电极面积之比为X n，也就是说，两个子像素的像素电极面积之比与子像素能够显示的灰阶个数M相关，则N个子像素分别显示任意一个灰阶之后进行组合后作为一个像素的显示灰阶，能够增加像素显示的灰阶个数。而且当X＝M时，N个子像素分别显示任意一个灰阶之后进行组合时不存在重复的灰阶，一个像素通过N个子像素所显示灰阶进行组合能够显示M N个灰阶。也即，本申请中像素能够最多显示M N个灰阶。
图7为本申请中一种像素的灰阶对应的灰阶轨道排列组合方式。如图7所示的，M＝3，N＝2，也即一个像素包括两个子像素sP 1和sP 2，每个子像素能够显示3个灰阶，3个灰阶对应的灰阶轨道为Q 1、Q 2、Q 3。两个子像素的灰阶组合方式共包括9种，则该像素能够显示9个灰阶。
在显示时，根据待显示画面的数据信息对各子像素sP所显示的灰阶进行控制，以使得各子像素sP显示目标灰阶，目标灰阶为M个灰阶中的任意一个，则N个子像素所显示的灰阶进行组合能够呈现像素的显示灰阶，多个像素的显示灰阶进行组合进而实现一帧画面的显示。其中，通过控制子像素sP的像素电极上施加数据电压的极 性以及数据电压的持续时间、以使得子像素sP显示目标灰阶。
在本申请中通过N个子像素显示的灰阶进行组合来呈现像素的显示灰阶，仅需要控制每个子像素能够分别显示M个灰阶，就能够实现像素最多显示M N个灰阶，提升了显示的灰阶个数。与能够实现M N个灰阶显示的现有技术相比，能够极大的减小各灰阶对应的灰阶轨道的密集度，能够提升对灰阶控制的精度；而且能够减小像素完成所有灰阶之间自由切换所需的时间，在提升显示灰阶个数的同时对显示画面刷新率影响较小，保证动画播放的流畅性。
结合图5进行理解，像素P包括第1个子像素sP 1、第2个子像素sP 2、第3个子像素sP 3至第N-1个子像素sP N-1、第N个子像素sP N共N个子像素。可选的，由第1个子像素sP 1至第N个子像素sP N，像素电极1的面积逐渐递增。各子像素的像素电极面积在像素的总像素电极面积中的占比依次为P 1、P 2、P 3、…P N。其中，像素的总像素电极面积为N个子像素的像素电极面积之和。
本申请中每个子像素能够独立显示M个灰阶，即每个子像素均分别包括M个灰阶轨道，当像素可以显示M N个灰阶时，则像素可显示的灰阶个数可以看成是一个具有N位的M进制数，每一个M进制数的对应一个灰阶。在M进制数中，M个灰阶轨道分别对应0、1、2、…M-2、M-1。
图8为将像素可显示灰阶数等效为一个N位M进制数的示意图。如图8所示，第1个子像素sP 1的灰阶轨道S 1对应进制数的第1位，第2个子像素sP 2的灰阶轨道S 2对应进制数的第2位，第3个子像素sP 3的灰阶轨道S 3对应进制数的第3位，第R个子像素sP R的灰阶轨道S R对应进制数的第R位(R为不大于N的整数)，第N-2个子像素sP N-2的灰阶轨道S N-2对应进制数的第N-2位，第N-1个子像素sP N-1的灰阶轨道S N-1对应进制数的第N-1位，第N个子像素sP N的灰阶轨道S N对应进制数的第N位。则N个子像素的灰阶轨道的组合可以看成是一个N位的M进制数：S N S N- 1…S 2S 1，其中，S 1、S 2、…、S N分别取M进制数0到M-1中的任意一个整数。
N位的M进制数：S N S N-1…S 2S 1代表像素能够显示的M N个灰阶中的第y个灰阶，其灰阶的亮度占比表示为Gy。假设灰阶Gamma为1.0，即随着灰阶增加，亮度线性递增。则由M进制与十进制的转换关系可以得到以下公式：
y＝M 0*S 1+M 1*S 2+M 2*S 3+…+M R-1*S R+…+M N-3*S N-2+M N-2*S N-1+M N-1*S N   ①
Gy＝(M 0*S 1+M 1*S 2+M 2*S 3+…+M R-1*S R+…+M N-3*S N-2+M N-2*S N-1+M N-1*S N)/(M N-1)  ②
本申请中单个像素的总亮度是N个子像素的亮度之和，第R个子像素的亮度在像素总亮度中的占比L R可以表示为：L R＝S R*P R/(M-1)，其中，P R为第R个子像素的像素电极面积在像素的总像素电极面积中的占比。
则Gy与也可以表示为：
Gy＝S 1*P 1/(M-1)+S 2*P 2/(M-1)+S 3*P 3/(M-1)+…+S R*P R/(M-1)+…+S N-2*P N-2/(M-1)+S N-1*P N-1/(M-1)+S N*P N/(M-1)        ③
将公式②和③结合后，能够得到：
P R＝M R-1*(M-1)/(M N-1)        ④
在一种实施例中，第R个子像素的像素电极面积在像素的总像素电极面积中的占比P R＝X R-1*(X-1)/(X N-1)(公式⑤)，如此设置，则N个子像素的像素电极面积以X 倍递增，N个子像素分别显示任意一个灰阶之后进行组合后作为一个像素的显示灰阶，能够增加像素显示的灰阶个数。而且，当X＝M时，能够实现像素最多显示M N个灰阶，极大的提升显示器件的显示灰阶数量。
在一种实施例中，图9为本申请实施例提供的一种显示器件的示意图，图9中以N＝3为例，如图9所示，显示器件包括多条栅线Scan和多条数据线Data；一个像素P包括3个子像素sP。子像素sP包括开关晶体管4，开关晶体管4的输出端与像素电极1电连接。对于一个像素P：3个子像素sP的开关晶体管4的控制端与同一条栅线Scan电连接，3个子像素sP的开关晶体管4的输入端分别连接不同的数据线Data。在驱动显示器件显示时，栅线Scan提供扫描信号控制开关晶体管4开启，则数据线Data将数据电压信号写入到子像素sP的像素电极。电泳粒子在像素电极和公共电极之间形成的电泳电容的作用下发生移动，从而实现子像素sP的灰阶显示。可选的，子像素sP还包括存储电容，在开关晶体管4开启后，数据线Data将数据电压信号写入到像素电极上并将数据电压信号存储在存储电容上。该实施方式中，属于同一个像素P的N个子像素sP由同一条栅线Scan控制，且N个子像素sP的数据电压分别由不同的数据线Data提供。
在另一种实施例中，图10为本申请实施例提供的另一种显示器件的示意图，图10中以N＝3为例，如图10所示，显示器件包括多条栅线Scan和多条数据线Data；一个像素P包括3个子像素sP。对于一个像素P：3个子像素sP的开关晶体管4的控制端分别连接不同的栅线Scan，3个子像素sP的开关晶体管4的输入端连接同一条数据线Data，每个子像素sP的开关晶体管4的输出端连接各自对应的像素电极1。该实施方式中，属于同一个像素P的N个子像素sP分别由不同的栅线Scan控制，且N个子像素sP的数据电压由同一条数据线Data提供。
在一种实施例中，显示器件还包括驱动芯片，栅线Scan和数据线Data分别与驱动芯片电连接，在驱动显示器件工作时，由驱动芯片分别向栅线Scan和数据线Data提供相应的电压信号。
在显示器件中，驱动子像素显示目标灰阶时所需的数据电压大小和持续时间与上一帧画面显示中子像素所显示的灰阶相关。上一帧画面显示中子像素所显示的灰阶，相对于目标灰阶来说可以认为是子像素的初始灰阶，初始灰阶为M个灰阶中的任意一个，其中，目标灰阶可以与初始灰阶相同，或者目标灰阶和初始灰阶相差至少一个灰阶等级。
在显示时向公共电极上施加0V的恒定电压的实施例中，当子像素的目标灰阶与初始灰阶相同时，则控制向该子像素的像素电极上写入0V的数据电压，此时该子像素中的电泳粒子不移动，则子像素显示的灰阶与上一帧画面显示中该子像素所显示的灰阶相同。
当子像素的目标灰阶与初始灰阶相差至少一个灰阶等级时，则需要根据目标灰阶与初始灰阶的差异，控制向该子像素的像素电极上写入一定的数据电压并控制数据电压的满足一定的持续时间。其中，数据电压包括极性和大小。可选的，控制向像素电极写入的数据电压的大小和/或极性，并控制像素电极上数据电压的持续时间，以实现子像素由初始灰阶切换到目标灰阶。
在显示器件中所有的栅线Scan均提供一次扫描信号的时间定义为栅线提供扫描信号的扫描周期，在工作时完成一次扫描周期可以认为显示器件刷新一帧。对于一条栅线Scan来说，其在一个扫描周期内提供一次扫描信号。而一帧画面显示是指动态画面中完整显示一幅画面的图像信息。
在一些实施方式中，显示器件刷新一帧能够完成所有的子像素由初始灰阶到目标灰阶的切换，也即显示器件刷新一帧实现一帧画面显示。
在一些实施方式中，显示器件刷新一帧之后不能够完成所有子像素由初始灰阶到目标灰阶的切换，在此种情况下，显示器件还需要继续刷新，也就是栅线Scan继续提供扫描信号，以保证继续向子像素的像素电极写入数据电压。换句话说，需要延长数据电压的持续时间。在该实施方式中，显示器件需要刷新两帧或者多帧才能完成一帧画面显示。其中，数据电压的持续时间也可以理解为像素电极上数据电压的维持时间。
在一些实施方式中，在驱动本申请实施例提供的显示器件进行显示时，在一帧画面显示中，栅线Scan提供扫描信号控制开关晶体管4开启，以通过数据线Data向像素电极1提供数据电压；在数据电压的控制下，子像素sP由初始灰阶切换到目标灰阶；其中，数据电压的持续时间为T，T＝m*t，其中，m为不小于1的正整数，t为栅线Scan提供扫描信号的扫描周期。数据电压的持续时间与栅线Scan提供扫描信号的周期相关。栅线Scan提供一次扫描信号，则开关晶体管4开启一次，数据线Data向像素电极1提供一次数据电压。在扫描周期内像素电极1上写入一次数据电压之后，像素电极1上维持该数据电压的电压值。该实施方式中，子像素sP由初始灰阶切换到目标灰阶的用时为栅线Scan提供扫描信号的扫描周期t的整数倍。可选的，目标灰阶和初始灰阶之间相差的灰阶等级越多，则在控制灰阶切换时栅线提供扫描信号的次数越多，也即数据电压的持续时间越长。
在一些实施方式中，在一帧画面显示中，目标灰阶和初始灰阶相差x个灰阶等级，1≤x≤M-1，且x为整数；则控制子像素sp由初始灰阶切换到目标灰阶时，向该子像素sP的像素电极上写入数据电压的持续时间为x*T1，T1为目标灰阶和初始灰阶相差1个灰阶等级时数据电压的持续时间。
在一些实施方式中，在一帧画面显示中，目标灰阶和初始灰阶相差x个灰阶等级，当x≥2时，控制子像素sp由初始灰阶切换到目标灰阶时，通过调整数据电压大小控制向该子像素sP的像素电极上写入数据电压的持续时间小于x*T1。如此设置，能够缩短由初始灰阶切换到目标灰阶的时间。以图6示意的子像素sP包括3个灰阶轨道Q 1、Q 2和Q 3为例。在一帧画面显示中该子像素sP需要显示的目标灰阶为灰阶轨道Q 2对应的灰阶。而在显示该画面之前，该子像素sP的初始灰阶为灰阶轨道Q 1对应的灰阶。
在一种实施例中，图11为在灰阶切换前后子像素中电泳粒子状态的一种示意图。如图11所示，在栅线提供一次扫描信号之后，白色电泳粒子移动到灰阶轨道Q 2对应的位置，此时子像素sP显示灰阶轨道Q 2对应的灰阶。在由灰阶轨道Q 1切换到灰阶轨道Q 2过程中，数据电压的持续时间T＝1*t。可以理解，在由灰阶轨道Q 1切换到灰阶轨道Q 3过程中，数据电压的持续时间T＝2*t，m＝2。可选的，在该实施方式 中，目标灰阶和初始灰阶相差1个灰阶等级时数据电压的持续时间T1＝t。
在另一种实施例中，图12为在灰阶切换前后子像素中电泳粒子状态的另一种示意图。如图12所示，在栅线提供一次扫描信号之后，白色电泳粒子移动到灰阶轨道Q 2和灰阶轨道Q 1之间的位置，此时子像素sP显示灰阶轨道Q 2对应的灰阶和灰阶轨道Q 1对应的灰阶之间的亮度，并非目标灰阶；在栅线提供两次扫描信号之后，白色电泳粒子移动到灰阶轨道Q 2对应的位置，此时子像素sP显示灰阶轨道Q 2对应的灰阶。在由灰阶轨道Q 1切换到灰阶轨道Q 2过程中，数据电压的持续时间T＝2*t，m＝2。即完成相邻的灰阶等级之间的切换时，需要两个行扫描周期。可选的，该实施方式中，在由灰阶轨道Q 1切换到灰阶轨道Q 3过程中，数据电压的持续时间T＝4*t，m＝4，也即需要四个行扫描周期。
在一种实施例中，M＝2，N＝3，也即一个像素P包括3个子像素sP1、sP2、sP3，每个子像素均能独立显示2个灰阶，2个灰阶分别对应两个灰阶轨道Q 1和Q 2。以X＝M＝2为例，3个子像素中任意两个子像素的像素电极面积之比为2 n，比如为2、4、8等。具体的，根据上述公式⑤对像素电极面积进行设置为例进行说明。根据公式⑤得到3个子像素的像素电极面积在像素总像素电极面积的占比分别为1/7、2/7、4/7。在子像素包括黑色电泳粒子和白色电泳粒子的实施方式中，由于灰阶轨道总共有两个：Q 1、Q 2。灰阶轨道Q 1、Q 2对应的亮度分别为全黑(0)、全白(1)。子像素sP1对应灰阶轨道Q 1、Q 2所显示的亮度与像素P全白时的亮度之比分别为0、1/7；子像素sP2对应的灰阶轨道Q 1、Q 2所显示的亮度与像素P全白时的亮度之比分别为0、2/7，子像素sP3对应的灰阶轨道Q 1、Q 2下的亮度比分别为0、4/7。
图13本申请中一种像素的灰阶显示亮度组合示意图。如图13所示，通过排列组合可以得到8种灰阶亮度的组合，进而可以实现8个灰阶的显示。另外，根据上述相关说明可以知道，对于一个子像素来说，其灰阶轨道之间的切换时间与栅线提供扫描信号的扫描周期个数相关。所以对于只存在两个灰阶轨道Q 1、Q 2的子像素来说，如果栅线提供一次扫描信号能够完成在两个灰阶轨道之间进行切换，则控制在两个灰阶轨道之间切换在理想状况下仅需要执行一个扫描周期。以显示器件在85Hz刷新率的模式下工作为例，采用本申请实施例的设计，显示器件的画面刷新速率最高可达到85Hz。而对于传统的8灰阶显示来说，其每个像素的灰阶轨道数总共有8个，则灰阶轨道之间的切换时间最多需要7个扫描周期，因此其画面刷新速率最高只能到12Hz；并且由于其灰阶轨道数变多，其对应的灰阶控制精度相对较差。与传统的8灰阶显示相比本申请实施例可以有效地提升画面的刷新速率，并可以提高灰阶控制精度。
在另一种实施例中，M＝4，N＝2，也即一个像素P包括2个子像素sP1、sP2，每个子像素均能独立显示4个灰阶，4个灰阶分别对应两个灰阶轨道Q 1、Q 2、Q 3、Q 4。以X＝M＝4为例，2个子像素的像素电极面积之比为4 n，比如为4、16等。具体的，根据上述公式⑤对像素电极面积进行设置为例进行说明。根据公式⑤得到2个子像素的像素电极面积在像素总像素电极面积的占比分别为1/4、4/5。在子像素包括黑色电泳粒子和白色电泳粒子的实施方式中，由于灰阶轨道总共有4个：Q 1、Q 2、Q 3、Q 4，四个灰阶轨道分别对应的亮度分别为全黑(0)、1/3白(1/3)、2/3白 (2/3)、全白(1)。子像素sP1对应灰阶轨道Q 1、Q 2、Q 3、Q 4所显示的亮度与像素P全白时的亮度之比分别为0、1/15、2/15、3/15；子像素sP2对应的灰阶轨道Q 1、Q 2、Q 3、Q 4所显示的亮度与像素P全白时的亮度之比分别为0、4/15、8/15、12/15。
图14本申请中另一种像素的灰阶显示亮度组合示意图。如图14所示，通过排列组合可以得到16种灰阶亮度的组合，进而可以实现16个灰阶的显示。另外，每个子像素包括4个灰阶轨道，如果栅线提供一次扫描信号能够完成在相邻两个灰阶轨道之间进行切换，则控制在4个灰阶轨道之间切换在理想状况下最多需要执行三个扫描周期。以显示器件在85Hz刷新率的模式下工作为例，采用本申请实施例的设计，显示器件的画面刷新速率最高可达到28Hz。而对于传统的16灰阶显示来说，其每个像素的灰阶轨道数总共有16个，则灰阶轨道之间的切换时间最多需要15个扫描周期，因此其画面刷新速率最高只能到5～6Hz；并且由于其灰阶轨道数变多，其对应的灰阶控制精度相对较差。与传统的16灰阶显示相比本申请实施例可以有效地提升画面的刷新速率，并可以提高灰阶控制精度。在另一种实施例中，M＝3，N＝3，也即一个像素P包括3个子像素sP1、sP2、sP3，每个子像素均能独立显示3个灰阶，3个灰阶分别对应两个灰阶轨道Q 1、Q 2、Q 3。以X＝M＝3为例，3个子像素的像素电极面积之比为3 n，比如为3、9、27等。具体的，根据上述公式⑤对像素电极面积进行设置为例进行说明。根据公式⑤得到3个子像素的像素电极面积在像素总像素电极面积的占比分别为2/26、6/26、18/26。在子像素包括黑色电泳粒子和白色电泳粒子的实施方式中，由于灰阶轨道总共有3个：Q 1、Q 2、Q 3，3个灰阶轨道分别对应的亮度分别为全黑(0)、1/2白(1/2)、全白(1)。因此，子像素sP1对应灰阶轨道Q 1、Q 2、Q 3所显示的亮度与像素P全白时的亮度之比分别为0、1/26、2/26；子像素sP2对应的灰阶轨道Q 1、Q 2、Q 3所显示的亮度与像素P全白时的亮度之比分别为0、3/26、6/26；子像素sP3对应的灰阶轨道Q 1、Q 2、Q 3所显示的亮度与像素P全白时的亮度之比分别为0、9/26、18/26。
图15本申请中另一种像素的灰阶显示亮度组合示意图。如图15所示，通过排列组合可以得到27种灰阶亮度的组合，进而可以实现27个灰阶的显示。另外，每个子像素包括3个灰阶轨道，如果栅线提供一次扫描信号能够完成在相邻两个灰阶轨道之间进行切换，则控制在3个灰阶轨道之间切换在理想状况下最多需要执行两个扫描周期。以显示器件在85Hz刷新率的模式下工作为例，采用本申请实施例的设计，显示器件的画面刷新速率最高可达到42Hz。而对于传统的27灰阶显示来说，其每个像素的灰阶轨道数总共有27个，则灰阶轨道之间的切换时间最多需要26个扫描周期，因此其画面刷新速率最高只能到3Hz；并且由于其灰阶轨道数变多，其对应的灰阶控制精度较差。与传统的27灰阶显示相比本申请实施例可以有效地提升画面的刷新速率，并可以提高灰阶控制精度。
在另一种实施例中，M＝4，N＝2，也即一个像素P包括2个子像素sP1、sP2，每个子像素均能独立显示4个灰阶，4个灰阶分别对应两个灰阶轨道Q 1、Q 2、Q 3、Q 4。以X＝2<M为例，2个子像素的像素电极面积之比为2 n，比如为2、4等。具体的，当n＝1时，2个子像素的像素电极面积之比为2。根据公式⑤得到2个子像素的 像素电极面积在像素总像素电极面积的占比分别为1/3、2/3。在子像素包括黑色电泳粒子和白色电泳粒子的实施方式中，由于灰阶轨道总共有4个：Q 1、Q 2、Q 3、Q 4，四个灰阶轨道分别对应的亮度分别为全黑(0)、1/3白(1/3)、2/3白(2/3)、全白(1)。子像素sP1对应灰阶轨道Q 1、Q 2、Q 3、Q 4所显示的亮度与像素P全白时的亮度之比分别为0、1/9、2/9、3/9；子像素sP2对应的灰阶轨道Q 1、Q 2、Q 3、Q 4所显示的亮度与像素P全白时的亮度之比分别为0、2/9、4/9、6/9。
图16本申请中另一种像素的灰阶显示亮度组合示意图。如图16所示，通过排列组合存在重复的灰阶亮度，该实施方式可以得到10种灰阶亮度的组合，即可以实现10个灰阶的显示。
本申请实施例还提供另一种显示器件，如图9所示的，像素至少包括红色像素1P、绿色像素2P和蓝色像素3P。需要说明的是，本申请实施例中对于各种颜色像素的排布方式不做限定，图9中三种颜色像素的排布方式仅做示意性表示。通过本发明的设计，将每个像素划分成N个子像素，每个子像素能够独立显示M个灰阶，则每个像素能够独立显示X N个灰阶。能够提升显示的灰阶个数，从而增加彩色画面显示的色彩的丰富度。而且通过驱动子像素在灰阶在M个灰阶等级之间进行切换就能够实现最多显示M N个灰阶，能够减小像素完成所有灰阶之间自由切换所需的时间，在提升显示灰阶个数的同时对显示画面刷新率影响较小，保证动画播放的流畅性。
在一种实施例中，图17为本申请实施例提供的一种显示器件的截面简化示意图，如图17所示，显示器件包括滤光层3，滤光层3包括红色滤光单元31、绿色滤光单元32和蓝色滤光单元33；其中，红色像素1P包括红色滤光单元31、绿色像素2P包括绿色滤光单元32，蓝色像素3P包括蓝色滤光单元33。图17中还示意出了公共电极2和像素电极1。显示器件还包括基板5，其中，栅线、数据线、开关晶体管位于基板5。各像素还包括白色电泳粒子和黑色电泳粒子，其中，白色电泳粒子用白色填充表示，黑色电泳粒子用黑色填充表示。该实施方式通过设置彩色滤光单元以实现彩色显示。
在另一种实施例中，图18为本申请实施例提供的另一种显示器件的截面简化示意图，如图18所示，红色像素1P包括黑色电泳粒子和红色电泳粒子61，绿色像素2P包括黑色电泳粒子和绿色电泳粒子62，蓝色像素3P包括黑色电泳粒子和蓝色电泳粒子63。该实施方式通过在像素中设置彩色电泳粒子实现彩色显示。
本申请实施例中子像素的形状可以有多种设置方式。图5中示意子像素sP的像素电极1为条状，N个子像素sP沿同一方向依次排列。在一种实施例中，N个子像素sP按像素电极面积来看为随机排列。在另一种实施例中，N个子像素sP按像素电极面积逐渐递增(或者逐渐递减)的方式排列。
在另一种实施例中，图19为本申请实施例提供的显示器件中像素的另一种示意图，如图19所示，子像素sP的像素电极1为块状，N个子像素sP呈阵列排布。该实施方式中N个子像素sP排布成a行*b列的阵列。其中，行列的具体个数可根据实际需求进行设定。
在另一种实施例中，图20为本申请实施例提供的显示器件中像素的另一种示意图，如图20所示，至少部分子像素sP的像素电极1为环状，N个子像素sP嵌套排 布。可选的，N个子像素sP具有共同的对称中心。可选的，位于内部的一个子像素sP的像素电极形状可以为块状。图20中仅以部分子像素sP的像素电极1为矩形环进行示意，可选的，部分子像素sP的像素电极1也可以圆环、椭圆环或者多边形环。
在另一种实施例中，图21为本申请实施例提供的显示器件中像素的另一种示意图，如图21所示，至少部分子像素sP的像素电极1为L状，N个子像素sP中相邻的两个子像素sP：一个子像素sP半环绕另一个子像素sP设置。可选的，N个子像素sP中有一个子像素sP的像素电极1形状为块状。
此处像素电极1为L状是指像素电极的形状近似为L状，也可以说像素电极的形状类似为“7”。
本申请实施例还提供一种电子纸，包括本申请任意实施例提供的显示器件，对于显示器件的结构在上述实施例中已经说明，在此不再赘述。

Claims (12)

  1. 一种显示器件，其特征在于，包括：
    多个像素，所述像素包括像素电极面积互不相等的N个子像素，所述子像素能够显示M个灰阶，N和M均为不小于2的整数；其中，
    N个所述子像素中两个所述子像素的像素电极面积之比为X n，2≤X≤M，n为不小于1的整数。
  2. 根据权利要求1所述的显示器件，其特征在于，
    n≤N-1。
  3. 根据权利要求1所述的显示器件，其特征在于，
    N个所述子像素包括第1个子像素、第2个子像素、至第N个子像素；
    第R+1个子像素的像素电极面积与第R个子像素的像素电极面积之比为X，其中，1≤R≤N，R为整数。
  4. 根据权利要求3所述的显示器件，其特征在于，
    所述第R个子像素的像素电极面积在所述像素的总像素电极面积中的占比为P R，其中，P R＝X R-1*(X-1)/(X N-1)，1≤R≤N，R为整数。
  5. 根据权利要求1所述的显示器件，其特征在于，
    所述显示器件包括多条栅线和多条数据线；
    所述子像素包括开关晶体管，所述开关晶体管的输出端与像素电极电连接；
    N个所述子像素的所述开关晶体管的控制端连接同一条所述栅线，N个所述子像素的所述开关晶体管的输入端分别连接不同的所述数据线。
  6. 根据权利要求1所述的显示器件，其特征在于，
    所述显示器件包括多条栅线和多条数据线；
    所述子像素包括开关晶体管，所述开关晶体管的输出端与像素电极电连接；
    N个所述子像素的所述开关晶体管的输入端连接同一条所述数据线，N个所述子像素的所述开关晶体管的控制端分别连接不同的所述栅线。
  7. 根据权利要求1所述的显示器件，其特征在于，所述像素的结构为下述之一：
    所述子像素的像素电极为条状，N个所述子像素沿同一方向依次排列；
    所述子像素的像素电极为块状，N个所述子像素呈阵列排布；
    至少部分所述子像素的像素电极为环状，N个所述子像素嵌套排布；
    至少部分所述子像素的像素电极为L状，N个所述子像素中相邻的两个子像素：一个所述子像素半环绕另一个所述子像素设置。
  8. 根据权利要求1所述的显示器件，其特征在于，
    所述像素至少包括红色像素、绿色像素和蓝色像素；
    所述显示器件包括滤光层，所述滤光层包括红色滤光单元、绿色滤光单元和蓝色滤光单元；其中，
    所述红色像素包括所述红色滤光单元、所述绿色像素包括所述绿色滤光单元，所述蓝色像素包括所述蓝色滤光单元。
  9. 根据权利要求1所述的显示器件，其特征在于，
    所述像素至少包括红色像素、绿色像素和蓝色像素；
    所述红色像素包括黑色电泳粒子和红色电泳粒子，所述绿色像素包括黑色电泳粒子和绿色电泳粒子，所述蓝色像素包括黑色电泳粒子和蓝色电泳粒子。
  10. 一种显示器件的驱动方法，其特征在于，
    所述显示器件包括多个像素，所述像素包括像素电极面积互不相等的N个子像素，所述子像素能够显示M个灰阶，N和M均为不小于2的整数；其中，N个所述子像素中两个所述子像素的像素电极面积之比为X n，2≤X≤M，n为不小于1的整数；所述驱动方法包括：
    在一帧画面显示中：控制所述子像素的像素电极上数据电压的持续时间、以使得所述子像素显示目标灰阶，所述目标灰阶为M个灰阶中的任意一个；N个所述子像素所显示的灰阶进行组合呈现所述像素的显示灰阶。
  11. 根据权利要求10所述的驱动方法，其特征在于，
    所述显示器件包括多条栅线和多条数据线；所述子像素包括开关晶体管，所述开关晶体管的控制端与所述栅线电连接，所述开关晶体管的输入端与所述数据线电连接，所述开关晶体管的输出端与像素电极电连接；
    所述驱动方法还包括：在一帧画面显示之前，所述子像素显示初始灰阶，所述初始灰阶为M个灰阶中的任意一个；
    控制所述子像素的像素电极上数据电压的持续时间、以使得所述子像素显示目标灰阶，包括：
    所述栅线提供扫描信号控制所述开关晶体管开启，以通过所述数据线向所述像素电极写入数据电压；在所述数据电压的控制下，所述子像素由所述初始灰阶切换到所述目标灰阶；其中，所述数据电压的持续时间为T，T＝m*t，其中，m为不小于1的正整数，t为所述栅线提供扫描信号的扫描周期。
  12. 一种电子纸，其特征在于，包括权利要求1至9任一项所述的显示器件。
PCT/CN2022/125369 2021-10-18 2022-10-14 一种显示器件及其驱动方法和电子纸 WO2023066155A1 (zh)

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