WO2023051242A1 - 单光子探测器及其制作方法、单光子探测器阵列 - Google Patents

单光子探测器及其制作方法、单光子探测器阵列 Download PDF

Info

Publication number
WO2023051242A1
WO2023051242A1 PCT/CN2022/118649 CN2022118649W WO2023051242A1 WO 2023051242 A1 WO2023051242 A1 WO 2023051242A1 CN 2022118649 W CN2022118649 W CN 2022118649W WO 2023051242 A1 WO2023051242 A1 WO 2023051242A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
substrate
etching
ohmic contact
photon detector
Prior art date
Application number
PCT/CN2022/118649
Other languages
English (en)
French (fr)
Inventor
孙维忠
赵彦立
陈振锋
刘思远
刘超
邱姝颖
孙久国
陈文欣
Original Assignee
厦门市三安集成电路有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 厦门市三安集成电路有限公司 filed Critical 厦门市三安集成电路有限公司
Priority to JP2023538995A priority Critical patent/JP2024507428A/ja
Publication of WO2023051242A1 publication Critical patent/WO2023051242A1/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/107—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/1443—Devices controlled by radiation with at least one potential jump or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/0304—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention relates to the technical field of semiconductor devices, in particular to a single photon detector, a manufacturing method thereof, and a single photon detector array.
  • Light is composed of small energy units, that is, photons are the smallest unit of light.
  • the energy of a single photon is about 10-19 joules in the visible light or near-infrared band, and traditional photodetectors cannot effectively detect a single photon.
  • Single photon detectors have many advantages such as high sensitivity, high signal-to-noise ratio, and low temporal jitter. Therefore, single-photon detectors came into being.
  • Single-photon detection technology is widely used in weak light detection fields such as quantum key distribution, laser ranging, bioluminescent detection, and DNA reaction.
  • single photon detectors mainly include photomultiplier tubes (PMTs), superconducting single photon detectors, and single photon avalanche photodiodes (SPADs).
  • PMTs photomultiplier tubes
  • SPADs single photon avalanche photodiodes
  • the photomultiplier tube mainly uses the electron multiplication mechanism, which has the advantages of large gain and high sensitivity.
  • Highconducting single photon detectors mainly use the superconducting phase transition mechanism, which has the characteristics of high sensitivity and low noise, and has high detection efficiency.
  • the working environment is in an ultra-low temperature environment, which greatly limits its application in daily production and life. .
  • SPAD is mainly based on the collision ionization mechanism, using the avalanche effect to form a large macroscopically observable current. From the perspective of practicality, SPAD can work in the visible light band or near-infrared band, and has the advantages of high gain, high signal-to-noise ratio, low power consumption, and small size. It is currently the most widely used single photon with the greatest application potential. detector. In order to obtain a larger gain, SPAD generally works in the Geiger mode, that is, the working voltage is greater than the breakdown voltage, and there are problems such as edge breakdown.
  • Objects of the present invention include, for example, providing a single photon detector and its manufacturing method, and a single photon detector array, which can effectively suppress the problem of edge breakdown and reduce the complexity of the manufacturing process.
  • the present invention provides a method for manufacturing a single photon detector, the method comprising: sequentially growing multiple epitaxial layers on one side of the provided substrate, and the multi-layer epitaxial layers
  • the layers include a buffer layer, an absorption layer, a transition layer, a charge layer, a multiplication layer, an inversion layer, a migration layer, a window layer and an ohmic contact layer; an arc-shaped diffusion region is formed in the ohmic contact layer and the window layer by a diffusion process; Etching the edge of part of the epitaxial layer on the substrate to form a mesa structure; forming a light window on the back of the substrate for incident light; forming a P-type electrode on the ohmic contact layer, and An N-type electrode is formed on the back side of the substrate; wherein, the inversion layer is used for secondary regulation of the electric field distribution on the basis of the regulation of the charge layer.
  • the inversion layer is composed of one or more combinations of InP, InGaAs, InAlAs, InAlGaAs, and InGaAsP.
  • the integral charge density of the inversion layer is 2.0*e 12 /cm 2 to 4.0*e 12 /cm 2 .
  • the charge layer has a thickness of 150 nm to 300 nm
  • the multiplication layer has a thickness of 400 nm to 800 nm
  • the inversion layer has a thickness of 150 nm to 300 nm.
  • the step of forming an arc-shaped diffusion region in the ohmic contact layer and the window layer through a diffusion process includes: forming an etching layer on the ohmic contact layer; Define an etching area on the layer, and etch the etching layer based on the etching area to form an etching opening, and the etching opening exposes a part of the ohmic contact layer; based on the etching opening, use a diffusion process to The ohmic contact layer and the window layer undergo P-type diffusion to form a P-type doped arc-shaped diffusion region.
  • the step of etching at least part of the edge of the epitaxial layer on the substrate to form a mesa structure includes: the ohmic contact layer, the window layer, the migration layer, the reverse Type layer, multiplication layer, charge layer, transition layer, absorption layer, buffer layer and the edge of part of the substrate are etched to form a first mesa in the upper region of the substrate; the ohmic contact layer, window layer , the migration layer and the edges of the inversion layer are etched to form a second mesa in the area above the multiplication layer.
  • the The method further includes: forming a passivation layer on the first mesa and the second mesa, the passivation layer is made of a high-resistance polymer material, or is made of one or more of SiO 2 , SiNx, Al 2 O 3 kind of composition.
  • the step of forming a light window on the back of the substrate includes: performing etching treatment on the back surface of the substrate, and the thickness of the etching treatment is smaller than the thickness of the substrate.
  • the present invention provides a single photon detector, comprising: a substrate; a multilayer epitaxial layer sequentially formed on the substrate, the multilayer epitaxial layer including a buffer layer, an absorption layer, a transition layer, a charge layer, multiplication layer, inversion layer, migration layer, window layer, and ohmic contact layer, wherein an arc-shaped diffusion region is formed in the ohmic contact layer and window layer, and the edge of part of the epitaxial layer on the substrate is engraved etch to form a mesa structure; a light window formed on the back of the substrate for incident light; a P-type electrode formed on the ohmic contact layer, and an N-type electrode formed on the back of the substrate; Wherein, the inversion layer is used for secondary regulation of the electric field distribution on the basis of the regulation of the charge layer.
  • the mesa structure includes: the ohmic contact layer, window layer, migration layer, inversion layer, multiplication layer, charge layer, transition layer, absorption layer, buffer layer and part of the substrate etching the edges to form a first mesa in the upper region of the substrate, and etching the edges of the ohmic contact layer, window layer, migration layer and inversion layer to form a first mesa above the multiplication layer The area forms the second mesa.
  • the single photon detector further includes: a passivation layer grown on the first mesa and the second mesa, the passivation layer is made of a high-resistance polymer material, or is made of SiO 2. One or more of SiNx and Al 2 O 3 .
  • the inversion layer is composed of one or more combinations of InP, InGaAs, InAlAs, InAlGaAs, and InGaAsP.
  • the integral charge density of the inversion layer is 2.0*e 12 /cm 2 to 4.0*e 12 /cm 2 .
  • the charge layer has a thickness of 150 nm to 300 nm
  • the multiplication layer has a thickness of 400 nm to 800 nm
  • the inversion layer has a thickness of 150 nm to 300 nm.
  • the present invention provides a single-photon detector array, including a plurality of single-photon detectors described in the foregoing embodiments, and a plurality of the single-photon detectors are arranged in an array; a plurality of the single-photon detectors
  • the flip-chip welding process is adopted for integration into the readout circuit, and the P-type electrodes of the single-photon detectors are isolated from each other, and a plurality of the single-photon detectors share the N-type electrodes.
  • the application provides a single-photon detector and its manufacturing method, and a single-photon detector array, by sequentially growing a multi-layer epitaxial layer on one side of the provided substrate, the multi-layer epitaxial layer includes a buffer layer, an absorption layer, a transition layer, a charge Layer, multiplication layer, inversion layer, migration layer, window layer and ohmic contact layer, and form an arc-shaped diffusion region in the ohmic contact layer and window layer by diffusion process, and etch the edge of part of the epitaxial layer on the substrate A mesa structure is formed, a light window is formed on the back of the substrate, a P-type electrode is formed on the ohmic contact layer, and an N-type electrode is formed on the back of the substrate.
  • only one diffusion treatment combined with the inversion layer can effectively reduce the edge electric field in the diffusion area, thereby effectively suppressing the edge breakdown problem, and compared with the existing methods that require secondary diffusion treatment or secondary growth Therefore, the complexity of the manufacturing process is effectively reduced.
  • Fig. 1 is the structural representation of single photon detector in the prior art
  • FIG. 2 is a schematic diagram of the electric field distribution of a single photon detector in the prior art
  • Fig. 3 is another schematic structural diagram of a single photon detector in the prior art
  • Fig. 4 is the flow chart of the manufacturing method of the single photon detector provided by the embodiment of the present application.
  • 5 to 10 are schematic diagrams of device structures formed in various steps in the manufacturing method of the single photon detector provided by the embodiment of the present application;
  • Fig. 11 is a schematic diagram of the electric field distribution of the single photon detector provided by the embodiment of the present application.
  • FIG. 12 is a schematic diagram of a single photon detector array provided by an embodiment of the present application.
  • Icon 00-substrate; 10-buffer layer; 20-absorbing layer; 30-transition layer; 40-charge layer; 50-multiplication layer; 60-inversion layer; 70-transfer layer; 80-window layer; 90- Ohmic contact layer; 91-passivation layer; 92-antireflection film; 93-P-type electrode; 94-N-type electrode.
  • Common single photon detectors in the prior art mainly include two types.
  • the main manufacturing process of the first method includes sequentially forming a buffer layer, an absorption layer, a transition layer, a charge layer, a multiplication layer and an intrinsic layer on a substrate. Then two diffusion processes are used to form diffusion regions in the intrinsic layer, the multiplication layer and the charge layer, and the formed structure is shown in FIG. 1 .
  • the electric field distribution diagram of the structure formed in this way is shown in Figure 2.
  • the electric field is the strongest in the multiplication layer, and the absorption layer is relatively weak, which ensures that the multiplication layer can produce collisions Ionization, the absorption layer is not ionized, but it can ensure that the carriers migrate at the saturation speed and improve the response speed of the APD.
  • the single-photon detector formed in this way can effectively suppress the edge breakdown effect, but it needs to use two diffusion processes to form the PN junction, which has problems such as difficult process control and low yield, and it is difficult to make a large-area array structure.
  • the second method is to form a buffer layer, an absorption layer, a transition layer, a charge layer, a multiplication layer, and an intrinsic layer on the substrate in sequence, and then use a diffusion process to form a diffusion region in the intrinsic layer and the multiplication layer, and engrave
  • the charge layer is etched to form a mesa, and an indium phosphide layer is further formed on the etched mesa by secondary epitaxial growth technology, and the formed structure is shown in FIG. 3 .
  • the single photon detector formed by this method can effectively suppress the edge breakdown effect, but this method needs to adopt primary diffusion, combined with etching process and secondary epitaxy technology, and the secondary epitaxial growth interface is very difficult under high electric field conditions. control, there are problems such as complex manufacturing process and low yield.
  • the present application provides a single photon detector manufacturing method, by forming an inversion layer on the charge layer during one epitaxy, and using the inversion layer to control the electric field distribution twice regulation. Only one diffusion treatment combined with the inversion layer can effectively reduce the edge electric field in the diffusion area, thereby effectively suppressing the edge breakdown problem, and compared with the existing methods that require secondary diffusion treatment or secondary growth, it is more effective The complexity of the manufacturing process is reduced.
  • an embodiment of the present application provides a method for manufacturing a single-photon detector, which can be used for manufacturing a single-photon detector. The detailed process of the method will be described below.
  • step S110 on the side of the provided substrate 00, grow multi-layer epitaxial layers sequentially, and the multi-layer epitaxial layers include buffer layer 10, absorption layer 20, transition layer 30, charge layer 40, multiplication layer 50 , inversion layer 60 , migration layer 70 , window layer 80 and ohmic contact layer 90 .
  • Step S120 forming an arc-shaped diffusion region in the ohmic contact layer 90 and the window layer 80 through a diffusion process.
  • Step S130 etching part of the edge of the epitaxial layer on the substrate 00 to form a mesa structure.
  • Step S140 forming a light window on the back of the substrate 00 for incident light.
  • Step S150 forming a P-type electrode 93 on the ohmic contact layer 90 , and forming an N-type electrode 94 on the back of the substrate 00 .
  • the inversion layer 60 introduced in the epitaxial growth can further control the electric field distribution on the basis of the control of the charge layer 40 , and the finally obtained device structure is shown in FIG. 10 .
  • SPAD Single Photon Avalanche Photo Diode
  • SPAD Single Photon Avalanche Photo Diode
  • the back electrode of the SPAD is connected to the high potential
  • the upper electrode is connected to the low potential.
  • the incident light is incident from the side where the back electrode is located toward the upper electrode, absorbed in the absorbing layer 20 and generates electron-hole pairs, and the photo-generated holes pass through the multiplication layer 50 to generate more electron-hole pairs due to the avalanche effect.
  • the multiplication layer 50 can slow down the energy level difference between the absorption layer 20 and the charge layer 40
  • the carrier hysteresis caused by the discontinuity between energy bands.
  • the electric field of the migration layer 70 can be reduced, ensuring that the interface between the migration layer 70 and the window layer 80 works under the action of a lower electric field, and can effectively suppress the edge breakdown effect.
  • the internal electric field of the SPAD can be adjusted by the electric field strength of the charge layer 40 and the inversion layer 60, so that each layer of the SPAD in the depleted state has an appropriate electric field strength in order to realize the high-speed drift of the carrier, and at the same time Excessively high electric fields can be prevented from producing excessively large dark currents or producing harmful avalanche multiplication effects.
  • FIG. 11 is a schematic diagram of the electric field distribution of the single photon detector provided by the embodiment of the present application
  • the electric field intensity of the multiplication layer 50 is greater than 5*10 5 volts per centimeter (V/cm)
  • the absorption layer The electric field intensity of 20 is less than 1*10 5 V/cm
  • the electric field intensity of the migration layer 70 is less than 1*10 5 V/cm.
  • the manufacturing method of the single-photon detector provided in this embodiment only needs one diffusion treatment, combined with the inversion layer 60, can effectively suppress the problem of edge breakdown, does not require secondary growth, and has the advantages of simple process and high reliability. , High yield and other advantages. Compared with the prior art that requires two diffusions, or one diffusion combined with etching and secondary epitaxial growth, the complexity of the process can be reduced. This fabrication method is very suitable for fabrication of single-photon detector arrays.
  • the multi-layer epitaxial layer includes a buffer layer 10, an absorption layer 20, a transition layer 30, a charge layer 40, a multiplication layer 50, an inversion layer 60, and a migration layer 70.
  • the window layer 80 and the ohmic contact layer 90 can be sequentially formed by one epitaxial growth.
  • the inversion layer 60 may be composed of one or a combination of materials of InP, InGaAs, InAlAs, InAlGaAs, InGaAsP, and the inversion layer 60 may be a P-type doped layer. For example, it may be p-type InAlAs, specifically In 0.52 Al 0.48 As.
  • the integrated charge density of the inversion layer 60 is 2.0*e 12 /cm 2 to 4.0*e 12 /cm 2 , for example, 3.2*e 12 /cm 2 .
  • the thickness of the inversion layer 60 may be 150nm to 300nm, which can regulate the electric field and suppress edge breakdown.
  • the substrate 00 may be a highly doped n-type InP substrate 00, and in the above step of forming the buffer layer 10 on the substrate 00, the n-type buffer layer 10 may be formed on the substrate 00 by MOCVD technology .
  • the lattice coefficient of the buffer layer 10 should be similar to that of the substrate 00, for example, the buffer layer 10 can be an InP layer, and the thickness can be between 50 nm and 2000 nm.
  • the doping concentration range of the buffer layer 10 may be n-type 1*e 15 /cm 3 to 1*e 19 /cm 3 .
  • the thickness of the buffer layer 10 may be 1000 nm, and the doping concentration may be 1*e 18 /cm 3 .
  • the absorbing layer 20 formed on the buffer layer 10 can be made of n-type InGaAs material, and its thickness can range from 2000 nm to 2800 nm.
  • the thickness may be 2000 nm
  • the doping is intrinsic n-type doping.
  • the transition layer 30 can be an intrinsic layer with a 3-stage transition, can be made of InGaAsP material, and can have a thickness ranging from 10 nm to 300 nm. In this embodiment, the transition layer 30 can effectively improve the responsivity of the device.
  • the thickness of the charge layer 40 can be 150nm to 300nm, the charge layer 40 can be made of n-type InP material, and the integral charge density of the charge layer 40 is 2.4*e 12 /cm 2 to 4.8*e 12 /cm 2 , for example, it can be 2.4*e 12 /cm 2 e 12 /cm 2 , can regulate the electric field and suppress edge breakdown.
  • the multiplication layer 50 is the place where the charge carriers and lattices in the device undergo impact ionization.
  • the multiplication layer 50 includes but not limited to hole-type APD impact ionization materials such as InP, AlGaAsSb, and SiC.
  • the characteristic of the hole-type APD impact ionization material is that the material hole impact ionization coefficient is greater than the electron ionization coefficient.
  • the thickness of the multiplication layer 50 may range from 400nm to 800nm, for example, the multiplication layer 50 may be made of intrinsic InP material, and the thickness may be 500nm.
  • the migration layer 70 includes, but is not limited to, one material such as InP, InGaAs, InAlAs, InAlGaAs, InGaAsP, or a combination of two or more materials.
  • the migration layer 70 has a thickness ranging from 500 nm to 700 nm, for example, 500 nm.
  • the doping can be intrinsic n-type or n-type lightly doped, and the doping range can be n-type 1*e 15 /cm 3 to 1*e 17 /cm 3 .
  • the window layer 80 and the ohmic contact layer 90 can be completed by one diffusion process.
  • the diffusion concentration ranges from 1*e 17 /cm 3 to 5*e 19 /cm 3 .
  • the window layer 80 and the ohmic contact layer 90 can also be grown by MOCVD.
  • the doping concentration ranges from 1*e 17 /cm 3 to 5*e 19 /cm 3 .
  • the thickness of the window layer 80 is 1000 nm to 1500 nm.
  • the thickness of the ohmic contact layer 90 is 100 nm to 200 nm, for example, 100 nm.
  • the ohmic contact layer 90 is mainly used for P-type ohmic contact. The higher the doping concentration, the better the realization of ohmic contact. The thickness is not a key parameter, but the thickness should not be too thick, otherwise it will affect the diffusion rate of P-type doping.
  • an arc-shaped diffusion region can be formed in the ohmic contact layer 90 and the window layer 80 in the following manner: an etching layer is formed on the ohmic contact layer 90 Defining an etching area on the etching layer, and etching the etching layer based on the etching area to form an etching opening, and the etching opening exposes a part of the ohmic contact layer 90; based on the Etching the opening uses a diffusion process to perform P-type diffusion on the ohmic contact layer 90 and the window layer 80 to form a P-type doped arc-shaped diffusion region.
  • an etching layer may be formed on the ohmic contact layer 90 by plasma chemical vapor deposition (plasma enhanced chemical vapor deposition, PECVD), and the etching layer may be a silicon dioxide (SiO 2 ) or SiNx film, The thickness of the formed etching layer may be 400 nm.
  • PECVD plasma chemical vapor deposition
  • PECVD plasma enhanced chemical vapor deposition
  • An etching area is defined on the etching layer, and the etching area may be a central position of the etching layer, such as a circular area at the central position.
  • the etching layer can be etched based on the etching area by using a grayscale exposure process and an etching process, so as to form an etching opening penetrating through the etching layer.
  • P-type diffusion is performed on the ohmic contact layer 90 and the lower window layer 80 to form a P-type doped arc-shaped diffusion region.
  • the remaining etch layer can be stripped and the device cleaned.
  • the mesa structure in the above step S130, can be formed in the following manner: for the ohmic contact layer 90, the window layer 80, the migration layer 70, the inversion layer 60, the multiplication layer 50, the charge layer 40, The edges of the transition layer 30, the absorption layer 20, the buffer layer 10, and part of the substrate 00 are etched to form a first mesa in the upper region of the substrate 00; the ohmic contact layer 90, the window layer 80, and the migration The edges of layer 70 and inversion layer 60 are etched to form a second mesa in the area above said multiplication layer 50 .
  • the ohmic contact layer 90 above the substrate 00, the window layer 80, the migration layer 70, the inversion layer 60, the multiplication layer 50, the charge layer 40, the transition layer 30, the absorption layer 20, the buffer layer 10 and Part of the edge of the substrate 00 is etched.
  • the etching process can be performed by dry etching, wet etching or a combination of both, so as to form the first mesa on the substrate 00 .
  • the ohmic contact layer 90 can be etched with a sulfuric acid solution, because in this embodiment, the window layer 80 is an InP layer, and it is easy to corrode the window if a hydrochloric acid solution is used. Layer 80.
  • the first mesa is formed on the substrate 00 so that the single-photon detectors can be isolated from each other when an array is formed based on a plurality of single-photon detectors.
  • the etching width may be between 1 micron and 100 microns, for example, 5 microns. That is, the distance between the single photon detectors in the subsequent arrays is between 1 micron and 100 microns.
  • the edges of the ohmic contact layer 90, the window layer 80, the migration layer 70 and the inversion layer 60 are etched to form a second mesa in the area above the multiplication layer 50, so as to form the device described in FIG. 7 structure.
  • the edges of the ohmic contact layer 90, the window layer 80, the migration layer 70, and the inversion layer 60 can be etched by dry etching, wet etching, or a combination of the two, and the etching stops at
  • the surface of the multiplication layer 50 forms a second mesa in the area above the multiplication layer 50, which can achieve the effects of large area absorption and small size multiplication, thereby achieving the beneficial effects of increasing light detection efficiency and reducing dark counts.
  • a sulfuric acid solution can be used to etch the ohmic contact layer 90, avoiding the problem that the InP window layer 80 is easily corroded by a hydrochloric solution, so as to ensure that the multiplication layer
  • the area above 50 forms a table top.
  • the manufacturing method provided by this embodiment further includes the following steps: forming a passivation layer 91 on the first mesa and the second mesa.
  • the passivation layer 91 can be formed on the first mesa and the second mesa by using the PECVD process, and the passivation layer 91 is made of a high-resistance polymer material, or is made of One or more components of .
  • the passivation layer 91 is formed on sidewalls and horizontal planes of the first and second mesas.
  • the passivation layer 91 may have a thickness of 5 nm to 3000 nm to passivate the mesas.
  • a SiNx film can be prepared by PECVD process with a film thickness of 500 nm.
  • forming the passivation layer 91 can passivate the mesas, which can achieve the effect of reducing dark current.
  • a light window can be formed on the back of the substrate 00 in the following manner: the back of the substrate 00 is etched, and the thickness of the etching is less than that of the substrate. The thickness of the bottom 00; an anti-reflection film 92 is grown on the etched area of the substrate 00 to form a light window.
  • the grown anti-reflection film 92 may be silicon dioxide (SiO 2 ), SiNx or other similar optical films.
  • PECVD can be used to prepare SiNx films with a film thickness of 1600 nm.
  • the light window formed by the anti-reflection film 92 can be used for incident light.
  • the channel region corresponding to the light window in the upper region is the active region of the device.
  • the P-type electrode 93 of titanium (Ti), platinum (Pt) or gold (Au) material can be produced by electron beam evaporation or similar methods, and the P-type electrode 93 is located over the active area of the device.
  • the P-type electrodes 93 of individual detectors in the single photon detector array are isolated from each other.
  • the P-type electrode 93 covers the entire active area of the device, and can also be used as a metal reflector, so that light incident on the substrate 00 side is reflected here, thereby improving the quantum efficiency of the detector.
  • the substrate 00 can be thinned, and the N-type electrode 94 can be fabricated in a large area on the back of the thinned substrate 00 .
  • all the single photon detectors in the array share the N-type electrode 94 . Good ohmic contact characteristics and reliability of the single photon detector are guaranteed.
  • an inversion layer 60 is introduced into the epitaxial structure of the epitaxial growth, which is used for secondary regulation of the electric field distribution on the basis of the regulation of the charge layer 40, which can reduce the electric field at the edge of the diffusion region, thereby effectively suppressing Edge breakdown and other issues.
  • the embodiment of the present application also provides a single photon detector manufactured by the above manufacturing method, as shown in FIG. 10 .
  • the single photon detector comprises a substrate 00, and a multilayer epitaxial layer sequentially formed on the substrate 00, and the multilayer epitaxial layer includes a buffer layer 10, an absorption layer 20, a transition layer 30, a charge layer 40, a multiplication layer 50, an inversion layer layer 60 , migration layer 70 , window layer 80 and ohmic contact layer 90 .
  • arc-shaped diffusion regions are formed in the ohmic contact layer 90 and the window layer 80 . Edges of part of the epitaxial layer on the substrate 00 are etched to form mesa structures.
  • the single photon detector also includes a light window formed on the back of the substrate 00 for incident light. It also includes a P-type electrode 93 formed on the ohmic contact layer 90 and an N-type electrode 94 formed on the back of the substrate 00 .
  • the inversion layer 60 can be used to adjust the electric field distribution on the basis of the adjustment of the charge layer 40 .
  • the introduced inversion layer 60 can reduce the electric field at the edge of the diffusion region, thereby effectively suppressing the problem of edge breakdown.
  • the single photon detector provided in this embodiment can be obtained by primary diffusion and epitaxy of the inversion layer 60 , without the need for mesa etching and secondary growth, and has the advantages of simple process, high reliability, and high yield.
  • the mesa structure includes a first mesa and a second mesa, wherein the first mesa is an ohmic contact layer 90, a window layer 80, a migration layer 70, an inversion layer 60, a multiplication layer 50, and a charge layer 40 , the transition layer 30 , the absorption layer 20 , the buffer layer 10 and part of the edges of the substrate 00 are etched to form a first mesa in the upper region of the substrate 00 .
  • the second mesa is formed by etching the edges of the ohmic contact layer 90 , the window layer 80 , the migration layer 70 and the inversion layer 60 to form the second mesa in the area above the multiplication layer 50 .
  • the first mesa is formed on the substrate 00 so that the single-photon detectors can be isolated from each other when an array is formed based on a plurality of single-photon detectors.
  • the etching width of the first mesa may be between 1 micron and 100 microns, for example, 5 microns. That is, the distance between the single photon detectors in the subsequent arrays is between 1 micron and 100 microns.
  • the second mesa is formed in the area above the multiplication layer 50, which can achieve the effects of large-area absorption and small-scale multiplication, thereby achieving the beneficial effects of increasing light detection efficiency and reducing dark counts.
  • the single photon detector further includes a passivation layer 91 grown on the first mesa and the second mesa, and the passivation layer 91 is made of a high-resistance polymer material, or is made of SiO 2 , SiNx, Al 2 One or more components of O 3 .
  • the thickness of the passivation layer 91 may be 5 nm to 3000 nm, for example, a SiNx film may be prepared by PECVD process, and the film thickness is 500 nm.
  • forming the passivation layer 91 can passivate the mesas, which can achieve the effect of reducing dark current.
  • the light window on the back of the substrate 00 includes a groove formed on the back of the substrate 00 and an anti-reflection film 92 inside the groove.
  • the groove is formed by etching the back side of the substrate 00 .
  • the grown anti-reflection film 92 can be silicon dioxide (SiO 2 ), SiNx or other similar optical films.
  • PECVD can be used to prepare SiNx films with a film thickness of 1600 nm.
  • the light window formed by the anti-reflection film 92 can be used for incident light.
  • the channel region corresponding to the light window in the upper region is the active region of the device.
  • the P-type electrode 93 can be made of titanium (Ti), platinum (Pt) or gold (Au).
  • Ti titanium
  • Pt platinum
  • Au gold
  • the P-type electrode 93 covers the entire active area of the device, and can also be used as a metal mirror, so that the substrate Light incident on the 00 side is reflected here, thereby improving the quantum efficiency of the detector.
  • the inversion layer 60 is composed of one or more combinations of InP, InGaAs, InAlAs, InAlGaAs, and InGaAsP, and the inversion layer 60 may be a P-type doped layer.
  • the inversion layer 60 may be p-type InAlAs, specifically In 0.52 Al 0.48 As.
  • the integrated charge density of the inversion layer 60 is 2.0*e 12 /cm 2 to 4.0*e 12 /cm 2 , for example, 3.2*e 12 /cm 2 .
  • the thickness of the inversion layer 60 may be 150nm to 300nm, which can regulate the electric field and suppress edge breakdown.
  • the substrate 00 may be a highly doped n-type InP substrate 00 .
  • the lattice coefficient of the buffer layer 10 should be similar to that of the substrate 00 , for example, the buffer layer 10 can be an InP layer with a thickness between 50 nm and 2000 nm.
  • the doping concentration range of the buffer layer 10 may be n-type 1*e 15 /cm 3 to 1*e 19 /cm 3 .
  • the thickness of the buffer layer 10 may be 1000 nm, and the doping concentration may be 1*e 18 /cm 3 .
  • the absorbing layer 20 formed on the buffer layer 10 can be made of n-type InGaAs material with a thickness ranging from 2000 nm to 2800 nm, for example, the thickness can be 2000 nm, and the doping is intrinsic n-type doping.
  • the transition layer 30 can be an intrinsic layer with a 3-stage transition, can be made of InGaAsP material, and can have a thickness ranging from 10 nm to 300 nm. In this embodiment, the transition layer 30 can effectively improve the responsivity of the device.
  • the thickness of the charge layer 40 can be 150nm to 300nm, the charge layer 40 can be made of n-type InP material, and the integral charge density of the charge layer 40 is 2.4*e 12 /cm 2 to 4.8*e 12 /cm 2 , for example, it can be 2.4*e 12 /cm 2 e 12 /cm 2 , can regulate the electric field and suppress edge breakdown.
  • the multiplication layer 50 includes, but is not limited to, hole-type APD impact ionization materials such as InP, AlGaAsSb, and SiC.
  • the characteristic of the hole-type APD impact ionization material is that the material hole impact ionization coefficient is greater than the electron ionization coefficient.
  • the multiplication layer 50 is the place where the charge carriers and lattices in the device undergo impact ionization.
  • the thickness of the multiplication layer 50 can range from 400nm to 800nm.
  • the multiplication layer 50 can be made of intrinsic InP material, and the thickness can be 500nm.
  • the migration layer 70 includes, but is not limited to, one material such as InP, InGaAs, InAlAs, InAlGaAs, InGaAsP, or a combination of two or more materials.
  • the migration layer 70 has a thickness ranging from 500 nm to 700 nm, for example, 500 nm.
  • the doping can be intrinsic n-type or n-type lightly doped, and the doping range can be n-type 1*e 15 /cm 3 to 1*e 17 /cm 3 .
  • the diffusion concentration in the window layer 80 and the ohmic contact layer 90 ranges from 1*e 17 /cm 3 to 5*e19/cm 3 .
  • the doping concentration ranges from 1*e 17 /cm 3 to 5*e 19 /cm 3 .
  • the thickness of the window layer 80 is 1000 nm to 1500 nm.
  • the thickness of the ohmic contact layer 90 is 100 nm to 200 nm, for example, 100 nm.
  • the ohmic contact layer 90 is mainly used for P-type ohmic contact. The higher the doping concentration, the better the realization of ohmic contact. Its thickness is not a key parameter, but the thickness should not be too thick, otherwise it will affect the diffusion rate of P-type doping.
  • the single-photon detector provided in this embodiment is manufactured by the above-mentioned single-photon detector manufacturing method, and has the same characteristics as the detector formed in the above-mentioned manufacturing method. Therefore, for details not detailed in this embodiment, please refer to the above-mentioned Relevant descriptions in the embodiment are not repeated in this embodiment.
  • the embodiment of the present application also provides a single-photon detector array
  • the single-photon detector array includes a plurality of single-photon detectors in any one of the above-mentioned implementation modes, and the plurality of single-photon detectors are arranged in an array cloth.
  • Multiple single-photon detectors are integrated into the readout circuit by flip-chip welding, the P-type electrodes 93 of each single-photon detector are isolated from each other, and the N-type electrodes 94 are shared by multiple single-photon detectors.
  • each single photon detector in the array adopts a flip-chip welding process
  • the N-type electrode 94 is connected to a high potential
  • the P-type electrode 93 is connected to a low potential.
  • Each single photon detector is isolated from each other by an isolation groove, which is formed by the first mesa formed by etching the epitaxial layer above the substrate 00 and part of the substrate 00 .
  • the surface of the single photon detector array is covered by an N-type electrode 94, driven by a readout circuit, and light is incident from the back of the device.
  • the single photon detector array undergoes signal processing to realize the single photon detection function.
  • the single-photon detector array provided in this embodiment has the characteristics of large photosensitive area and small gain area, realizes large-area absorption and small size multiplication, and can further reduce dark counts on the premise of increasing light detection efficiency.
  • the single-photon detector array provided in this embodiment is composed of a plurality of single-photon detectors in any of the above-mentioned embodiments, and has the same characteristics as the above-mentioned single-photon detectors. Therefore, for details that are not detailed in this embodiment, please refer to Relevant descriptions in the foregoing embodiments are not repeated here in this embodiment.
  • the multi-layer epitaxial layers include a buffer layer 10 , absorption layer 20, transition layer 30, charge layer 40, multiplication layer 50, inversion layer 60, migration layer 70, window layer 80 and ohmic contact layer 90, and are formed in ohmic contact layer 90 and window layer 80 by diffusion process
  • the arc-shaped diffusion region etches the edge of part of the epitaxial layer on the substrate 00 to form a mesa structure, forms a light window on the back of the substrate 00, and forms a P-type electrode 93 on the ohmic contact layer 90, and forms a P-type electrode 93 on the substrate 00
  • An N-type electrode 94 is formed on the rear surface.
  • the edge electric field in the diffusion region can be effectively reduced by only one diffusion treatment combined with the inversion layer 60, thereby effectively suppressing the problem of edge breakdown, and compared with the existing ones that require secondary diffusion treatment or secondary growth In terms of methods, the complexity of the manufacturing process is effectively reduced.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Light Receiving Elements (AREA)

Abstract

本申请提供一种单光子探测器及其制作方法、单光子探测器阵列，通过在提供的衬底一侧依次生长多层外延层，包括缓冲层、吸收层、过渡层、电荷层、倍增层、反型层、迁移层、窗口层和欧姆接触层，并通过扩散工艺在欧姆接触层和窗口层内形成弧形扩散区，对衬底上的部分外延层的边缘进行刻蚀以形成台面结构，在衬底背面形成光窗口，并在欧姆接触层上形成P型电极、在衬底背面形成N型电极。本方案中，仅需通过一次扩散处理并结合反型层，即可有效降低扩散区域边缘电场，进而有效抑制边缘击穿问题，且相比现有的需要二次扩散处理或二次生长的方式而言，有效降低了制作工艺的复杂性。

Description

单光子探测器及其制作方法、单光子探测器阵列 技术领域
本发明涉及半导体器件技术领域，具体而言，涉及一种单光子探测器及其制作方法、单光子探测器阵列。
 背景技术
光是由一个个小能量单元构成，即光子是光的最小组成单位。单个光子的能量在可见光或近红外波段大概是10-19焦耳，传统的光电探测器无法实现对单个光子的有效探测。单光子探测器具有灵敏度高、信噪比高和时间抖动低等众多优势。因此，单光子探测器应运而生。单光子探测技术广泛应用于量子密钥分发、激光测距、生物荧光检测、DNA反应等弱光探测领域。
目前，单光子探测器主要包括光电倍增管(PMT)、超导单光子探测器和单光子雪崩光电二极管(SPAD)等。其中光电倍增管主要利用电子倍增机制，具有增益大，灵敏度高等优点，其增益可以达到104~108，缺点是对于1200 nm以上的光谱响应很差，而且尺寸较大，暗计数较大，并不能满足现阶段的单光子探测需求。超导单光子探测器主要利用超导相变机制，兼具灵敏度高和低噪声的特点，具有较高的探测效率，但工作环境处于超低温环境，大大限制了其在日常生产和生活中的应用。SPAD主要基于碰撞离化机制，利用雪崩效应形成一个较大的宏观可观测电流。从实用性上考虑，SPAD可以工作在可见光波段或者近红外波段，具有高增益和高信噪比、功耗低，体积小等优点，是目前用途最广，也是应用潜力最大的一种单光子探测器。为了获得较大的增益，SPAD一般工作在盖格模式下，即工作电压大于击穿电压，存在边缘击穿等问题。
 技术解决方案
本发明的目的包括，例如，提供了一种单光子探测器及其制作方法、单光子探测器阵列，其能够有效抑制边缘击穿问题且降低制作工艺的复杂性。
本发明的实施例可以这样实现：第一方面，本发明提供一种单光子探测器的制作方法，所述方法包括：在提供的衬底一侧依次生长多层外延层，所述多层外延层包括缓冲层、吸收层、过渡层、电荷层、倍增层、反型层、迁移层、窗口层和欧姆接触层；通过扩散工艺在所述欧姆接触层和窗口层内形成弧形扩散区；对所述衬底上的部分外延层的边缘进行刻蚀，以形成台面结构；在所述衬底背面形成光窗口，以供入射光入射；在所述欧姆接触层上形成P型电极，并在所述衬底背面形成N型电极；其中，所述反型层用于在所述电荷层的调控基础上，对电场分布进行二次调控。
在可选的实施方式中，所述反型层由InP、InGaAs、InAlAs、InAlGaAs、InGaAsP中的一种或多种组合所构成。
在可选的实施方式中，所述反型层的积分电荷密度为2.0*e 12/cm 2至4.0*e 12/cm 2。
在可选的实施方式中，所述电荷层的厚度为150nm至300nm，所述倍增层的厚度为400nm至800nm，所述反型层的厚度为150nm至300nm。
在可选的实施方式中，所述通过扩散工艺在所述欧姆接触层和窗口层内形成弧形扩散区的步骤，包括：在所述欧姆接触层上形成刻蚀层；在所述刻蚀层上定义刻蚀区域，并基于所述刻蚀区域对所述刻蚀层进行刻蚀形成刻蚀开口，所述刻蚀开口暴露出部分欧姆接触层；基于所述刻蚀开口采用扩散工艺对所述欧姆接触层和窗口层进行P型扩散以形成P型掺杂的弧形扩散区。
在可选的实施方式中，所述对所述衬底上的至少部分外延层的边缘进行刻蚀，以形成台面结构的步骤，包括：对所述欧姆接触层、窗口层、迁移层、反型层、倍增层、电荷层、过渡层、吸收层、缓冲层及部分衬底的边缘进行刻蚀，以在所述衬底的上方区域形成第一台面；对所述欧姆接触层、窗口层、迁移层和反型层的边缘进行刻蚀，以在所述倍增层的上方区域形成第二台面。
在可选的实施方式中，所述对所述欧姆接触层、窗口层、迁移层和反型层的边缘进行刻蚀，以在所述倍增层的上方区域形成第二台面的步骤之后，所述方法还包括：在所述第一台面和第二台面上形成钝化层，所述钝化层为高阻聚合物材料构成，或者由SiO 2、SiNx、Al 2O 3中的一个或多种构成。
在可选的实施方式中，所述在所述衬底背面形成光窗口的步骤，包括：对所述衬底的背面进行腐蚀处理，腐蚀处理的厚度小于所述衬底的厚度。
第二方面，本发明提供一种单光子探测器，包括：衬底；依次形成于所述衬底上的多层外延层，所述多层外延层包括缓冲层、吸收层、过渡层、电荷层、倍增层、反型层、迁移层、窗口层和欧姆接触层，其中，所述欧姆接触层和窗口层内形成有弧形扩散区，所述衬底上的部分外延层的边缘被刻蚀以形成有台面结构；形成于所述衬底背面的光窗口，以供入射光入射；形成于所述欧姆接触层上的P型电极，及形成于所述衬底背面的N型电极；其中，所述反型层用于在所述电荷层的调控基础上，对电场分布进行二次调控。
在可选的实施方式中，所述台面结构包括：对所述欧姆接触层、窗口层、迁移层、反型层、倍增层、电荷层、过渡层、吸收层、缓冲层及部分衬底的边缘进行刻蚀以在所述衬底的上方区域形成的第一台面，以及对所述欧姆接触层、窗口层、迁移层和反型层的边缘进行刻蚀，以在所述倍增层的上方区域形成的第二台面。
在可选的实施方式中，所述单光子探测器还包括：生长于所述第一台面和第二台面上的钝化层，所述钝化层为高阻聚合物材料构成，或者由SiO 2、SiNx、Al 2O 3中的一个或多种构成。
在可选的实施方式中，所述反型层由InP、InGaAs、InAlAs、InAlGaAs、InGaAsP中的一种或多种组合所构成。
在可选的实施方式中，所述反型层的积分电荷密度为2.0*e 12/cm 2至4.0*e 12/cm 2。
在可选的实施方式中，所述电荷层的厚度为150nm至300nm，所述倍增层的厚度为400nm至800nm，所述反型层的厚度为150nm至300nm。
第三方面，本发明提供一种单光子探测器阵列，包括多个前述实施方式所述的单光子探测器，多个所述单光子探测器呈阵列排布；多个所述单光子探测器采用倒装焊工艺集成于读出电路，各所述单光子探测器P型电极之间相互隔离，多个所述单光子探测器共用N型电极。
 有益效果
本申请提供一种单光子探测器及其制作方法、单光子探测器阵列，通过在提供的衬底一侧依次生长多层外延层，多层外延层包括缓冲层、吸收层、过渡层、电荷层、倍增层、反型层、迁移层、窗口层和欧姆接触层，并通过扩散工艺在欧姆接触层和窗口层内形成弧形扩散区，对衬底上的部分外延层的边缘进行刻蚀形成台面结构，在衬底背面形成光窗口，并在欧姆接触层上形成P型电极、在衬底背面形成N型电极。本方案中，仅需通过一次扩散处理并结合反型层，即可有效降低扩散区域边缘电场，进而有效抑制边缘击穿问题，且相比现有的需要二次扩散处理或二次生长的方式而言，有效降低了制作工艺的复杂性。
 附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，应当理解，以下附图仅示出了本发明的某些实施例，因此不应被看作是对范围的限定，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他相关的附图。
图1为现有技术中的单光子探测器的结构示意图；
图2 为现有技术中单光子探测器的电场分布示意图；
图3为现有技术中的单光子探测器的另一结构示意图；
图4为本申请实施例提供的单光子探测器的制作方法的流程图；
图5至图10为本申请实施例提供的单光子探测器的制作方法中各个步骤所形成的器件结构示意图；
图11为本申请实施例提供的单光子探测器的电场分布示意图；
图12为本申请实施例提供的单光子探测器阵列的示意图。
图标：00-衬底；10-缓冲层；20-吸收层；30-过渡层；40-电荷层；50-倍增层；60-反型层；70-迁移层；80-窗口层；90-欧姆接触层；91-钝化层；92-增透膜；93-P型电极；94-N型电极。
 本发明的实施方式
现有技术中常见的单光子探测器主要包括两种类型，第一种方式主要制作工艺包括在衬底上依次形成缓冲层、吸收层、过渡层、电荷层、倍增层以及本征层。再采用两次扩散工艺在本征层、倍增层和电荷层形成扩散区域，形成的结构如图1中所示。这种方式所形成的结构的电场分布图如图2中所示，根据图2所示，在电荷层作用下，电场在倍增层最强，吸收层相对较弱，保证了倍增层能产生碰撞离化，吸收层不离化，但能保证载流子以饱和速度迁移，提高APD的响应速度。该方式形成的单光子探测器可以有效抑制边缘击穿效应，但是需要采用两次扩散工艺形成PN结，存在工艺难以控制、成品率低等问题，并且难以做成大面积阵列结构。
此外，第二种方式是在衬底上依次形成缓冲层、吸收层、过渡层、电荷层、倍增层及本征层后，采用扩散工艺在本征层、倍增层内形成扩散区域，并刻蚀电荷层形成台面，进一步通过二次外延生长技术在刻蚀的台面上形成磷化铟层，形成的结构如图3中所示。通过该方式所形成的单光子探测器可以有效抑制边缘击穿效应，但是这种方式需要采用一次扩散，并结合刻蚀工艺和二次外延技术，二次外延生长界面在高电场条件下非常难控制，存在制作工艺复杂，成品率低等问题。
基于上述研究发现，本申请提供一种单光子探测器制作方法，通过在一次外延时在电荷层上形成反型层，利用反型层在电荷层的调控基础上，对电场分布进行二次调控。仅需通过一次扩散处理并结合反型层，即可有效降低扩散区域边缘电场，进而有效抑制边缘击穿问题，且相比现有的需要二次扩散处理或二次生长的方式而言，有效降低了制作工艺的复杂性。
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。通常在此处附图中描述和示出的本发明实施例的组件可以以各种不同的配置来布置和设计。
因此，以下对在附图中提供的本发明的实施例的详细描述并非旨在限制要求保护的本发明的范围，而是仅仅表示本发明的选定实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
应注意到：相似的标号和字母在下面的附图中表示类似项，因此，一旦某一项在一个附图中被定义，则在随后的附图中不需要对其进行进一步定义和解释。
在本发明的描述中，需要说明的是，若出现术语“上”、“下”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，或者是该发明产品使用时惯常摆放的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。
此外，若出现术语“第一”、“第二”等仅用于区分描述，而不能理解为指示或暗示相对重要性。
需要说明的是，在不冲突的情况下，本发明的实施例中的特征可以相互结合。
请参阅图4，本申请实施例提供一种单光子探测器制作方法，该制作方法可用于制作单光子探测器，以下将对该制作方法的详细过程进行阐述。
请结合参阅图5至图10，步骤S110，在提供的衬底00一侧依次生长多层外延层，多层外延层包括缓冲层10、吸收层20、过渡层30、电荷层40、倍增层50、反型层60、迁移层70、窗口层80和欧姆接触层90。
步骤S120，通过扩散工艺在所述欧姆接触层90和窗口层80内形成弧形扩散区。
步骤S130，对所述衬底00上的部分外延层的边缘进行刻蚀，以形成台面结构。
步骤S140，在所述衬底00背面形成光窗口，以供入射光入射。
步骤S150，在所述欧姆接触层90上形成P型电极93，并在所述衬底00背面形成N型电极94。
本实施例中，在外延生长中引入的反型层60可以在电荷层40的调控基础上，对电场分布进而二次调控，最终得到的器件结构如图10中所示。
SPAD(Single Photon Avalanche Photo Diode)工作在反偏电压下，即SPAD的背电极与高电位连接，上电极与低电位连接。入射光从背电极所在的一侧向上电极方向入射，在吸收层20吸收并产生电子空穴对，光生空穴通过倍增层50，由于雪崩效应产生更多的电子空穴对。其中，吸收层20与电荷层40之间具有较大的能级差，而倍增层50与吸收层20之间的能级差较小，从而可以通过倍增层50减缓由于吸收层20与电荷层40之间能带不连续所导致的载流子迟滞。本实施例中，通过引入反型层60，可降低迁移层70的电场，保证迁移层70和窗口层80界面在较低的电场作用下工作，可以有效抑制边缘击穿效应。可以通过电荷层40和反型层60的电场强度对SPAD的内部电场进行调节，使得SPAD在工作状态下处于耗尽状态的各层有适当的电场强度，以实现载流子的高速漂移，同时可以防止过高的电场产生过大的暗电流或产生有害的雪崩倍增效应。
例如，参见图11，图11为本申请实施例提供的单光子探测器的电场分布示意图，可以看出倍增层50的电场强度在大于5*10 5伏特每厘米（V/cm），吸收层20的电场强度小于1*10 5 V/cm，迁移层70的电场强度小于1*10 5 V/cm。
本实施例所提供的单光子探测器制作方法，仅需采用一次扩散处理，并结合反型层60即可实现有效抑制边缘击穿的问题，不需要二次生长，具有工艺简单、可靠性高、成品率高等优势。相比于现有技术中需要两次扩散，或者一次扩散结合刻蚀和二次外延生长方式而言，可降低工艺的复杂性。该制作方法非常适合制作单光子探测器阵列。
请参阅图5，本实施例中，在上述步骤S110中，多层外延层，包括缓冲层10、吸收层20、过渡层30、电荷层40、倍增层50、反型层60、迁移层70、窗口层80和欧姆接触层90可通过一次外延生长依次形成。
其中，所述反型层60可由InP、InGaAs、InAlAs、InAlGaAs、InGaAsP中的一种或多种材料的组合构成，反型层60可为P型掺杂层。例如，可为p型InAlAs，具体地可为In 0.52Al 0.48As。所述反型层60的积分电荷密度为2.0*e 12/cm 2至4.0*e 12/cm 2，例如可为3.2*e 12/cm 2。反型层60的厚度可为150nm至300nm，可以起到电场调控、抑制边缘击穿的效果。
本实施例中，衬底00可以是高掺杂的n型InP衬底00，上述在衬底00上形成缓冲层10的步骤中，可以采用MOCVD技术在衬底00上形成n型缓冲层10。其中，缓冲层10的晶格系数应当与衬底00的晶格系数相近，例如，缓冲层10可为InP层，厚度可在50 nm至2000 nm之间。缓冲层10的掺杂浓度范围可以为n型1*e 15/cm 3至1*e 19/cm 3。
例如，缓冲层10的厚度可以为1000 nm，掺杂浓度可以为1*e 18/cm 3。
本实施例中，形成于缓冲层10上的吸收层20可由n型InGaAs材料制成，厚度范围可以为2000nm至2800nm。例如，厚度可为2000nm，掺杂为本征n型掺杂。过渡层30可为本征层，具有3段过渡，可由InGaAsP材料制成，其厚度范围可以为10 nm至300 nm。本实施例中，过渡层30可以有效提高器件的响应度。
电荷层40的厚度可为150nm至300nm，电荷层40可由n型InP材料制成，电荷层40积分电荷密度为2.4*e 12/cm 2至4.8*e 12/cm 2，例如可为2.4*e 12/cm 2，可以起到调控电场、抑制边缘击穿的效果。
所述倍增层50为器件中载流子和晶格发生碰撞电离的场所，倍增层50包括但不限于InP、AlGaAsSb、SiC等空穴型APD碰撞离化材料。所述穴型APD碰撞离化材料的特征是该材料空穴碰撞离化系数大于电子离化系数。
倍增层50的厚度范围可以为400nm至800nm，例如，所述倍增层50可由本征InP材料生成，厚度可为500nm。
所述迁移层70包括但不限于InP、InGaAs、InAlAs、InAlGaAs、InGaAsP等一种材料或者其中两种以上材料的组合。迁移层70的厚度范围为500 nm至700 nm，例如，可为500nm。掺杂可为本征n型或者n型轻掺杂，掺杂范围可为n型1*e 15/cm 3至1*e 17/cm 3。
窗口层80和欧姆接触层90可以由一次扩散工艺完成。扩散浓度的范围是1*e 17/cm 3至5*e 19/cm 3。其中，窗口层80和欧姆接触层90也可以由MOCVD生长完成。掺杂浓度的范围是1*e 17/cm 3至5*e 19/cm 3。窗口层80的厚度为1000nm至1500nm。欧姆接触层90的厚度为100nm至200nm，例如可为100nm。欧姆接触层90主要用于P型欧姆接触，其掺杂浓度越高，欧姆接触越好实现，厚度并非关键参数，但是厚度不能太厚，否则会影响P型掺杂的扩散速率。
请结合参阅图6，在本实施例中，在上述步骤S120中，可通过以下方式在欧姆接触层90和窗口层80内形成弧形扩散区：在所述欧姆接触层90上形成刻蚀层；在所述刻蚀层上定义刻蚀区域，并基于所述刻蚀区域对所述刻蚀层进行刻蚀形成刻蚀开口，所述刻蚀开口暴露出部分欧姆接触层90；基于所述刻蚀开口采用扩散工艺对所述欧姆接触层90和窗口层80进行P型扩散以形成P型掺杂的弧形扩散区。
本实施例中，可采用等离子体化学气相沉积（plasma enhanced chemical vapor deposition，PECVD）方式在欧姆接触层90上形成刻蚀层，该刻蚀层可为二氧化硅（SiO 2）或SiNx薄膜，形成的刻蚀层的厚度可为400 nm。
在刻蚀层上定义刻蚀区域，该刻蚀区域可为刻蚀层的中心位置，如中心位置的一圆形区域。可采用灰度曝光工艺和刻蚀工艺，基于刻蚀区域对刻蚀层进行刻蚀，以形成贯穿刻蚀层的刻蚀开口。
基于该刻蚀开口对欧姆接触层90以及下方的窗口层80进行P型扩散从而形成P型掺杂的弧形扩散区。
在扩散完成后，可将剩余的刻蚀层剥离并对器件进行清洗。
本实施例中，在上述步骤S130中，可以通过以下方式形成所述台面结构：对所述欧姆接触层90、窗口层80、迁移层70、反型层60、倍增层50、电荷层40、过渡层30、吸收层20、缓冲层10及部分衬底00的边缘进行刻蚀，以在所述衬底00的上方区域形成第一台面；对所述欧姆接触层90、窗口层80、迁移层70和反型层60的边缘进行刻蚀，以在所述倍增层50的上方区域形成第二台面。
本实施例中，可对衬底00上方的欧姆接触层90、窗口层80、迁移层70、反型层60、倍增层50、电荷层40、过渡层30、吸收层20、缓冲层10以及部分衬底00的边缘进行刻蚀。可采用干法刻蚀、湿法腐蚀或二者结合的方法进行刻蚀处理，从而在衬底00上形成第一台面。在采用干法和湿法刻蚀相结合的方式进行刻蚀时，可采用硫酸系溶液腐蚀欧姆接触层90，因为本实施例中，窗口层80为InP层，若采用盐酸系溶液容易腐蚀窗口层80。
在衬底00上形成第一台面，以便于后续在基于多个单光子探测器形成阵列时，单光子探测器之间可以相互隔离。刻蚀的宽度可在1微米至100微米之间，例如可为5微米。也即，后续阵列中单光子探测器之间的间隔距离在1微米至100微米之间。
在上述基础上，再对欧姆接触层90、窗口层80、迁移层70和反型层60的边缘进行刻蚀以在倍增层50的上方区域形成第二台面，以形成图7所述的器件结构。
本实施例中，可采用干法刻蚀、湿法腐蚀或者二者相结合的方式对欧姆接触层90、窗口层80、迁移层70和反型层60的边缘进行刻蚀，刻蚀停止于倍增层50表面，以在倍增层50的上方区域形成第二台面，可实现大面积吸收、小尺寸倍增的效果，从而达到增大光探测效率、降低暗计数的有益效果。
本实施例中，若采用干法和湿法刻蚀相结合的方式，可采用硫酸系溶液腐蚀欧姆接触层90，避免采用盐酸系溶液容易腐蚀InP的窗口层80的问题，以保证在倍增层50上方区域形成台面。
请结合参阅图8，在上述基础上，本实施例提供的制作方法还包括以下步骤：在所述第一台面和第二台面上形成钝化层91。
本实施例中，可采用PECVD工艺在第一台面和第二台面上形成钝化层91，所述钝化层91为高阻聚合物材料构成，或者由SiO 2、SiNx、Al 2O 3中的一个或多种构成。钝化层91形成于第一台面和第二台面的侧壁以及水平平面上。
钝化层91的厚度可为5 nm至3000 nm，以对台面进行钝化。例如，可采用PECVD工艺制备SiNx薄膜，薄膜厚度为500 nm。本实施例中，形成钝化层91可对台面进行钝化，可达到降低暗电流的效果。
请结合参阅图9，本实施例中，在上述步骤S140中，可通过以下方式在衬底00背面形成光窗口：对所述衬底00的背面进行腐蚀处理，腐蚀处理的厚度小于所述衬底00的厚度；在所述衬底00的腐蚀区域生长增透膜92，以形成光窗口。
本实施例中，生长的增透膜92可以是二氧化硅（SiO 2）、SiNx或者其它类似光学薄膜。例如，可采用PECVD 制备SiNx薄膜，薄膜厚度为1600 nm。由增透膜92所形成的光窗口，可以供入射光入射。上方区域中与光窗口所对应的通道区域为器件的有源区。
请结合参阅图10，本实施例中，在上述步骤S150中，可采用电子束蒸发或类似方法制作钛（Ti）、铂（Pt）或金（Au）材料的P型电极93，P型电极93位于器件的有源区上方。在形成阵列的情况下，单光子探测器阵列中各个探测器的P型电极93相互隔离。本实施例中，P型电极93覆盖整个器件有源区，又可以作为金属反射镜，使得衬底00侧入射的光在此反射，从而提高探测器量子效率。
本实施例中，可对衬底00进行减薄处理，并在减薄后的衬底00背面大面积制作N型电极94。在后续形成阵列的情况下，阵列中所有单光子探测器共用N型电极94。保证了单光子探测器良好的欧姆接触特性及可靠性。
本实施例中，在外延生长的外延结构中引入了反型层60，用于在所述电荷层40的调控基础上，对电场分布进行二次调控，可以降低扩散区边缘电场，进而有效抑制边缘击穿等问题。
本申请实施例还提供一种由上述制作方法制作而成的单光子探测器，如图10中所示。该单光子探测器包括衬底00、依次形成于衬底00上的多层外延层，多层外延层包括缓冲层10、吸收层20、过渡层30、电荷层40、倍增层50、反型层60、迁移层70、窗口层80和欧姆接触层90。其中，欧姆接触层90和窗口层80内形成有弧形扩散区。衬底00上的部分外延层的边缘被刻蚀以形成有台面结构。此外，单光子探测器还包括形成于衬底00背面的光窗口，以供入射光入射。还包括形成于欧姆接触层90上的P型电极93，及形成于衬底00背面的N型电极94。
在本实施例中，反型层60可用于在电荷层40的调控基础上，对电场分布进行二次调控。引入的反型层60可以降低扩散区边缘电场，进而有效抑制边缘击穿的问题。并且，本实施例提供的单光子探测器可由一次扩散及外延反型层60得到，不需要刻蚀台面及二次生长，具有工艺简单、可靠性高、成品率高等优点。
本实施例中，所述的台面结构包括第一台面和第二台面，其中，第一台面为对欧姆接触层90、窗口层80、迁移层70、反型层60、倍增层50、电荷层40、过渡层30、吸收层20、缓冲层10和部分衬底00的边缘进行刻蚀以在所述衬底00的上方区域形成的第一台面。第二台面为对欧姆接触层90、窗口层80、迁移层70和反型层60的边缘进行刻蚀，以在所述倍增层50的上方区域形成的第二台面。
在衬底00上形成第一台面，以便于后续在基于多个单光子探测器形成阵列时，单光子探测器之间可以相互隔离。第一台面的刻蚀宽度可在1微米至100微米之间，例如可为5微米。也即，后续阵列中单光子探测器之间的间隔距离在1微米至100微米之间。
在倍增层50上方区域形成第二台面，可实现大面积吸收、小尺寸倍增的效果，从而达到增大光探测效率、降低暗计数的有益效果。
在本实施例中，单光子探测器还包括生长于第一台面和第二台面上的钝化层91，该钝化层91为高阻聚合物材料构成，或者由SiO 2、SiNx、Al 2O 3中的一个或多种构成。钝化层91的厚度可为5 nm至3000 nm，例如，可采用PECVD工艺制备SiNx薄膜，薄膜厚度为500 nm。本实施例中，形成钝化层91可对台面进行钝化，可达到降低暗电流的效果。
在本实施例中，衬底00背面的光窗口包括形成于衬底00背面的凹槽以及位于凹槽内的增透膜92。该凹槽为对衬底00背面进行腐蚀形成。生长的增透膜92可以是二氧化硅（SiO 2）、SiNx或者其它类似光学薄膜。例如，可采用PECVD 制备SiNx薄膜，薄膜厚度为1600 nm。由增透膜92所形成的光窗口，可以供入射光入射。上方区域中与光窗口所对应的通道区域为器件的有源区。
本实施例中，P型电极93可为钛（Ti）、铂（Pt）或金（Au）材料制成，P型电极93覆盖整个器件有源区，又可以作为金属反射镜，使得衬底00侧入射的光在此反射，从而提高探测器量子效率。
在本实施例中，所述反型层60由InP、InGaAs、InAlAs、InAlGaAs、InGaAsP中的一种或多种组合所构成，反型层60可为P型掺杂层。例如，可为p型InAlAs，具体地可为In 0.52Al 0.48As。所述反型层60的积分电荷密度为2.0*e 12/cm 2至4.0*e 12/cm 2，例如可为3.2*e 12/cm 2。反型层60的厚度可为150nm至300nm，可以起到电场调控、抑制边缘击穿的效果。
本实施例中，衬底00可以是高掺杂的n型InP衬底00。缓冲层10的晶格系数应当与衬底00的晶格系数相近，例如，缓冲层10可为InP层，厚度可在50 nm至2000 nm之间。缓冲层10的掺杂浓度范围可以为n型1*e 15/cm 3至1*e 19/cm 3。例如，缓冲层10的厚度可以为1000 nm，掺杂浓度可以为1*e 18/cm 3。
本实施例中，形成于缓冲层10上的吸收层20可由n型InGaAs材料制成，厚度范围可以为2000nm至2800nm，例如，厚度可为2000nm，掺杂为本征n型掺杂。过渡层30可为本征层，具有3段过渡，可由InGaAsP材料制成，其厚度范围可以为10 nm 至300 nm。本实施例中，过渡层30可以有效提高器件的响应度。
电荷层40的厚度可为150nm至300nm，电荷层40可由n型InP材料制成，电荷层40积分电荷密度为2.4*e 12/cm 2至4.8*e 12/cm 2，例如可为2.4*e 12/cm 2，可以起到调控电场、抑制边缘击穿的效果。
所述倍增层50包括但不限于InP、AlGaAsSb、SiC等空穴型APD碰撞离化材料。所述穴型APD碰撞离化材料的特征是该材料空穴碰撞离化系数大于电子离化系数。
倍增层50为器件中载流子和晶格发生碰撞电离的场所，倍增层50的厚度范围可以为400nm至800nm，例如，所述倍增层50可由本征InP材料生成，厚度可为500nm。
所述迁移层70包括但不限于InP、InGaAs、InAlAs、InAlGaAs、InGaAsP等一种材料或者其中两种以上材料的组合。迁移层70的厚度范围为500 nm至700 nm，例如，可为500nm。掺杂可为本征n型或者n型轻掺杂，掺杂范围可为n型1*e 15/cm 3至1*e 17/cm 3。
窗口层80和欧姆接触层90中扩散浓度的范围是1*e 17/cm 3至5*e19/cm3。掺杂浓度的范围是1*e 17/cm 3至5*e 19/cm 3。窗口层80的厚度为1000nm至1500nm。欧姆接触层90的厚度为100nm至200nm，例如可为100nm。欧姆接触层90主要用于P型欧姆接触，其掺杂浓度越高，欧姆接触越好实现，其厚度并非关键参数，但是厚度不能太厚，否则会影响P型掺杂的扩散速率。
本实施例所提供的单光子探测器由上述单光子探测器制作方法制作而成，具有与上述制作方法中形成的探测器相同的特征，因此，本实施例中未详尽之处，可参见上述实施例中的相关描述，本实施例在此不作赘述。
请结合参阅图12，本申请实施例还提供一种单光子探测器阵列，该单光子探测器阵列包括多个上述任一实施方式中的单光子探测器，多个单光子探测器呈阵列排布。多个单光子探测器采用倒装焊工艺集成于读出电路，各个单光子探测器的P型电极93之间相互隔离，多个单光子探测器共用N型电极94。
本实施例中，阵列中各个单光子探测器采用倒装焊工艺，N型电极94与高电位连接、P型电极93与低电位连接。各个单光子探测器之间由隔离槽相互隔离，该隔离槽为由上述对衬底00上方的外延层及部分衬底00进行刻蚀所形成的第一台面而形成。单光子探测器阵列的表面由N型电极94覆盖，由读出电路驱动，光从器件背面入射。单光子探测器阵列经过信号处理，实现单光子探测功能。
本实施例所提供的单光子探测器阵列具有大光敏区、小增益区的特性，实现大面积吸收、小尺寸倍增，在增大光探测效率的前提下，可进一步降低暗计数。
本实施例所提供的单光子探测器阵列由多个上述任意实施方式中的单光子探测器构成，具有与上述单光子探测器相同的特征，因此，本实施例中未详尽之处，可参见上述实施例中的相关描述，本实施例在此不作赘述。
综上所述，本申请实施例提供的单光子探测器及其制作方法、单光子探测器阵列，通过在提供的衬底00一侧依次生长多层外延层，多层外延层包括缓冲层10、吸收层20、过渡层30、电荷层40、倍增层50、反型层60、迁移层70、窗口层80和欧姆接触层90，并通过扩散工艺在欧姆接触层90和窗口层80内形成弧形扩散区，对衬底00上的部分外延层的边缘进行刻蚀以形成台面结构，在衬底00背面形成光窗口，并在欧姆接触层90上形成P型电极93、在衬底00背面形成N型电极94。本方案中，仅需通过一次扩散处理并结合反型层60，即可有效降低扩散区域边缘电场，进而有效抑制边缘击穿问题，且相比现有的需要二次扩散处理或二次生长的方式而言，有效降低了制作工艺的复杂性。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (15)

  1. 一种单光子探测器的制作方法，其特征在于，所述方法包括：在提供的衬底一侧依次生长多层外延层，所述多层外延层包括缓冲层、吸收层、过渡层、电荷层、倍增层、反型层、迁移层、窗口层和欧姆接触层；通过扩散工艺在所述欧姆接触层和窗口层内形成弧形扩散区；对所述衬底上的部分外延层的边缘进行刻蚀，以形成台面结构；在所述衬底背面形成光窗口，以供入射光入射；在所述欧姆接触层上形成P型电极，并在所述衬底背面形成N型电极；其中，所述反型层用于在所述电荷层的调控基础上，对电场分布进行二次调控。
  2. 根据权利要求1所述的单光子探测器的制作方法，其特征在于，所述反型层由InP、InGaAs、InAlAs、InAlGaAs、InGaAsP中的一种或多种组合所构成。
  3. 根据权利要求1所述的单光子探测器的制作方法，其特征在于，所述反型层的积分电荷密度为2.0*e 12/cm 2至4.0*e 12/cm 2。
  4. 根据权利要求1所述的单光子探测器的制作方法，其特征在于，所述电荷层的厚度为150nm至300nm，所述倍增层的厚度为400nm至800nm，所述反型层的厚度为150nm至300nm。
  5. 根据权利要求1所述的单光子探测器的制作方法，其特征在于，所述通过扩散工艺在所述欧姆接触层和窗口层内形成弧形扩散区的步骤，包括：在所述欧姆接触层上形成刻蚀层；在所述刻蚀层上定义刻蚀区域，并基于所述刻蚀区域对所述刻蚀层进行刻蚀形成刻蚀开口，所述刻蚀开口暴露出部分欧姆接触层；基于所述刻蚀开口采用扩散工艺对所述欧姆接触层和窗口层进行P型扩散以形成P型掺杂的弧形扩散区。
  6. 根据权利要求1所述的单光子探测器的制作方法，其特征在于，所述对所述衬底上的部分外延层的边缘进行刻蚀，以形成台面结构的步骤，包括：对所述欧姆接触层、窗口层、迁移层、反型层、倍增层、电荷层、过渡层、吸收层、缓冲层及部分衬底的边缘进行刻蚀，以在所述衬底的上方区域形成第一台面；对所述欧姆接触层、窗口层、迁移层和反型层的边缘进行刻蚀，以在所述倍增层的上方区域形成第二台面。
  7. 根据权利要求6所述的单光子探测器的制作方法，其特征在于，所述对所述欧姆接触层、窗口层、迁移层和反型层的边缘进行刻蚀，以在所述倍增层的上方区域形成第二台面的步骤之后，所述方法还包括：在所述第一台面和第二台面上形成钝化层，所述钝化层为高阻聚合物材料构成，或者由SiO 2、SiNx、Al 2O 3中的一个或多种构成。
  8. 根据权利要求1所述的单光子探测器的制作方法，其特征在于，所述在所述衬底背面形成光窗口的步骤，包括：对所述衬底的背面进行腐蚀处理，腐蚀处理的厚度小于所述衬底的厚度；在所述衬底的腐蚀区域生长增透膜，以形成光窗口。
  9. 一种单光子探测器，其特征在于，包括：衬底；依次形成于所述衬底上的多层外延层，所述多层外延层包括缓冲层、吸收层、过渡层、电荷层、倍增层、反型层、迁移层、窗口层和欧姆接触层，其中，所述欧姆接触层和窗口层内形成有弧形扩散区，所述衬底上的部分外延层的边缘被刻蚀以形成有台面结构；形成于所述衬底背面的光窗口，以供入射光入射；形成于所述欧姆接触层上的P型电极，及形成于所述衬底背面的N型电极；其中，所述反型层用于在所述电荷层的调控基础上，对电场分布进行二次调控。
  10. 根据权利要求9所述的单光子探测器，其特征在于，所述台面结构包括：对所述欧姆接触层、窗口层、迁移层、反型层、倍增层、电荷层、过渡层、吸收层、缓冲层及部分衬底的边缘进行刻蚀以在所述衬底的上方区域形成的第一台面，以及对所述欧姆接触层、窗口层、迁移层和反型层的边缘进行刻蚀，以在所述倍增层的上方区域形成的第二台面。
  11. 根据权利要求10所述的单光子探测器，其特征在于，所述单光子探测器还包括：生长于所述第一台面和第二台面上的钝化层，所述钝化层为高阻聚合物材料构成，或者由SiO 2、SiNx、Al 2O 3中的一个或多种构成。
  12. 根据权利要求9所述的单光子探测器，其特征在于，所述反型层由InP、InGaAs、InAlAs、InAlGaAs、InGaAsP中的一种或多种组合所构成。
  13. 根据权利要求9所述的单光子探测器，其特征在于，所述反型层的积分电荷密度为2.0*e 12/cm 2至4.0*e 12/cm 2。
  14. 根据权利要求9所述的单光子探测器，其特征在于，所述电荷层的厚度为150nm至300nm，所述倍增层的厚度为400nm至800nm，所述反型层的厚度为150nm至300nm。
  15. 一种单光子探测器阵列，其特征在于，包括多个权利要求9所述的单光子探测器，多个所述单光子探测器呈阵列排布；多个所述单光子探测器采用倒装焊工艺集成于读出电路，各所述单光子探测器P型电极之间相互隔离，多个所述单光子探测器共用N型电极。
PCT/CN2022/118649 2021-09-30 2022-09-14 单光子探测器及其制作方法、单光子探测器阵列 WO2023051242A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2023538995A JP2024507428A (ja) 2021-09-30 2022-09-14 単一光子検出器及びその製造方法、単一光子検出器マトリックス

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202111159738.9 2021-09-30
CN202111159738.9A CN113921646B (zh) 2021-09-30 2021-09-30 单光子探测器及其制作方法、单光子探测器阵列

Publications (1)

Publication Number Publication Date
WO2023051242A1 true WO2023051242A1 (zh) 2023-04-06

Family

ID=79237414

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/118649 WO2023051242A1 (zh) 2021-09-30 2022-09-14 单光子探测器及其制作方法、单光子探测器阵列

Country Status (3)

Country Link
JP (1) JP2024507428A (zh)
CN (1) CN113921646B (zh)
WO (1) WO2023051242A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116504866A (zh) * 2023-06-29 2023-07-28 北京邮电大学 高时间分辨率单光子探测器及其制备方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113921646B (zh) * 2021-09-30 2023-03-31 厦门市三安集成电路有限公司 单光子探测器及其制作方法、单光子探测器阵列

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090315073A1 (en) * 2008-06-19 2009-12-24 National Central University Avalanche Photodiode
US20180151758A1 (en) * 2016-11-29 2018-05-31 Canon Kabushiki Kaisha Photodetection device and system having avalanche amplification
CN109346552A (zh) * 2018-10-22 2019-02-15 中国科学院半导体研究所 基于弧形扩散区的雪崩光电探测器及其制作方法
CN112289888A (zh) * 2020-10-10 2021-01-29 中国电子科技集团公司第十三研究所 InAlAs雪崩光电探测器及其制备方法
CN113921646A (zh) * 2021-09-30 2022-01-11 厦门市三安集成电路有限公司 单光子探测器及其制作方法、单光子探测器阵列

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2129814B1 (zh) * 1971-03-15 1976-04-16 Commissariat Energie Atomique
DE20321061U1 (de) * 1980-05-14 2005-11-10 Kemmer, Josef, Dr. Eintrittsfenster für Strahlungsdetektoren
CN101232057B (zh) * 2004-10-25 2012-05-09 三菱电机株式会社 雪崩光电二极管
CN101236219A (zh) * 2008-02-26 2008-08-06 上海大学 金属表面钝化膜载流子密度的检测方法
CN101752391B (zh) * 2008-11-28 2011-11-09 北京师范大学 具有mos全耗尽漂移通道的雪崩漂移探测器及其探测方法
CN102142658B (zh) * 2011-02-28 2012-10-31 北京航星网讯技术股份有限公司 天燃气检测用激光芯片的制造方法
US10497818B2 (en) * 2016-07-29 2019-12-03 Canon Kabushiki Kaisha Photodetection device and photodetection system
EP3654376A1 (en) * 2018-11-19 2020-05-20 Université de Genève Multi-junction pico-avalanche detector
CN110162879B (zh) * 2019-05-21 2021-03-09 中国科学技术大学 一种雪崩二极管电场的计算方法
CN110444617A (zh) * 2019-08-30 2019-11-12 武汉敏芯半导体股份有限公司 一种基于InGaAs材料的光电探测器及其制造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090315073A1 (en) * 2008-06-19 2009-12-24 National Central University Avalanche Photodiode
US20180151758A1 (en) * 2016-11-29 2018-05-31 Canon Kabushiki Kaisha Photodetection device and system having avalanche amplification
CN109346552A (zh) * 2018-10-22 2019-02-15 中国科学院半导体研究所 基于弧形扩散区的雪崩光电探测器及其制作方法
CN112289888A (zh) * 2020-10-10 2021-01-29 中国电子科技集团公司第十三研究所 InAlAs雪崩光电探测器及其制备方法
CN113921646A (zh) * 2021-09-30 2022-01-11 厦门市三安集成电路有限公司 单光子探测器及其制作方法、单光子探测器阵列

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116504866A (zh) * 2023-06-29 2023-07-28 北京邮电大学 高时间分辨率单光子探测器及其制备方法
CN116504866B (zh) * 2023-06-29 2023-09-08 北京邮电大学 高时间分辨率单光子探测器及其制备方法

Also Published As

Publication number Publication date
CN113921646B (zh) 2023-03-31
CN113921646A (zh) 2022-01-11
JP2024507428A (ja) 2024-02-20

Similar Documents

Publication Publication Date Title
WO2023051242A1 (zh) 单光子探测器及其制作方法、单光子探测器阵列
US7202102B2 (en) Doped absorption for enhanced responsivity for high speed photodiodes
CN106169516A (zh) 一种基于石墨烯的硅基紫外光电探测器及其制备方法
CN107403848B (zh) 一种背照式级联倍增雪崩光电二极管
CN110047955B (zh) 一种AlGaN紫外雪崩光电二极管探测器及其制备方法
CN113707751B (zh) 单光子雪崩光电探测器及其制备方法
US11742449B2 (en) Single photon avalanche diode device
JPH0799778B2 (ja) 広いバンドギヤツプキヤツプ層を有する背面照明形フオトダイオード
KR950004550B1 (ko) 수광소자
CN116598369B (zh) 低噪声单光子探测器及其制备方法
WO2022099747A1 (zh) 一种850nm波段高响应度探测器
CN213212172U (zh) 一种850nm波段高响应度探测器
CN110350045B (zh) PbS量子点Si-APD红外探测器及其制备方法
CN218101277U (zh) 一种半透明电极紫外单光子探测器
CN217562581U (zh) 一种栅型电极结构SiC雪崩光电二极管
CN110797421B (zh) 一种日盲紫外单光子雪崩探测器
JPH07231108A (ja) 太陽電池
Guo et al. Design and fabrication of 4H-SiC Sam-APD ultraviolet photodetector
CN113594275A (zh) 一种新型双台面碳化硅sacm单光子探测器及其制备方法
CN112382687A (zh) 一种平面型光电探测器及其制备方法
CN118099260A (zh) 一种紫外探测器及其制备方法
CN115548148A (zh) 半导体紫外探测器及其制备方法
CN109301024A (zh) 一种新型p-i-n紫外光电二极管及其制备方法
CN116885030A (zh) 一种选区刻蚀再生长4H-SiC雪崩光电探测器
CN115312616A (zh) 一种全平面离子注入倾斜高阻终端结构的4H-SiC雪崩光电探测器

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22874629

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2023538995

Country of ref document: JP